if_bwnreg.h (300075) | if_bwnreg.h (300186) |
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1/*- 2 * Copyright (c) 2009-2010 Weongyo Jeong <weongyo@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * | 1/*- 2 * Copyright (c) 2009-2010 Weongyo Jeong <weongyo@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * |
29 * $FreeBSD: head/sys/dev/bwn/if_bwnreg.h 300075 2016-05-17 20:18:23Z adrian $ | 29 * $FreeBSD: head/sys/dev/bwn/if_bwnreg.h 300186 2016-05-19 04:22:58Z adrian $ |
30 */ 31 32#ifndef _IF_BWNREG_H 33#define _IF_BWNREG_H 34 35#define PCI_VENDOR_COMPAQ 0x0e11 36#define PCI_VENDOR_DELL 0x1028 37#define PCI_VENDOR_HP 0x103c --- 54 unchanged lines hidden (view full) --- 92#define BWN_BFH2_GPLL_WAR2 0x0001 93#define BWN_BFH2_IPALVLSHIFT_3P3 0x0002 94#define BWN_BFH2_INTERNDET_TXIQCAL 0x0004 95#define BWN_BFH2_XTALBUFOUTEN 0x0008 96 97/* SIBA control registers */ 98#define BWN_TGSLOW_PHYCLOCK_ENABLE 0x00040000 99#define BWN_TGSLOW_PHYRESET 0x00080000 | 30 */ 31 32#ifndef _IF_BWNREG_H 33#define _IF_BWNREG_H 34 35#define PCI_VENDOR_COMPAQ 0x0e11 36#define PCI_VENDOR_DELL 0x1028 37#define PCI_VENDOR_HP 0x103c --- 54 unchanged lines hidden (view full) --- 92#define BWN_BFH2_GPLL_WAR2 0x0001 93#define BWN_BFH2_IPALVLSHIFT_3P3 0x0002 94#define BWN_BFH2_INTERNDET_TXIQCAL 0x0004 95#define BWN_BFH2_XTALBUFOUTEN 0x0008 96 97/* SIBA control registers */ 98#define BWN_TGSLOW_PHYCLOCK_ENABLE 0x00040000 99#define BWN_TGSLOW_PHYRESET 0x00080000 |
100#define BWN_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Control Enable (rev >= 5) */ 101#define BWN_TMSLOW_PLLREFSEL 0x00200000 /* PLL Frequency Reference Select (rev >= 5) */ | 100#define BWN_TGSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Control Enable (rev >= 5) */ 101#define BWN_TGSLOW_PLLREFSEL 0x00200000 /* PLL Frequency Reference Select (rev >= 5) */ |
102/* PHY_BANDWIDTH: N-PHY only */ 103#define BWN_TGSLOW_PHY_BANDWIDTH 0x00C00000 104#define BWN_TGSLOW_PHY_BANDWIDTH_10MHZ 0x00000000 105#define BWN_TGSLOW_PHY_BANDWIDTH_20MHZ 0x00400000 106#define BWN_TGSLOW_PHY_BANDWIDTH_40MHZ 0x00800000 107#define BWN_TGSLOW_SUPPORT_G 0x20000000 108 109#define BWN_TGSHIGH_HAVE_2GHZ 0x00010000 --- 1008 unchanged lines hidden --- | 102/* PHY_BANDWIDTH: N-PHY only */ 103#define BWN_TGSLOW_PHY_BANDWIDTH 0x00C00000 104#define BWN_TGSLOW_PHY_BANDWIDTH_10MHZ 0x00000000 105#define BWN_TGSLOW_PHY_BANDWIDTH_20MHZ 0x00400000 106#define BWN_TGSLOW_PHY_BANDWIDTH_40MHZ 0x00800000 107#define BWN_TGSLOW_SUPPORT_G 0x20000000 108 109#define BWN_TGSHIGH_HAVE_2GHZ 0x00010000 --- 1008 unchanged lines hidden --- |