1/* 2 * Copyright (c) 1995 Mark Tinguely and Jim Lowe 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Mark Tinguely and Jim Lowe 16 * 4. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 27 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 28 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31#ifndef PCI_LATENCY_TIMER 32#define PCI_LATENCY_TIMER 0x0c /* pci timer register */ 33#endif 34 35/* 36 * Definitions for the Philips SAA7116 digital video to pci interface. 37 */ 38#define BROOKTREE_848_ID 0x0350109E 39 40typedef volatile u_int bregister_t; 41/* 42 * if other persuasion endian, then compiler will probably require that 43 * these next 44 * macros be reversed 45 */ 46#define BTBYTE(what) bregister_t what:8; int :24 47#define BTWORD(what) bregister_t what:16; int: 16 48#define BTLONG(what) bregister_t what:32 49 50struct bt848_registers { 51 BTBYTE (dstatus); /* 0, 1,2,3 */ 52#define BT848_DSTATUS_PRES (1<<7) 53#define BT848_DSTATUS_HLOC (1<<6) 54#define BT848_DSTATUS_FIELD (1<<5) 55#define BT848_DSTATUS_NUML (1<<4) 56#define BT848_DSTATUS_CSEL (1<<3) 57#define BT848_DSTATUS_LOF (1<<1) 58#define BT848_DSTATUS_COF (1<<0) 59 BTBYTE (iform); /* 4, 5,6,7 */ 60#define BT848_IFORM_MUXSEL (0x3<<5) 61# define BT848_IFORM_M_MUX1 (0x03<<5) 62# define BT848_IFORM_M_MUX0 (0x02<<5) 63# define BT848_IFORM_M_MUX2 (0x01<<5) 64# define BT848_IFORM_M_RSVD (0x00<<5) 65#define BT848_IFORM_XTSEL (0x3<<3) 66# define BT848_IFORM_X_AUTO (0x03<<3) 67# define BT848_IFORM_X_XT1 (0x02<<3) 68# define BT848_IFORM_X_XT0 (0x01<<3) 69# define BT848_IFORM_X_RSVD (0x00<<3) 70 BTBYTE (tdec); /* 8, 9,a,b */ 71 BTBYTE (e_crop); /* c, d,e,f */ 72 BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */ 73 BTBYTE (e_vactive_lo); /* 14, 15,16,17 */ 74 BTBYTE (e_delay_lo); /* 18, 19,1a,1b */ 75 BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */ 76 BTBYTE (e_hscale_hi); /* 20, 21,22,23 */ 77 BTBYTE (e_hscale_lo); /* 24, 25,26,27 */ 78 BTBYTE (bright); /* 28, 29,2a,2b */ 79 BTBYTE (e_control); /* 2c, 2d,2e,2f */ 80#define BT848_E_CONTROL_LNOTCH (1<<7) 81#define BT848_E_CONTROL_COMP (1<<6) 82#define BT848_E_CONTROL_LDEC (1<<5) 83#define BT848_E_CONTROL_CBSENSE (1<<4) 84#define BT848_E_CONTROL_RSVD (1<<3) 85#define BT848_E_CONTROL_CON_MSB (1<<2) 86#define BT848_E_CONTROL_SAT_U_MSB (1<<1) 87#define BT848_E_CONTROL_SAT_V_MSB (1<<0) 88 BTBYTE (contrast_lo); /* 30, 31,32,33 */ 89 BTBYTE (sat_u_lo); /* 34, 35,36,37 */ 90 BTBYTE (sat_v_lo); /* 38, 39,3a,3b */ 91 BTBYTE (hue); /* 3c, 3d,3e,3f */ 92 BTBYTE (e_scloop); /* 40, 41,42,43 */ 93#define BT848_E_SCLOOP_RSVD1 (1<<7) 94#define BT848_E_SCLOOP_CAGC (1<<6) 95#define BT848_E_SCLOOP_CKILL (1<<5) 96#define BT848_E_SCLOOP_HFILT (0x3<<3) 97# define BT848_E_SCLOOP_HFILT_ICON (0x3<<3) 98# define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3) 99# define BT848_E_SCLOOP_HFILT_CIF (0x1<<3) 100# define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3) 101#define BT848_E_SCLOOP_RSVD0 (0x7<<0) 102 int :32; /* 44, 45,46,47 */ 103 BTBYTE (oform); /* 48, 49,4a,4b */ 104 BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */ 105 BTBYTE (e_vscale_lo); /* 50, 51,52,53 */ 106 BTBYTE (test); /* 54, 55,56,57 */ 107 int :32; /* 58, 59,5a,5b */ 108 int :32; /* 5c, 5d,5e,5f */ 109 BTLONG (adelay); /* 60, 61,62,63 */ 110 BTBYTE (bdelay); /* 64, 65,66,67 */ 111 BTBYTE (adc); /* 68, 69,6a,6b */ 112#define BT848_ADC_RESERVED (0x80) /* required pattern */ 113#define BT848_ADC_SYNC_T (1<<5) 114#define BT848_ADC_AGC_EN (1<<4) 115#define BT848_ADC_CLK_SLEEP (1<<3) 116#define BT848_ADC_Y_SLEEP (1<<2) 117#define BT848_ADC_C_SLEEP (1<<1) 118#define BT848_ADC_CRUSH (1<<0) 119 BTBYTE (e_vtc); /* 6c, 6d,6e,6f */ 120 int :32; /* 70, 71,72,73 */ 121 int :32; /* 74, 75,76,77 */ 122 int :32; /* 78, 79,7a,7b */ 123 BTLONG (sreset); /* 7c, 7d,7e,7f */ 124 u_char filler[0x8c-0x80]; 125 BTBYTE (o_crop); /* 8c, 8d,8e,8f */ 126 BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */ 127 BTBYTE (o_vactive_lo); /* 94, 95,96,97 */ 128 BTBYTE (o_delay_lo); /* 98, 99,9a,9b */ 129 BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */ 130 BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */ 131 BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */ 132 int :32; /* a8, a9,aa,ab */ 133 BTBYTE (o_control); /* ac, ad,ae,af */ 134#define BT848_O_CONTROL_LNOTCH (1<<7) 135#define BT848_O_CONTROL_COMP (1<<6) 136#define BT848_O_CONTROL_LDEC (1<<5) 137#define BT848_O_CONTROL_CBSENSE (1<<4) 138#define BT848_O_CONTROL_RSVD (1<<3) 139#define BT848_O_CONTROL_CON_MSB (1<<2) 140#define BT848_O_CONTROL_SAT_U_MSB (1<<1) 141#define BT848_O_CONTROL_SAT_V_MSB (1<<0) 142 u_char fillter1[16]; 143 BTBYTE (o_scloop); /* c0, c1,c2,c3 */ 144#define BT848_O_SCLOOP_RSVD1 (1<<7) 145#define BT848_O_SCLOOP_CAGC (1<<6) 146#define BT848_O_SCLOOP_CKILL (1<<5) 147#define BT848_O_SCLOOP_HFILT (0x3<<3) 148# define BT848_O_SCLOOP_HFILT_ICON (0x3<<3) 149# define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3) 150# define BT848_O_SCLOOP_HFILT_CIF (0x1<<3) 151# define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3) 152#define BT848_O_SCLOOP_RSVD0 (0x7<<0) 153 int :32; /* c4, c5,c6,c7 */ 154 int :32; /* c8, c9,ca,cb */ 155 BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */ 156 BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */ 157 BTBYTE (color_fmt); /* d4, d5,d6,d7 */ 158 bregister_t color_ctl_swap :4; /* d8 */ 159#define BT848_COLOR_CTL_WSWAP_ODD (1<<3) 160#define BT848_COLOR_CTL_WSWAP_EVEN (1<<2) 161#define BT848_COLOR_CTL_BSWAP_ODD (1<<1) 162#define BT848_COLOR_CTL_BSWAP_EVEN (1<<0) 163 bregister_t color_ctl_gamma :1; 164 bregister_t color_ctl_rgb_ded :1; 165 bregister_t color_ctl_color_bars :1; 166 bregister_t color_ctl_ext_frmrate :1; 167 int :24; /* d9,da,db */ 168 BTBYTE (cap_ctl); /* dc, dd,de,df */ 169#define BT848_CAP_CTL_DITH_FRAME (1<<4) 170#define BT848_CAP_CTL_VBI_ODD (1<<3) 171#define BT848_CAP_CTL_VBI_EVEN (1<<2) 172#define BT848_CAP_CTL_ODD (1<<1) 173#define BT848_CAP_CTL_EVEN (1<<0) 174 BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */ 175 BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */ 176 int :32; /* e8, e9,ea,eb */ 177 BTBYTE (o_vtc); /* ec, ed,ee,ef */ 178 u_char filler2[0x100-0xf0]; 179 BTLONG (int_stat); /* 100, 101,102,103 */ 180 BTLONG (int_mask); /* 104, 105,106,107 */ 181#define BT848_INT_RISCS (0xf<<28) 182#define BT848_INT_RISC_EN (1<<27) 183#define BT848_INT_RACK (1<<25) 184#define BT848_INT_FIELD (1<<24) 185#define BT848_INT_MYSTERYBIT (1<<23) 186#define BT848_INT_SCERR (1<<19) 187#define BT848_INT_OCERR (1<<18) 188#define BT848_INT_PABORT (1<<17) 189#define BT848_INT_RIPERR (1<<16) 190#define BT848_INT_PPERR (1<<15) 191#define BT848_INT_FDSR (1<<14) 192#define BT848_INT_FTRGT (1<<13) 193#define BT848_INT_FBUS (1<<12) 194#define BT848_INT_RISCI (1<<11) 195#define BT848_INT_GPINT (1<<9) 196#define BT848_INT_I2CDONE (1<<8) 197#define BT848_INT_RSV1 (1<<7) 198#define BT848_INT_RSV0 (1<<6) 199#define BT848_INT_VPRES (1<<5) 200#define BT848_INT_HLOCK (1<<4) 201#define BT848_INT_OFLOW (1<<3) 202#define BT848_INT_HSYNC (1<<2) 203#define BT848_INT_VSYNC (1<<1) 204#define BT848_INT_FMTCHG (1<<0) 205 int :32; /* 108, 109,10a,10b */ 206 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */ 207#define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */ 208#define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */ 209#define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */ 210#define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */ 211#define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */ 212#define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */ 213#define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */ 214#define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */ 215#define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */ 216#define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */ 217#define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */ 218#define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */ 219#define BT848_DMA_CTL_RISC_EN (1<<1) 220#define BT848_DMA_CTL_FIFO_EN (1<<0) 221 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */ 222#define BT848_DATA_CTL_I2CDIV (0xf<<4) 223#define BT848_DATA_CTL_I2CSYNC (1<<3) 224#define BT848_DATA_CTL_I2CW3B (1<<2) 225#define BT848_DATA_CTL_I2CSCL (1<<1) 226#define BT848_DATA_CTL_I2CSDA (1<<0) 227 BTLONG (risc_strt_add); /* 114, 115,116,117 */ 228 BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */ 229 BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */ 230 BTLONG (risc_count); /* 120, 121,122,123 */ 231 u_char filler3[0x200-0x124]; 232 BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */ 233}; 234 235typedef volatile struct bt848_registers* bt848_ptr_t; 236 237 238#if 0 239/* force people to be aware of the new struct */ 240 241#define BKTR_DSTATUS 0x000 242#define BKTR_IFORM 0x004 243#define BKTR_TDEC 0x008 244#define BKTR_EVEN_CROP 0x00C 245#define BKTR_ODD_CROP 0x08C 246#define BKTR_E_VDELAY_LO 0x010 247#define BKTR_O_VDELAY_LO 0x090 248#define BKTR_E_VACTIVE_LO 0x014 249#define BKTR_O_VACTIVE_LO 0x094 250#define BKTR_E_DELAY_LO 0x018 251#define BKTR_O_DELAY_LO 0x098 252#define BKTR_E_HACTIVE_LO 0x01C 253#define BKTR_O_HACTIVE_LO 0x09C 254#define BKTR_E_HSCALE_HI 0x020 255#define BKTR_O_HSCALE_HI 0x0A0 256#define BKTR_E_HSCALE_LO 0x024 257#define BKTR_O_HSCALE_LO 0x0A4 258#define BKTR_BRIGHT 0x028 259#define BKTR_E_CONTROL 0x02C 260#define BKTR_O_CONTROL 0x0AC 261#define BKTR_CONTRAST_LO 0x030 262#define BKTR_SAT_U_LO 0x034 263#define BKTR_SAT_V_LO 0x038 264#define BKTR_HUE 0x03C 265#define BKTR_E_SCLOOP 0x040 266#define BKTR_O_SCLOOP 0x0C0 267#define BKTR_OFORM 0x048 268#define BKTR_E_VSCALE_HI 0x04C 269#define BKTR_O_VSCALE_HI 0x0CC 270#define BKTR_E_VSCALE_LO 0x050 271#define BKTR_O_VSCALE_LO 0x0D0 272#define BKTR_TEST 0x054 273#define BKTR_ADELAY 0x060 274#define BKTR_BDELAY 0x064 275#define BKTR_ADC 0x068 276#define BKTR_E_VTC 0x06C 277#define BKTR_O_VTC 0x0EC 278#define BKTR_SRESET 0x07C 279#define BKTR_COLOR_FMT 0x0D4 280#define BKTR_COLOR_CTL 0x0D8 281#define BKTR_CAP_CTL 0x0DC 282#define BKTR_VBI_PACK_SIZE 0x0E0 283#define BKTR_VBI_PACK_DEL 0x0E4 284#define BKTR_INT_STAT 0x100 285#define BKTR_INT_MASK 0x104 286#define BKTR_RISC_COUNT 0x120 287#define BKTR_RISC_STRT_ADD 0x114 288#define BKTR_GPIO_DMA_CTL 0x10C 289#define BKTR_GPIO_OUT_EN 0x118 290#define BKTR_GPIO_REG_INP 0x11C 291#define BKTR_GPIO_DATA 0x200 292#define BKTR_I2C_CONTROL 0x110 293 294#endif /* 0 */ 295 296/* 297 * device support for onboard tv tuners 298 */ 299 300/* description of the LOGICAL tuner */ 301struct TVTUNER { 302 int frequency; 303 u_char chnlset; 304 u_char channel; 305 u_char band; 306 u_char afc; 307}; 308 309/* description of the PHYSICAL tuner */ 310struct TUNER { 311 char* name; 312 u_char type; 313 u_char pllAddr;
|