1/* $FreeBSD: head/sys/dev/bktr/bktr_core.c 51658 1999-09-25 18:24:47Z phk $ */
2/* BT848 Driver for Brooktree's Bt848, Bt848A, Bt849A, Bt878, Bt879 based cards.
3 The Brooktree BT848 Driver driver is based upon Mark Tinguely and
| 1/* $FreeBSD: head/sys/dev/bktr/bktr_core.c 51694 1999-09-26 22:06:20Z roger $ */
2
3/*
4 * This is part of the Driver for Video Capture Cards (Frame grabbers)
5 * and TV Tuner cards using the Brooktree Bt848, Bt848A, Bt849A, Bt878, Bt879
6 * chipset.
7 * Copyright Roger Hardiman and Amancio Hasty.
8 *
9 * bktr_core : This deals with the Bt848/849/878/879 PCI Frame Grabber,
10 * Handles all the open, close, ioctl and read userland calls.
11 * Sets the Bt848 registers and generates RISC pograms.
12 * Controls the i2c bus and GPIO interface.
13 * Contains the interface to the kernel.
14 * (eg probe/attach and open/close/ioctl)
15 *
16 */
17
18 /*
19 The Brooktree BT848 Driver driver is based upon Mark Tinguely and
|
4 Jim Lowe's driver for the Matrox Meteor PCI card . The
5 Philips SAA 7116 and SAA 7196 are very different chipsets than
| 20 Jim Lowe's driver for the Matrox Meteor PCI card . The
21 Philips SAA 7116 and SAA 7196 are very different chipsets than
|
6 the BT848. For starters, the BT848 is a one chipset solution and
7 it incorporates a RISC engine to control the DMA transfers --
8 that is it the actual dma process is control by a program which
9 resides in the hosts memory also the register definitions between
10 the Philips chipsets and the Bt848 are very different.
| 22 the BT848.
|
11
12 The original copyright notice by Mark and Jim is included mostly
13 to honor their fantastic work in the Matrox Meteor driver!
14
| 23
24 The original copyright notice by Mark and Jim is included mostly
25 to honor their fantastic work in the Matrox Meteor driver!
26
|
15 Enjoy,
16 Amancio
17
| |
18 */
19
20/*
21 * 1. Redistributions of source code must retain the
| 27 */
28
29/*
30 * 1. Redistributions of source code must retain the
|
22 * Copyright (c) 1997 Amancio Hasty
| 31 * Copyright (c) 1997 Amancio Hasty, 1999 Roger Hardiman
|
23 * All rights reserved.
24 *
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
27 * are met:
28 * 1. Redistributions of source code must retain the above copyright
29 * notice, this list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright
31 * notice, this list of conditions and the following disclaimer in the
32 * documentation and/or other materials provided with the distribution.
33 * 3. All advertising materials mentioning features or use of this software
34 * must display the following acknowledgement:
| 32 * All rights reserved.
33 *
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
36 * are met:
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. All advertising materials mentioning features or use of this software
43 * must display the following acknowledgement:
|
35 * This product includes software developed by Amancio Hasty
| 44 * This product includes software developed by Amancio Hasty and
45 * Roger Hardiman
|
36 * 4. The name of the author may not be used to endorse or promote products
37 * derived from this software without specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
40 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
41 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
42 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
43 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
47 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
48 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
49 * POSSIBILITY OF SUCH DAMAGE.
50 */
51
52
53
54
55/*
56 * 1. Redistributions of source code must retain the
57 * Copyright (c) 1995 Mark Tinguely and Jim Lowe
58 * All rights reserved.
59 *
60 * Redistribution and use in source and binary forms, with or without
61 * modification, are permitted provided that the following conditions
62 * are met:
63 * 1. Redistributions of source code must retain the above copyright
64 * notice, this list of conditions and the following disclaimer.
65 * 2. Redistributions in binary form must reproduce the above copyright
66 * notice, this list of conditions and the following disclaimer in the
67 * documentation and/or other materials provided with the distribution.
68 * 3. All advertising materials mentioning features or use of this software
69 * must display the following acknowledgement:
70 * This product includes software developed by Mark Tinguely and Jim Lowe
71 * 4. The name of the author may not be used to endorse or promote products
72 * derived from this software without specific prior written permission.
73 *
74 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
75 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
76 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
77 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
78 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
79 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
80 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
81 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
82 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
83 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
84 * POSSIBILITY OF SUCH DAMAGE.
85 */
86
| 46 * 4. The name of the author may not be used to endorse or promote products
47 * derived from this software without specific prior written permission.
48 *
49 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
50 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
51 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
52 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
53 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
54 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
55 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
56 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
57 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
58 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
59 * POSSIBILITY OF SUCH DAMAGE.
60 */
61
62
63
64
65/*
66 * 1. Redistributions of source code must retain the
67 * Copyright (c) 1995 Mark Tinguely and Jim Lowe
68 * All rights reserved.
69 *
70 * Redistribution and use in source and binary forms, with or without
71 * modification, are permitted provided that the following conditions
72 * are met:
73 * 1. Redistributions of source code must retain the above copyright
74 * notice, this list of conditions and the following disclaimer.
75 * 2. Redistributions in binary form must reproduce the above copyright
76 * notice, this list of conditions and the following disclaimer in the
77 * documentation and/or other materials provided with the distribution.
78 * 3. All advertising materials mentioning features or use of this software
79 * must display the following acknowledgement:
80 * This product includes software developed by Mark Tinguely and Jim Lowe
81 * 4. The name of the author may not be used to endorse or promote products
82 * derived from this software without specific prior written permission.
83 *
84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
85 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
86 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
87 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
88 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
89 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
92 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
93 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
94 * POSSIBILITY OF SUCH DAMAGE.
95 */
96
|
87/* Change History:
88Note: These version numbers represent the authors own numbering.
89They are unrelated to Revision Control numbering of FreeBSD or any other system.
901.0 1/24/97 First Alpha release
| |
91
| 97
|
921.1 2/20/97 Added video ioctl so we can do PCI To PCI
93 data transfers. This is for capturing data
94 directly to a vga frame buffer which has
95 a linear frame buffer. Minor code clean-up.
96
971.3 2/23/97 Fixed system lock-up reported by
98 Randall Hopper <rhh@ct.picker.com>. This
99 problem seems somehow to be exhibited only
100 in his system. I changed the setting of
101 INT_MASK for CAP_CONTINUOUS to be exactly
102 the same as CAP_SINGLE apparently setting
103 bit 23 cleared the system lock up.
104 version 1.1 of the driver has been reported
105 to work with STB's WinTv, Hauppage's Wincast/Tv
106 and last but not least with the Intel Smart
107 Video Recorder.
108
1091.4 3/9/97 fsmp@freefall.org
110 Merged code to support tuners on STB and WinCast
111 cards.
112 Modifications to the contrast and chroma ioctls.
113 Textual cleanup.
114
1151.5 3/15/97 fsmp@freefall.org
116 new bt848 specific versions of hue/bright/
117 contrast/satu/satv.
118 Amancio's patch to fix "screen freeze" problem.
119
1201.6 3/19/97 fsmp@freefall.org
121 new table-driven frequency lookup.
122 removed disable_intr()/enable_intr() calls from i2c.
123 misc. cleanup.
124
1251.7 3/19/97 fsmp@freefall.org
126 added audio support submitted by:
127 Michael Petry <petry@netwolf.NetMasters.com>
128
1291.8 3/20/97 fsmp@freefall.org
130 extended audio support.
131 card auto-detection.
132 major cleanup, order of routines, declarations, etc.
133
1341.9 3/22/97 fsmp@freefall.org
135 merged in Amancio's minor unit for tuner control
136 mods.
137 misc. cleanup, especially in the _intr routine.
138 made AUDIO_SUPPORT mainline code.
139
1401.10 3/23/97 fsmp@freefall.org
141 added polled hardware i2c routines,
142 removed all existing software i2c routines.
143 created software i2cProbe() routine.
144 Randall Hopper's fixes of BT848_GHUE & BT848_GBRIG.
145 eeprom support.
146
1471.11 3/24/97 fsmp@freefall.org
148 Louis Mamakos's new bt848 struct.
149
1501.12 3/25/97 fsmp@freefall.org
151 japanese freq table from Naohiro Shichijo.
152 new table structs for tuner lookups.
153 major scrub for "magic numbers".
154
1551.13 3/28/97 fsmp@freefall.org
156 1st PAL support.
157 MAGIC_[1-4] demarcates magic #s needing PAL work.
158 AFC code submitted by Richard Tobin
159 <richard@cogsci.ed.ac.uk>.
160
1611.14 3/29/97 richard@cogsci.ed.ac.uk
162 PAL support: magic numbers moved into
163 format_params structure.
164 Revised AFC interface.
165 fixed DMA_PROG_ALLOC size misdefinition.
166
1671.15 4/18/97 John-Mark Gurney <gurney_j@resnet.uoregon.edu>
168 Added [SR]RGBMASKs ioctl for byte swapping.
169
1701.16 4/20/97 Randall Hopper <rhh@ct.picker.com>
171 Generalized RGBMASK ioctls for general pixel
172 format setting [SG]ACTPIXFMT, and added query API
173 to return driver-supported pix fmts GSUPPIXFMT.
174
1751.17 4/21/97 hasty@rah.star-gate.com
176 Clipping support added.
177
1781.18 4/23/97 Clean up after failed CAP_SINGLEs where bt
179 interrupt isn't delivered, and fixed fixing
180 CAP_SINGLEs that for ODD_ONLY fields.
1811.19 9/8/97 improved yuv support , cleaned up weurope
182 channel table, incorporated cleanup work from
183 Luigi, fixed pci interface bug due to a
184 change in the pci interface which disables
185 interrupts from a PCI device by default,
186 Added Luigi's, ioctl's BT848_SLNOTCH,
187 BT848_GLNOTCH (set luma notch and get luma not)
1881.20 10/5/97 Keith Sklower <sklower@CS.Berkeley.EDU> submitted
189 a patch to fix compilation of the BSDI's PCI
190 interface.
191 Hideyuki Suzuki <hideyuki@sat.t.u-tokyo.ac.jp>
192 Submitted a patch for Japanese cable channels
193 Joao Carlos Mendes Luis jonny@gta.ufrj.br
194 Submitted general ioctl to set video broadcast
195 formats (PAL, NTSC, etc..) previously we depended
196 on the Bt848 auto video detect feature.
1971.21 10/24/97 Randall Hopper <rhh@ct.picker.com>
198 Fix temporal decimation, disable it when
199 doing CAP_SINGLEs, and in dual-field capture, don't
200 capture fields for different frames
2011.22 11/08/97 Randall Hopper <rhh@ct.picker.com>
202 Fixes for packed 24bpp - FIFO alignment
2031.23 11/17/97 Amancio <hasty@star-gate.com>
204 Added yuv support mpeg encoding
2051.24 12/27/97 Jonathan Hanna <pangolin@rogers.wave.ca>
206 Patch to support Philips FR1236MK2 tuner
2071.25 02/02/98 Takeshi Ohashi
208 <ohashi@atohasi.mickey.ai.kyutech.ac.jp> submitted
209 code to support bktr_read .
210 Flemming Jacobsen <fj@schizo.dk.tfs.com>
211 submitted code to support radio available with in
212 some bt848 based cards;additionally, wrote code to
213 correctly recognized his bt848 card.
214 Roger Hardiman <roger@cs.strath.ac.uk> submitted
215 various fixes to smooth out the microcode and made
216 all modes consistent.
2171.26 Moved Luigi's I2CWR ioctl from the video_ioctl
218 section to the tuner_ioctl section
219 Changed Major device from 79 to 92 and reserved
220 our Major device number -- hasty@star-gate.com
2211.27 Last batch of patches for radio support from
222 Flemming Jacobsen <fj@trw.nl>.
223 Added B849 PCI ID submitted by:
224 Tomi Vainio <tomppa@fidata.fi>
2251.28 Frank Nobis <fn@Radio-do.de> added tuner support
226 for the German Phillips PAL tuner and
227 additional channels for german cable tv.
2281.29 Roger Hardiman <roger@cs.strath.ac.uk>
229 Revised autodetection code to correctly handle both
230 old and new VideoLogic Captivator PCI cards.
231 Added tsleep of 2 seconds to initialistion code
232 for PAL users.Corrected clock selection code on
233 format change.
2341.30 Bring back Frank Nobis <fn@Radio-do.de>'s opt_bktr.h
235
2361.31 Randall Hopper <rhh@ct.picker.com>
237 submitted ioctl to clear the video buffer
238 prior to starting video capture
239 Amancio : clean up yuv12 so that it does not
240 affect rgb capture. Basically, fxtv after
241 capturing in yuv12 mode , switching to rgb
242 would cause the video capture to be too bright.
2431.32 disable inverse gamma function for rgb and yuv
244 capture. fixed meteor brightness ioctl it now
245 converts the brightness value from unsigned to
246 signed.
2471.33 added sysctl: hw.bt848.tuner, hw.bt848.reverse_mute,
248 hw.bt848.card
249 card takes a value from 0 to bt848_max_card
250 tuner takes a value from 0 to bt848_max_tuner
251 reverse_mute : 0 no effect, 1 reverse tuner
252 mute function some tuners are wired reversed :(
2531.34 reverse mute function for ims turbo card
254
2551.35 Roger Hardiman <roger@cs.strath.ac.uk>
256 options BROOKTREE_SYSTEM_DEFAULT=BROOKTREE_PAL
257 in the kernel config file makes the driver's
258 video_open() function select PAL rather than NTSC.
259 This fixed all the hangs on my Dual Crystal card
260 when using a PAL video signal. As a result, you
261 can loose the tsleep (of 2 seconds - now 0.25!!)
262 which I previously added. (Unless someone else
263 wanted the 0.25 second tsleep).
264
2651.36 added bt848.format sysctl variable.
266 1 denotes NTSC , 0 denotes PAL
267
2681.37 added support for Bt878 and improved Hauppauge's
269 bt848 tuner recognition
2701.38 Further improvements on Hauppauge's rely on
271 eeprom[9] to determine the tuner type 8)
272
273 AVerMedia card type added <sos@freebsd.org>
274
2751.39 08/05/98 Roger Hardiman <roger@cs.strath.ac.uk>
276 Updated Hauppauge detection code for Tuner ID 0x0a
277 for newer NTSC WinCastTV 404 with Bt878 chipset.
278 Tidied up PAL default in video_open()
279
2801.49 10 August 1998 Roger Hardiman <roger@cs.strath.ac.uk>
281 Added Capture Area ioctl - BT848[SG]CAPAREA.
282 Normally the full 640x480 (768x576 PAL) image
283 is grabbed. This ioctl allows a smaller area
284 from anywhere within the video image to be
285 grabbed, eg a 400x300 image from (50,10).
286 See restrictions in BT848SCAPAREA.
287
2881.50 31 August 1998 Roger Hardiman <roger@cs.strath.ac.uk>
289 Renamed BT848[SG]CAPAREA to BT848_[SG]CAPAREA.
290 Added PR kern/7177 for SECAM Video Highway Xtreme
291 with single crystal PLL configuration
292 submitted by Vsevolod Lobko <seva@alex-ua.com>.
293 In kernel configuration file add
294 options OVERRIDE_CARD=2
295 options OVERRIDE_TUNER=11
296 options BKTR_USE_PLL
297
2981.51 31 August 1998 Roger Hardiman <roger@cs.strath.ac.uk>
299 Fixed bug in Miro Tuner detection. Missing Goto.
300 Removed Hauppauge EEPROM 0x10 detection as I think
301 0x10 should be a PAL tuner, not NTSC.
302 Reinstated some Tuner Guesswork code from 1.27
303
3041.52 3 Sep 1998 Roger Hardiman <roger@cs.strath.ac.uk>
305 Submitted patch by Vsevolod Lobko <seva@alex-ua.com>
306 to correct SECAM B-Delay and add XUSSR channel set.
307
3081.53 9 Sep 1998 Roger Hardiman <roger@cs.strath.ac.uk>
309 Changed METEORSINPUT for Hauppauge cards with bt878.
310 Submitted by Fred Templin <templin@erg.sri.com>
311 Also fixed video_open defines and 878 support.
312
3131.54 18 Sep 1998 Roger Hardiman <roger@cs.strath.ac.uk>
314 Changed tuner code to autodetect tuner i2c address.
315 Addresses were incorrectly hardcoded.
316
3171.55 21 Sep 1998 Roger Hardiman <roger@cs.strath.ac.uk>
318 Hauppauge Tech Support confirmed all Hauppauge 878
319 PAL/SECAM boards will use PLL mode.
320 Added to card probe. Thanks to Ken and Fred.
321
3221.56 21 Jan 1999 Roger Hardiman <roger@cs.strath.ac.uk>
323 Added detection of Hauppauge IR remote control.
324 and MSP34xx Audio chip. Fixed i2c read error.
325 Hauppauge supplied details of new Tuner Types.
326 Danny Braniss <danny@cs.huji.ac.il> submitted Bt878
327 AverMedia detection with PCI subsystem vendor id.
328
3291.57 26 Jan 1999 Roger Hardiman <roger@cs.strath.ac.uk>
330 Support for MSP3410D / MSP3415D Stereo/Mono audio
331 using the audio format Auto Detection Mode.
332 Nicolas Souchu <nsouch@freebsd.org> ported the
333 msp_read/write/reset functions to smbus/iicbus.
334 METEOR_INPUT_DEV2 now selects a composite camera on
335 the SVIDEO port for Johan Larsson<gozer@ludd.luth.se>
336 For true SVIDEO, use METEOR_INPUT_DEV_SVIDEO
337
3381.58 8 Feb 1999 Roger Hardiman <roger@cs.strath.ac.uk>
339 Added check to bktr_mmap from OpenBSD driver.
340 Improved MSP34xx reset for bt848 Hauppauge boards.
341 Added detection for Bt848a.
342 Vsevolod Lobko<seva@sevasoft.alex-ua.com> added
343 more XUSSR channels.
344
3451.59 9 Feb 1999 Added ioctl REMOTE_GETKEY for Hauppauge Infra-Red
346 Remote Control. Submitted by Roger Hardiman.
347 Added ioctl TVTUNER_GETCHANSET and
348 BT848_GPIO_SET_EN,BT848_GPIO_SET_DATA (and GETs)
349 Submitted by Vsevolod Lobko <seva@alex-ua.com>
350
3511.60 23 Feb 1999 Roger Hardiman <roger@freebsd.org>
352 Corrected Mute on Hauppauge Radio cards.
353 Autodetect MMAC Osprey by looking for "MMAC" in the EEPROM.
354 Added for Jan Schmidt <mmedia@rz.uni-greifswald.de>
355 Added ALPS Tuner Type from Hiroki Mori <mori@infocity.co.jp>
356
3571.61 29 Apr 1999 Roger Hardiman <roger@freebsd.org>
358 Fix row=0/columns=0 bug. From Randal Hopper<aa8vb@ipass.net>
359 Add option to block the reset of the MSP34xx audio chip by
360 adding options BKTR_NO_MSP_RESET to the kernel config file.
361 This is usefull if you run another operating system
362 first to initialise the audio chip, then do a soft reboot.
363 Added for Yuri Gindin <yuri@xpert.com>
364
3651.62 29 Apr 1999 Added new cards: NEC PK-UG-X017 and I/O DATA GV-BCTV2/PCI
366 Added new tuner: ALPS_TSBH1 (plus FM Radio for ALPS_TSCH5)
367 Added support for BCTV audio mux.
368 All submitted by Hiroki Mori <mori@infocity.co.jp>
369
3701.63 29 Apr 1999 Roger Hardiman <roger@freebsd.org>
371 Added initial code for VBI capture based on work by
372 Hiroki Mori <mori@infocity.co.jp> and reworked by myself.
373 This allows software decoding of teletext, intercast and
374 subtitles via /dev/vbi.
375
3761.64 7 May 1999 Roger Hardiman <roger@freebsd.org>
377 Support LifeView FlyVideo 98 cards. Use EEPROM for card
378 autodetection. Use bttv's audio mux values.
379 Thanks to Paul Reece <paul@fastlane.net.au>,
380 Ivan Brawley <brawley@internode.com.au> and
381 Gilad Rom <rom_glsa@ein-hashofet.co.il>
382 Automatically locate the EEPROM i2c address and read the
383 subsystem_vendor_id from EEPROM and not the PCI registers.
384 Add NSMBUS checks around smbus/iicbus i2c bus code
385 making it easier to compile the driver under 2.2.x.
386 Add GPIO mask for the audio mux to each card type.
387 Add CARD_ZOLTRIX and CARD_KISS from mailing list searches.
388
3891.65 18 May 1999 Roger Hardiman <roger@freebsd.org>
390 Change Intel GPIO mask to stop turning the Intel Camera off
391 Fixed tuner selection on Hauppauge card with tuner 0x0a
392 Replaced none tuner with no tuner for Theo de Raadt.
393 Ivan Brawley <brawley@internode.com.au> added
394 the Australian channel frequencies.
395
3961.66 19 May 1999 Ivan Brawley <brawley@internode.com.au> added better
397 Australian channel frequencies.
398
3991.67 23 May 1999 Roger Hardiman <roger@freebsd.org>
400 Added rgb_vbi_prog() to capture VBI data and video at the
401 same time. To capture VBI data, /dev/vbi must be opened
402 before starting video capture.
403
4041.68 25 May 1999 Roger Hardiman <roger@freebsd.org>
405 Due to differences in PCI bus implementations from various
406 motherboard chipset manufactuers, the Bt878/Bt879 has 3
407 PCI bus compatibility modes. These are
408 NORMAL PCI 2.1 for proper PCI 2.1 compatible chipsets.
409 INTEL 430 FX for the Intel 430 FX chipset.
410 SIS VIA CHIPSET for certain SiS and VIA chipsets.
411 Older Intel and non-Intel chipsets may also benefit from
412 either 430_FX or SIS/VIA mode.
413
414 NORMAL PCI mode is enabled by default.
415 For INTEL 430 FX mode, add this to your kenel config:
416 options "BKTR_430_FX_MODE"
417 For SiS / VIA mode, add this to your kernel config:
418 options "BKTR_SIS_VIA_MODE"
419
420 Using quotes in these options is not needed in FreeBSD 4.x.
421
422 Note. Newer VIA chipsets should be fully PCI 2.1 compatible
423 and should work fine in the Default mode.
424
425 Also rename 849 to 849A, the correct name for the chip.
426
4271.69 12 June 1999 Roger Hardiman <roger@freebsd.org>
428 Updates for FreeBSD 4.x device driver interface.
429 BSDI code removed. Will be restored later.
430
4311.70 12 July 1999 Roger Hardiman <roger@freebsd.org>
432 Reorganise OS device dependant parts (based on a port to
433 linux by Brad Parker).
434 Make the driver compile on FreeBSD 2.2.x systems again.
435 Change number of VBI lines from 16 to 12 for NTSC formats.
436 Changes to probeCard() for better eeprom identification.
437 Added STB Bt878 card identification.
438 Add Hauppauge model identification to probeCard().
439 Added TDA9850 initialisation code taken from Linux bttv.
440 Juha.Nurmela@quicknet.inet.fi found/fixed bug in VBI_SLEEP.
441 Matt Brown <matt@dqc.org> added MSP3430G DBX initialisation.
442
4431.71 30 Aug 1999 Roger Hardiman <roger@freebsd.org>
444 Small cleanup of OS dependant code. Remove NPCI usage.
445 Fix bug in AVerMedia detection.
446 Update VBI support for the AleVT Teletext package. Parts
447 from Juha Nurmela's driver <Juha.Nurmela@quicknet.inet.fi>
448 Add support for Hauppauge 627 and Temic 4006 submitted
449 by Maurice Castro <maurice@atum.castro.aus.net>
450 Tom Jansen <tom@unhooked.net> added BSDi support again.
451
4521.72 31 Aug 1999 Juha Nurmela <Juha.Nurmela@quicknet.inet.fi>
453 Clear cap_ctl register when restarting the RISC program.
454 This fixes the freezes experienced when changing changes.
455
4561.73 10 Sep 1999 Roger Hardiman <roger@freebsd.org>
457 Add Hauppauge tuner #6 for Brian Somers <brian@freebsd.org>
458 Add card type for Aimslabs Video Highway Xtreme for
459 Ladislav Kostal <kostal@pefstud.uniag.sk>
460 Added select() code (for VBI) for the 2.2.x driver
461 tested by Steve Richards <steve@richsoft.demon.co.uk>
462
4631.74 17 Sep 1999 Roger Hardiman <roger@freebsd.org>
464 Fix bug where FM radio stations were offset after using FXTV
465 AVerMedia tuner type autodetection added for cards with
466 a configuration EEPROM (currently their Bt878 range)
467 Thanks to Frank at AVerMedia for providing the information.
468 Tested by David La Croix <dlacroix@cowpie.acm.vt.edu>
469 Tidy up some tuner code and Hauppauge detection code.
470 New NetBSD code from Bernd Ernesti<bernd@arresum.inka.de>
471*/
472
| |
473#ifdef __FreeBSD__
474#include "bktr.h"
475#include "opt_bktr.h"
476#include "opt_devfs.h"
477#endif /* __FreeBSD__ */
478
479#if defined(__NetBSD__) || defined(__OpenBSD__)
480#include "bktr.h"
481#include "pci.h"
482#endif /* __NetBSD__ || __OpenBSD__ */
483
484#if ( \
485 (defined(__FreeBSD__) && (NBKTR > 0)) \
486 || (defined(__bsdi__)) \
487 || (defined(__OpenBSD__)) \
488 || (defined(__NetBSD__)) \
489 )
490
491#include <sys/param.h>
492#include <sys/systm.h>
493#include <sys/conf.h>
| 98#ifdef __FreeBSD__
99#include "bktr.h"
100#include "opt_bktr.h"
101#include "opt_devfs.h"
102#endif /* __FreeBSD__ */
103
104#if defined(__NetBSD__) || defined(__OpenBSD__)
105#include "bktr.h"
106#include "pci.h"
107#endif /* __NetBSD__ || __OpenBSD__ */
108
109#if ( \
110 (defined(__FreeBSD__) && (NBKTR > 0)) \
111 || (defined(__bsdi__)) \
112 || (defined(__OpenBSD__)) \
113 || (defined(__NetBSD__)) \
114 )
115
116#include <sys/param.h>
117#include <sys/systm.h>
118#include <sys/conf.h>
|
494#include <sys/uio.h>
| |
495#include <sys/kernel.h>
496#include <sys/signalvar.h>
| 119#include <sys/kernel.h>
120#include <sys/signalvar.h>
|
497#include <sys/mman.h>
498#include <sys/select.h>
| |
499#include <sys/vnode.h>
500
501#include <vm/vm.h>
502#include <vm/vm_kern.h>
503#include <vm/pmap.h>
504#include <vm/vm_extern.h>
505
506/*******************/
507/* *** FreeBSD *** */
508/*******************/
509#ifdef __FreeBSD__
510
| 121#include <sys/vnode.h>
122
123#include <vm/vm.h>
124#include <vm/vm_kern.h>
125#include <vm/pmap.h>
126#include <vm/vm_extern.h>
127
128/*******************/
129/* *** FreeBSD *** */
130/*******************/
131#ifdef __FreeBSD__
132
|
511/* __FreeBSD_version is not defined on 2.2.x systems */
512#ifndef __FreeBSD_version
513#define __FreeBSD_version 228000
514#endif
515
516#if (__FreeBSD_version >= 300000)
517#include <sys/poll.h>
518#endif
519
520/* Read NSMBUS on FreeBSD 3.1 or later */
521#if (__FreeBSD_version >= 310000)
522#include "smbus.h"
523#else
524#define NSMBUS 0
525#endif
526
527#if (__FreeBSD_version < 400000)
528#ifdef DEVFS
529#include <sys/devfsext.h>
530#endif /* DEVFS */
531#endif
532
| |
533#if (__FreeBSD_version >=400000) || (NSMBUS > 0)
534#include <sys/bus.h> /* used by smbus and newbus */
535#endif
536
| 133#if (__FreeBSD_version >=400000) || (NSMBUS > 0)
134#include <sys/bus.h> /* used by smbus and newbus */
135#endif
136
|
537#if (__FreeBSD_version >=400000)
538#include <machine/bus.h> /* used by newbus */
539#include <sys/rman.h> /* used by newbus */
540#include <machine/resource.h> /* used by newbus */
541#endif
542
| |
543#include <machine/clock.h> /* for DELAY */
544#include <pci/pcivar.h>
| 137#include <machine/clock.h> /* for DELAY */
138#include <pci/pcivar.h>
|
545#include <pci/pcireg.h>
| |
546
547#include <machine/ioctl_meteor.h>
548#include <machine/ioctl_bt848.h> /* extensions to ioctl_meteor.h */
549#include <dev/bktr/bktr_reg.h>
| 139
140#include <machine/ioctl_meteor.h>
141#include <machine/ioctl_bt848.h> /* extensions to ioctl_meteor.h */
142#include <dev/bktr/bktr_reg.h>
|
| 143#include <dev/bktr/bktr_tuner.h>
144#include <dev/bktr/bktr_card.h>
145#include <dev/bktr/bktr_audio.h>
146#include <dev/bktr/bktr_core.h>
147#include <dev/bktr/bktr_os.h>
|
550
551#if (NSMBUS > 0)
552#include <dev/bktr/bktr_i2c.h>
553#include <dev/smbus/smbconf.h>
554#include <dev/iicbus/iiconf.h>
555#include "smbus_if.h"
556#include "iicbus_if.h"
557#endif
558
| 148
149#if (NSMBUS > 0)
150#include <dev/bktr/bktr_i2c.h>
151#include <dev/smbus/smbconf.h>
152#include <dev/iicbus/iiconf.h>
153#include "smbus_if.h"
154#include "iicbus_if.h"
155#endif
156
|
559#include <sys/sysctl.h>
560static int bt848_card = -1;
561static int bt848_tuner = -1;
562static int bt848_reverse_mute = -1;
563static int bt848_format = -1;
| |
564
| 157
|
565SYSCTL_NODE(_hw, OID_AUTO, bt848, CTLFLAG_RW, 0, "Bt848 Driver mgmt");
566SYSCTL_INT(_hw_bt848, OID_AUTO, card, CTLFLAG_RW, &bt848_card, -1, "");
567SYSCTL_INT(_hw_bt848, OID_AUTO, tuner, CTLFLAG_RW, &bt848_tuner, -1, "");
568SYSCTL_INT(_hw_bt848, OID_AUTO, reverse_mute, CTLFLAG_RW, &bt848_reverse_mute, -1, "");
569SYSCTL_INT(_hw_bt848, OID_AUTO, format, CTLFLAG_RW, &bt848_format, -1, "");
570
571#if (__FreeBSD_version >= 300000)
572typedef u_long ioctl_cmd_t;
573#endif
574
| |
575#if (__FreeBSD__ == 2)
| 158#if (__FreeBSD__ == 2)
|
576typedef int ioctl_cmd_t;
| |
577typedef unsigned int uintptr_t;
| 159typedef unsigned int uintptr_t;
|
578#define PCIR_REVID PCI_CLASS_REG
| |
579#endif
580#endif /* __FreeBSD__ */
581
582
583/****************/
584/* *** BSDI *** */
585/****************/
586#ifdef __bsdi__
587#endif /* __bsdi__ */
588
589
590/**************************/
591/* *** OpenBSD/NetBSD *** */
592/**************************/
593#if defined(__NetBSD__) || defined(__OpenBSD__)
594#endif /* __NetBSD__ || __OpenBSD__ */
595
596
597
598typedef u_char bool_t;
599
600#define BKTRPRI (PZERO+8)|PCATCH
601#define VBIPRI (PZERO-4)|PCATCH
602
603
604/*
605 * memory allocated for DMA programs
606 */
607#define DMA_PROG_ALLOC (8 * PAGE_SIZE)
608
609/* When to split a dma transfer , the bt848 has timing as well as
610 dma transfer size limitations so that we have to split dma
611 transfers into two dma requests
612 */
613#define DMA_BT848_SPLIT 319*2
614
615/*
616 * Allocate enough memory for:
617 * 768x576 RGB 16 or YUV (16 storage bits/pixel) = 884736 = 216 pages
618 *
619 * You may override this using the options "BROOKTREE_ALLOC_PAGES=value"
620 * in your kernel configuration file.
621 */
622
623#ifndef BROOKTREE_ALLOC_PAGES
624#define BROOKTREE_ALLOC_PAGES 217*4
625#endif
626#define BROOKTREE_ALLOC (BROOKTREE_ALLOC_PAGES * PAGE_SIZE)
627
628/* Definitions for VBI capture.
629 * There are 16 VBI lines in a PAL video field (32 in a frame),
630 * and we take 2044 samples from each line (placed in a 2048 byte buffer
631 * for alignment).
632 * VBI lines are held in a circular buffer before being read by a
633 * user program from /dev/vbi.
634 */
635
636#define MAX_VBI_LINES 16 /* Maximum for all vidoe formats */
637#define VBI_LINE_SIZE 2048 /* Store upto 2048 bytes per line */
638#define VBI_BUFFER_ITEMS 20 /* Number of frames we buffer */
639#define VBI_DATA_SIZE (VBI_LINE_SIZE * MAX_VBI_LINES * 2)
640#define VBI_BUFFER_SIZE (VBI_DATA_SIZE * VBI_BUFFER_ITEMS)
641
642
643/* Defines for fields */
644#define ODD_F 0x01
645#define EVEN_F 0x02
646
| 160#endif
161#endif /* __FreeBSD__ */
162
163
164/****************/
165/* *** BSDI *** */
166/****************/
167#ifdef __bsdi__
168#endif /* __bsdi__ */
169
170
171/**************************/
172/* *** OpenBSD/NetBSD *** */
173/**************************/
174#if defined(__NetBSD__) || defined(__OpenBSD__)
175#endif /* __NetBSD__ || __OpenBSD__ */
176
177
178
179typedef u_char bool_t;
180
181#define BKTRPRI (PZERO+8)|PCATCH
182#define VBIPRI (PZERO-4)|PCATCH
183
184
185/*
186 * memory allocated for DMA programs
187 */
188#define DMA_PROG_ALLOC (8 * PAGE_SIZE)
189
190/* When to split a dma transfer , the bt848 has timing as well as
191 dma transfer size limitations so that we have to split dma
192 transfers into two dma requests
193 */
194#define DMA_BT848_SPLIT 319*2
195
196/*
197 * Allocate enough memory for:
198 * 768x576 RGB 16 or YUV (16 storage bits/pixel) = 884736 = 216 pages
199 *
200 * You may override this using the options "BROOKTREE_ALLOC_PAGES=value"
201 * in your kernel configuration file.
202 */
203
204#ifndef BROOKTREE_ALLOC_PAGES
205#define BROOKTREE_ALLOC_PAGES 217*4
206#endif
207#define BROOKTREE_ALLOC (BROOKTREE_ALLOC_PAGES * PAGE_SIZE)
208
209/* Definitions for VBI capture.
210 * There are 16 VBI lines in a PAL video field (32 in a frame),
211 * and we take 2044 samples from each line (placed in a 2048 byte buffer
212 * for alignment).
213 * VBI lines are held in a circular buffer before being read by a
214 * user program from /dev/vbi.
215 */
216
217#define MAX_VBI_LINES 16 /* Maximum for all vidoe formats */
218#define VBI_LINE_SIZE 2048 /* Store upto 2048 bytes per line */
219#define VBI_BUFFER_ITEMS 20 /* Number of frames we buffer */
220#define VBI_DATA_SIZE (VBI_LINE_SIZE * MAX_VBI_LINES * 2)
221#define VBI_BUFFER_SIZE (VBI_DATA_SIZE * VBI_BUFFER_ITEMS)
222
223
224/* Defines for fields */
225#define ODD_F 0x01
226#define EVEN_F 0x02
227
|
647/*
648 * Defines for userland processes blocked in this driver
649 * For /dev/bktr[n] use memory address of bktr structure
650 * For /dev/vbi[n] use memory address of bktr structure + 1
651 * this is ok as the bktr structure is > 1 byte
652 */
653#define BKTR_SLEEP ((caddr_t)bktr )
654#define VBI_SLEEP ((caddr_t)bktr + 1)
| |
655
656/*
| 228
229/*
|
657 * This is for start-up convenience only, NOT mandatory.
658 */
659#if !defined( DEFAULT_CHNLSET )
660#define DEFAULT_CHNLSET CHNLSET_WEUROPE
661#endif
662
663/*
| |
664 * Parameters describing size of transmitted image.
665 */
666
667static struct format_params format_params[] = {
668/* # define BT848_IFORM_F_AUTO (0x0) - don't matter. */
669 { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_AUTO,
670 12, 1600 },
671/* # define BT848_IFORM_F_NTSCM (0x1) */
672 { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0,
673 12, 1600 },
674/* # define BT848_IFORM_F_NTSCJ (0x2) */
675 { 525, 22, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0,
676 12, 1600 },
677/* # define BT848_IFORM_F_PALBDGHI (0x3) */
678 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT1,
679 16, 2044 },
680/* # define BT848_IFORM_F_PALM (0x4) */
681 { 525, 22, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0,
682 12, 1600 },
683/* # define BT848_IFORM_F_PALN (0x5) */
684 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT1,
685 16, 2044 },
686/* # define BT848_IFORM_F_SECAM (0x6) */
687 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0xa0, BT848_IFORM_X_XT1,
688 16, 2044 },
689/* # define BT848_IFORM_F_RSVD (0x7) - ???? */
690 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT0,
691 16, 2044 },
692};
693
694/*
695 * Table of supported Pixel Formats
696 */
697
698static struct meteor_pixfmt_internal {
699 struct meteor_pixfmt public;
700 u_int color_fmt;
701} pixfmt_table[] = {
702
703{ { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 0,0 }, 0x33 },
704{ { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 1,0 }, 0x33 },
705
706{ { 0, METEOR_PIXTYPE_RGB, 2, { 0xf800, 0x07e0, 0x001f }, 0,0 }, 0x22 },
707{ { 0, METEOR_PIXTYPE_RGB, 2, { 0xf800, 0x07e0, 0x001f }, 1,0 }, 0x22 },
708
709{ { 0, METEOR_PIXTYPE_RGB, 3, { 0xff0000,0x00ff00,0x0000ff }, 1,0 }, 0x11 },
710
711{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 0,0 }, 0x00 },
712{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }, 0x00 },
713{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 1,0 }, 0x00 },
714{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x00 },
715{ { 0, METEOR_PIXTYPE_YUV, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x88 },
716{ { 0, METEOR_PIXTYPE_YUV_PACKED, 2, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }, 0x44 },
717{ { 0, METEOR_PIXTYPE_YUV_12, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x88 },
718
719};
720#define PIXFMT_TABLE_SIZE ( sizeof(pixfmt_table) / sizeof(pixfmt_table[0]) )
721
722/*
723 * Table of Meteor-supported Pixel Formats (for SETGEO compatibility)
724 */
725
726/* FIXME: Also add YUV_422 and YUV_PACKED as well */
727static struct {
728 u_long meteor_format;
729 struct meteor_pixfmt public;
730} meteor_pixfmt_table[] = {
731 { METEOR_GEO_YUV_12,
732 { 0, METEOR_PIXTYPE_YUV_12, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }
733 },
734
735 /* FIXME: Should byte swap flag be on for this one; negative in drvr? */
736 { METEOR_GEO_YUV_422,
737 { 0, METEOR_PIXTYPE_YUV, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }
738 },
739 { METEOR_GEO_YUV_PACKED,
740 { 0, METEOR_PIXTYPE_YUV_PACKED, 2, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }
741 },
742 { METEOR_GEO_RGB16,
743 { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 0, 0 }
744 },
745 { METEOR_GEO_RGB24,
746 { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000, 0x00ff00, 0x0000ff }, 0, 0 }
747 },
748
749};
750#define METEOR_PIXFMT_TABLE_SIZE ( sizeof(meteor_pixfmt_table) / \
751 sizeof(meteor_pixfmt_table[0]) )
752
753
754#define BSWAP (BT848_COLOR_CTL_BSWAP_ODD | BT848_COLOR_CTL_BSWAP_EVEN)
755#define WSWAP (BT848_COLOR_CTL_WSWAP_ODD | BT848_COLOR_CTL_WSWAP_EVEN)
756
757
| 230 * Parameters describing size of transmitted image.
231 */
232
233static struct format_params format_params[] = {
234/* # define BT848_IFORM_F_AUTO (0x0) - don't matter. */
235 { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_AUTO,
236 12, 1600 },
237/* # define BT848_IFORM_F_NTSCM (0x1) */
238 { 525, 26, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0,
239 12, 1600 },
240/* # define BT848_IFORM_F_NTSCJ (0x2) */
241 { 525, 22, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0,
242 12, 1600 },
243/* # define BT848_IFORM_F_PALBDGHI (0x3) */
244 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT1,
245 16, 2044 },
246/* # define BT848_IFORM_F_PALM (0x4) */
247 { 525, 22, 480, 910, 135, 754, 640, 780, 30, 0x68, 0x5d, BT848_IFORM_X_XT0,
248 12, 1600 },
249/* # define BT848_IFORM_F_PALN (0x5) */
250 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT1,
251 16, 2044 },
252/* # define BT848_IFORM_F_SECAM (0x6) */
253 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0xa0, BT848_IFORM_X_XT1,
254 16, 2044 },
255/* # define BT848_IFORM_F_RSVD (0x7) - ???? */
256 { 625, 32, 576, 1135, 186, 924, 768, 944, 25, 0x7f, 0x72, BT848_IFORM_X_XT0,
257 16, 2044 },
258};
259
260/*
261 * Table of supported Pixel Formats
262 */
263
264static struct meteor_pixfmt_internal {
265 struct meteor_pixfmt public;
266 u_int color_fmt;
267} pixfmt_table[] = {
268
269{ { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 0,0 }, 0x33 },
270{ { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 1,0 }, 0x33 },
271
272{ { 0, METEOR_PIXTYPE_RGB, 2, { 0xf800, 0x07e0, 0x001f }, 0,0 }, 0x22 },
273{ { 0, METEOR_PIXTYPE_RGB, 2, { 0xf800, 0x07e0, 0x001f }, 1,0 }, 0x22 },
274
275{ { 0, METEOR_PIXTYPE_RGB, 3, { 0xff0000,0x00ff00,0x0000ff }, 1,0 }, 0x11 },
276
277{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 0,0 }, 0x00 },
278{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }, 0x00 },
279{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 1,0 }, 0x00 },
280{ { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x00 },
281{ { 0, METEOR_PIXTYPE_YUV, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x88 },
282{ { 0, METEOR_PIXTYPE_YUV_PACKED, 2, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }, 0x44 },
283{ { 0, METEOR_PIXTYPE_YUV_12, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }, 0x88 },
284
285};
286#define PIXFMT_TABLE_SIZE ( sizeof(pixfmt_table) / sizeof(pixfmt_table[0]) )
287
288/*
289 * Table of Meteor-supported Pixel Formats (for SETGEO compatibility)
290 */
291
292/* FIXME: Also add YUV_422 and YUV_PACKED as well */
293static struct {
294 u_long meteor_format;
295 struct meteor_pixfmt public;
296} meteor_pixfmt_table[] = {
297 { METEOR_GEO_YUV_12,
298 { 0, METEOR_PIXTYPE_YUV_12, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }
299 },
300
301 /* FIXME: Should byte swap flag be on for this one; negative in drvr? */
302 { METEOR_GEO_YUV_422,
303 { 0, METEOR_PIXTYPE_YUV, 2, { 0xff0000,0x00ff00,0x0000ff }, 1,1 }
304 },
305 { METEOR_GEO_YUV_PACKED,
306 { 0, METEOR_PIXTYPE_YUV_PACKED, 2, { 0xff0000,0x00ff00,0x0000ff }, 0,1 }
307 },
308 { METEOR_GEO_RGB16,
309 { 0, METEOR_PIXTYPE_RGB, 2, { 0x7c00, 0x03e0, 0x001f }, 0, 0 }
310 },
311 { METEOR_GEO_RGB24,
312 { 0, METEOR_PIXTYPE_RGB, 4, { 0xff0000, 0x00ff00, 0x0000ff }, 0, 0 }
313 },
314
315};
316#define METEOR_PIXFMT_TABLE_SIZE ( sizeof(meteor_pixfmt_table) / \
317 sizeof(meteor_pixfmt_table[0]) )
318
319
320#define BSWAP (BT848_COLOR_CTL_BSWAP_ODD | BT848_COLOR_CTL_BSWAP_EVEN)
321#define WSWAP (BT848_COLOR_CTL_WSWAP_ODD | BT848_COLOR_CTL_WSWAP_EVEN)
322
323
|
758/* experimental code for Automatic Frequency Control */
759#define TUNER_AFC
760#define TEST_TUNER_AFC_NOT
| |
761
| 324
|
762#if defined( TUNER_AFC )
763#define AFC_DELAY 10000 /* 10 millisend delay */
764#define AFC_BITS 0x07
765#define AFC_FREQ_MINUS_125 0x00
766#define AFC_FREQ_MINUS_62 0x01
767#define AFC_FREQ_CENTERED 0x02
768#define AFC_FREQ_PLUS_62 0x03
769#define AFC_FREQ_PLUS_125 0x04
770#define AFC_MAX_STEP (5 * FREQFACTOR) /* no more than 5 MHz */
771#endif /* TUNER_AFC */
772
773/*
774 * i2c things:
775 */
776
777#define TSA552x_CB_MSB (0x80)
778#define TSA552x_CB_CP (1<<6)
779#define TSA552x_CB_T2 (1<<5)
780#define TSA552x_CB_T1 (1<<4)
781#define TSA552x_CB_T0 (1<<3)
782#define TSA552x_CB_RSA (1<<2)
783#define TSA552x_CB_RSB (1<<1)
784#define TSA552x_CB_OS (1<<0)
785#define TSA552x_RADIO (TSA552x_CB_MSB | \
786 TSA552x_CB_T0)
787
788/* Add RADIO_OFFSET to the "frequency" to indicate that we want to tune */
789/* the radio (if present) not the TV tuner. */
790/* 20000 is equivalent to 20000MHz/16 = 1.25GHz - this area is unused. */
791#define RADIO_OFFSET 20000
792
793/* address(s) of the Hauppauge Infra-Red Remote Control adapter */
794#define HAUP_REMOTE_INT_WADDR 0x30
795#define HAUP_REMOTE_INT_RADDR 0x31
796
797#define HAUP_REMOTE_EXT_WADDR 0x34
798#define HAUP_REMOTE_EXT_RADDR 0x35
799
800/* address of BTSC/SAP decoder chip */
801#define TDA9850_WADDR 0xb6
802#define TDA9850_RADDR 0xb7
803
804/* address of MSP3400C chip */
805#define MSP3400C_WADDR 0x80
806#define MSP3400C_RADDR 0x81
807
808
809/* EEProm (128 * 8) on an STB card */
810#define X24C01_WADDR 0xae
811#define X24C01_RADDR 0xaf
812
813
814/* EEProm (256 * 8) on a Hauppauge card */
815/* and on most BT878s cards to store the sub-system vendor id */
816#define PFC8582_WADDR 0xa0
817#define PFC8582_RADDR 0xa1
818
819
820/* registers in the TDA9850 BTSC/dbx chip */
821#define CON1ADDR 0x04
822#define CON2ADDR 0x05
823#define CON3ADDR 0x06
824#define CON4ADDR 0x07
825#define ALI1ADDR 0x08
826#define ALI2ADDR 0x09
827#define ALI3ADDR 0x0a
828
829
830/* raise the charge pump voltage for fast tuning */
831#define TSA552x_FCONTROL (TSA552x_CB_MSB | \
832 TSA552x_CB_CP | \
833 TSA552x_CB_T0 | \
834 TSA552x_CB_RSA | \
835 TSA552x_CB_RSB)
836
837/* lower the charge pump voltage for better residual oscillator FM */
838#define TSA552x_SCONTROL (TSA552x_CB_MSB | \
839 TSA552x_CB_T0 | \
840 TSA552x_CB_RSA | \
841 TSA552x_CB_RSB)
842
843/* The control value for the ALPS TSCH5 Tuner */
844#define TSCH5_FCONTROL 0x82
845#define TSCH5_RADIO 0x86
846
847/* The control value for the ALPS TSBH1 Tuner */
848#define TSBH1_FCONTROL 0xce
849
850
| |
851/* sync detect threshold */
852#if 0
853#define SYNC_LEVEL (BT848_ADC_RESERVED | \
854 BT848_ADC_CRUSH) /* threshold ~125 mV */
855#else
856#define SYNC_LEVEL (BT848_ADC_RESERVED | \
857 BT848_ADC_SYNC_T) /* threshold ~75 mV */
858#endif
859
860
| 325/* sync detect threshold */
326#if 0
327#define SYNC_LEVEL (BT848_ADC_RESERVED | \
328 BT848_ADC_CRUSH) /* threshold ~125 mV */
329#else
330#define SYNC_LEVEL (BT848_ADC_RESERVED | \
331 BT848_ADC_SYNC_T) /* threshold ~75 mV */
332#endif
333
334
|
861/*
862 * the data for each type of tuner
863 *
864 * if probeCard() fails to detect the proper tuner on boot you can
865 * override it by setting the following define to the tuner present:
866 *
867#define OVERRIDE_TUNER <tuner type>
868 *
869 * where <tuner type> is one of the following tuner defines.
870 */
| |
871
| 335
|
872/* indexes into tuners[] */
873#define NO_TUNER 0
874#define TEMIC_NTSC 1
875#define TEMIC_PAL 2
876#define TEMIC_SECAM 3
877#define PHILIPS_NTSC 4
878#define PHILIPS_PAL 5
879#define PHILIPS_SECAM 6
880#define TEMIC_PALI 7
881#define PHILIPS_PALI 8
882#define PHILIPS_FR1236_NTSC 9 /* These have FM Radio support */
883#define PHILIPS_FR1216_PAL 10 /* These have FM Radio support */
884#define PHILIPS_FR1236_SECAM 11 /* These have FM Radio support */
885#define ALPS_TSCH5 12
886#define ALPS_TSBH1 13
887#define Bt848_MAX_TUNER 14
| |
888
| 336
|
889/* If we do not know the tuner type, make a guess based on the
890 video format
891*/
892#if BROOKTREE_SYSTEM_DEFAULT == BROOKTREE_PAL
893#define DEFAULT_TUNER PHILIPS_PALI
894#else
895#define DEFAULT_TUNER PHILIPS_NTSC
896#endif
897
898/* XXX FIXME: this list is incomplete */
899
900/* input types */
901#define TTYPE_XXX 0
902#define TTYPE_NTSC 1
903#define TTYPE_NTSC_J 2
904#define TTYPE_PAL 3
905#define TTYPE_PAL_M 4
906#define TTYPE_PAL_N 5
907#define TTYPE_SECAM 6
908
909/**
910struct TUNER {
911 char* name;
912 u_char type;
913 u_char pllControl;
914 u_char bandLimits[ 2 ];
915 u_char bandAddrs[ 3 ];
916};
917 */
918static const struct TUNER tuners[] = {
919/* XXX FIXME: fill in the band-switch crosspoints */
920 /* NO_TUNER */
921 { "<no>", /* the 'name' */
922 TTYPE_XXX, /* input type */
923 { 0x00, /* control byte for Tuner PLL */
924 0x00,
925 0x00,
926 0x00 },
927 { 0x00, 0x00 }, /* band-switch crosspoints */
928 { 0x00, 0x00, 0x00,0x00} }, /* the band-switch values */
929
930 /* TEMIC_NTSC */
931 { "Temic NTSC", /* the 'name' */
932 TTYPE_NTSC, /* input type */
933 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
934 TSA552x_SCONTROL,
935 TSA552x_SCONTROL,
936 0x00 },
937 { 0x00, 0x00 }, /* band-switch crosspoints */
938 { 0x02, 0x04, 0x01, 0x00 } }, /* the band-switch values */
939
940 /* TEMIC_PAL */
941 { "Temic PAL", /* the 'name' */
942 TTYPE_PAL, /* input type */
943 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
944 TSA552x_SCONTROL,
945 TSA552x_SCONTROL,
946 0x00 },
947 { 0x00, 0x00 }, /* band-switch crosspoints */
948 { 0x02, 0x04, 0x01, 0x00 } }, /* the band-switch values */
949
950 /* TEMIC_SECAM */
951 { "Temic SECAM", /* the 'name' */
952 TTYPE_SECAM, /* input type */
953 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
954 TSA552x_SCONTROL,
955 TSA552x_SCONTROL,
956 0x00 },
957 { 0x00, 0x00 }, /* band-switch crosspoints */
958 { 0x02, 0x04, 0x01,0x00 } }, /* the band-switch values */
959
960 /* PHILIPS_NTSC */
961 { "Philips NTSC", /* the 'name' */
962 TTYPE_NTSC, /* input type */
963 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
964 TSA552x_SCONTROL,
965 TSA552x_SCONTROL,
966 0x00 },
967 { 0x00, 0x00 }, /* band-switch crosspoints */
968 { 0xa0, 0x90, 0x30, 0x00 } }, /* the band-switch values */
969
970 /* PHILIPS_PAL */
971 { "Philips PAL", /* the 'name' */
972 TTYPE_PAL, /* input type */
973 { TSA552x_FCONTROL, /* control byte for Tuner PLL */
974 TSA552x_FCONTROL,
975 TSA552x_FCONTROL,
976 TSA552x_RADIO },
977 { 0x00, 0x00 }, /* band-switch crosspoints */
978 { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */
979
980 /* PHILIPS_SECAM */
981 { "Philips SECAM", /* the 'name' */
982 TTYPE_SECAM, /* input type */
983 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
984 TSA552x_SCONTROL,
985 TSA552x_SCONTROL,
986 TSA552x_RADIO },
987 { 0x00, 0x00 }, /* band-switch crosspoints */
988 { 0xa0, 0x90, 0x30,0xa4 } }, /* the band-switch values */
989
990 /* TEMIC_PAL I */
991 { "Temic PAL I", /* the 'name' */
992 TTYPE_PAL, /* input type */
993 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
994 TSA552x_SCONTROL,
995 TSA552x_SCONTROL,
996 0x00 },
997 { 0x00, 0x00 }, /* band-switch crosspoints */
998 { 0x02, 0x04, 0x01,0x00 } }, /* the band-switch values */
999
1000 /* PHILIPS_PALI */
1001 { "Philips PAL I", /* the 'name' */
1002 TTYPE_PAL, /* input type */
1003 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
1004 TSA552x_SCONTROL,
1005 TSA552x_SCONTROL,
1006 0x00 },
1007 { 0x00, 0x00 }, /* band-switch crosspoints */
1008 { 0xa0, 0x90, 0x30,0x00 } }, /* the band-switch values */
1009
1010 /* PHILIPS_FR1236_NTSC */
1011 { "Philips FR1236 NTSC FM", /* the 'name' */
1012 TTYPE_NTSC, /* input type */
1013 { TSA552x_SCONTROL, /* control byte for Tuner PLL */
1014 TSA552x_SCONTROL,
1015 TSA552x_SCONTROL,
1016 TSA552x_RADIO },
1017 { 0x00, 0x00 }, /* band-switch crosspoints */
1018 { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */
1019
1020 /* PHILIPS_FR1216_PAL */
1021 { "Philips FR1216 PAL FM" , /* the 'name' */
1022 TTYPE_PAL, /* input type */
1023 { TSA552x_FCONTROL, /* control byte for Tuner PLL */
1024 TSA552x_FCONTROL,
1025 TSA552x_FCONTROL,
1026 TSA552x_RADIO },
1027 { 0x00, 0x00 }, /* band-switch crosspoints */
1028 { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */
1029
1030 /* PHILIPS_FR1236_SECAM */
1031 { "Philips FR1236 SECAM FM", /* the 'name' */
1032 TTYPE_SECAM, /* input type */
1033 { TSA552x_FCONTROL, /* control byte for Tuner PLL */
1034 TSA552x_FCONTROL,
1035 TSA552x_FCONTROL,
1036 TSA552x_RADIO },
1037 { 0x00, 0x00 }, /* band-switch crosspoints */
1038 { 0xa0, 0x90, 0x30, 0xa4 } }, /* the band-switch values */
1039
1040 /* ALPS TSCH5 NTSC */
1041 { "ALPS TSCH5 NTSC FM", /* the 'name' */
1042 TTYPE_NTSC, /* input type */
1043 { TSCH5_FCONTROL, /* control byte for Tuner PLL */
1044 TSCH5_FCONTROL,
1045 TSCH5_FCONTROL,
1046 TSCH5_RADIO },
1047 { 0x00, 0x00 }, /* band-switch crosspoints */
1048 { 0x14, 0x12, 0x11, 0x04 } }, /* the band-switch values */
1049
1050 /* ALPS TSBH1 NTSC */
1051 { "ALPS TSBH1 NTSC", /* the 'name' */
1052 TTYPE_NTSC, /* input type */
1053 { TSBH1_FCONTROL, /* control byte for Tuner PLL */
1054 TSBH1_FCONTROL,
1055 TSBH1_FCONTROL,
1056 0x00 },
1057 { 0x00, 0x00 }, /* band-switch crosspoints */
1058 { 0x01, 0x02, 0x08, 0x00 } } /* the band-switch values */
1059};
1060
1061/******************************************************************************
1062 * card probe
1063 */
1064
1065
1066/*
1067 * the recognized cards, used as indexes of several tables.
1068 *
1069 * if probeCard() fails to detect the proper card on boot you can
1070 * override it by setting the following define to the card you are using:
1071 *
1072#define OVERRIDE_CARD <card type>
1073 *
1074 * where <card type> is one of the following card defines.
1075 */
1076#define CARD_UNKNOWN 0
1077#define CARD_MIRO 1
1078#define CARD_HAUPPAUGE 2
1079#define CARD_STB 3
1080#define CARD_INTEL 4
1081#define CARD_IMS_TURBO 5
1082#define CARD_AVER_MEDIA 6
1083#define CARD_OSPREY 7
1084#define CARD_NEC_PK 8
1085#define CARD_IO_GV 9
1086#define CARD_FLYVIDEO 10
1087#define CARD_ZOLTRIX 11
1088#define CARD_KISS 12
1089#define CARD_VIDEO_HIGHWAY_XTREME 13
1090#define Bt848_MAX_CARD 14
1091
1092/*
1093 * the data for each type of card
1094 *
1095 * Note:
1096 * these entried MUST be kept in the order defined by the CARD_XXX defines!
1097 */
1098static const struct CARDTYPE cards[] = {
1099
1100 { CARD_UNKNOWN, /* the card id */
1101 "Unknown", /* the 'name' */
1102 NULL, /* the tuner */
1103 0, /* the tuner i2c address */
1104 0, /* dbx unknown */
1105 0,
1106 0, /* EEProm unknown */
1107 0, /* EEProm unknown */
1108 { 0, 0, 0, 0, 0 },
1109 0 }, /* GPIO mask */
1110
1111 { CARD_MIRO, /* the card id */
1112 "Miro TV", /* the 'name' */
1113 NULL, /* the tuner */
1114 0, /* the tuner i2c address */
1115 0, /* dbx unknown */
1116 0,
1117 0, /* EEProm unknown */
1118 0, /* size unknown */
1119 { 0x02, 0x01, 0x00, 0x0a, 1 }, /* audio MUX values */
1120 0x0f }, /* GPIO mask */
1121
1122 { CARD_HAUPPAUGE, /* the card id */
1123 "Hauppauge WinCast/TV", /* the 'name' */
1124 NULL, /* the tuner */
1125 0, /* the tuner i2c address */
1126 0, /* dbx is optional */
1127 0,
1128 PFC8582_WADDR, /* EEProm type */
1129 (u_char)(256 / EEPROMBLOCKSIZE), /* 256 bytes */
1130 { 0x00, 0x02, 0x01, 0x04, 1 }, /* audio MUX values */
1131 0x0f }, /* GPIO mask */
1132
1133 { CARD_STB, /* the card id */
1134 "STB TV/PCI", /* the 'name' */
1135 NULL, /* the tuner */
1136 0, /* the tuner i2c address */
1137 0, /* dbx is optional */
1138 0,
1139 X24C01_WADDR, /* EEProm type */
1140 (u_char)(128 / EEPROMBLOCKSIZE), /* 128 bytes */
1141 { 0x00, 0x01, 0x02, 0x02, 1 }, /* audio MUX values */
1142 0x0f }, /* GPIO mask */
1143
1144 { CARD_INTEL, /* the card id */
1145 "Intel Smart Video III/VideoLogic Captivator PCI", /* the 'name' */
1146 NULL, /* the tuner */
1147 0, /* the tuner i2c address */
1148 0,
1149 0,
1150 0,
1151 0,
1152 { 0, 0, 0, 0, 0 }, /* audio MUX values */
1153 0x00 }, /* GPIO mask */
1154
1155 { CARD_IMS_TURBO, /* the card id */
1156 "IMS TV Turbo", /* the 'name' */
1157 NULL, /* the tuner */
1158 0, /* the tuner i2c address */
1159 0, /* dbx is optional */
1160 0,
1161 PFC8582_WADDR, /* EEProm type */
1162 (u_char)(256 / EEPROMBLOCKSIZE), /* 256 bytes */
1163 { 0x01, 0x02, 0x01, 0x00, 1 }, /* audio MUX values */
1164 0x0f }, /* GPIO mask */
1165
1166 { CARD_AVER_MEDIA, /* the card id */
1167 "AVer Media TV/FM", /* the 'name' */
1168 NULL, /* the tuner */
1169 0, /* the tuner i2c address */
1170 0, /* dbx is optional */
1171 0,
1172 0, /* EEProm type */
1173 0, /* EEProm size */
1174 { 0x0c, 0x00, 0x0b, 0x0b, 1 }, /* audio MUX values */
1175 0x0f }, /* GPIO mask */
1176
1177 { CARD_OSPREY, /* the card id */
1178 "MMAC Osprey", /* the 'name' */
1179 NULL, /* the tuner */
1180 0, /* the tuner i2c address */
1181 0, /* dbx is optional */
1182 0,
1183 PFC8582_WADDR, /* EEProm type */
1184 (u_char)(256 / EEPROMBLOCKSIZE), /* 256 bytes */
1185 { 0x00, 0x00, 0x00, 0x00, 0 }, /* audio MUX values */
1186 0 }, /* GPIO mask */
1187
1188 { CARD_NEC_PK, /* the card id */
1189 "NEC PK-UG-X017", /* the 'name' */
1190 NULL, /* the tuner */
1191 0, /* the tuner i2c address */
1192 0, /* dbx is optional */
1193 0,
1194 0, /* EEProm type */
1195 0, /* EEProm size */
1196 { 0x01, 0x02, 0x01, 0x00, 1 }, /* audio MUX values */
1197 0x0f }, /* GPIO mask */
1198
1199 { CARD_IO_GV, /* the card id */
1200 "I/O DATA GV-BCTV2/PCI", /* the 'name' */
1201 NULL, /* the tuner */
1202 0, /* the tuner i2c address */
1203 0, /* dbx is optional */
1204 0,
1205 0, /* EEProm type */
1206 0, /* EEProm size */
1207 { 0x00, 0x00, 0x00, 0x00, 1 }, /* Has special MUX handler */
1208 0x0f }, /* GPIO mask */
1209
1210 { CARD_FLYVIDEO, /* the card id */
1211 "FlyVideo", /* the 'name' */
1212 NULL, /* the tuner */
1213 0, /* the tuner i2c address */
1214 0, /* dbx is optional */
1215 0, /* msp34xx is optional */
1216 0xac, /* EEProm type */
1217 (u_char)(256 / EEPROMBLOCKSIZE), /* 256 bytes */
1218 { 0x000, 0x800, 0x400, 0x8dff00, 1 },/* audio MUX values */
1219 0x8dff00 }, /* GPIO mask */
1220
1221 { CARD_ZOLTRIX, /* the card id */
1222 "Zoltrix", /* the 'name' */
1223 NULL, /* the tuner */
1224 0, /* the tuner i2c address */
1225 0, /* dbx is optional */
1226 0, /* msp34xx is optional */
1227 0, /* EEProm type */
1228 0, /* EEProm size */
1229 { 0x04, 0x01, 0x00, 0x0a, 1 }, /* audio MUX values */
1230 0x0f }, /* GPIO mask */
1231
1232 { CARD_KISS, /* the card id */
1233 "KISS TV/FM PCI", /* the 'name' */
1234 NULL, /* the tuner */
1235 0, /* the tuner i2c address */
1236 0, /* dbx is optional */
1237 0, /* msp34xx is optional */
1238 0, /* EEProm type */
1239 0, /* EEProm size */
1240 { 0x0c, 0x00, 0x0b, 0x0b, 1 }, /* audio MUX values */
1241 0x0f }, /* GPIO mask */
1242
1243 { CARD_VIDEO_HIGHWAY_XTREME, /* the card id */
1244 "Video Highway Xtreme", /* the 'name' */
1245 NULL, /* the tuner */
1246 0, /* the tuner i2c address */
1247 0, /* dbx is optional */
1248 0,
1249 0, /* EEProm type */
1250 0, /* EEProm size */
1251 { 0x00, 0x02, 0x01, 0x04, 1 }, /* audio MUX values */
1252 0x0f }, /* GPIO mask */
1253
1254};
1255
1256struct bt848_card_sig bt848_card_signature[1]= {
1257 /* IMS TURBO TV : card 5 */
1258 { 5,9, {00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 02, 00, 00, 00}}
1259
1260
1261};
1262
1263
| |
1264/* debug utility for holding previous INT_STAT contents */
1265#define STATUS_SUM
1266static u_long status_sum = 0;
1267
1268/*
1269 * defines to make certain bit-fiddles understandable
1270 */
1271#define FIFO_ENABLED BT848_DMA_CTL_FIFO_EN
1272#define RISC_ENABLED BT848_DMA_CTL_RISC_EN
1273#define FIFO_RISC_ENABLED (BT848_DMA_CTL_FIFO_EN | BT848_DMA_CTL_RISC_EN)
1274#define FIFO_RISC_DISABLED 0
1275
1276#define ALL_INTS_DISABLED 0
1277#define ALL_INTS_CLEARED 0xffffffff
1278#define CAPTURE_OFF 0
1279
1280#define BIT_SEVEN_HIGH (1<<7)
1281#define BIT_EIGHT_HIGH (1<<8)
1282
1283#define I2C_BITS (BT848_INT_RACK | BT848_INT_I2CDONE)
1284#define TDEC_BITS (BT848_INT_FDSR | BT848_INT_FBUS)
1285
1286
| 337/* debug utility for holding previous INT_STAT contents */
338#define STATUS_SUM
339static u_long status_sum = 0;
340
341/*
342 * defines to make certain bit-fiddles understandable
343 */
344#define FIFO_ENABLED BT848_DMA_CTL_FIFO_EN
345#define RISC_ENABLED BT848_DMA_CTL_RISC_EN
346#define FIFO_RISC_ENABLED (BT848_DMA_CTL_FIFO_EN | BT848_DMA_CTL_RISC_EN)
347#define FIFO_RISC_DISABLED 0
348
349#define ALL_INTS_DISABLED 0
350#define ALL_INTS_CLEARED 0xffffffff
351#define CAPTURE_OFF 0
352
353#define BIT_SEVEN_HIGH (1<<7)
354#define BIT_EIGHT_HIGH (1<<8)
355
356#define I2C_BITS (BT848_INT_RACK | BT848_INT_I2CDONE)
357#define TDEC_BITS (BT848_INT_FDSR | BT848_INT_FBUS)
358
359
|
1287/*
1288 * misc. support routines.
1289 */
1290static int signCard( bktr_ptr_t bktr, int offset,
1291 int count, u_char* sig );
1292static void probeCard( bktr_ptr_t bktr, int verbose, int unit);
| |
1293
| 360
|
1294static void common_bktr_attach( bktr_ptr_t bktr, int unit,
1295 u_long pci_id, u_int rev );
1296
1297/**************************************************/
1298/* *** Memory Allocation is still OS specific *** */
1299/**************************************************/
1300#if (defined(__FreeBSD__) || defined(__bsdi__))
1301static vm_offset_t get_bktr_mem( int unit, unsigned size );
1302#endif
1303
1304#if (defined(__NetBSD__) || defined(__OpenBSD__))
1305static vm_offset_t get_bktr_mem(bktr_ptr_t, bus_dmamap_t *, unsigned size);
1306static void free_bktr_mem(bktr_ptr_t, bus_dmamap_t, vm_offset_t);
1307#endif
1308
1309
| |
1310static int oformat_meteor_to_bt( u_long format );
1311
1312static u_int pixfmt_swap_flags( int pixfmt );
1313
1314/*
1315 * bt848 RISC programming routines.
1316 */
1317#ifdef BT848_DUMP
1318static int dump_bt848( bt848_ptr_t bt848 );
1319#endif
1320
1321static void yuvpack_prog( bktr_ptr_t bktr, char i_flag, int cols,
1322 int rows, int interlace );
1323static void yuv422_prog( bktr_ptr_t bktr, char i_flag, int cols,
1324 int rows, int interlace );
1325static void yuv12_prog( bktr_ptr_t bktr, char i_flag, int cols,
1326 int rows, int interlace );
1327static void rgb_prog( bktr_ptr_t bktr, char i_flag, int cols,
1328 int rows, int interlace );
1329static void rgb_vbi_prog( bktr_ptr_t bktr, char i_flag, int cols,
1330 int rows, int interlace );
1331static void build_dma_prog( bktr_ptr_t bktr, char i_flag );
1332
1333static bool_t getline(bktr_reg_t *, int);
1334static bool_t notclipped(bktr_reg_t * , int , int);
1335static bool_t split(bktr_reg_t *, volatile u_long **, int, u_long, int,
1336 volatile u_char ** , int );
1337
| 361static int oformat_meteor_to_bt( u_long format );
362
363static u_int pixfmt_swap_flags( int pixfmt );
364
365/*
366 * bt848 RISC programming routines.
367 */
368#ifdef BT848_DUMP
369static int dump_bt848( bt848_ptr_t bt848 );
370#endif
371
372static void yuvpack_prog( bktr_ptr_t bktr, char i_flag, int cols,
373 int rows, int interlace );
374static void yuv422_prog( bktr_ptr_t bktr, char i_flag, int cols,
375 int rows, int interlace );
376static void yuv12_prog( bktr_ptr_t bktr, char i_flag, int cols,
377 int rows, int interlace );
378static void rgb_prog( bktr_ptr_t bktr, char i_flag, int cols,
379 int rows, int interlace );
380static void rgb_vbi_prog( bktr_ptr_t bktr, char i_flag, int cols,
381 int rows, int interlace );
382static void build_dma_prog( bktr_ptr_t bktr, char i_flag );
383
384static bool_t getline(bktr_reg_t *, int);
385static bool_t notclipped(bktr_reg_t * , int , int);
386static bool_t split(bktr_reg_t *, volatile u_long **, int, u_long, int,
387 volatile u_char ** , int );
388
|
1338/*
1339 * video & video capture specific routines.
1340 */
1341static int video_open( bktr_ptr_t bktr );
1342static int video_close( bktr_ptr_t bktr );
1343static int video_read( bktr_ptr_t bktr, int unit, dev_t dev, struct uio *uio );
1344static int video_ioctl( bktr_ptr_t bktr, int unit,
1345 int cmd, caddr_t arg, struct proc* pr );
1346
| |
1347static void start_capture( bktr_ptr_t bktr, unsigned type );
1348static void set_fps( bktr_ptr_t bktr, u_short fps );
1349
1350
| 389static void start_capture( bktr_ptr_t bktr, unsigned type );
390static void set_fps( bktr_ptr_t bktr, u_short fps );
391
392
|
1351/*
1352 * tuner specific functions.
1353 */
1354static int tuner_open( bktr_ptr_t bktr );
1355static int tuner_close( bktr_ptr_t bktr );
1356static int tuner_ioctl( bktr_ptr_t bktr, int unit,
1357 int cmd, caddr_t arg, struct proc* pr );
1358static int tuner_getchnlset( struct bktr_chnlset *chnlset );
| |
1359
| 393
|
1360static int tv_channel( bktr_ptr_t bktr, int channel );
1361static int tv_freq( bktr_ptr_t bktr, int frequency );
1362#if defined( TUNER_AFC )
1363static int do_afc( bktr_ptr_t bktr, int addr, int frequency );
1364#endif /* TUNER_AFC */
1365
| |
1366/*
| 394/*
|
1367 * vbi specific functions.
1368 */
1369static int vbi_open( bktr_ptr_t bktr );
1370static int vbi_close( bktr_ptr_t bktr );
1371static int vbi_read( bktr_ptr_t bktr, struct uio *uio, int ioflag );
1372
1373/*
1374 * audio specific functions.
1375 */
1376static int set_audio( bktr_ptr_t bktr, int mode );
1377static void temp_mute( bktr_ptr_t bktr, int flag );
1378
1379static void init_BTSC( bktr_ptr_t bktr );
1380static int set_BTSC( bktr_ptr_t bktr, int control );
1381
1382static void msp_autodetect( bktr_ptr_t bktr );
1383static void msp_read_id( bktr_ptr_t bktr, int unit );
1384static void msp_reset( bktr_ptr_t bktr );
1385static unsigned int msp_read(bktr_ptr_t bktr, unsigned char dev,
1386 unsigned int addr);
1387static void msp_write( bktr_ptr_t bktr, unsigned char dev,
1388 unsigned int addr, unsigned int data);
1389
1390/*
| |
1391 * Remote Control Functions
1392 */
1393static void remote_read(bktr_ptr_t bktr, struct bktr_remote *remote);
1394
1395
1396/*
1397 * ioctls common to both video & tuner.
1398 */
1399static int common_ioctl( bktr_ptr_t bktr, bt848_ptr_t bt848,
1400 int cmd, caddr_t arg );
1401
1402
| 395 * Remote Control Functions
396 */
397static void remote_read(bktr_ptr_t bktr, struct bktr_remote *remote);
398
399
400/*
401 * ioctls common to both video & tuner.
402 */
403static int common_ioctl( bktr_ptr_t bktr, bt848_ptr_t bt848,
404 int cmd, caddr_t arg );
405
406
|
1403/*
1404 * i2c primitives
1405 */
1406static int i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 );
1407static int i2cRead( bktr_ptr_t bktr, int addr );
1408static int writeEEProm( bktr_ptr_t bktr, int offset, int count,
1409 u_char* data );
1410static int readEEProm( bktr_ptr_t bktr, int offset, int count,
1411 u_char* data );
1412
| |
1413#if ((!defined(__FreeBSD__)) || (NSMBUS == 0) )
1414/*
1415 * i2c primatives for low level control of i2c bus. Added for MSP34xx control
1416 */
1417static void i2c_start( bktr_ptr_t bktr);
1418static void i2c_stop( bktr_ptr_t bktr);
1419static int i2c_write_byte( bktr_ptr_t bktr, unsigned char data);
1420static int i2c_read_byte( bktr_ptr_t bktr, unsigned char *data, int last );
1421#endif
1422
| 407#if ((!defined(__FreeBSD__)) || (NSMBUS == 0) )
408/*
409 * i2c primatives for low level control of i2c bus. Added for MSP34xx control
410 */
411static void i2c_start( bktr_ptr_t bktr);
412static void i2c_stop( bktr_ptr_t bktr);
413static int i2c_write_byte( bktr_ptr_t bktr, unsigned char data);
414static int i2c_read_byte( bktr_ptr_t bktr, unsigned char *data, int last );
415#endif
416
|
1423/*
1424 * CARD_GV_BCTV specific functions.
1425 */
1426static void set_bctv_audio( bktr_ptr_t bktr );
1427static void bctv_gpio_write( bktr_ptr_t bktr, int port, int val );
1428/*static int bctv_gpio_read( bktr_ptr_t bktr, int port );*/ /* Not used */
| |
1429
1430
1431/*
1432 * the common attach code, used by all OS versions.
1433 */
| 417
418
419/*
420 * the common attach code, used by all OS versions.
421 */
|
1434static void
| 422void
|
1435common_bktr_attach( bktr_ptr_t bktr, int unit, u_long pci_id, u_int rev )
1436{
1437 bt848_ptr_t bt848;
1438 vm_offset_t buf;
1439
1440 bt848 = bktr->base;
1441
1442/***************************************/
1443/* *** OS Specific memory routines *** */
1444/***************************************/
1445#if defined(__NetBSD__) || defined(__OpenBSD__)
1446 /* allocate space for dma program */
1447 bktr->dma_prog = get_bktr_mem(bktr, &bktr->dm_prog, DMA_PROG_ALLOC);
1448 bktr->odd_dma_prog = get_bktr_mem(bktr, &bktr->dm_oprog, DMA_PROG_ALLOC)
1449;
1450 /* allocte space for the VBI buffer */
1451 bktr->vbidata = get_bktr_mem(bktr, &bktr->dm_vbidata, VBI_DATA_SIZE);
1452 bktr->vbibuffer = get_bktr_mem(bktr, &bktr->dm_vbibuffer, VBI_BUFFER_SIZE);
1453
1454 /* allocate space for pixel buffer */
1455 if ( BROOKTREE_ALLOC )
1456 buf = get_bktr_mem(bktr, &bktr->dm_mem, BROOKTREE_ALLOC);
1457 else
1458 buf = 0;
1459#endif
1460
1461#if defined(__FreeBSD__) || defined(__bsdi__)
1462 /* allocate space for dma program */
1463 bktr->dma_prog = get_bktr_mem(unit, DMA_PROG_ALLOC);
1464 bktr->odd_dma_prog = get_bktr_mem(unit, DMA_PROG_ALLOC);
1465
1466 /* allocte space for the VBI buffer */
1467 bktr->vbidata = get_bktr_mem(unit, VBI_DATA_SIZE);
1468 bktr->vbibuffer = get_bktr_mem(unit, VBI_BUFFER_SIZE);
1469
1470 /* allocate space for pixel buffer */
1471 if ( BROOKTREE_ALLOC )
1472 buf = get_bktr_mem(unit, BROOKTREE_ALLOC);
1473 else
1474 buf = 0;
1475#endif
1476
1477 if ( bootverbose ) {
1478 printf("bktr%d: buffer size %d, addr 0x%x\n",
1479 unit, BROOKTREE_ALLOC, vtophys(buf));
1480 }
1481
1482 if ( buf != 0 ) {
1483 bktr->bigbuf = buf;
1484 bktr->alloc_pages = BROOKTREE_ALLOC_PAGES;
1485 bzero((caddr_t) bktr->bigbuf, BROOKTREE_ALLOC);
1486 } else {
1487 bktr->alloc_pages = 0;
1488 }
1489
1490
1491 bktr->flags = METEOR_INITALIZED | METEOR_AUTOMODE |
1492 METEOR_DEV0 | METEOR_RGB16;
1493 bktr->dma_prog_loaded = FALSE;
1494 bktr->cols = 640;
1495 bktr->rows = 480;
1496 bktr->frames = 1; /* one frame */
1497 bktr->format = METEOR_GEO_RGB16;
1498 bktr->pixfmt = oformat_meteor_to_bt( bktr->format );
1499 bktr->pixfmt_compat = TRUE;
1500
1501
1502 bktr->vbiinsert = 0;
1503 bktr->vbistart = 0;
1504 bktr->vbisize = 0;
1505 bktr->vbiflags = 0;
1506
1507
1508 /* using the pci device id and revision id */
1509 /* and determine the card type */
1510 switch (pci_id) {
1511 case BROOKTREE_848_PCI_ID:
1512 if (rev == 0x12) bktr->id = BROOKTREE_848A;
1513 else bktr->id = BROOKTREE_848;
1514 break;
1515 case BROOKTREE_849_PCI_ID:
1516 bktr->id = BROOKTREE_849A;
1517 break;
1518 case BROOKTREE_878_PCI_ID:
1519 bktr->id = BROOKTREE_878;
1520 break;
1521 case BROOKTREE_879_PCI_ID:
1522 bktr->id = BROOKTREE_879;
1523 break;
1524 };
1525
1526 bktr->clr_on_start = FALSE;
1527
1528 /* defaults for the tuner section of the card */
1529 bktr->tflags = TUNER_INITALIZED;
1530 bktr->tuner.frequency = 0;
1531 bktr->tuner.channel = 0;
1532 bktr->tuner.chnlset = DEFAULT_CHNLSET;
1533 bktr->tuner.afc = 0;
| 423common_bktr_attach( bktr_ptr_t bktr, int unit, u_long pci_id, u_int rev )
424{
425 bt848_ptr_t bt848;
426 vm_offset_t buf;
427
428 bt848 = bktr->base;
429
430/***************************************/
431/* *** OS Specific memory routines *** */
432/***************************************/
433#if defined(__NetBSD__) || defined(__OpenBSD__)
434 /* allocate space for dma program */
435 bktr->dma_prog = get_bktr_mem(bktr, &bktr->dm_prog, DMA_PROG_ALLOC);
436 bktr->odd_dma_prog = get_bktr_mem(bktr, &bktr->dm_oprog, DMA_PROG_ALLOC)
437;
438 /* allocte space for the VBI buffer */
439 bktr->vbidata = get_bktr_mem(bktr, &bktr->dm_vbidata, VBI_DATA_SIZE);
440 bktr->vbibuffer = get_bktr_mem(bktr, &bktr->dm_vbibuffer, VBI_BUFFER_SIZE);
441
442 /* allocate space for pixel buffer */
443 if ( BROOKTREE_ALLOC )
444 buf = get_bktr_mem(bktr, &bktr->dm_mem, BROOKTREE_ALLOC);
445 else
446 buf = 0;
447#endif
448
449#if defined(__FreeBSD__) || defined(__bsdi__)
450 /* allocate space for dma program */
451 bktr->dma_prog = get_bktr_mem(unit, DMA_PROG_ALLOC);
452 bktr->odd_dma_prog = get_bktr_mem(unit, DMA_PROG_ALLOC);
453
454 /* allocte space for the VBI buffer */
455 bktr->vbidata = get_bktr_mem(unit, VBI_DATA_SIZE);
456 bktr->vbibuffer = get_bktr_mem(unit, VBI_BUFFER_SIZE);
457
458 /* allocate space for pixel buffer */
459 if ( BROOKTREE_ALLOC )
460 buf = get_bktr_mem(unit, BROOKTREE_ALLOC);
461 else
462 buf = 0;
463#endif
464
465 if ( bootverbose ) {
466 printf("bktr%d: buffer size %d, addr 0x%x\n",
467 unit, BROOKTREE_ALLOC, vtophys(buf));
468 }
469
470 if ( buf != 0 ) {
471 bktr->bigbuf = buf;
472 bktr->alloc_pages = BROOKTREE_ALLOC_PAGES;
473 bzero((caddr_t) bktr->bigbuf, BROOKTREE_ALLOC);
474 } else {
475 bktr->alloc_pages = 0;
476 }
477
478
479 bktr->flags = METEOR_INITALIZED | METEOR_AUTOMODE |
480 METEOR_DEV0 | METEOR_RGB16;
481 bktr->dma_prog_loaded = FALSE;
482 bktr->cols = 640;
483 bktr->rows = 480;
484 bktr->frames = 1; /* one frame */
485 bktr->format = METEOR_GEO_RGB16;
486 bktr->pixfmt = oformat_meteor_to_bt( bktr->format );
487 bktr->pixfmt_compat = TRUE;
488
489
490 bktr->vbiinsert = 0;
491 bktr->vbistart = 0;
492 bktr->vbisize = 0;
493 bktr->vbiflags = 0;
494
495
496 /* using the pci device id and revision id */
497 /* and determine the card type */
498 switch (pci_id) {
499 case BROOKTREE_848_PCI_ID:
500 if (rev == 0x12) bktr->id = BROOKTREE_848A;
501 else bktr->id = BROOKTREE_848;
502 break;
503 case BROOKTREE_849_PCI_ID:
504 bktr->id = BROOKTREE_849A;
505 break;
506 case BROOKTREE_878_PCI_ID:
507 bktr->id = BROOKTREE_878;
508 break;
509 case BROOKTREE_879_PCI_ID:
510 bktr->id = BROOKTREE_879;
511 break;
512 };
513
514 bktr->clr_on_start = FALSE;
515
516 /* defaults for the tuner section of the card */
517 bktr->tflags = TUNER_INITALIZED;
518 bktr->tuner.frequency = 0;
519 bktr->tuner.channel = 0;
520 bktr->tuner.chnlset = DEFAULT_CHNLSET;
521 bktr->tuner.afc = 0;
|
1534 bktr->tuner.radio_mode = 0;
| 522 bktr->tuner.radio_mode = 0;
|
1535 bktr->audio_mux_select = 0;
1536 bktr->audio_mute_state = FALSE;
1537 bktr->bt848_card = -1;
1538 bktr->bt848_tuner = -1;
1539 bktr->reverse_mute = -1;
1540
1541 probeCard( bktr, TRUE, unit );
1542
| 523 bktr->audio_mux_select = 0;
524 bktr->audio_mute_state = FALSE;
525 bktr->bt848_card = -1;
526 bktr->bt848_tuner = -1;
527 bktr->reverse_mute = -1;
528
529 probeCard( bktr, TRUE, unit );
530
|
1543 /* If there is an MSP Audio device, reset it and display the model */
1544 if (bktr->card.msp3400c)msp_reset(bktr);
1545 if (bktr->card.msp3400c)msp_read_id(bktr, unit);
| 531 /* Initialise any MSP34xx or TDA98xx audio chips */
532 init_audio_devices( bktr );
|
1546
1547}
1548
1549
1550/* Copy the vbi lines from 'vbidata' into the circular buffer, 'vbibuffer'.
1551 * The circular buffer holds 'n' fixed size data blocks.
1552 * vbisize is the number of bytes in the circular buffer
1553 * vbiread is the point we reading data out of the circular buffer
1554 * vbiinsert is the point we insert data into the circular buffer
1555 */
1556static void vbidecode(bktr_ptr_t bktr) {
1557 unsigned char *dest;
1558 unsigned int *seq_dest;
1559
1560 /* Check if there is room in the buffer to insert the data. */
1561 if (bktr->vbisize + VBI_DATA_SIZE > VBI_BUFFER_SIZE) return;
1562
1563 /* Copy the VBI data into the next free slot in the buffer. */
1564 /* 'dest' is the point in vbibuffer where we want to insert new data */
1565 dest = (unsigned char *)bktr->vbibuffer + bktr->vbiinsert;
1566 memcpy(dest, (unsigned char*)bktr->vbidata, VBI_DATA_SIZE);
1567
1568 /* Write the VBI sequence number to the end of the vbi data */
1569 /* This is used by the AleVT teletext program */
| 533
534}
535
536
537/* Copy the vbi lines from 'vbidata' into the circular buffer, 'vbibuffer'.
538 * The circular buffer holds 'n' fixed size data blocks.
539 * vbisize is the number of bytes in the circular buffer
540 * vbiread is the point we reading data out of the circular buffer
541 * vbiinsert is the point we insert data into the circular buffer
542 */
543static void vbidecode(bktr_ptr_t bktr) {
544 unsigned char *dest;
545 unsigned int *seq_dest;
546
547 /* Check if there is room in the buffer to insert the data. */
548 if (bktr->vbisize + VBI_DATA_SIZE > VBI_BUFFER_SIZE) return;
549
550 /* Copy the VBI data into the next free slot in the buffer. */
551 /* 'dest' is the point in vbibuffer where we want to insert new data */
552 dest = (unsigned char *)bktr->vbibuffer + bktr->vbiinsert;
553 memcpy(dest, (unsigned char*)bktr->vbidata, VBI_DATA_SIZE);
554
555 /* Write the VBI sequence number to the end of the vbi data */
556 /* This is used by the AleVT teletext program */
|
1570 seq_dest = (unsigned int *)((unsigned char *)bktr->vbibuffer + bktr->vbiinsert
| 557 seq_dest = (unsigned int *)((unsigned char *)bktr->vbibuffer
558 + bktr->vbiinsert
|
1571 + (VBI_DATA_SIZE - sizeof(bktr->vbi_sequence_number)));
1572 *seq_dest = bktr->vbi_sequence_number;
1573
1574 /* And increase the VBI sequence number */
1575 /* This can wrap around */
1576 bktr->vbi_sequence_number++;
1577
1578
1579 /* Increment the vbiinsert pointer */
1580 /* This can wrap around */
1581 bktr->vbiinsert += VBI_DATA_SIZE;
1582 bktr->vbiinsert = (bktr->vbiinsert % VBI_BUFFER_SIZE);
1583
1584 /* And increase the amount of vbi data in the buffer */
1585 bktr->vbisize = bktr->vbisize + VBI_DATA_SIZE;
1586
1587}
1588
1589
1590/*
1591 * the common interrupt handler.
1592 * Returns a 0 or 1 depending on whether the interrupt has handled.
1593 * In the OS specific section, bktr_intr() is defined which calls this
1594 * common interrupt handler.
1595 */
| 559 + (VBI_DATA_SIZE - sizeof(bktr->vbi_sequence_number)));
560 *seq_dest = bktr->vbi_sequence_number;
561
562 /* And increase the VBI sequence number */
563 /* This can wrap around */
564 bktr->vbi_sequence_number++;
565
566
567 /* Increment the vbiinsert pointer */
568 /* This can wrap around */
569 bktr->vbiinsert += VBI_DATA_SIZE;
570 bktr->vbiinsert = (bktr->vbiinsert % VBI_BUFFER_SIZE);
571
572 /* And increase the amount of vbi data in the buffer */
573 bktr->vbisize = bktr->vbisize + VBI_DATA_SIZE;
574
575}
576
577
578/*
579 * the common interrupt handler.
580 * Returns a 0 or 1 depending on whether the interrupt has handled.
581 * In the OS specific section, bktr_intr() is defined which calls this
582 * common interrupt handler.
583 */
|
1596static int
| 584int
|
1597common_bktr_intr( void *arg )
1598{
1599 bktr_ptr_t bktr;
1600 bt848_ptr_t bt848;
1601 u_long bktr_status;
1602 u_char dstatus;
1603 u_long field;
1604 u_long w_field;
1605 u_long req_field;
1606
1607 bktr = (bktr_ptr_t) arg;
1608 bt848 = bktr->base;
1609
1610 /*
1611 * check to see if any interrupts are unmasked on this device. If
1612 * none are, then we likely got here by way of being on a PCI shared
1613 * interrupt dispatch list.
1614 */
1615 if (bt848->int_mask == ALL_INTS_DISABLED)
1616 return 0; /* bail out now, before we do something we
1617 shouldn't */
1618
1619 if (!(bktr->flags & METEOR_OPEN)) {
1620 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
1621 bt848->int_mask = ALL_INTS_DISABLED;
1622 /* return; ?? */
1623 }
1624
1625 /* record and clear the INTerrupt status bits */
1626 bktr_status = bt848->int_stat;
1627 bt848->int_stat = bktr_status & ~I2C_BITS; /* don't touch i2c */
1628
1629 /* record and clear the device status register */
1630 dstatus = bt848->dstatus;
1631 bt848->dstatus = 0x00;
1632
1633#if defined( STATUS_SUM )
1634 /* add any new device status or INTerrupt status bits */
1635 status_sum |= (bktr_status & ~(BT848_INT_RSV0|BT848_INT_RSV1));
1636 status_sum |= ((dstatus & (BT848_DSTATUS_COF|BT848_DSTATUS_LOF)) << 6);
1637#endif /* STATUS_SUM */
1638 /* printf( " STATUS %x %x %x \n",
1639 dstatus, bktr_status, bt848->risc_count );
1640 */
1641
1642
1643 /* if risc was disabled re-start process again */
1644 /* if there was one of the following errors re-start again */
1645 if ( !(bktr_status & BT848_INT_RISC_EN) ||
1646 ((bktr_status &(/* BT848_INT_FBUS | */
1647 /* BT848_INT_FTRGT | */
1648 /* BT848_INT_FDSR | */
1649 BT848_INT_PPERR |
1650 BT848_INT_RIPERR | BT848_INT_PABORT |
1651 BT848_INT_OCERR | BT848_INT_SCERR) ) != 0)
1652 || ((bt848->tdec == 0) && (bktr_status & TDEC_BITS)) ) {
1653
1654 u_short tdec_save = bt848->tdec;
1655
1656 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
1657 bt848->cap_ctl = CAPTURE_OFF;
1658
1659 bt848->int_mask = ALL_INTS_DISABLED;
1660
1661 /* Reset temporal decimation ctr */
1662 bt848->tdec = 0;
1663 bt848->tdec = tdec_save;
1664
1665 /* Reset to no-fields captured state */
1666 if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) {
1667 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
1668 case METEOR_ONLY_ODD_FIELDS:
1669 bktr->flags |= METEOR_WANT_ODD;
1670 break;
1671 case METEOR_ONLY_EVEN_FIELDS:
1672 bktr->flags |= METEOR_WANT_EVEN;
1673 break;
1674 default:
1675 bktr->flags |= METEOR_WANT_MASK;
1676 break;
1677 }
1678 }
1679
1680 bt848->risc_strt_add = vtophys(bktr->dma_prog);
1681 bt848->gpio_dma_ctl = FIFO_ENABLED;
1682 bt848->gpio_dma_ctl = bktr->capcontrol;
1683
1684 bt848->int_mask = BT848_INT_MYSTERYBIT |
1685 BT848_INT_RISCI |
1686 BT848_INT_VSYNC |
1687 BT848_INT_FMTCHG;
1688
1689 bt848->cap_ctl = bktr->bktr_cap_ctl;
1690 return 1;
1691 }
1692
1693 /* If this is not a RISC program interrupt, return */
1694 if (!(bktr_status & BT848_INT_RISCI))
1695 return 0;
1696
1697/**
1698 printf( "intr status %x %x %x\n",
1699 bktr_status, dstatus, bt848->risc_count );
1700 */
1701
1702
1703 /*
1704 * Disable future interrupts if a capture mode is not selected.
1705 * This can happen when we are in the process of closing or
1706 * changing capture modes, otherwise it shouldn't happen.
1707 */
1708 if (!(bktr->flags & METEOR_CAP_MASK))
1709 bt848->cap_ctl = CAPTURE_OFF;
1710
1711
1712 /* Determine which field generated this interrupt */
1713 field = ( bktr_status & BT848_INT_FIELD ) ? EVEN_F : ODD_F;
1714
1715
1716 /*
1717 * Process the VBI data if it is being captured. We do this once
1718 * both Odd and Even VBI data is captured. Therefore we do this
1719 * in the Even field interrupt handler.
1720 */
1721 if ((bktr->vbiflags & VBI_CAPTURE)&&(field==EVEN_F)) {
1722 /* Put VBI data into circular buffer */
1723 vbidecode(bktr);
1724
1725 /* If someone is blocked on reading from /dev/vbi, wake them */
1726 if (bktr->vbi_read_blocked) {
1727 bktr->vbi_read_blocked = FALSE;
1728 wakeup(VBI_SLEEP);
1729 }
1730
1731 /* If someone has a select() on /dev/vbi, inform them */
1732 if (bktr->vbi_select.si_pid) {
1733 selwakeup(&bktr->vbi_select);
1734 }
1735
1736
1737 }
1738
1739
1740 /*
1741 * Register the completed field
1742 * (For dual-field mode, require fields from the same frame)
1743 */
1744 switch ( bktr->flags & METEOR_WANT_MASK ) {
1745 case METEOR_WANT_ODD : w_field = ODD_F ; break;
1746 case METEOR_WANT_EVEN : w_field = EVEN_F ; break;
1747 default : w_field = (ODD_F|EVEN_F); break;
1748 }
1749 switch ( bktr->flags & METEOR_ONLY_FIELDS_MASK ) {
1750 case METEOR_ONLY_ODD_FIELDS : req_field = ODD_F ; break;
1751 case METEOR_ONLY_EVEN_FIELDS : req_field = EVEN_F ; break;
1752 default : req_field = (ODD_F|EVEN_F);
1753 break;
1754 }
1755
1756 if (( field == EVEN_F ) && ( w_field == EVEN_F ))
1757 bktr->flags &= ~METEOR_WANT_EVEN;
1758 else if (( field == ODD_F ) && ( req_field == ODD_F ) &&
1759 ( w_field == ODD_F ))
1760 bktr->flags &= ~METEOR_WANT_ODD;
1761 else if (( field == ODD_F ) && ( req_field == (ODD_F|EVEN_F) ) &&
1762 ( w_field == (ODD_F|EVEN_F) ))
1763 bktr->flags &= ~METEOR_WANT_ODD;
1764 else if (( field == ODD_F ) && ( req_field == (ODD_F|EVEN_F) ) &&
1765 ( w_field == ODD_F )) {
1766 bktr->flags &= ~METEOR_WANT_ODD;
1767 bktr->flags |= METEOR_WANT_EVEN;
1768 }
1769 else {
1770 /* We're out of sync. Start over. */
1771 if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) {
1772 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
1773 case METEOR_ONLY_ODD_FIELDS:
1774 bktr->flags |= METEOR_WANT_ODD;
1775 break;
1776 case METEOR_ONLY_EVEN_FIELDS:
1777 bktr->flags |= METEOR_WANT_EVEN;
1778 break;
1779 default:
1780 bktr->flags |= METEOR_WANT_MASK;
1781 break;
1782 }
1783 }
1784 return 1;
1785 }
1786
1787 /*
1788 * If we have a complete frame.
1789 */
1790 if (!(bktr->flags & METEOR_WANT_MASK)) {
1791 bktr->frames_captured++;
1792 /*
1793 * post the completion time.
1794 */
1795 if (bktr->flags & METEOR_WANT_TS) {
1796 struct timeval *ts;
1797
1798 if ((u_int) bktr->alloc_pages * PAGE_SIZE
1799 <= (bktr->frame_size + sizeof(struct timeval))) {
1800 ts =(struct timeval *)bktr->bigbuf +
1801 bktr->frame_size;
1802 /* doesn't work in synch mode except
1803 * for first frame */
1804 /* XXX */
1805 microtime(ts);
1806 }
1807 }
1808
1809
1810 /*
1811 * Wake up the user in single capture mode.
1812 */
1813 if (bktr->flags & METEOR_SINGLE) {
1814
1815 /* stop dma */
1816 bt848->int_mask = ALL_INTS_DISABLED;
1817
1818 /* disable risc, leave fifo running */
1819 bt848->gpio_dma_ctl = FIFO_ENABLED;
1820 wakeup(BKTR_SLEEP);
1821 }
1822
1823 /*
1824 * If the user requested to be notified via signal,
1825 * let them know the frame is complete.
1826 */
1827
1828 if (bktr->proc && !(bktr->signal & METEOR_SIG_MODE_MASK))
1829 psignal( bktr->proc,
1830 bktr->signal&(~METEOR_SIG_MODE_MASK) );
1831
1832 /*
1833 * Reset the want flags if in continuous or
1834 * synchronous capture mode.
1835 */
1836/*
1837* XXX NOTE (Luigi):
1838* currently we only support 3 capture modes: odd only, even only,
1839* odd+even interlaced (odd field first). A fourth mode (non interlaced,
1840* either even OR odd) could provide 60 (50 for PAL) pictures per
1841* second, but it would require this routine to toggle the desired frame
1842* each time, and one more different DMA program for the Bt848.
1843* As a consequence, this fourth mode is currently unsupported.
1844*/
1845
1846 if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) {
1847 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
1848 case METEOR_ONLY_ODD_FIELDS:
1849 bktr->flags |= METEOR_WANT_ODD;
1850 break;
1851 case METEOR_ONLY_EVEN_FIELDS:
1852 bktr->flags |= METEOR_WANT_EVEN;
1853 break;
1854 default:
1855 bktr->flags |= METEOR_WANT_MASK;
1856 break;
1857 }
1858 }
1859 }
1860
1861 return 1;
1862}
1863
1864
1865
1866
1867/*
1868 *
1869 */
| 585common_bktr_intr( void *arg )
586{
587 bktr_ptr_t bktr;
588 bt848_ptr_t bt848;
589 u_long bktr_status;
590 u_char dstatus;
591 u_long field;
592 u_long w_field;
593 u_long req_field;
594
595 bktr = (bktr_ptr_t) arg;
596 bt848 = bktr->base;
597
598 /*
599 * check to see if any interrupts are unmasked on this device. If
600 * none are, then we likely got here by way of being on a PCI shared
601 * interrupt dispatch list.
602 */
603 if (bt848->int_mask == ALL_INTS_DISABLED)
604 return 0; /* bail out now, before we do something we
605 shouldn't */
606
607 if (!(bktr->flags & METEOR_OPEN)) {
608 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
609 bt848->int_mask = ALL_INTS_DISABLED;
610 /* return; ?? */
611 }
612
613 /* record and clear the INTerrupt status bits */
614 bktr_status = bt848->int_stat;
615 bt848->int_stat = bktr_status & ~I2C_BITS; /* don't touch i2c */
616
617 /* record and clear the device status register */
618 dstatus = bt848->dstatus;
619 bt848->dstatus = 0x00;
620
621#if defined( STATUS_SUM )
622 /* add any new device status or INTerrupt status bits */
623 status_sum |= (bktr_status & ~(BT848_INT_RSV0|BT848_INT_RSV1));
624 status_sum |= ((dstatus & (BT848_DSTATUS_COF|BT848_DSTATUS_LOF)) << 6);
625#endif /* STATUS_SUM */
626 /* printf( " STATUS %x %x %x \n",
627 dstatus, bktr_status, bt848->risc_count );
628 */
629
630
631 /* if risc was disabled re-start process again */
632 /* if there was one of the following errors re-start again */
633 if ( !(bktr_status & BT848_INT_RISC_EN) ||
634 ((bktr_status &(/* BT848_INT_FBUS | */
635 /* BT848_INT_FTRGT | */
636 /* BT848_INT_FDSR | */
637 BT848_INT_PPERR |
638 BT848_INT_RIPERR | BT848_INT_PABORT |
639 BT848_INT_OCERR | BT848_INT_SCERR) ) != 0)
640 || ((bt848->tdec == 0) && (bktr_status & TDEC_BITS)) ) {
641
642 u_short tdec_save = bt848->tdec;
643
644 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
645 bt848->cap_ctl = CAPTURE_OFF;
646
647 bt848->int_mask = ALL_INTS_DISABLED;
648
649 /* Reset temporal decimation ctr */
650 bt848->tdec = 0;
651 bt848->tdec = tdec_save;
652
653 /* Reset to no-fields captured state */
654 if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) {
655 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
656 case METEOR_ONLY_ODD_FIELDS:
657 bktr->flags |= METEOR_WANT_ODD;
658 break;
659 case METEOR_ONLY_EVEN_FIELDS:
660 bktr->flags |= METEOR_WANT_EVEN;
661 break;
662 default:
663 bktr->flags |= METEOR_WANT_MASK;
664 break;
665 }
666 }
667
668 bt848->risc_strt_add = vtophys(bktr->dma_prog);
669 bt848->gpio_dma_ctl = FIFO_ENABLED;
670 bt848->gpio_dma_ctl = bktr->capcontrol;
671
672 bt848->int_mask = BT848_INT_MYSTERYBIT |
673 BT848_INT_RISCI |
674 BT848_INT_VSYNC |
675 BT848_INT_FMTCHG;
676
677 bt848->cap_ctl = bktr->bktr_cap_ctl;
678 return 1;
679 }
680
681 /* If this is not a RISC program interrupt, return */
682 if (!(bktr_status & BT848_INT_RISCI))
683 return 0;
684
685/**
686 printf( "intr status %x %x %x\n",
687 bktr_status, dstatus, bt848->risc_count );
688 */
689
690
691 /*
692 * Disable future interrupts if a capture mode is not selected.
693 * This can happen when we are in the process of closing or
694 * changing capture modes, otherwise it shouldn't happen.
695 */
696 if (!(bktr->flags & METEOR_CAP_MASK))
697 bt848->cap_ctl = CAPTURE_OFF;
698
699
700 /* Determine which field generated this interrupt */
701 field = ( bktr_status & BT848_INT_FIELD ) ? EVEN_F : ODD_F;
702
703
704 /*
705 * Process the VBI data if it is being captured. We do this once
706 * both Odd and Even VBI data is captured. Therefore we do this
707 * in the Even field interrupt handler.
708 */
709 if ((bktr->vbiflags & VBI_CAPTURE)&&(field==EVEN_F)) {
710 /* Put VBI data into circular buffer */
711 vbidecode(bktr);
712
713 /* If someone is blocked on reading from /dev/vbi, wake them */
714 if (bktr->vbi_read_blocked) {
715 bktr->vbi_read_blocked = FALSE;
716 wakeup(VBI_SLEEP);
717 }
718
719 /* If someone has a select() on /dev/vbi, inform them */
720 if (bktr->vbi_select.si_pid) {
721 selwakeup(&bktr->vbi_select);
722 }
723
724
725 }
726
727
728 /*
729 * Register the completed field
730 * (For dual-field mode, require fields from the same frame)
731 */
732 switch ( bktr->flags & METEOR_WANT_MASK ) {
733 case METEOR_WANT_ODD : w_field = ODD_F ; break;
734 case METEOR_WANT_EVEN : w_field = EVEN_F ; break;
735 default : w_field = (ODD_F|EVEN_F); break;
736 }
737 switch ( bktr->flags & METEOR_ONLY_FIELDS_MASK ) {
738 case METEOR_ONLY_ODD_FIELDS : req_field = ODD_F ; break;
739 case METEOR_ONLY_EVEN_FIELDS : req_field = EVEN_F ; break;
740 default : req_field = (ODD_F|EVEN_F);
741 break;
742 }
743
744 if (( field == EVEN_F ) && ( w_field == EVEN_F ))
745 bktr->flags &= ~METEOR_WANT_EVEN;
746 else if (( field == ODD_F ) && ( req_field == ODD_F ) &&
747 ( w_field == ODD_F ))
748 bktr->flags &= ~METEOR_WANT_ODD;
749 else if (( field == ODD_F ) && ( req_field == (ODD_F|EVEN_F) ) &&
750 ( w_field == (ODD_F|EVEN_F) ))
751 bktr->flags &= ~METEOR_WANT_ODD;
752 else if (( field == ODD_F ) && ( req_field == (ODD_F|EVEN_F) ) &&
753 ( w_field == ODD_F )) {
754 bktr->flags &= ~METEOR_WANT_ODD;
755 bktr->flags |= METEOR_WANT_EVEN;
756 }
757 else {
758 /* We're out of sync. Start over. */
759 if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) {
760 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
761 case METEOR_ONLY_ODD_FIELDS:
762 bktr->flags |= METEOR_WANT_ODD;
763 break;
764 case METEOR_ONLY_EVEN_FIELDS:
765 bktr->flags |= METEOR_WANT_EVEN;
766 break;
767 default:
768 bktr->flags |= METEOR_WANT_MASK;
769 break;
770 }
771 }
772 return 1;
773 }
774
775 /*
776 * If we have a complete frame.
777 */
778 if (!(bktr->flags & METEOR_WANT_MASK)) {
779 bktr->frames_captured++;
780 /*
781 * post the completion time.
782 */
783 if (bktr->flags & METEOR_WANT_TS) {
784 struct timeval *ts;
785
786 if ((u_int) bktr->alloc_pages * PAGE_SIZE
787 <= (bktr->frame_size + sizeof(struct timeval))) {
788 ts =(struct timeval *)bktr->bigbuf +
789 bktr->frame_size;
790 /* doesn't work in synch mode except
791 * for first frame */
792 /* XXX */
793 microtime(ts);
794 }
795 }
796
797
798 /*
799 * Wake up the user in single capture mode.
800 */
801 if (bktr->flags & METEOR_SINGLE) {
802
803 /* stop dma */
804 bt848->int_mask = ALL_INTS_DISABLED;
805
806 /* disable risc, leave fifo running */
807 bt848->gpio_dma_ctl = FIFO_ENABLED;
808 wakeup(BKTR_SLEEP);
809 }
810
811 /*
812 * If the user requested to be notified via signal,
813 * let them know the frame is complete.
814 */
815
816 if (bktr->proc && !(bktr->signal & METEOR_SIG_MODE_MASK))
817 psignal( bktr->proc,
818 bktr->signal&(~METEOR_SIG_MODE_MASK) );
819
820 /*
821 * Reset the want flags if in continuous or
822 * synchronous capture mode.
823 */
824/*
825* XXX NOTE (Luigi):
826* currently we only support 3 capture modes: odd only, even only,
827* odd+even interlaced (odd field first). A fourth mode (non interlaced,
828* either even OR odd) could provide 60 (50 for PAL) pictures per
829* second, but it would require this routine to toggle the desired frame
830* each time, and one more different DMA program for the Bt848.
831* As a consequence, this fourth mode is currently unsupported.
832*/
833
834 if (bktr->flags & (METEOR_CONTIN | METEOR_SYNCAP)) {
835 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
836 case METEOR_ONLY_ODD_FIELDS:
837 bktr->flags |= METEOR_WANT_ODD;
838 break;
839 case METEOR_ONLY_EVEN_FIELDS:
840 bktr->flags |= METEOR_WANT_EVEN;
841 break;
842 default:
843 bktr->flags |= METEOR_WANT_MASK;
844 break;
845 }
846 }
847 }
848
849 return 1;
850}
851
852
853
854
855/*
856 *
857 */
|
1870static int
| 858extern int bt848_format; /* used to set the default format, PAL or NTSC */
859int
|
1871video_open( bktr_ptr_t bktr )
1872{
1873 bt848_ptr_t bt848;
1874 int frame_rate, video_format=0;
1875
1876 if (bktr->flags & METEOR_OPEN) /* device is busy */
1877 return( EBUSY );
1878
1879 bktr->flags |= METEOR_OPEN;
1880
1881 bt848 = bktr->base;
1882
1883#ifdef BT848_DUMP
1884 dump_bt848( bt848 );
1885#endif
1886
1887 bktr->clr_on_start = FALSE;
1888
1889 bt848->dstatus = 0x00; /* clear device status reg. */
1890
1891 bt848->adc = SYNC_LEVEL;
1892
1893#if BROOKTREE_SYSTEM_DEFAULT == BROOKTREE_PAL
1894 video_format = 0;
1895#else
1896 video_format = 1;
1897#endif
1898
1899 if (bt848_format == 0 )
1900 video_format = 0;
1901
1902 if (bt848_format == 1 )
1903 video_format = 1;
1904
1905 if (video_format == 1 ) {
1906 bt848->iform = BT848_IFORM_F_NTSCM;
1907 bktr->format_params = BT848_IFORM_F_NTSCM;
1908
1909 } else {
1910 bt848->iform = BT848_IFORM_F_PALBDGHI;
1911 bktr->format_params = BT848_IFORM_F_PALBDGHI;
1912
1913 }
1914
1915 bt848->iform |= format_params[bktr->format_params].iform_xtsel;
1916
1917 /* work around for new Hauppauge 878 cards */
1918 if ((bktr->card.card_id == CARD_HAUPPAUGE) &&
1919 (bktr->id==BROOKTREE_878 || bktr->id==BROOKTREE_879) )
1920 bt848->iform |= BT848_IFORM_M_MUX3;
1921 else
1922 bt848->iform |= BT848_IFORM_M_MUX1;
1923
1924 bt848->adelay = format_params[bktr->format_params].adelay;
1925 bt848->bdelay = format_params[bktr->format_params].bdelay;
1926 frame_rate = format_params[bktr->format_params].frame_rate;
1927
1928 /* enable PLL mode using 28Mhz crystal for PAL/SECAM users */
1929 if (bktr->xtal_pll_mode == BT848_USE_PLL) {
1930 bt848->tgctrl=0;
1931 bt848->pll_f_lo=0xf9;
1932 bt848->pll_f_hi=0xdc;
1933 bt848->pll_f_xci=0x8e;
1934 }
1935
1936 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV0;
1937
1938 bktr->max_clip_node = 0;
1939
1940 bt848->color_ctl_gamma = 1;
1941 bt848->color_ctl_rgb_ded = 1;
1942 bt848->color_ctl_color_bars = 0;
1943 bt848->color_ctl_ext_frmrate = 0;
1944 bt848->color_ctl_swap = 0;
1945
1946 bt848->e_hscale_lo = 170;
1947 bt848->o_hscale_lo = 170;
1948
1949 bt848->e_delay_lo = 0x72;
1950 bt848->o_delay_lo = 0x72;
1951 bt848->e_scloop = 0;
1952 bt848->o_scloop = 0;
1953
1954 bt848->vbi_pack_size = 0;
1955 bt848->vbi_pack_del = 0;
1956
1957 bktr->fifo_errors = 0;
1958 bktr->dma_errors = 0;
1959 bktr->frames_captured = 0;
1960 bktr->even_fields_captured = 0;
1961 bktr->odd_fields_captured = 0;
1962 bktr->proc = (struct proc *)0;
1963 set_fps(bktr, frame_rate);
1964 bktr->video.addr = 0;
1965 bktr->video.width = 0;
1966 bktr->video.banksize = 0;
1967 bktr->video.ramsize = 0;
1968 bktr->pixfmt_compat = TRUE;
1969 bktr->format = METEOR_GEO_RGB16;
1970 bktr->pixfmt = oformat_meteor_to_bt( bktr->format );
1971
1972 bktr->capture_area_enabled = FALSE;
1973
1974 bt848->int_mask = BT848_INT_MYSTERYBIT; /* if you take this out triton
1975 based motherboards will
1976 operate unreliably */
1977 return( 0 );
1978}
1979
| 860video_open( bktr_ptr_t bktr )
861{
862 bt848_ptr_t bt848;
863 int frame_rate, video_format=0;
864
865 if (bktr->flags & METEOR_OPEN) /* device is busy */
866 return( EBUSY );
867
868 bktr->flags |= METEOR_OPEN;
869
870 bt848 = bktr->base;
871
872#ifdef BT848_DUMP
873 dump_bt848( bt848 );
874#endif
875
876 bktr->clr_on_start = FALSE;
877
878 bt848->dstatus = 0x00; /* clear device status reg. */
879
880 bt848->adc = SYNC_LEVEL;
881
882#if BROOKTREE_SYSTEM_DEFAULT == BROOKTREE_PAL
883 video_format = 0;
884#else
885 video_format = 1;
886#endif
887
888 if (bt848_format == 0 )
889 video_format = 0;
890
891 if (bt848_format == 1 )
892 video_format = 1;
893
894 if (video_format == 1 ) {
895 bt848->iform = BT848_IFORM_F_NTSCM;
896 bktr->format_params = BT848_IFORM_F_NTSCM;
897
898 } else {
899 bt848->iform = BT848_IFORM_F_PALBDGHI;
900 bktr->format_params = BT848_IFORM_F_PALBDGHI;
901
902 }
903
904 bt848->iform |= format_params[bktr->format_params].iform_xtsel;
905
906 /* work around for new Hauppauge 878 cards */
907 if ((bktr->card.card_id == CARD_HAUPPAUGE) &&
908 (bktr->id==BROOKTREE_878 || bktr->id==BROOKTREE_879) )
909 bt848->iform |= BT848_IFORM_M_MUX3;
910 else
911 bt848->iform |= BT848_IFORM_M_MUX1;
912
913 bt848->adelay = format_params[bktr->format_params].adelay;
914 bt848->bdelay = format_params[bktr->format_params].bdelay;
915 frame_rate = format_params[bktr->format_params].frame_rate;
916
917 /* enable PLL mode using 28Mhz crystal for PAL/SECAM users */
918 if (bktr->xtal_pll_mode == BT848_USE_PLL) {
919 bt848->tgctrl=0;
920 bt848->pll_f_lo=0xf9;
921 bt848->pll_f_hi=0xdc;
922 bt848->pll_f_xci=0x8e;
923 }
924
925 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK) | METEOR_DEV0;
926
927 bktr->max_clip_node = 0;
928
929 bt848->color_ctl_gamma = 1;
930 bt848->color_ctl_rgb_ded = 1;
931 bt848->color_ctl_color_bars = 0;
932 bt848->color_ctl_ext_frmrate = 0;
933 bt848->color_ctl_swap = 0;
934
935 bt848->e_hscale_lo = 170;
936 bt848->o_hscale_lo = 170;
937
938 bt848->e_delay_lo = 0x72;
939 bt848->o_delay_lo = 0x72;
940 bt848->e_scloop = 0;
941 bt848->o_scloop = 0;
942
943 bt848->vbi_pack_size = 0;
944 bt848->vbi_pack_del = 0;
945
946 bktr->fifo_errors = 0;
947 bktr->dma_errors = 0;
948 bktr->frames_captured = 0;
949 bktr->even_fields_captured = 0;
950 bktr->odd_fields_captured = 0;
951 bktr->proc = (struct proc *)0;
952 set_fps(bktr, frame_rate);
953 bktr->video.addr = 0;
954 bktr->video.width = 0;
955 bktr->video.banksize = 0;
956 bktr->video.ramsize = 0;
957 bktr->pixfmt_compat = TRUE;
958 bktr->format = METEOR_GEO_RGB16;
959 bktr->pixfmt = oformat_meteor_to_bt( bktr->format );
960
961 bktr->capture_area_enabled = FALSE;
962
963 bt848->int_mask = BT848_INT_MYSTERYBIT; /* if you take this out triton
964 based motherboards will
965 operate unreliably */
966 return( 0 );
967}
968
|
1980static int
| 969int
|
1981vbi_open( bktr_ptr_t bktr )
1982{
1983 if (bktr->vbiflags & VBI_OPEN) /* device is busy */
1984 return( EBUSY );
1985
1986 bktr->vbiflags |= VBI_OPEN;
1987
1988 /* reset the VBI circular buffer pointers and clear the buffers */
1989 bktr->vbiinsert = 0;
1990 bktr->vbistart = 0;
1991 bktr->vbisize = 0;
1992 bktr->vbi_sequence_number = 0;
1993 bktr->vbi_read_blocked = FALSE;
1994
1995 bzero((caddr_t) bktr->vbibuffer, VBI_BUFFER_SIZE);
1996 bzero((caddr_t) bktr->vbidata, VBI_DATA_SIZE);
1997
1998 return( 0 );
1999}
2000
2001/*
2002 *
2003 */
| 970vbi_open( bktr_ptr_t bktr )
971{
972 if (bktr->vbiflags & VBI_OPEN) /* device is busy */
973 return( EBUSY );
974
975 bktr->vbiflags |= VBI_OPEN;
976
977 /* reset the VBI circular buffer pointers and clear the buffers */
978 bktr->vbiinsert = 0;
979 bktr->vbistart = 0;
980 bktr->vbisize = 0;
981 bktr->vbi_sequence_number = 0;
982 bktr->vbi_read_blocked = FALSE;
983
984 bzero((caddr_t) bktr->vbibuffer, VBI_BUFFER_SIZE);
985 bzero((caddr_t) bktr->vbidata, VBI_DATA_SIZE);
986
987 return( 0 );
988}
989
990/*
991 *
992 */
|
2004static int
| 993int
|
2005tuner_open( bktr_ptr_t bktr )
2006{
2007 if ( !(bktr->tflags & TUNER_INITALIZED) ) /* device not found */
2008 return( ENXIO );
2009
2010 if ( bktr->tflags & TUNER_OPEN ) /* already open */
2011 return( 0 );
2012
2013 bktr->tflags |= TUNER_OPEN;
2014 bktr->tuner.frequency = 0;
2015 bktr->tuner.channel = 0;
2016 bktr->tuner.chnlset = DEFAULT_CHNLSET;
2017 bktr->tuner.afc = 0;
| 994tuner_open( bktr_ptr_t bktr )
995{
996 if ( !(bktr->tflags & TUNER_INITALIZED) ) /* device not found */
997 return( ENXIO );
998
999 if ( bktr->tflags & TUNER_OPEN ) /* already open */
1000 return( 0 );
1001
1002 bktr->tflags |= TUNER_OPEN;
1003 bktr->tuner.frequency = 0;
1004 bktr->tuner.channel = 0;
1005 bktr->tuner.chnlset = DEFAULT_CHNLSET;
1006 bktr->tuner.afc = 0;
|
2018 bktr->tuner.radio_mode = 0;
| 1007 bktr->tuner.radio_mode = 0;
|
2019
2020 /* enable drivers on the GPIO port that control the MUXes */
2021 bktr->base->gpio_out_en |= bktr->card.gpio_mux_bits;
2022
2023 /* unmute the audio stream */
2024 set_audio( bktr, AUDIO_UNMUTE );
2025
| 1008
1009 /* enable drivers on the GPIO port that control the MUXes */
1010 bktr->base->gpio_out_en |= bktr->card.gpio_mux_bits;
1011
1012 /* unmute the audio stream */
1013 set_audio( bktr, AUDIO_UNMUTE );
1014
|
2026 /* enable stereo if appropriate on TDA audio chip */
2027 if ( bktr->card.dbx )
2028 init_BTSC( bktr );
2029
2030 /* reset the MSP34xx stereo audio chip */
2031 if ( bktr->card.msp3400c )
2032 msp_reset( bktr );
| 1015 /* Initialise any audio chips, eg MSP34xx or TDA98xx */
1016 init_audio_devices( bktr );
|
2033
2034 return( 0 );
2035}
2036
2037
2038
2039
2040/*
2041 *
2042 */
| 1017
1018 return( 0 );
1019}
1020
1021
1022
1023
1024/*
1025 *
1026 */
|
2043static int
| 1027int
|
2044video_close( bktr_ptr_t bktr )
2045{
2046 bt848_ptr_t bt848;
2047
2048 bktr->flags &= ~(METEOR_OPEN |
2049 METEOR_SINGLE |
2050 METEOR_CAP_MASK |
2051 METEOR_WANT_MASK);
2052
2053 bt848 = bktr->base;
2054 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
2055 bt848->cap_ctl = CAPTURE_OFF;
2056
2057 bktr->dma_prog_loaded = FALSE;
2058 bt848->tdec = 0;
2059 bt848->int_mask = ALL_INTS_DISABLED;
2060
2061/** FIXME: is 0xf magic, wouldn't 0x00 work ??? */
2062 bt848->sreset = 0xf;
2063 bt848->int_stat = ALL_INTS_CLEARED;
2064
2065 return( 0 );
2066}
2067
2068
2069/*
2070 * tuner close handle,
2071 * place holder for tuner specific operations on a close.
2072 */
| 1028video_close( bktr_ptr_t bktr )
1029{
1030 bt848_ptr_t bt848;
1031
1032 bktr->flags &= ~(METEOR_OPEN |
1033 METEOR_SINGLE |
1034 METEOR_CAP_MASK |
1035 METEOR_WANT_MASK);
1036
1037 bt848 = bktr->base;
1038 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
1039 bt848->cap_ctl = CAPTURE_OFF;
1040
1041 bktr->dma_prog_loaded = FALSE;
1042 bt848->tdec = 0;
1043 bt848->int_mask = ALL_INTS_DISABLED;
1044
1045/** FIXME: is 0xf magic, wouldn't 0x00 work ??? */
1046 bt848->sreset = 0xf;
1047 bt848->int_stat = ALL_INTS_CLEARED;
1048
1049 return( 0 );
1050}
1051
1052
1053/*
1054 * tuner close handle,
1055 * place holder for tuner specific operations on a close.
1056 */
|
2073static int
| 1057int
|
2074tuner_close( bktr_ptr_t bktr )
2075{
2076 bktr->tflags &= ~TUNER_OPEN;
2077
2078 /* mute the audio by switching the mux */
2079 set_audio( bktr, AUDIO_MUTE );
2080
2081 /* disable drivers on the GPIO port that control the MUXes */
2082 bktr->base->gpio_out_en = bktr->base->gpio_out_en & ~bktr->card.gpio_mux_bits;
2083
2084 return( 0 );
2085}
2086
| 1058tuner_close( bktr_ptr_t bktr )
1059{
1060 bktr->tflags &= ~TUNER_OPEN;
1061
1062 /* mute the audio by switching the mux */
1063 set_audio( bktr, AUDIO_MUTE );
1064
1065 /* disable drivers on the GPIO port that control the MUXes */
1066 bktr->base->gpio_out_en = bktr->base->gpio_out_en & ~bktr->card.gpio_mux_bits;
1067
1068 return( 0 );
1069}
1070
|
2087static int
| 1071int
|
2088vbi_close( bktr_ptr_t bktr )
2089{
2090
2091 bktr->vbiflags &= ~VBI_OPEN;
2092
2093 return( 0 );
2094}
2095
2096/*
2097 *
2098 */
| 1072vbi_close( bktr_ptr_t bktr )
1073{
1074
1075 bktr->vbiflags &= ~VBI_OPEN;
1076
1077 return( 0 );
1078}
1079
1080/*
1081 *
1082 */
|
2099static int
| 1083int
|
2100video_read(bktr_ptr_t bktr, int unit, dev_t dev, struct uio *uio)
2101{
2102 bt848_ptr_t bt848;
2103 int status;
2104 int count;
2105
2106
2107 bt848 = bktr->base;
2108
2109 if (bktr->bigbuf == 0) /* no frame buffer allocated (ioctl failed) */
2110 return( ENOMEM );
2111
2112 if (bktr->flags & METEOR_CAP_MASK)
2113 return( EIO ); /* already capturing */
2114
2115 bt848->cap_ctl = bktr->bktr_cap_ctl;
2116
2117
2118 count = bktr->rows * bktr->cols *
2119 pixfmt_table[ bktr->pixfmt ].public.Bpp;
2120
2121 if ((int) uio->uio_iov->iov_len < count)
2122 return( EINVAL );
2123
2124 bktr->flags &= ~(METEOR_CAP_MASK | METEOR_WANT_MASK);
2125
2126 /* capture one frame */
2127 start_capture(bktr, METEOR_SINGLE);
2128 /* wait for capture to complete */
2129 bt848->int_stat = ALL_INTS_CLEARED;
2130 bt848->gpio_dma_ctl = FIFO_ENABLED;
2131 bt848->gpio_dma_ctl = bktr->capcontrol;
2132 bt848->int_mask = BT848_INT_MYSTERYBIT |
2133 BT848_INT_RISCI |
2134 BT848_INT_VSYNC |
2135 BT848_INT_FMTCHG;
2136
2137
2138 status = tsleep(BKTR_SLEEP, BKTRPRI, "captur", 0);
2139 if (!status) /* successful capture */
2140 status = uiomove((caddr_t)bktr->bigbuf, count, uio);
2141 else
2142 printf ("bktr%d: read: tsleep error %d\n", unit, status);
2143
2144 bktr->flags &= ~(METEOR_SINGLE | METEOR_WANT_MASK);
2145
2146 return( status );
2147}
2148
2149/*
2150 * Read VBI data from the vbi circular buffer
2151 * The buffer holds vbi data blocks which are the same size
2152 * vbiinsert is the position we will insert the next item into the buffer
2153 * vbistart is the actual position in the buffer we want to read from
2154 * vbisize is the exact number of bytes in the buffer left to read
2155 */
| 1084video_read(bktr_ptr_t bktr, int unit, dev_t dev, struct uio *uio)
1085{
1086 bt848_ptr_t bt848;
1087 int status;
1088 int count;
1089
1090
1091 bt848 = bktr->base;
1092
1093 if (bktr->bigbuf == 0) /* no frame buffer allocated (ioctl failed) */
1094 return( ENOMEM );
1095
1096 if (bktr->flags & METEOR_CAP_MASK)
1097 return( EIO ); /* already capturing */
1098
1099 bt848->cap_ctl = bktr->bktr_cap_ctl;
1100
1101
1102 count = bktr->rows * bktr->cols *
1103 pixfmt_table[ bktr->pixfmt ].public.Bpp;
1104
1105 if ((int) uio->uio_iov->iov_len < count)
1106 return( EINVAL );
1107
1108 bktr->flags &= ~(METEOR_CAP_MASK | METEOR_WANT_MASK);
1109
1110 /* capture one frame */
1111 start_capture(bktr, METEOR_SINGLE);
1112 /* wait for capture to complete */
1113 bt848->int_stat = ALL_INTS_CLEARED;
1114 bt848->gpio_dma_ctl = FIFO_ENABLED;
1115 bt848->gpio_dma_ctl = bktr->capcontrol;
1116 bt848->int_mask = BT848_INT_MYSTERYBIT |
1117 BT848_INT_RISCI |
1118 BT848_INT_VSYNC |
1119 BT848_INT_FMTCHG;
1120
1121
1122 status = tsleep(BKTR_SLEEP, BKTRPRI, "captur", 0);
1123 if (!status) /* successful capture */
1124 status = uiomove((caddr_t)bktr->bigbuf, count, uio);
1125 else
1126 printf ("bktr%d: read: tsleep error %d\n", unit, status);
1127
1128 bktr->flags &= ~(METEOR_SINGLE | METEOR_WANT_MASK);
1129
1130 return( status );
1131}
1132
1133/*
1134 * Read VBI data from the vbi circular buffer
1135 * The buffer holds vbi data blocks which are the same size
1136 * vbiinsert is the position we will insert the next item into the buffer
1137 * vbistart is the actual position in the buffer we want to read from
1138 * vbisize is the exact number of bytes in the buffer left to read
1139 */
|
2156static int
| 1140int
|
2157vbi_read(bktr_ptr_t bktr, struct uio *uio, int ioflag)
2158{
2159 int readsize, readsize2;
2160 int status;
2161
2162
2163 while(bktr->vbisize == 0) {
2164 if (ioflag & IO_NDELAY) {
2165 return EWOULDBLOCK;
2166 }
2167
2168 bktr->vbi_read_blocked = TRUE;
2169 if ((status = tsleep(VBI_SLEEP, VBIPRI, "vbi", 0))) {
2170 return status;
2171 }
2172 }
2173
2174 /* Now we have some data to give to the user */
2175
2176 /* We cannot read more bytes than there are in
2177 * the circular buffer
2178 */
2179 readsize = (int)uio->uio_iov->iov_len;
2180
2181 if (readsize > bktr->vbisize) readsize = bktr->vbisize;
2182
2183 /* Check if we can read this number of bytes without having
2184 * to wrap around the circular buffer */
2185 if((bktr->vbistart + readsize) >= VBI_BUFFER_SIZE) {
2186 /* We need to wrap around */
2187
2188 readsize2 = VBI_BUFFER_SIZE - bktr->vbistart;
2189 status = uiomove((caddr_t)bktr->vbibuffer + bktr->vbistart, readsize2, uio);
2190 status += uiomove((caddr_t)bktr->vbibuffer, (readsize - readsize2), uio);
2191 } else {
2192 /* We do not need to wrap around */
2193 status = uiomove((caddr_t)bktr->vbibuffer + bktr->vbistart, readsize, uio);
2194 }
2195
2196 /* Update the number of bytes left to read */
2197 bktr->vbisize -= readsize;
2198
2199 /* Update vbistart */
2200 bktr->vbistart += readsize;
2201 bktr->vbistart = bktr->vbistart % VBI_BUFFER_SIZE; /* wrap around if needed */
2202
| 1141vbi_read(bktr_ptr_t bktr, struct uio *uio, int ioflag)
1142{
1143 int readsize, readsize2;
1144 int status;
1145
1146
1147 while(bktr->vbisize == 0) {
1148 if (ioflag & IO_NDELAY) {
1149 return EWOULDBLOCK;
1150 }
1151
1152 bktr->vbi_read_blocked = TRUE;
1153 if ((status = tsleep(VBI_SLEEP, VBIPRI, "vbi", 0))) {
1154 return status;
1155 }
1156 }
1157
1158 /* Now we have some data to give to the user */
1159
1160 /* We cannot read more bytes than there are in
1161 * the circular buffer
1162 */
1163 readsize = (int)uio->uio_iov->iov_len;
1164
1165 if (readsize > bktr->vbisize) readsize = bktr->vbisize;
1166
1167 /* Check if we can read this number of bytes without having
1168 * to wrap around the circular buffer */
1169 if((bktr->vbistart + readsize) >= VBI_BUFFER_SIZE) {
1170 /* We need to wrap around */
1171
1172 readsize2 = VBI_BUFFER_SIZE - bktr->vbistart;
1173 status = uiomove((caddr_t)bktr->vbibuffer + bktr->vbistart, readsize2, uio);
1174 status += uiomove((caddr_t)bktr->vbibuffer, (readsize - readsize2), uio);
1175 } else {
1176 /* We do not need to wrap around */
1177 status = uiomove((caddr_t)bktr->vbibuffer + bktr->vbistart, readsize, uio);
1178 }
1179
1180 /* Update the number of bytes left to read */
1181 bktr->vbisize -= readsize;
1182
1183 /* Update vbistart */
1184 bktr->vbistart += readsize;
1185 bktr->vbistart = bktr->vbistart % VBI_BUFFER_SIZE; /* wrap around if needed */
1186
|
2203return( status );
| 1187 return( status );
|
2204
2205}
2206
2207
2208
2209/*
2210 * video ioctls
2211 */
| 1188
1189}
1190
1191
1192
1193/*
1194 * video ioctls
1195 */
|
2212static int
| 1196int
|
2213video_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr )
2214{
2215 bt848_ptr_t bt848;
2216 volatile u_char c_temp;
2217 unsigned int temp;
2218 unsigned int temp_iform;
2219 unsigned int error;
2220 struct meteor_geomet *geo;
2221 struct meteor_counts *counts;
2222 struct meteor_video *video;
2223 struct bktr_capture_area *cap_area;
2224 vm_offset_t buf;
2225 int i;
2226 char char_temp;
2227
2228 bt848 = bktr->base;
2229
2230 switch ( cmd ) {
2231
2232 case BT848SCLIP: /* set clip region */
2233 bktr->max_clip_node = 0;
2234 memcpy(&bktr->clip_list, arg, sizeof(bktr->clip_list));
2235
2236 for (i = 0; i < BT848_MAX_CLIP_NODE; i++) {
2237 if (bktr->clip_list[i].y_min == 0 &&
2238 bktr->clip_list[i].y_max == 0)
2239 break;
2240 }
2241 bktr->max_clip_node = i;
2242
2243 /* make sure that the list contains a valid clip secquence */
2244 /* the clip rectangles should be sorted by x then by y as the
2245 second order sort key */
2246
2247 /* clip rectangle list is terminated by y_min and y_max set to 0 */
2248
2249 /* to disable clipping set y_min and y_max to 0 in the first
2250 clip rectangle . The first clip rectangle is clip_list[0].
2251 */
2252
2253
2254
2255 if (bktr->max_clip_node == 0 &&
2256 (bktr->clip_list[0].y_min != 0 &&
2257 bktr->clip_list[0].y_max != 0)) {
2258 return EINVAL;
2259 }
2260
2261 for (i = 0; i < BT848_MAX_CLIP_NODE - 1 ; i++) {
2262 if (bktr->clip_list[i].y_min == 0 &&
2263 bktr->clip_list[i].y_max == 0) {
2264 break;
2265 }
2266 if ( bktr->clip_list[i+1].y_min != 0 &&
2267 bktr->clip_list[i+1].y_max != 0 &&
2268 bktr->clip_list[i].x_min > bktr->clip_list[i+1].x_min ) {
2269
2270 bktr->max_clip_node = 0;
2271 return (EINVAL);
2272
2273 }
2274
2275 if (bktr->clip_list[i].x_min >= bktr->clip_list[i].x_max ||
2276 bktr->clip_list[i].y_min >= bktr->clip_list[i].y_max ||
2277 bktr->clip_list[i].x_min < 0 ||
2278 bktr->clip_list[i].x_max < 0 ||
2279 bktr->clip_list[i].y_min < 0 ||
2280 bktr->clip_list[i].y_max < 0 ) {
2281 bktr->max_clip_node = 0;
2282 return (EINVAL);
2283 }
2284 }
2285
2286 bktr->dma_prog_loaded = FALSE;
2287
2288 break;
2289
2290 case METEORSTATUS: /* get Bt848 status */
2291 c_temp = bt848->dstatus;
2292 temp = 0;
2293 if (!(c_temp & 0x40)) temp |= METEOR_STATUS_HCLK;
2294 if (!(c_temp & 0x10)) temp |= METEOR_STATUS_FIDT;
2295 *(u_short *)arg = temp;
2296 break;
2297
2298 case BT848SFMT: /* set input format */
2299 temp = *(unsigned long*)arg & BT848_IFORM_FORMAT;
2300 temp_iform = bt848->iform;
2301 temp_iform &= ~BT848_IFORM_FORMAT;
2302 temp_iform &= ~BT848_IFORM_XTSEL;
2303 bt848->iform = (temp_iform | temp | format_params[temp].iform_xtsel);
2304 switch( temp ) {
2305 case BT848_IFORM_F_AUTO:
2306 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2307 METEOR_AUTOMODE;
2308 break;
2309
2310 case BT848_IFORM_F_NTSCM:
2311 case BT848_IFORM_F_NTSCJ:
2312 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2313 METEOR_NTSC;
2314 bt848->adelay = format_params[temp].adelay;
2315 bt848->bdelay = format_params[temp].bdelay;
2316 bktr->format_params = temp;
2317 break;
2318
2319 case BT848_IFORM_F_PALBDGHI:
2320 case BT848_IFORM_F_PALN:
2321 case BT848_IFORM_F_SECAM:
2322 case BT848_IFORM_F_RSVD:
2323 case BT848_IFORM_F_PALM:
2324 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2325 METEOR_PAL;
2326 bt848->adelay = format_params[temp].adelay;
2327 bt848->bdelay = format_params[temp].bdelay;
2328 bktr->format_params = temp;
2329 break;
2330
2331 }
2332 bktr->dma_prog_loaded = FALSE;
2333 break;
2334
2335 case METEORSFMT: /* set input format */
2336 temp_iform = bt848->iform;
2337 temp_iform &= ~BT848_IFORM_FORMAT;
2338 temp_iform &= ~BT848_IFORM_XTSEL;
2339 switch(*(unsigned long *)arg & METEOR_FORM_MASK ) {
2340 case 0: /* default */
2341 case METEOR_FMT_NTSC:
2342 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2343 METEOR_NTSC;
2344 bt848->iform = temp_iform | BT848_IFORM_F_NTSCM |
2345 format_params[BT848_IFORM_F_NTSCM].iform_xtsel;
2346 bt848->adelay = format_params[BT848_IFORM_F_NTSCM].adelay;
2347 bt848->bdelay = format_params[BT848_IFORM_F_NTSCM].bdelay;
2348 bktr->format_params = BT848_IFORM_F_NTSCM;
2349 break;
2350
2351 case METEOR_FMT_PAL:
2352 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2353 METEOR_PAL;
2354 bt848->iform = temp_iform | BT848_IFORM_F_PALBDGHI |
2355 format_params[BT848_IFORM_F_PALBDGHI].iform_xtsel;
2356 bt848->adelay = format_params[BT848_IFORM_F_PALBDGHI].adelay;
2357 bt848->bdelay = format_params[BT848_IFORM_F_PALBDGHI].bdelay;
2358 bktr->format_params = BT848_IFORM_F_PALBDGHI;
2359 break;
2360
2361 case METEOR_FMT_AUTOMODE:
2362 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
2363 METEOR_AUTOMODE;
2364 bt848->iform = temp_iform | BT848_IFORM_F_AUTO |
2365 format_params[BT848_IFORM_F_AUTO].iform_xtsel;
2366 break;
2367
2368 default:
2369 return( EINVAL );
2370 }
2371 bktr->dma_prog_loaded = FALSE;
2372 break;
2373
2374 case METEORGFMT: /* get input format */
2375 *(u_long *)arg = bktr->flags & METEOR_FORM_MASK;
2376 break;
2377
2378
2379 case BT848GFMT: /* get input format */
2380 *(u_long *)arg = bt848->iform & BT848_IFORM_FORMAT;
2381 break;
2382
2383 case METEORSCOUNT: /* (re)set error counts */
2384 counts = (struct meteor_counts *) arg;
2385 bktr->fifo_errors = counts->fifo_errors;
2386 bktr->dma_errors = counts->dma_errors;
2387 bktr->frames_captured = counts->frames_captured;
2388 bktr->even_fields_captured = counts->even_fields_captured;
2389 bktr->odd_fields_captured = counts->odd_fields_captured;
2390 break;
2391
2392 case METEORGCOUNT: /* get error counts */
2393 counts = (struct meteor_counts *) arg;
2394 counts->fifo_errors = bktr->fifo_errors;
2395 counts->dma_errors = bktr->dma_errors;
2396 counts->frames_captured = bktr->frames_captured;
2397 counts->even_fields_captured = bktr->even_fields_captured;
2398 counts->odd_fields_captured = bktr->odd_fields_captured;
2399 break;
2400
2401 case METEORGVIDEO:
2402 video = (struct meteor_video *)arg;
2403 video->addr = bktr->video.addr;
2404 video->width = bktr->video.width;
2405 video->banksize = bktr->video.banksize;
2406 video->ramsize = bktr->video.ramsize;
2407 break;
2408
2409 case METEORSVIDEO:
2410 video = (struct meteor_video *)arg;
2411 bktr->video.addr = video->addr;
2412 bktr->video.width = video->width;
2413 bktr->video.banksize = video->banksize;
2414 bktr->video.ramsize = video->ramsize;
2415 break;
2416
2417 case METEORSFPS:
2418 set_fps(bktr, *(u_short *)arg);
2419 break;
2420
2421 case METEORGFPS:
2422 *(u_short *)arg = bktr->fps;
2423 break;
2424
2425 case METEORSHUE: /* set hue */
2426 bt848->hue = (*(u_char *) arg) & 0xff;
2427 break;
2428
2429 case METEORGHUE: /* get hue */
2430 *(u_char *)arg = bt848->hue;
2431 break;
2432
2433 case METEORSBRIG: /* set brightness */
2434 char_temp = ( *(u_char *)arg & 0xff) - 128;
2435 bt848->bright = char_temp;
2436
2437 break;
2438
2439 case METEORGBRIG: /* get brightness */
2440 *(u_char *)arg = bt848->bright;
2441 break;
2442
2443 case METEORSCSAT: /* set chroma saturation */
2444 temp = (int)*(u_char *)arg;
2445
2446 bt848->sat_u_lo = bt848->sat_v_lo = (temp << 1) & 0xff;
2447
2448 bt848->e_control &= ~(BT848_E_CONTROL_SAT_U_MSB |
2449 BT848_E_CONTROL_SAT_V_MSB);
2450 bt848->o_control &= ~(BT848_O_CONTROL_SAT_U_MSB |
2451 BT848_O_CONTROL_SAT_V_MSB);
2452
2453 if ( temp & BIT_SEVEN_HIGH ) {
2454 bt848->e_control |= (BT848_E_CONTROL_SAT_U_MSB |
2455 BT848_E_CONTROL_SAT_V_MSB);
2456 bt848->o_control |= (BT848_O_CONTROL_SAT_U_MSB |
2457 BT848_O_CONTROL_SAT_V_MSB);
2458 }
2459 break;
2460
2461 case METEORGCSAT: /* get chroma saturation */
2462 temp = (bt848->sat_v_lo >> 1) & 0xff;
2463 if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB )
2464 temp |= BIT_SEVEN_HIGH;
2465 *(u_char *)arg = (u_char)temp;
2466 break;
2467
2468 case METEORSCONT: /* set contrast */
2469 temp = (int)*(u_char *)arg & 0xff;
2470 temp <<= 1;
2471 bt848->contrast_lo = temp & 0xff;
2472 bt848->e_control &= ~BT848_E_CONTROL_CON_MSB;
2473 bt848->o_control &= ~BT848_O_CONTROL_CON_MSB;
2474 bt848->e_control |=
2475 ((temp & 0x100) >> 6 ) & BT848_E_CONTROL_CON_MSB;
2476 bt848->o_control |=
2477 ((temp & 0x100) >> 6 ) & BT848_O_CONTROL_CON_MSB;
2478 break;
2479
2480 case METEORGCONT: /* get contrast */
2481 temp = (int)bt848->contrast_lo & 0xff;
2482 temp |= ((int)bt848->o_control & 0x04) << 6;
2483 *(u_char *)arg = (u_char)((temp >> 1) & 0xff);
2484 break;
2485
2486 case BT848SCBUF: /* set Clear-Buffer-on-start flag */
2487 bktr->clr_on_start = (*(int *)arg != 0);
2488 break;
2489
2490 case BT848GCBUF: /* get Clear-Buffer-on-start flag */
2491 *(int *)arg = (int) bktr->clr_on_start;
2492 break;
2493
2494 case METEORSSIGNAL:
2495 if(*(int *)arg == 0 || *(int *)arg >= NSIG) {
2496 return( EINVAL );
2497 break;
2498 }
2499 bktr->signal = *(int *) arg;
2500 bktr->proc = pr;
2501 break;
2502
2503 case METEORGSIGNAL:
2504 *(int *)arg = bktr->signal;
2505 break;
2506
2507 case METEORCAPTUR:
2508 temp = bktr->flags;
2509 switch (*(int *) arg) {
2510 case METEOR_CAP_SINGLE:
2511
2512 if (bktr->bigbuf==0) /* no frame buffer allocated */
2513 return( ENOMEM );
2514 /* already capturing */
2515 if (temp & METEOR_CAP_MASK)
2516 return( EIO );
2517
2518
2519
2520 start_capture(bktr, METEOR_SINGLE);
2521
2522 /* wait for capture to complete */
2523 bt848->int_stat = ALL_INTS_CLEARED;
2524 bt848->gpio_dma_ctl = FIFO_ENABLED;
2525 bt848->gpio_dma_ctl = bktr->capcontrol;
2526
2527 bt848->int_mask = BT848_INT_MYSTERYBIT |
2528 BT848_INT_RISCI |
2529 BT848_INT_VSYNC |
2530 BT848_INT_FMTCHG;
2531
2532 bt848->cap_ctl = bktr->bktr_cap_ctl;
2533 error = tsleep(BKTR_SLEEP, BKTRPRI, "captur", hz);
2534 if (error && (error != ERESTART)) {
2535 /* Here if we didn't get complete frame */
2536#ifdef DIAGNOSTIC
2537 printf( "bktr%d: ioctl: tsleep error %d %x\n",
2538 unit, error, bt848->risc_count);
2539#endif
2540
2541 /* stop dma */
2542 bt848->int_mask = ALL_INTS_DISABLED;
2543
2544 /* disable risc, leave fifo running */
2545 bt848->gpio_dma_ctl = FIFO_ENABLED;
2546 }
2547
2548 bktr->flags &= ~(METEOR_SINGLE|METEOR_WANT_MASK);
2549 /* FIXME: should we set bt848->int_stat ??? */
2550 break;
2551
2552 case METEOR_CAP_CONTINOUS:
2553 if (bktr->bigbuf==0) /* no frame buffer allocated */
2554 return( ENOMEM );
2555 /* already capturing */
2556 if (temp & METEOR_CAP_MASK)
2557 return( EIO );
2558
2559
2560 start_capture(bktr, METEOR_CONTIN);
2561 bt848->int_stat = bt848->int_stat;
2562
2563 bt848->gpio_dma_ctl = FIFO_ENABLED;
2564 bt848->gpio_dma_ctl = bktr->capcontrol;
2565 bt848->cap_ctl = bktr->bktr_cap_ctl;
2566
2567 bt848->int_mask = BT848_INT_MYSTERYBIT |
2568 BT848_INT_RISCI |
2569 BT848_INT_VSYNC |
2570 BT848_INT_FMTCHG;
2571#ifdef BT848_DUMP
2572 dump_bt848( bt848 );
2573#endif
2574 break;
2575
2576 case METEOR_CAP_STOP_CONT:
2577 if (bktr->flags & METEOR_CONTIN) {
2578 /* turn off capture */
2579 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
2580 bt848->cap_ctl = CAPTURE_OFF;
2581 bt848->int_mask = ALL_INTS_DISABLED;
2582 bktr->flags &=
2583 ~(METEOR_CONTIN | METEOR_WANT_MASK);
2584
2585 }
2586 }
2587 break;
2588
2589 case METEORSETGEO:
2590 /* can't change parameters while capturing */
2591 if (bktr->flags & METEOR_CAP_MASK)
2592 return( EBUSY );
2593
2594
2595 geo = (struct meteor_geomet *) arg;
2596
2597 error = 0;
2598 /* Either even or odd, if even & odd, then these a zero */
2599 if ((geo->oformat & METEOR_GEO_ODD_ONLY) &&
2600 (geo->oformat & METEOR_GEO_EVEN_ONLY)) {
2601 printf( "bktr%d: ioctl: Geometry odd or even only.\n",
2602 unit);
2603 return( EINVAL );
2604 }
2605
2606 /* set/clear even/odd flags */
2607 if (geo->oformat & METEOR_GEO_ODD_ONLY)
2608 bktr->flags |= METEOR_ONLY_ODD_FIELDS;
2609 else
2610 bktr->flags &= ~METEOR_ONLY_ODD_FIELDS;
2611 if (geo->oformat & METEOR_GEO_EVEN_ONLY)
2612 bktr->flags |= METEOR_ONLY_EVEN_FIELDS;
2613 else
2614 bktr->flags &= ~METEOR_ONLY_EVEN_FIELDS;
2615
2616 if (geo->columns <= 0) {
2617 printf(
2618 "bktr%d: ioctl: %d: columns must be greater than zero.\n",
2619 unit, geo->columns);
2620 error = EINVAL;
2621 }
2622 else if ((geo->columns & 0x3fe) != geo->columns) {
2623 printf(
2624 "bktr%d: ioctl: %d: columns too large or not even.\n",
2625 unit, geo->columns);
2626 error = EINVAL;
2627 }
2628
2629 if (geo->rows <= 0) {
2630 printf(
2631 "bktr%d: ioctl: %d: rows must be greater than zero.\n",
2632 unit, geo->rows);
2633 error = EINVAL;
2634 }
2635 else if (((geo->rows & 0x7fe) != geo->rows) ||
2636 ((geo->oformat & METEOR_GEO_FIELD_MASK) &&
2637 ((geo->rows & 0x3fe) != geo->rows)) ) {
2638 printf(
2639 "bktr%d: ioctl: %d: rows too large or not even.\n",
2640 unit, geo->rows);
2641 error = EINVAL;
2642 }
2643
2644 if (geo->frames > 32) {
2645 printf("bktr%d: ioctl: too many frames.\n", unit);
2646
2647 error = EINVAL;
2648 }
2649
2650 if (error)
2651 return( error );
2652
2653 bktr->dma_prog_loaded = FALSE;
2654 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
2655
2656 bt848->int_mask = ALL_INTS_DISABLED;
2657
2658 if ((temp=(geo->rows * geo->columns * geo->frames * 2))) {
2659 if (geo->oformat & METEOR_GEO_RGB24) temp = temp * 2;
2660
2661 /* meteor_mem structure for SYNC Capture */
2662 if (geo->frames > 1) temp += PAGE_SIZE;
2663
2664 temp = btoc(temp);
2665 if ((int) temp > bktr->alloc_pages
2666 && bktr->video.addr == 0) {
2667
2668/*****************************/
2669/* *** OS Dependant code *** */
2670/*****************************/
2671#if defined(__NetBSD__) || defined(__OpenBSD__)
2672 bus_dmamap_t dmamap;
2673
2674 buf = get_bktr_mem(bktr, &dmamap,
2675 temp * PAGE_SIZE);
2676 if (buf != 0) {
2677 free_bktr_mem(bktr, bktr->dm_mem,
2678 bktr->bigbuf);
2679 bktr->dm_mem = dmamap;
2680
2681#else
2682 buf = get_bktr_mem(unit, temp*PAGE_SIZE);
2683 if (buf != 0) {
2684 kmem_free(kernel_map, bktr->bigbuf,
2685 (bktr->alloc_pages * PAGE_SIZE));
2686#endif
2687
2688 bktr->bigbuf = buf;
2689 bktr->alloc_pages = temp;
2690 if (bootverbose)
2691 printf(
2692 "bktr%d: ioctl: Allocating %d bytes\n",
2693 unit, temp*PAGE_SIZE);
2694 }
2695 else
2696 error = ENOMEM;
2697 }
2698 }
2699
2700 if (error)
2701 return error;
2702
2703 bktr->rows = geo->rows;
2704 bktr->cols = geo->columns;
2705 bktr->frames = geo->frames;
2706
2707 /* Pixel format (if in meteor pixfmt compatibility mode) */
2708 if ( bktr->pixfmt_compat ) {
2709 bktr->format = METEOR_GEO_YUV_422;
2710 switch (geo->oformat & METEOR_GEO_OUTPUT_MASK) {
2711 case 0: /* default */
2712 case METEOR_GEO_RGB16:
2713 bktr->format = METEOR_GEO_RGB16;
2714 break;
2715 case METEOR_GEO_RGB24:
2716 bktr->format = METEOR_GEO_RGB24;
2717 break;
2718 case METEOR_GEO_YUV_422:
2719 bktr->format = METEOR_GEO_YUV_422;
2720 if (geo->oformat & METEOR_GEO_YUV_12)
2721 bktr->format = METEOR_GEO_YUV_12;
2722 break;
2723 case METEOR_GEO_YUV_PACKED:
2724 bktr->format = METEOR_GEO_YUV_PACKED;
2725 break;
2726 }
2727 bktr->pixfmt = oformat_meteor_to_bt( bktr->format );
2728 }
2729
2730 if (bktr->flags & METEOR_CAP_MASK) {
2731
2732 if (bktr->flags & (METEOR_CONTIN|METEOR_SYNCAP)) {
2733 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
2734 case METEOR_ONLY_ODD_FIELDS:
2735 bktr->flags |= METEOR_WANT_ODD;
2736 break;
2737 case METEOR_ONLY_EVEN_FIELDS:
2738 bktr->flags |= METEOR_WANT_EVEN;
2739 break;
2740 default:
2741 bktr->flags |= METEOR_WANT_MASK;
2742 break;
2743 }
2744
2745 start_capture(bktr, METEOR_CONTIN);
2746 bt848->int_stat = bt848->int_stat;
2747 bt848->gpio_dma_ctl = FIFO_ENABLED;
2748 bt848->gpio_dma_ctl = bktr->capcontrol;
2749 bt848->int_mask = BT848_INT_MYSTERYBIT |
2750 BT848_INT_VSYNC |
2751 BT848_INT_FMTCHG;
2752 }
2753 }
2754 break;
2755 /* end of METEORSETGEO */
2756
2757 /* FIXME. The Capture Area currently has the following restrictions:
2758 GENERAL
2759 y_offset may need to be even in interlaced modes
2760 RGB24 - Interlaced mode
2761 x_size must be greater than or equal to 1.666*METEORSETGEO width (cols)
2762 y_size must be greater than or equal to METEORSETGEO height (rows)
2763 RGB24 - Even Only (or Odd Only) mode
2764 x_size must be greater than or equal to 1.666*METEORSETGEO width (cols)
2765 y_size must be greater than or equal to 2*METEORSETGEO height (rows)
2766 YUV12 - Interlaced mode
2767 x_size must be greater than or equal to METEORSETGEO width (cols)
2768 y_size must be greater than or equal to METEORSETGEO height (rows)
2769 YUV12 - Even Only (or Odd Only) mode
2770 x_size must be greater than or equal to METEORSETGEO width (cols)
2771 y_size must be greater than or equal to 2*METEORSETGEO height (rows)
2772 */
2773
2774 case BT848_SCAPAREA: /* set capture area of each video frame */
2775 /* can't change parameters while capturing */
2776 if (bktr->flags & METEOR_CAP_MASK)
2777 return( EBUSY );
2778
2779 cap_area = (struct bktr_capture_area *) arg;
2780 bktr->capture_area_x_offset = cap_area->x_offset;
2781 bktr->capture_area_y_offset = cap_area->y_offset;
2782 bktr->capture_area_x_size = cap_area->x_size;
2783 bktr->capture_area_y_size = cap_area->y_size;
2784 bktr->capture_area_enabled = TRUE;
2785
2786 bktr->dma_prog_loaded = FALSE;
2787 break;
2788
2789 case BT848_GCAPAREA: /* get capture area of each video frame */
2790 cap_area = (struct bktr_capture_area *) arg;
2791 if (bktr->capture_area_enabled == FALSE) {
2792 cap_area->x_offset = 0;
2793 cap_area->y_offset = 0;
2794 cap_area->x_size = format_params[
2795 bktr->format_params].scaled_hactive;
2796 cap_area->y_size = format_params[
2797 bktr->format_params].vactive;
2798 } else {
2799 cap_area->x_offset = bktr->capture_area_x_offset;
2800 cap_area->y_offset = bktr->capture_area_y_offset;
2801 cap_area->x_size = bktr->capture_area_x_size;
2802 cap_area->y_size = bktr->capture_area_y_size;
2803 }
2804 break;
2805
2806 default:
2807 return common_ioctl( bktr, bt848, cmd, arg );
2808 }
2809
2810 return( 0 );
2811}
2812
2813/*
2814 * tuner ioctls
2815 */
| 1197video_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr )
1198{
1199 bt848_ptr_t bt848;
1200 volatile u_char c_temp;
1201 unsigned int temp;
1202 unsigned int temp_iform;
1203 unsigned int error;
1204 struct meteor_geomet *geo;
1205 struct meteor_counts *counts;
1206 struct meteor_video *video;
1207 struct bktr_capture_area *cap_area;
1208 vm_offset_t buf;
1209 int i;
1210 char char_temp;
1211
1212 bt848 = bktr->base;
1213
1214 switch ( cmd ) {
1215
1216 case BT848SCLIP: /* set clip region */
1217 bktr->max_clip_node = 0;
1218 memcpy(&bktr->clip_list, arg, sizeof(bktr->clip_list));
1219
1220 for (i = 0; i < BT848_MAX_CLIP_NODE; i++) {
1221 if (bktr->clip_list[i].y_min == 0 &&
1222 bktr->clip_list[i].y_max == 0)
1223 break;
1224 }
1225 bktr->max_clip_node = i;
1226
1227 /* make sure that the list contains a valid clip secquence */
1228 /* the clip rectangles should be sorted by x then by y as the
1229 second order sort key */
1230
1231 /* clip rectangle list is terminated by y_min and y_max set to 0 */
1232
1233 /* to disable clipping set y_min and y_max to 0 in the first
1234 clip rectangle . The first clip rectangle is clip_list[0].
1235 */
1236
1237
1238
1239 if (bktr->max_clip_node == 0 &&
1240 (bktr->clip_list[0].y_min != 0 &&
1241 bktr->clip_list[0].y_max != 0)) {
1242 return EINVAL;
1243 }
1244
1245 for (i = 0; i < BT848_MAX_CLIP_NODE - 1 ; i++) {
1246 if (bktr->clip_list[i].y_min == 0 &&
1247 bktr->clip_list[i].y_max == 0) {
1248 break;
1249 }
1250 if ( bktr->clip_list[i+1].y_min != 0 &&
1251 bktr->clip_list[i+1].y_max != 0 &&
1252 bktr->clip_list[i].x_min > bktr->clip_list[i+1].x_min ) {
1253
1254 bktr->max_clip_node = 0;
1255 return (EINVAL);
1256
1257 }
1258
1259 if (bktr->clip_list[i].x_min >= bktr->clip_list[i].x_max ||
1260 bktr->clip_list[i].y_min >= bktr->clip_list[i].y_max ||
1261 bktr->clip_list[i].x_min < 0 ||
1262 bktr->clip_list[i].x_max < 0 ||
1263 bktr->clip_list[i].y_min < 0 ||
1264 bktr->clip_list[i].y_max < 0 ) {
1265 bktr->max_clip_node = 0;
1266 return (EINVAL);
1267 }
1268 }
1269
1270 bktr->dma_prog_loaded = FALSE;
1271
1272 break;
1273
1274 case METEORSTATUS: /* get Bt848 status */
1275 c_temp = bt848->dstatus;
1276 temp = 0;
1277 if (!(c_temp & 0x40)) temp |= METEOR_STATUS_HCLK;
1278 if (!(c_temp & 0x10)) temp |= METEOR_STATUS_FIDT;
1279 *(u_short *)arg = temp;
1280 break;
1281
1282 case BT848SFMT: /* set input format */
1283 temp = *(unsigned long*)arg & BT848_IFORM_FORMAT;
1284 temp_iform = bt848->iform;
1285 temp_iform &= ~BT848_IFORM_FORMAT;
1286 temp_iform &= ~BT848_IFORM_XTSEL;
1287 bt848->iform = (temp_iform | temp | format_params[temp].iform_xtsel);
1288 switch( temp ) {
1289 case BT848_IFORM_F_AUTO:
1290 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
1291 METEOR_AUTOMODE;
1292 break;
1293
1294 case BT848_IFORM_F_NTSCM:
1295 case BT848_IFORM_F_NTSCJ:
1296 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
1297 METEOR_NTSC;
1298 bt848->adelay = format_params[temp].adelay;
1299 bt848->bdelay = format_params[temp].bdelay;
1300 bktr->format_params = temp;
1301 break;
1302
1303 case BT848_IFORM_F_PALBDGHI:
1304 case BT848_IFORM_F_PALN:
1305 case BT848_IFORM_F_SECAM:
1306 case BT848_IFORM_F_RSVD:
1307 case BT848_IFORM_F_PALM:
1308 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
1309 METEOR_PAL;
1310 bt848->adelay = format_params[temp].adelay;
1311 bt848->bdelay = format_params[temp].bdelay;
1312 bktr->format_params = temp;
1313 break;
1314
1315 }
1316 bktr->dma_prog_loaded = FALSE;
1317 break;
1318
1319 case METEORSFMT: /* set input format */
1320 temp_iform = bt848->iform;
1321 temp_iform &= ~BT848_IFORM_FORMAT;
1322 temp_iform &= ~BT848_IFORM_XTSEL;
1323 switch(*(unsigned long *)arg & METEOR_FORM_MASK ) {
1324 case 0: /* default */
1325 case METEOR_FMT_NTSC:
1326 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
1327 METEOR_NTSC;
1328 bt848->iform = temp_iform | BT848_IFORM_F_NTSCM |
1329 format_params[BT848_IFORM_F_NTSCM].iform_xtsel;
1330 bt848->adelay = format_params[BT848_IFORM_F_NTSCM].adelay;
1331 bt848->bdelay = format_params[BT848_IFORM_F_NTSCM].bdelay;
1332 bktr->format_params = BT848_IFORM_F_NTSCM;
1333 break;
1334
1335 case METEOR_FMT_PAL:
1336 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
1337 METEOR_PAL;
1338 bt848->iform = temp_iform | BT848_IFORM_F_PALBDGHI |
1339 format_params[BT848_IFORM_F_PALBDGHI].iform_xtsel;
1340 bt848->adelay = format_params[BT848_IFORM_F_PALBDGHI].adelay;
1341 bt848->bdelay = format_params[BT848_IFORM_F_PALBDGHI].bdelay;
1342 bktr->format_params = BT848_IFORM_F_PALBDGHI;
1343 break;
1344
1345 case METEOR_FMT_AUTOMODE:
1346 bktr->flags = (bktr->flags & ~METEOR_FORM_MASK) |
1347 METEOR_AUTOMODE;
1348 bt848->iform = temp_iform | BT848_IFORM_F_AUTO |
1349 format_params[BT848_IFORM_F_AUTO].iform_xtsel;
1350 break;
1351
1352 default:
1353 return( EINVAL );
1354 }
1355 bktr->dma_prog_loaded = FALSE;
1356 break;
1357
1358 case METEORGFMT: /* get input format */
1359 *(u_long *)arg = bktr->flags & METEOR_FORM_MASK;
1360 break;
1361
1362
1363 case BT848GFMT: /* get input format */
1364 *(u_long *)arg = bt848->iform & BT848_IFORM_FORMAT;
1365 break;
1366
1367 case METEORSCOUNT: /* (re)set error counts */
1368 counts = (struct meteor_counts *) arg;
1369 bktr->fifo_errors = counts->fifo_errors;
1370 bktr->dma_errors = counts->dma_errors;
1371 bktr->frames_captured = counts->frames_captured;
1372 bktr->even_fields_captured = counts->even_fields_captured;
1373 bktr->odd_fields_captured = counts->odd_fields_captured;
1374 break;
1375
1376 case METEORGCOUNT: /* get error counts */
1377 counts = (struct meteor_counts *) arg;
1378 counts->fifo_errors = bktr->fifo_errors;
1379 counts->dma_errors = bktr->dma_errors;
1380 counts->frames_captured = bktr->frames_captured;
1381 counts->even_fields_captured = bktr->even_fields_captured;
1382 counts->odd_fields_captured = bktr->odd_fields_captured;
1383 break;
1384
1385 case METEORGVIDEO:
1386 video = (struct meteor_video *)arg;
1387 video->addr = bktr->video.addr;
1388 video->width = bktr->video.width;
1389 video->banksize = bktr->video.banksize;
1390 video->ramsize = bktr->video.ramsize;
1391 break;
1392
1393 case METEORSVIDEO:
1394 video = (struct meteor_video *)arg;
1395 bktr->video.addr = video->addr;
1396 bktr->video.width = video->width;
1397 bktr->video.banksize = video->banksize;
1398 bktr->video.ramsize = video->ramsize;
1399 break;
1400
1401 case METEORSFPS:
1402 set_fps(bktr, *(u_short *)arg);
1403 break;
1404
1405 case METEORGFPS:
1406 *(u_short *)arg = bktr->fps;
1407 break;
1408
1409 case METEORSHUE: /* set hue */
1410 bt848->hue = (*(u_char *) arg) & 0xff;
1411 break;
1412
1413 case METEORGHUE: /* get hue */
1414 *(u_char *)arg = bt848->hue;
1415 break;
1416
1417 case METEORSBRIG: /* set brightness */
1418 char_temp = ( *(u_char *)arg & 0xff) - 128;
1419 bt848->bright = char_temp;
1420
1421 break;
1422
1423 case METEORGBRIG: /* get brightness */
1424 *(u_char *)arg = bt848->bright;
1425 break;
1426
1427 case METEORSCSAT: /* set chroma saturation */
1428 temp = (int)*(u_char *)arg;
1429
1430 bt848->sat_u_lo = bt848->sat_v_lo = (temp << 1) & 0xff;
1431
1432 bt848->e_control &= ~(BT848_E_CONTROL_SAT_U_MSB |
1433 BT848_E_CONTROL_SAT_V_MSB);
1434 bt848->o_control &= ~(BT848_O_CONTROL_SAT_U_MSB |
1435 BT848_O_CONTROL_SAT_V_MSB);
1436
1437 if ( temp & BIT_SEVEN_HIGH ) {
1438 bt848->e_control |= (BT848_E_CONTROL_SAT_U_MSB |
1439 BT848_E_CONTROL_SAT_V_MSB);
1440 bt848->o_control |= (BT848_O_CONTROL_SAT_U_MSB |
1441 BT848_O_CONTROL_SAT_V_MSB);
1442 }
1443 break;
1444
1445 case METEORGCSAT: /* get chroma saturation */
1446 temp = (bt848->sat_v_lo >> 1) & 0xff;
1447 if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB )
1448 temp |= BIT_SEVEN_HIGH;
1449 *(u_char *)arg = (u_char)temp;
1450 break;
1451
1452 case METEORSCONT: /* set contrast */
1453 temp = (int)*(u_char *)arg & 0xff;
1454 temp <<= 1;
1455 bt848->contrast_lo = temp & 0xff;
1456 bt848->e_control &= ~BT848_E_CONTROL_CON_MSB;
1457 bt848->o_control &= ~BT848_O_CONTROL_CON_MSB;
1458 bt848->e_control |=
1459 ((temp & 0x100) >> 6 ) & BT848_E_CONTROL_CON_MSB;
1460 bt848->o_control |=
1461 ((temp & 0x100) >> 6 ) & BT848_O_CONTROL_CON_MSB;
1462 break;
1463
1464 case METEORGCONT: /* get contrast */
1465 temp = (int)bt848->contrast_lo & 0xff;
1466 temp |= ((int)bt848->o_control & 0x04) << 6;
1467 *(u_char *)arg = (u_char)((temp >> 1) & 0xff);
1468 break;
1469
1470 case BT848SCBUF: /* set Clear-Buffer-on-start flag */
1471 bktr->clr_on_start = (*(int *)arg != 0);
1472 break;
1473
1474 case BT848GCBUF: /* get Clear-Buffer-on-start flag */
1475 *(int *)arg = (int) bktr->clr_on_start;
1476 break;
1477
1478 case METEORSSIGNAL:
1479 if(*(int *)arg == 0 || *(int *)arg >= NSIG) {
1480 return( EINVAL );
1481 break;
1482 }
1483 bktr->signal = *(int *) arg;
1484 bktr->proc = pr;
1485 break;
1486
1487 case METEORGSIGNAL:
1488 *(int *)arg = bktr->signal;
1489 break;
1490
1491 case METEORCAPTUR:
1492 temp = bktr->flags;
1493 switch (*(int *) arg) {
1494 case METEOR_CAP_SINGLE:
1495
1496 if (bktr->bigbuf==0) /* no frame buffer allocated */
1497 return( ENOMEM );
1498 /* already capturing */
1499 if (temp & METEOR_CAP_MASK)
1500 return( EIO );
1501
1502
1503
1504 start_capture(bktr, METEOR_SINGLE);
1505
1506 /* wait for capture to complete */
1507 bt848->int_stat = ALL_INTS_CLEARED;
1508 bt848->gpio_dma_ctl = FIFO_ENABLED;
1509 bt848->gpio_dma_ctl = bktr->capcontrol;
1510
1511 bt848->int_mask = BT848_INT_MYSTERYBIT |
1512 BT848_INT_RISCI |
1513 BT848_INT_VSYNC |
1514 BT848_INT_FMTCHG;
1515
1516 bt848->cap_ctl = bktr->bktr_cap_ctl;
1517 error = tsleep(BKTR_SLEEP, BKTRPRI, "captur", hz);
1518 if (error && (error != ERESTART)) {
1519 /* Here if we didn't get complete frame */
1520#ifdef DIAGNOSTIC
1521 printf( "bktr%d: ioctl: tsleep error %d %x\n",
1522 unit, error, bt848->risc_count);
1523#endif
1524
1525 /* stop dma */
1526 bt848->int_mask = ALL_INTS_DISABLED;
1527
1528 /* disable risc, leave fifo running */
1529 bt848->gpio_dma_ctl = FIFO_ENABLED;
1530 }
1531
1532 bktr->flags &= ~(METEOR_SINGLE|METEOR_WANT_MASK);
1533 /* FIXME: should we set bt848->int_stat ??? */
1534 break;
1535
1536 case METEOR_CAP_CONTINOUS:
1537 if (bktr->bigbuf==0) /* no frame buffer allocated */
1538 return( ENOMEM );
1539 /* already capturing */
1540 if (temp & METEOR_CAP_MASK)
1541 return( EIO );
1542
1543
1544 start_capture(bktr, METEOR_CONTIN);
1545 bt848->int_stat = bt848->int_stat;
1546
1547 bt848->gpio_dma_ctl = FIFO_ENABLED;
1548 bt848->gpio_dma_ctl = bktr->capcontrol;
1549 bt848->cap_ctl = bktr->bktr_cap_ctl;
1550
1551 bt848->int_mask = BT848_INT_MYSTERYBIT |
1552 BT848_INT_RISCI |
1553 BT848_INT_VSYNC |
1554 BT848_INT_FMTCHG;
1555#ifdef BT848_DUMP
1556 dump_bt848( bt848 );
1557#endif
1558 break;
1559
1560 case METEOR_CAP_STOP_CONT:
1561 if (bktr->flags & METEOR_CONTIN) {
1562 /* turn off capture */
1563 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
1564 bt848->cap_ctl = CAPTURE_OFF;
1565 bt848->int_mask = ALL_INTS_DISABLED;
1566 bktr->flags &=
1567 ~(METEOR_CONTIN | METEOR_WANT_MASK);
1568
1569 }
1570 }
1571 break;
1572
1573 case METEORSETGEO:
1574 /* can't change parameters while capturing */
1575 if (bktr->flags & METEOR_CAP_MASK)
1576 return( EBUSY );
1577
1578
1579 geo = (struct meteor_geomet *) arg;
1580
1581 error = 0;
1582 /* Either even or odd, if even & odd, then these a zero */
1583 if ((geo->oformat & METEOR_GEO_ODD_ONLY) &&
1584 (geo->oformat & METEOR_GEO_EVEN_ONLY)) {
1585 printf( "bktr%d: ioctl: Geometry odd or even only.\n",
1586 unit);
1587 return( EINVAL );
1588 }
1589
1590 /* set/clear even/odd flags */
1591 if (geo->oformat & METEOR_GEO_ODD_ONLY)
1592 bktr->flags |= METEOR_ONLY_ODD_FIELDS;
1593 else
1594 bktr->flags &= ~METEOR_ONLY_ODD_FIELDS;
1595 if (geo->oformat & METEOR_GEO_EVEN_ONLY)
1596 bktr->flags |= METEOR_ONLY_EVEN_FIELDS;
1597 else
1598 bktr->flags &= ~METEOR_ONLY_EVEN_FIELDS;
1599
1600 if (geo->columns <= 0) {
1601 printf(
1602 "bktr%d: ioctl: %d: columns must be greater than zero.\n",
1603 unit, geo->columns);
1604 error = EINVAL;
1605 }
1606 else if ((geo->columns & 0x3fe) != geo->columns) {
1607 printf(
1608 "bktr%d: ioctl: %d: columns too large or not even.\n",
1609 unit, geo->columns);
1610 error = EINVAL;
1611 }
1612
1613 if (geo->rows <= 0) {
1614 printf(
1615 "bktr%d: ioctl: %d: rows must be greater than zero.\n",
1616 unit, geo->rows);
1617 error = EINVAL;
1618 }
1619 else if (((geo->rows & 0x7fe) != geo->rows) ||
1620 ((geo->oformat & METEOR_GEO_FIELD_MASK) &&
1621 ((geo->rows & 0x3fe) != geo->rows)) ) {
1622 printf(
1623 "bktr%d: ioctl: %d: rows too large or not even.\n",
1624 unit, geo->rows);
1625 error = EINVAL;
1626 }
1627
1628 if (geo->frames > 32) {
1629 printf("bktr%d: ioctl: too many frames.\n", unit);
1630
1631 error = EINVAL;
1632 }
1633
1634 if (error)
1635 return( error );
1636
1637 bktr->dma_prog_loaded = FALSE;
1638 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
1639
1640 bt848->int_mask = ALL_INTS_DISABLED;
1641
1642 if ((temp=(geo->rows * geo->columns * geo->frames * 2))) {
1643 if (geo->oformat & METEOR_GEO_RGB24) temp = temp * 2;
1644
1645 /* meteor_mem structure for SYNC Capture */
1646 if (geo->frames > 1) temp += PAGE_SIZE;
1647
1648 temp = btoc(temp);
1649 if ((int) temp > bktr->alloc_pages
1650 && bktr->video.addr == 0) {
1651
1652/*****************************/
1653/* *** OS Dependant code *** */
1654/*****************************/
1655#if defined(__NetBSD__) || defined(__OpenBSD__)
1656 bus_dmamap_t dmamap;
1657
1658 buf = get_bktr_mem(bktr, &dmamap,
1659 temp * PAGE_SIZE);
1660 if (buf != 0) {
1661 free_bktr_mem(bktr, bktr->dm_mem,
1662 bktr->bigbuf);
1663 bktr->dm_mem = dmamap;
1664
1665#else
1666 buf = get_bktr_mem(unit, temp*PAGE_SIZE);
1667 if (buf != 0) {
1668 kmem_free(kernel_map, bktr->bigbuf,
1669 (bktr->alloc_pages * PAGE_SIZE));
1670#endif
1671
1672 bktr->bigbuf = buf;
1673 bktr->alloc_pages = temp;
1674 if (bootverbose)
1675 printf(
1676 "bktr%d: ioctl: Allocating %d bytes\n",
1677 unit, temp*PAGE_SIZE);
1678 }
1679 else
1680 error = ENOMEM;
1681 }
1682 }
1683
1684 if (error)
1685 return error;
1686
1687 bktr->rows = geo->rows;
1688 bktr->cols = geo->columns;
1689 bktr->frames = geo->frames;
1690
1691 /* Pixel format (if in meteor pixfmt compatibility mode) */
1692 if ( bktr->pixfmt_compat ) {
1693 bktr->format = METEOR_GEO_YUV_422;
1694 switch (geo->oformat & METEOR_GEO_OUTPUT_MASK) {
1695 case 0: /* default */
1696 case METEOR_GEO_RGB16:
1697 bktr->format = METEOR_GEO_RGB16;
1698 break;
1699 case METEOR_GEO_RGB24:
1700 bktr->format = METEOR_GEO_RGB24;
1701 break;
1702 case METEOR_GEO_YUV_422:
1703 bktr->format = METEOR_GEO_YUV_422;
1704 if (geo->oformat & METEOR_GEO_YUV_12)
1705 bktr->format = METEOR_GEO_YUV_12;
1706 break;
1707 case METEOR_GEO_YUV_PACKED:
1708 bktr->format = METEOR_GEO_YUV_PACKED;
1709 break;
1710 }
1711 bktr->pixfmt = oformat_meteor_to_bt( bktr->format );
1712 }
1713
1714 if (bktr->flags & METEOR_CAP_MASK) {
1715
1716 if (bktr->flags & (METEOR_CONTIN|METEOR_SYNCAP)) {
1717 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
1718 case METEOR_ONLY_ODD_FIELDS:
1719 bktr->flags |= METEOR_WANT_ODD;
1720 break;
1721 case METEOR_ONLY_EVEN_FIELDS:
1722 bktr->flags |= METEOR_WANT_EVEN;
1723 break;
1724 default:
1725 bktr->flags |= METEOR_WANT_MASK;
1726 break;
1727 }
1728
1729 start_capture(bktr, METEOR_CONTIN);
1730 bt848->int_stat = bt848->int_stat;
1731 bt848->gpio_dma_ctl = FIFO_ENABLED;
1732 bt848->gpio_dma_ctl = bktr->capcontrol;
1733 bt848->int_mask = BT848_INT_MYSTERYBIT |
1734 BT848_INT_VSYNC |
1735 BT848_INT_FMTCHG;
1736 }
1737 }
1738 break;
1739 /* end of METEORSETGEO */
1740
1741 /* FIXME. The Capture Area currently has the following restrictions:
1742 GENERAL
1743 y_offset may need to be even in interlaced modes
1744 RGB24 - Interlaced mode
1745 x_size must be greater than or equal to 1.666*METEORSETGEO width (cols)
1746 y_size must be greater than or equal to METEORSETGEO height (rows)
1747 RGB24 - Even Only (or Odd Only) mode
1748 x_size must be greater than or equal to 1.666*METEORSETGEO width (cols)
1749 y_size must be greater than or equal to 2*METEORSETGEO height (rows)
1750 YUV12 - Interlaced mode
1751 x_size must be greater than or equal to METEORSETGEO width (cols)
1752 y_size must be greater than or equal to METEORSETGEO height (rows)
1753 YUV12 - Even Only (or Odd Only) mode
1754 x_size must be greater than or equal to METEORSETGEO width (cols)
1755 y_size must be greater than or equal to 2*METEORSETGEO height (rows)
1756 */
1757
1758 case BT848_SCAPAREA: /* set capture area of each video frame */
1759 /* can't change parameters while capturing */
1760 if (bktr->flags & METEOR_CAP_MASK)
1761 return( EBUSY );
1762
1763 cap_area = (struct bktr_capture_area *) arg;
1764 bktr->capture_area_x_offset = cap_area->x_offset;
1765 bktr->capture_area_y_offset = cap_area->y_offset;
1766 bktr->capture_area_x_size = cap_area->x_size;
1767 bktr->capture_area_y_size = cap_area->y_size;
1768 bktr->capture_area_enabled = TRUE;
1769
1770 bktr->dma_prog_loaded = FALSE;
1771 break;
1772
1773 case BT848_GCAPAREA: /* get capture area of each video frame */
1774 cap_area = (struct bktr_capture_area *) arg;
1775 if (bktr->capture_area_enabled == FALSE) {
1776 cap_area->x_offset = 0;
1777 cap_area->y_offset = 0;
1778 cap_area->x_size = format_params[
1779 bktr->format_params].scaled_hactive;
1780 cap_area->y_size = format_params[
1781 bktr->format_params].vactive;
1782 } else {
1783 cap_area->x_offset = bktr->capture_area_x_offset;
1784 cap_area->y_offset = bktr->capture_area_y_offset;
1785 cap_area->x_size = bktr->capture_area_x_size;
1786 cap_area->y_size = bktr->capture_area_y_size;
1787 }
1788 break;
1789
1790 default:
1791 return common_ioctl( bktr, bt848, cmd, arg );
1792 }
1793
1794 return( 0 );
1795}
1796
1797/*
1798 * tuner ioctls
1799 */
|
2816static int
| 1800int
|
2817tuner_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr )
2818{
2819 bt848_ptr_t bt848;
2820 int tmp_int;
2821 unsigned int temp, temp1;
2822 int offset;
2823 int count;
2824 u_char *buf;
2825 u_long par;
2826 u_char write;
2827 int i2c_addr;
2828 int i2c_port;
2829 u_long data;
2830
2831 bt848 = bktr->base;
2832
2833 switch ( cmd ) {
2834
2835 case REMOTE_GETKEY:
2836 /* Read the last key pressed by the Remote Control */
2837 if (bktr->remote_control == 0) return (EINVAL);
2838 remote_read(bktr, (struct bktr_remote *)arg);
2839 break;
2840
2841#if defined( TUNER_AFC )
2842 case TVTUNER_SETAFC:
2843 bktr->tuner.afc = (*(int *)arg != 0);
2844 break;
2845
2846 case TVTUNER_GETAFC:
2847 *(int *)arg = bktr->tuner.afc;
2848 /* XXX Perhaps use another bit to indicate AFC success? */
2849 break;
2850#endif /* TUNER_AFC */
2851
2852 case TVTUNER_SETCHNL:
2853 temp_mute( bktr, TRUE );
2854 temp = tv_channel( bktr, (int)*(unsigned long *)arg );
| 1801tuner_ioctl( bktr_ptr_t bktr, int unit, int cmd, caddr_t arg, struct proc* pr )
1802{
1803 bt848_ptr_t bt848;
1804 int tmp_int;
1805 unsigned int temp, temp1;
1806 int offset;
1807 int count;
1808 u_char *buf;
1809 u_long par;
1810 u_char write;
1811 int i2c_addr;
1812 int i2c_port;
1813 u_long data;
1814
1815 bt848 = bktr->base;
1816
1817 switch ( cmd ) {
1818
1819 case REMOTE_GETKEY:
1820 /* Read the last key pressed by the Remote Control */
1821 if (bktr->remote_control == 0) return (EINVAL);
1822 remote_read(bktr, (struct bktr_remote *)arg);
1823 break;
1824
1825#if defined( TUNER_AFC )
1826 case TVTUNER_SETAFC:
1827 bktr->tuner.afc = (*(int *)arg != 0);
1828 break;
1829
1830 case TVTUNER_GETAFC:
1831 *(int *)arg = bktr->tuner.afc;
1832 /* XXX Perhaps use another bit to indicate AFC success? */
1833 break;
1834#endif /* TUNER_AFC */
1835
1836 case TVTUNER_SETCHNL:
1837 temp_mute( bktr, TRUE );
1838 temp = tv_channel( bktr, (int)*(unsigned long *)arg );
|
2855 temp_mute( bktr, FALSE );
2856 if ( temp < 0 )
| 1839 if ( temp < 0 ) {
1840 temp_mute( bktr, FALSE );
|
2857 return( EINVAL );
| 1841 return( EINVAL );
|
| 1842 }
|
2858 *(unsigned long *)arg = temp;
2859
2860 /* after every channel change, we must restart the MSP34xx */
2861 /* audio chip to reselect NICAM STEREO or MONO audio */
2862 if ( bktr->card.msp3400c )
2863 msp_autodetect( bktr );
| 1843 *(unsigned long *)arg = temp;
1844
1845 /* after every channel change, we must restart the MSP34xx */
1846 /* audio chip to reselect NICAM STEREO or MONO audio */
1847 if ( bktr->card.msp3400c )
1848 msp_autodetect( bktr );
|
| 1849
1850 temp_mute( bktr, FALSE );
|
2864 break;
2865
2866 case TVTUNER_GETCHNL:
2867 *(unsigned long *)arg = bktr->tuner.channel;
2868 break;
2869
2870 case TVTUNER_SETTYPE:
2871 temp = *(unsigned long *)arg;
2872 if ( (temp < CHNLSET_MIN) || (temp > CHNLSET_MAX) )
2873 return( EINVAL );
2874 bktr->tuner.chnlset = temp;
2875 break;
2876
2877 case TVTUNER_GETTYPE:
2878 *(unsigned long *)arg = bktr->tuner.chnlset;
2879 break;
2880
2881 case TVTUNER_GETSTATUS:
| 1851 break;
1852
1853 case TVTUNER_GETCHNL:
1854 *(unsigned long *)arg = bktr->tuner.channel;
1855 break;
1856
1857 case TVTUNER_SETTYPE:
1858 temp = *(unsigned long *)arg;
1859 if ( (temp < CHNLSET_MIN) || (temp > CHNLSET_MAX) )
1860 return( EINVAL );
1861 bktr->tuner.chnlset = temp;
1862 break;
1863
1864 case TVTUNER_GETTYPE:
1865 *(unsigned long *)arg = bktr->tuner.chnlset;
1866 break;
1867
1868 case TVTUNER_GETSTATUS:
|
2882 temp = i2cRead( bktr, bktr->card.tuner_pllAddr + 1 );
| 1869 temp = get_tuner_status( bktr );
|
2883 *(unsigned long *)arg = temp & 0xff;
2884 break;
2885
2886 case TVTUNER_SETFREQ:
2887 temp_mute( bktr, TRUE );
| 1870 *(unsigned long *)arg = temp & 0xff;
1871 break;
1872
1873 case TVTUNER_SETFREQ:
1874 temp_mute( bktr, TRUE );
|
2888 temp = tv_freq( bktr, (int)*(unsigned long *)arg );
| 1875 temp = tv_freq( bktr, (int)*(unsigned long *)arg, TV_FREQUENCY);
|
2889 temp_mute( bktr, FALSE );
| 1876 temp_mute( bktr, FALSE );
|
2890 if ( temp < 0 )
| 1877 if ( temp < 0 ) {
1878 temp_mute( bktr, FALSE );
|
2891 return( EINVAL );
| 1879 return( EINVAL );
|
| 1880 }
|
2892 *(unsigned long *)arg = temp;
2893
2894 /* after every channel change, we must restart the MSP34xx */
2895 /* audio chip to reselect NICAM STEREO or MONO audio */
2896 if ( bktr->card.msp3400c )
2897 msp_autodetect( bktr );
| 1881 *(unsigned long *)arg = temp;
1882
1883 /* after every channel change, we must restart the MSP34xx */
1884 /* audio chip to reselect NICAM STEREO or MONO audio */
1885 if ( bktr->card.msp3400c )
1886 msp_autodetect( bktr );
|
| 1887
1888 temp_mute( bktr, FALSE );
|
2898 break;
2899
2900 case TVTUNER_GETFREQ:
2901 *(unsigned long *)arg = bktr->tuner.frequency;
2902 break;
2903
2904 case TVTUNER_GETCHNLSET:
2905 return tuner_getchnlset((struct bktr_chnlset *)arg);
2906
2907 case BT848_SAUDIO: /* set audio channel */
2908 if ( set_audio( bktr, *(int*)arg ) < 0 )
2909 return( EIO );
2910 break;
2911
2912 /* hue is a 2's compliment number, -90' to +89.3' in 0.7' steps */
2913 case BT848_SHUE: /* set hue */
2914 bt848->hue = (u_char)(*(int*)arg & 0xff);
2915 break;
2916
2917 case BT848_GHUE: /* get hue */
2918 *(int*)arg = (signed char)(bt848->hue & 0xff);
2919 break;
2920
2921 /* brightness is a 2's compliment #, -50 to +%49.6% in 0.39% steps */
2922 case BT848_SBRIG: /* set brightness */
2923 bt848->bright = (u_char)(*(int *)arg & 0xff);
2924 break;
2925
2926 case BT848_GBRIG: /* get brightness */
2927 *(int *)arg = (signed char)(bt848->bright & 0xff);
2928 break;
2929
2930 /* */
2931 case BT848_SCSAT: /* set chroma saturation */
2932 tmp_int = *(int*)arg;
2933
2934 temp = bt848->e_control;
2935 temp1 = bt848->o_control;
2936 if ( tmp_int & BIT_EIGHT_HIGH ) {
2937 temp |= (BT848_E_CONTROL_SAT_U_MSB |
2938 BT848_E_CONTROL_SAT_V_MSB);
2939 temp1 |= (BT848_O_CONTROL_SAT_U_MSB |
2940 BT848_O_CONTROL_SAT_V_MSB);
2941 }
2942 else {
2943 temp &= ~(BT848_E_CONTROL_SAT_U_MSB |
2944 BT848_E_CONTROL_SAT_V_MSB);
2945 temp1 &= ~(BT848_O_CONTROL_SAT_U_MSB |
2946 BT848_O_CONTROL_SAT_V_MSB);
2947 }
2948
2949 bt848->sat_u_lo = (u_char)(tmp_int & 0xff);
2950 bt848->sat_v_lo = (u_char)(tmp_int & 0xff);
2951 bt848->e_control = temp;
2952 bt848->o_control = temp1;
2953 break;
2954
2955 case BT848_GCSAT: /* get chroma saturation */
2956 tmp_int = (int)(bt848->sat_v_lo & 0xff);
2957 if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB )
2958 tmp_int |= BIT_EIGHT_HIGH;
2959 *(int*)arg = tmp_int;
2960 break;
2961
2962 /* */
2963 case BT848_SVSAT: /* set chroma V saturation */
2964 tmp_int = *(int*)arg;
2965
2966 temp = bt848->e_control;
2967 temp1 = bt848->o_control;
2968 if ( tmp_int & BIT_EIGHT_HIGH) {
2969 temp |= BT848_E_CONTROL_SAT_V_MSB;
2970 temp1 |= BT848_O_CONTROL_SAT_V_MSB;
2971 }
2972 else {
2973 temp &= ~BT848_E_CONTROL_SAT_V_MSB;
2974 temp1 &= ~BT848_O_CONTROL_SAT_V_MSB;
2975 }
2976
2977 bt848->sat_v_lo = (u_char)(tmp_int & 0xff);
2978 bt848->e_control = temp;
2979 bt848->o_control = temp1;
2980 break;
2981
2982 case BT848_GVSAT: /* get chroma V saturation */
2983 tmp_int = (int)bt848->sat_v_lo & 0xff;
2984 if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB )
2985 tmp_int |= BIT_EIGHT_HIGH;
2986 *(int*)arg = tmp_int;
2987 break;
2988
2989 /* */
2990 case BT848_SUSAT: /* set chroma U saturation */
2991 tmp_int = *(int*)arg;
2992
2993 temp = bt848->e_control;
2994 temp1 = bt848->o_control;
2995 if ( tmp_int & BIT_EIGHT_HIGH ) {
2996 temp |= BT848_E_CONTROL_SAT_U_MSB;
2997 temp1 |= BT848_O_CONTROL_SAT_U_MSB;
2998 }
2999 else {
3000 temp &= ~BT848_E_CONTROL_SAT_U_MSB;
3001 temp1 &= ~BT848_O_CONTROL_SAT_U_MSB;
3002 }
3003
3004 bt848->sat_u_lo = (u_char)(tmp_int & 0xff);
3005 bt848->e_control = temp;
3006 bt848->o_control = temp1;
3007 break;
3008
3009 case BT848_GUSAT: /* get chroma U saturation */
3010 tmp_int = (int)bt848->sat_u_lo & 0xff;
3011 if ( bt848->e_control & BT848_E_CONTROL_SAT_U_MSB )
3012 tmp_int |= BIT_EIGHT_HIGH;
3013 *(int*)arg = tmp_int;
3014 break;
3015
3016/* lr 970528 luma notch etc - 3 high bits of e_control/o_control */
3017
3018 case BT848_SLNOTCH: /* set luma notch */
3019 tmp_int = (*(int *)arg & 0x7) << 5 ;
3020 bt848->e_control &= ~0xe0 ;
3021 bt848->o_control &= ~0xe0 ;
3022 bt848->e_control |= tmp_int ;
3023 bt848->o_control |= tmp_int ;
3024 break;
3025
3026 case BT848_GLNOTCH: /* get luma notch */
3027 *(int *)arg = (int) ( (bt848->e_control & 0xe0) >> 5) ;
3028 break;
3029
3030
3031 /* */
3032 case BT848_SCONT: /* set contrast */
3033 tmp_int = *(int*)arg;
3034
3035 temp = bt848->e_control;
3036 temp1 = bt848->o_control;
3037 if ( tmp_int & BIT_EIGHT_HIGH ) {
3038 temp |= BT848_E_CONTROL_CON_MSB;
3039 temp1 |= BT848_O_CONTROL_CON_MSB;
3040 }
3041 else {
3042 temp &= ~BT848_E_CONTROL_CON_MSB;
3043 temp1 &= ~BT848_O_CONTROL_CON_MSB;
3044 }
3045
3046 bt848->contrast_lo = (u_char)(tmp_int & 0xff);
3047 bt848->e_control = temp;
3048 bt848->o_control = temp1;
3049 break;
3050
3051 case BT848_GCONT: /* get contrast */
3052 tmp_int = (int)bt848->contrast_lo & 0xff;
3053 if ( bt848->e_control & BT848_E_CONTROL_CON_MSB )
3054 tmp_int |= BIT_EIGHT_HIGH;
3055 *(int*)arg = tmp_int;
3056 break;
3057
3058 /* FIXME: SCBARS and CCBARS require a valid int * */
3059 /* argument to succeed, but its not used; consider */
3060 /* using the arg to store the on/off state so */
3061 /* there's only one ioctl() needed to turn cbars on/off */
3062 case BT848_SCBARS: /* set colorbar output */
3063 bt848->color_ctl_color_bars = 1;
3064 break;
3065
3066 case BT848_CCBARS: /* clear colorbar output */
3067 bt848->color_ctl_color_bars = 0;
3068 break;
3069
3070 case BT848_GAUDIO: /* get audio channel */
3071 temp = bktr->audio_mux_select;
3072 if ( bktr->audio_mute_state == TRUE )
3073 temp |= AUDIO_MUTE;
3074 *(int*)arg = temp;
3075 break;
3076
3077 case BT848_SBTSC: /* set audio channel */
3078 if ( set_BTSC( bktr, *(int*)arg ) < 0 )
3079 return( EIO );
3080 break;
3081
3082 case BT848_WEEPROM: /* write eeprom */
3083 offset = (((struct eeProm *)arg)->offset);
3084 count = (((struct eeProm *)arg)->count);
3085 buf = &(((struct eeProm *)arg)->bytes[ 0 ]);
3086 if ( writeEEProm( bktr, offset, count, buf ) < 0 )
3087 return( EIO );
3088 break;
3089
3090 case BT848_REEPROM: /* read eeprom */
3091 offset = (((struct eeProm *)arg)->offset);
3092 count = (((struct eeProm *)arg)->count);
3093 buf = &(((struct eeProm *)arg)->bytes[ 0 ]);
3094 if ( readEEProm( bktr, offset, count, buf ) < 0 )
3095 return( EIO );
3096 break;
3097
3098 case BT848_SIGNATURE:
3099 offset = (((struct eeProm *)arg)->offset);
3100 count = (((struct eeProm *)arg)->count);
3101 buf = &(((struct eeProm *)arg)->bytes[ 0 ]);
3102 if ( signCard( bktr, offset, count, buf ) < 0 )
3103 return( EIO );
3104 break;
3105
3106 /* Ioctl's for direct gpio access */
3107#ifdef BKTR_GPIO_ACCESS
3108 case BT848_GPIO_GET_EN:
3109 *(int*)arg = bt848->gpio_out_en;
3110 break;
3111
3112 case BT848_GPIO_SET_EN:
3113 bt848->gpio_out_en = *(int*)arg;
3114 break;
3115
3116 case BT848_GPIO_GET_DATA:
3117 *(int*)arg = bt848->gpio_data;
3118 break;
3119
3120 case BT848_GPIO_SET_DATA:
3121 bt848->gpio_data = *(int*)arg;
3122 break;
3123#endif /* BKTR_GPIO_ACCESS */
3124
3125 /* Ioctl's for running the tuner device in radio mode */
3126
3127 case RADIO_GETMODE:
3128 *(unsigned char *)arg = bktr->tuner.radio_mode;
3129 break;
3130
3131 case RADIO_SETMODE:
3132 bktr->tuner.radio_mode = *(unsigned char *)arg;
3133 break;
3134
3135 case RADIO_GETFREQ:
| 1889 break;
1890
1891 case TVTUNER_GETFREQ:
1892 *(unsigned long *)arg = bktr->tuner.frequency;
1893 break;
1894
1895 case TVTUNER_GETCHNLSET:
1896 return tuner_getchnlset((struct bktr_chnlset *)arg);
1897
1898 case BT848_SAUDIO: /* set audio channel */
1899 if ( set_audio( bktr, *(int*)arg ) < 0 )
1900 return( EIO );
1901 break;
1902
1903 /* hue is a 2's compliment number, -90' to +89.3' in 0.7' steps */
1904 case BT848_SHUE: /* set hue */
1905 bt848->hue = (u_char)(*(int*)arg & 0xff);
1906 break;
1907
1908 case BT848_GHUE: /* get hue */
1909 *(int*)arg = (signed char)(bt848->hue & 0xff);
1910 break;
1911
1912 /* brightness is a 2's compliment #, -50 to +%49.6% in 0.39% steps */
1913 case BT848_SBRIG: /* set brightness */
1914 bt848->bright = (u_char)(*(int *)arg & 0xff);
1915 break;
1916
1917 case BT848_GBRIG: /* get brightness */
1918 *(int *)arg = (signed char)(bt848->bright & 0xff);
1919 break;
1920
1921 /* */
1922 case BT848_SCSAT: /* set chroma saturation */
1923 tmp_int = *(int*)arg;
1924
1925 temp = bt848->e_control;
1926 temp1 = bt848->o_control;
1927 if ( tmp_int & BIT_EIGHT_HIGH ) {
1928 temp |= (BT848_E_CONTROL_SAT_U_MSB |
1929 BT848_E_CONTROL_SAT_V_MSB);
1930 temp1 |= (BT848_O_CONTROL_SAT_U_MSB |
1931 BT848_O_CONTROL_SAT_V_MSB);
1932 }
1933 else {
1934 temp &= ~(BT848_E_CONTROL_SAT_U_MSB |
1935 BT848_E_CONTROL_SAT_V_MSB);
1936 temp1 &= ~(BT848_O_CONTROL_SAT_U_MSB |
1937 BT848_O_CONTROL_SAT_V_MSB);
1938 }
1939
1940 bt848->sat_u_lo = (u_char)(tmp_int & 0xff);
1941 bt848->sat_v_lo = (u_char)(tmp_int & 0xff);
1942 bt848->e_control = temp;
1943 bt848->o_control = temp1;
1944 break;
1945
1946 case BT848_GCSAT: /* get chroma saturation */
1947 tmp_int = (int)(bt848->sat_v_lo & 0xff);
1948 if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB )
1949 tmp_int |= BIT_EIGHT_HIGH;
1950 *(int*)arg = tmp_int;
1951 break;
1952
1953 /* */
1954 case BT848_SVSAT: /* set chroma V saturation */
1955 tmp_int = *(int*)arg;
1956
1957 temp = bt848->e_control;
1958 temp1 = bt848->o_control;
1959 if ( tmp_int & BIT_EIGHT_HIGH) {
1960 temp |= BT848_E_CONTROL_SAT_V_MSB;
1961 temp1 |= BT848_O_CONTROL_SAT_V_MSB;
1962 }
1963 else {
1964 temp &= ~BT848_E_CONTROL_SAT_V_MSB;
1965 temp1 &= ~BT848_O_CONTROL_SAT_V_MSB;
1966 }
1967
1968 bt848->sat_v_lo = (u_char)(tmp_int & 0xff);
1969 bt848->e_control = temp;
1970 bt848->o_control = temp1;
1971 break;
1972
1973 case BT848_GVSAT: /* get chroma V saturation */
1974 tmp_int = (int)bt848->sat_v_lo & 0xff;
1975 if ( bt848->e_control & BT848_E_CONTROL_SAT_V_MSB )
1976 tmp_int |= BIT_EIGHT_HIGH;
1977 *(int*)arg = tmp_int;
1978 break;
1979
1980 /* */
1981 case BT848_SUSAT: /* set chroma U saturation */
1982 tmp_int = *(int*)arg;
1983
1984 temp = bt848->e_control;
1985 temp1 = bt848->o_control;
1986 if ( tmp_int & BIT_EIGHT_HIGH ) {
1987 temp |= BT848_E_CONTROL_SAT_U_MSB;
1988 temp1 |= BT848_O_CONTROL_SAT_U_MSB;
1989 }
1990 else {
1991 temp &= ~BT848_E_CONTROL_SAT_U_MSB;
1992 temp1 &= ~BT848_O_CONTROL_SAT_U_MSB;
1993 }
1994
1995 bt848->sat_u_lo = (u_char)(tmp_int & 0xff);
1996 bt848->e_control = temp;
1997 bt848->o_control = temp1;
1998 break;
1999
2000 case BT848_GUSAT: /* get chroma U saturation */
2001 tmp_int = (int)bt848->sat_u_lo & 0xff;
2002 if ( bt848->e_control & BT848_E_CONTROL_SAT_U_MSB )
2003 tmp_int |= BIT_EIGHT_HIGH;
2004 *(int*)arg = tmp_int;
2005 break;
2006
2007/* lr 970528 luma notch etc - 3 high bits of e_control/o_control */
2008
2009 case BT848_SLNOTCH: /* set luma notch */
2010 tmp_int = (*(int *)arg & 0x7) << 5 ;
2011 bt848->e_control &= ~0xe0 ;
2012 bt848->o_control &= ~0xe0 ;
2013 bt848->e_control |= tmp_int ;
2014 bt848->o_control |= tmp_int ;
2015 break;
2016
2017 case BT848_GLNOTCH: /* get luma notch */
2018 *(int *)arg = (int) ( (bt848->e_control & 0xe0) >> 5) ;
2019 break;
2020
2021
2022 /* */
2023 case BT848_SCONT: /* set contrast */
2024 tmp_int = *(int*)arg;
2025
2026 temp = bt848->e_control;
2027 temp1 = bt848->o_control;
2028 if ( tmp_int & BIT_EIGHT_HIGH ) {
2029 temp |= BT848_E_CONTROL_CON_MSB;
2030 temp1 |= BT848_O_CONTROL_CON_MSB;
2031 }
2032 else {
2033 temp &= ~BT848_E_CONTROL_CON_MSB;
2034 temp1 &= ~BT848_O_CONTROL_CON_MSB;
2035 }
2036
2037 bt848->contrast_lo = (u_char)(tmp_int & 0xff);
2038 bt848->e_control = temp;
2039 bt848->o_control = temp1;
2040 break;
2041
2042 case BT848_GCONT: /* get contrast */
2043 tmp_int = (int)bt848->contrast_lo & 0xff;
2044 if ( bt848->e_control & BT848_E_CONTROL_CON_MSB )
2045 tmp_int |= BIT_EIGHT_HIGH;
2046 *(int*)arg = tmp_int;
2047 break;
2048
2049 /* FIXME: SCBARS and CCBARS require a valid int * */
2050 /* argument to succeed, but its not used; consider */
2051 /* using the arg to store the on/off state so */
2052 /* there's only one ioctl() needed to turn cbars on/off */
2053 case BT848_SCBARS: /* set colorbar output */
2054 bt848->color_ctl_color_bars = 1;
2055 break;
2056
2057 case BT848_CCBARS: /* clear colorbar output */
2058 bt848->color_ctl_color_bars = 0;
2059 break;
2060
2061 case BT848_GAUDIO: /* get audio channel */
2062 temp = bktr->audio_mux_select;
2063 if ( bktr->audio_mute_state == TRUE )
2064 temp |= AUDIO_MUTE;
2065 *(int*)arg = temp;
2066 break;
2067
2068 case BT848_SBTSC: /* set audio channel */
2069 if ( set_BTSC( bktr, *(int*)arg ) < 0 )
2070 return( EIO );
2071 break;
2072
2073 case BT848_WEEPROM: /* write eeprom */
2074 offset = (((struct eeProm *)arg)->offset);
2075 count = (((struct eeProm *)arg)->count);
2076 buf = &(((struct eeProm *)arg)->bytes[ 0 ]);
2077 if ( writeEEProm( bktr, offset, count, buf ) < 0 )
2078 return( EIO );
2079 break;
2080
2081 case BT848_REEPROM: /* read eeprom */
2082 offset = (((struct eeProm *)arg)->offset);
2083 count = (((struct eeProm *)arg)->count);
2084 buf = &(((struct eeProm *)arg)->bytes[ 0 ]);
2085 if ( readEEProm( bktr, offset, count, buf ) < 0 )
2086 return( EIO );
2087 break;
2088
2089 case BT848_SIGNATURE:
2090 offset = (((struct eeProm *)arg)->offset);
2091 count = (((struct eeProm *)arg)->count);
2092 buf = &(((struct eeProm *)arg)->bytes[ 0 ]);
2093 if ( signCard( bktr, offset, count, buf ) < 0 )
2094 return( EIO );
2095 break;
2096
2097 /* Ioctl's for direct gpio access */
2098#ifdef BKTR_GPIO_ACCESS
2099 case BT848_GPIO_GET_EN:
2100 *(int*)arg = bt848->gpio_out_en;
2101 break;
2102
2103 case BT848_GPIO_SET_EN:
2104 bt848->gpio_out_en = *(int*)arg;
2105 break;
2106
2107 case BT848_GPIO_GET_DATA:
2108 *(int*)arg = bt848->gpio_data;
2109 break;
2110
2111 case BT848_GPIO_SET_DATA:
2112 bt848->gpio_data = *(int*)arg;
2113 break;
2114#endif /* BKTR_GPIO_ACCESS */
2115
2116 /* Ioctl's for running the tuner device in radio mode */
2117
2118 case RADIO_GETMODE:
2119 *(unsigned char *)arg = bktr->tuner.radio_mode;
2120 break;
2121
2122 case RADIO_SETMODE:
2123 bktr->tuner.radio_mode = *(unsigned char *)arg;
2124 break;
2125
2126 case RADIO_GETFREQ:
|
3136 *(unsigned long *)arg = (bktr->tuner.frequency+407)*5;
| 2127 *(unsigned long *)arg = bktr->tuner.frequency;
|
3137 break;
3138
3139 case RADIO_SETFREQ:
3140 /* The argument to this ioctl is NOT freq*16. It is
3141 ** freq*100.
3142 */
3143
| 2128 break;
2129
2130 case RADIO_SETFREQ:
2131 /* The argument to this ioctl is NOT freq*16. It is
2132 ** freq*100.
2133 */
2134
|
3144 /* The radio in my stereo and the linear regression function
3145 ** in my HP48 have reached the conclusion that in order to
3146 ** set the radio tuner of the FM1216 to f MHz, the value to
3147 ** enter into the Tuner PLL is: f*20-407
3148 ** If anyone has the exact values from the spec. sheet
3149 ** please forward them -- fj@login.dknet.dk
3150 */
| 2135 temp=(int)*(unsigned long *)arg;
|
3151
| 2136
|
3152 if(bktr->bt848_tuner == ALPS_TSCH5) {
3153 temp=((int)*(unsigned long *)arg + 4125) * 32;
3154 temp=temp/100 + (temp%100 >= 50 ? 1 : 0) +RADIO_OFFSET;
3155 } else {
3156 temp=(int)*(unsigned long *)arg/5-407 +RADIO_OFFSET;
3157 }
3158
| |
3159#ifdef BKTR_RADIO_DEBUG
3160 printf("bktr%d: arg=%d temp=%d\n",unit,(int)*(unsigned long *)arg,temp);
3161#endif
3162
3163#ifndef BKTR_RADIO_NOFREQCHECK
3164 /* According to the spec. sheet the band: 87.5MHz-108MHz */
3165 /* is supported. */
| 2137#ifdef BKTR_RADIO_DEBUG
2138 printf("bktr%d: arg=%d temp=%d\n",unit,(int)*(unsigned long *)arg,temp);
2139#endif
2140
2141#ifndef BKTR_RADIO_NOFREQCHECK
2142 /* According to the spec. sheet the band: 87.5MHz-108MHz */
2143 /* is supported. */
|
3166 if(temp<1343+RADIO_OFFSET || temp>1753+RADIO_OFFSET) {
| 2144 if(temp<8750 || temp>10800) {
|
3167 printf("bktr%d: Radio frequency out of range\n",unit);
3168 return(EINVAL);
3169 }
3170#endif
3171 temp_mute( bktr, TRUE );
| 2145 printf("bktr%d: Radio frequency out of range\n",unit);
2146 return(EINVAL);
2147 }
2148#endif
2149 temp_mute( bktr, TRUE );
|
3172 temp = tv_freq( bktr, temp );
| 2150 temp = tv_freq( bktr, temp, FM_RADIO_FREQUENCY );
|
3173 temp_mute( bktr, FALSE );
3174#ifdef BKTR_RADIO_DEBUG
3175 if(temp)
3176 printf("bktr%d: tv_freq returned: %d\n",unit,temp);
3177#endif
3178 if ( temp < 0 )
3179 return( EINVAL );
3180 *(unsigned long *)arg = temp;
3181 break;
| 2151 temp_mute( bktr, FALSE );
2152#ifdef BKTR_RADIO_DEBUG
2153 if(temp)
2154 printf("bktr%d: tv_freq returned: %d\n",unit,temp);
2155#endif
2156 if ( temp < 0 )
2157 return( EINVAL );
2158 *(unsigned long *)arg = temp;
2159 break;
|
3182 /* Luigi's I2CWR ioctl */
| 2160
2161 /* Luigi's I2CWR ioctl */
|
3183 case BT848_I2CWR:
3184 par = *(u_long *)arg;
3185 write = (par >> 24) & 0xff ;
3186 i2c_addr = (par >> 16) & 0xff ;
3187 i2c_port = (par >> 8) & 0xff ;
3188 data = (par) & 0xff ;
3189
3190 if (write) {
3191 i2cWrite( bktr, i2c_addr, i2c_port, data);
3192 } else {
3193 data = i2cRead( bktr, i2c_addr);
3194 }
3195 *(u_long *)arg = (par & 0xffffff00) | ( data & 0xff );
3196 break;
3197
3198
3199 default:
3200 return common_ioctl( bktr, bt848, cmd, arg );
3201 }
3202
3203 return( 0 );
3204}
3205
3206
3207/*
3208 * common ioctls
3209 */
3210int
3211common_ioctl( bktr_ptr_t bktr, bt848_ptr_t bt848, int cmd, caddr_t arg )
3212{
3213 int pixfmt;
3214 unsigned int temp;
3215 struct meteor_pixfmt *pf_pub;
3216
3217 switch (cmd) {
3218
3219 case METEORSINPUT: /* set input device */
3220 /*Bt848 has 3 MUX Inputs. Bt848A/849A/878/879 has 4 MUX Inputs*/
3221 /* On the original bt848 boards, */
3222 /* Tuner is MUX0, RCA is MUX1, S-Video is MUX2 */
3223 /* On the Hauppauge bt878 boards, */
3224 /* Tuner is MUX0, RCA is MUX3 */
3225 /* Unfortunatly Meteor driver codes DEV_RCA as DEV_0, so we */
3226 /* stick with this system in our Meteor Emulation */
3227
3228 switch(*(unsigned long *)arg & METEOR_DEV_MASK) {
3229
3230 /* this is the RCA video input */
3231 case 0: /* default */
3232 case METEOR_INPUT_DEV0:
3233 /* METEOR_INPUT_DEV_RCA: */
3234 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
3235 | METEOR_DEV0;
3236 bt848->iform &= ~BT848_IFORM_MUXSEL;
3237
3238 /* work around for new Hauppauge 878 cards */
3239 if ((bktr->card.card_id == CARD_HAUPPAUGE) &&
3240 (bktr->id==BROOKTREE_878 ||
3241 bktr->id==BROOKTREE_879) )
3242 bt848->iform |= BT848_IFORM_M_MUX3;
3243 else
3244 bt848->iform |= BT848_IFORM_M_MUX1;
3245
3246 bt848->e_control &= ~BT848_E_CONTROL_COMP;
3247 bt848->o_control &= ~BT848_O_CONTROL_COMP;
3248 set_audio( bktr, AUDIO_EXTERN );
3249 break;
3250
3251 /* this is the tuner input */
3252 case METEOR_INPUT_DEV1:
3253 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
3254 | METEOR_DEV1;
3255 bt848->iform &= ~BT848_IFORM_MUXSEL;
3256 bt848->iform |= BT848_IFORM_M_MUX0;
3257 bt848->e_control &= ~BT848_E_CONTROL_COMP;
3258 bt848->o_control &= ~BT848_O_CONTROL_COMP;
3259 set_audio( bktr, AUDIO_TUNER );
3260 break;
3261
3262 /* this is the S-VHS input, but with a composite camera */
3263 case METEOR_INPUT_DEV2:
3264 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
3265 | METEOR_DEV2;
3266 bt848->iform &= ~BT848_IFORM_MUXSEL;
3267 bt848->iform |= BT848_IFORM_M_MUX2;
3268 bt848->e_control &= ~BT848_E_CONTROL_COMP;
3269 bt848->o_control &= ~BT848_O_CONTROL_COMP;
3270 set_audio( bktr, AUDIO_EXTERN );
3271 break;
3272
3273 /* this is the S-VHS input */
3274 case METEOR_INPUT_DEV_SVIDEO:
3275 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
3276 | METEOR_DEV_SVIDEO;
3277 bt848->iform &= ~BT848_IFORM_MUXSEL;
3278 bt848->iform |= BT848_IFORM_M_MUX2;
3279 bt848->e_control |= BT848_E_CONTROL_COMP;
3280 bt848->o_control |= BT848_O_CONTROL_COMP;
3281 set_audio( bktr, AUDIO_EXTERN );
3282 break;
3283
3284 case METEOR_INPUT_DEV3:
3285 if ((bktr->id == BROOKTREE_848A) ||
3286 (bktr->id == BROOKTREE_849A) ||
3287 (bktr->id == BROOKTREE_878) ||
3288 (bktr->id == BROOKTREE_879) ) {
3289 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
3290 | METEOR_DEV3;
3291 bt848->iform &= ~BT848_IFORM_MUXSEL;
3292
3293 /* work around for new Hauppauge 878 cards */
3294 if ((bktr->card.card_id == CARD_HAUPPAUGE) &&
3295 (bktr->id==BROOKTREE_878 ||
3296 bktr->id==BROOKTREE_879) )
3297 bt848->iform |= BT848_IFORM_M_MUX1;
3298 else
3299 bt848->iform |= BT848_IFORM_M_MUX3;
3300
3301 bt848->e_control &= ~BT848_E_CONTROL_COMP;
3302 bt848->o_control &= ~BT848_O_CONTROL_COMP;
3303 set_audio( bktr, AUDIO_EXTERN );
3304
3305 break;
3306 }
3307
3308 default:
3309 return( EINVAL );
3310 }
3311 break;
3312
3313 case METEORGINPUT: /* get input device */
3314 *(u_long *)arg = bktr->flags & METEOR_DEV_MASK;
3315 break;
3316
3317 case METEORSACTPIXFMT:
3318 if (( *(int *)arg < 0 ) ||
3319 ( *(int *)arg >= PIXFMT_TABLE_SIZE ))
3320 return( EINVAL );
3321
3322 bktr->pixfmt = *(int *)arg;
3323 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
3324 bktr->pixfmt_compat = FALSE;
3325 break;
3326
3327 case METEORGACTPIXFMT:
3328 *(int *)arg = bktr->pixfmt;
3329 break;
3330
3331 case METEORGSUPPIXFMT :
3332 pf_pub = (struct meteor_pixfmt *)arg;
3333 pixfmt = pf_pub->index;
3334
3335 if (( pixfmt < 0 ) || ( pixfmt >= PIXFMT_TABLE_SIZE ))
3336 return( EINVAL );
3337
3338 memcpy( pf_pub, &pixfmt_table[ pixfmt ].public,
3339 sizeof( *pf_pub ) );
3340
3341 /* Patch in our format index */
3342 pf_pub->index = pixfmt;
3343 break;
3344
3345#if defined( STATUS_SUM )
3346 case BT848_GSTATUS: /* reap status */
3347 disable_intr();
3348 temp = status_sum;
3349 status_sum = 0;
3350 enable_intr();
3351 *(u_int*)arg = temp;
3352 break;
3353#endif /* STATUS_SUM */
3354
3355 default:
3356 return( ENOTTY );
3357 }
3358
3359 return( 0 );
3360}
3361
3362
3363
3364
3365/******************************************************************************
3366 * bt848 RISC programming routines:
3367 */
3368
3369
3370/*
3371 *
3372 */
3373#ifdef BT848_DEBUG
3374static int
3375dump_bt848( bt848_ptr_t bt848 )
3376{
3377 volatile u_char *bt848r = (u_char *)bt848;
3378 int r[60]={
3379 4, 8, 0xc, 0x8c, 0x10, 0x90, 0x14, 0x94,
3380 0x18, 0x98, 0x1c, 0x9c, 0x20, 0xa0, 0x24, 0xa4,
3381 0x28, 0x2c, 0xac, 0x30, 0x34, 0x38, 0x3c, 0x40,
3382 0xc0, 0x48, 0x4c, 0xcc, 0x50, 0xd0, 0xd4, 0x60,
3383 0x64, 0x68, 0x6c, 0xec, 0xd8, 0xdc, 0xe0, 0xe4,
3384 0, 0, 0, 0
3385 };
3386 int i;
3387
3388 for (i = 0; i < 40; i+=4) {
3389 printf(" Reg:value : \t%x:%x \t%x:%x \t %x:%x \t %x:%x\n",
3390 r[i], bt848r[r[i]],
3391 r[i+1], bt848r[r[i+1]],
3392 r[i+2], bt848r[r[i+2]],
3393 r[i+3], bt848r[r[i+3]]);
3394 }
3395
3396 printf(" INT STAT %x \n", bt848->int_stat);
3397 printf(" Reg INT_MASK %x \n", bt848->int_mask);
3398 printf(" Reg GPIO_DMA_CTL %x \n", bt848->gpio_dma_ctl);
3399
3400 return( 0 );
3401}
3402
3403#endif
3404
3405/*
3406 * build write instruction
3407 */
3408#define BKTR_FM1 0x6 /* packed data to follow */
3409#define BKTR_FM3 0xe /* planar data to follow */
3410#define BKTR_VRE 0x4 /* Marks the end of the even field */
3411#define BKTR_VRO 0xC /* Marks the end of the odd field */
3412#define BKTR_PXV 0x0 /* valid word (never used) */
3413#define BKTR_EOL 0x1 /* last dword, 4 bytes */
3414#define BKTR_SOL 0x2 /* first dword */
3415
3416#define OP_WRITE (0x1 << 28)
3417#define OP_SKIP (0x2 << 28)
3418#define OP_WRITEC (0x5 << 28)
3419#define OP_JUMP (0x7 << 28)
3420#define OP_SYNC (0x8 << 28)
3421#define OP_WRITE123 (0x9 << 28)
3422#define OP_WRITES123 (0xb << 28)
3423#define OP_SOL (1 << 27) /* first instr for scanline */
3424#define OP_EOL (1 << 26)
3425
3426#define BKTR_RESYNC (1 << 15)
3427#define BKTR_GEN_IRQ (1 << 24)
3428
3429/*
3430 * The RISC status bits can be set/cleared in the RISC programs
3431 * and tested in the Interrupt Handler
3432 */
3433#define BKTR_SET_RISC_STATUS_BIT0 (1 << 16)
3434#define BKTR_SET_RISC_STATUS_BIT1 (1 << 17)
3435#define BKTR_SET_RISC_STATUS_BIT2 (1 << 18)
3436#define BKTR_SET_RISC_STATUS_BIT3 (1 << 19)
3437
3438#define BKTR_CLEAR_RISC_STATUS_BIT0 (1 << 20)
3439#define BKTR_CLEAR_RISC_STATUS_BIT1 (1 << 21)
3440#define BKTR_CLEAR_RISC_STATUS_BIT2 (1 << 22)
3441#define BKTR_CLEAR_RISC_STATUS_BIT3 (1 << 23)
3442
3443#define BKTR_TEST_RISC_STATUS_BIT0 (1 << 28)
3444#define BKTR_TEST_RISC_STATUS_BIT1 (1 << 29)
3445#define BKTR_TEST_RISC_STATUS_BIT2 (1 << 30)
3446#define BKTR_TEST_RISC_STATUS_BIT3 (1 << 31)
3447
3448bool_t notclipped (bktr_reg_t * bktr, int x, int width) {
3449 int i;
3450 bktr_clip_t * clip_node;
3451 bktr->clip_start = -1;
3452 bktr->last_y = 0;
3453 bktr->y = 0;
3454 bktr->y2 = width;
3455 bktr->line_length = width;
3456 bktr->yclip = -1;
3457 bktr->yclip2 = -1;
3458 bktr->current_col = 0;
3459
3460 if (bktr->max_clip_node == 0 ) return TRUE;
3461 clip_node = (bktr_clip_t *) &bktr->clip_list[0];
3462
3463
3464 for (i = 0; i < bktr->max_clip_node; i++ ) {
3465 clip_node = (bktr_clip_t *) &bktr->clip_list[i];
3466 if (x >= clip_node->x_min && x <= clip_node->x_max ) {
3467 bktr->clip_start = i;
3468 return FALSE;
3469 }
3470 }
3471
3472 return TRUE;
3473}
3474
3475bool_t getline(bktr_reg_t *bktr, int x ) {
3476 int i, j;
3477 bktr_clip_t * clip_node ;
3478
3479 if (bktr->line_length == 0 ||
3480 bktr->current_col >= bktr->line_length) return FALSE;
3481
3482 bktr->y = min(bktr->last_y, bktr->line_length);
3483 bktr->y2 = bktr->line_length;
3484
3485 bktr->yclip = bktr->yclip2 = -1;
3486 for (i = bktr->clip_start; i < bktr->max_clip_node; i++ ) {
3487 clip_node = (bktr_clip_t *) &bktr->clip_list[i];
3488 if (x >= clip_node->x_min && x <= clip_node->x_max) {
3489 if (bktr->last_y <= clip_node->y_min) {
3490 bktr->y = min(bktr->last_y, bktr->line_length);
3491 bktr->y2 = min(clip_node->y_min, bktr->line_length);
3492 bktr->yclip = min(clip_node->y_min, bktr->line_length);
3493 bktr->yclip2 = min(clip_node->y_max, bktr->line_length);
3494 bktr->last_y = bktr->yclip2;
3495 bktr->clip_start = i;
3496
3497 for (j = i+1; j < bktr->max_clip_node; j++ ) {
3498 clip_node = (bktr_clip_t *) &bktr->clip_list[j];
3499 if (x >= clip_node->x_min && x <= clip_node->x_max) {
3500 if (bktr->last_y >= clip_node->y_min) {
3501 bktr->yclip2 = min(clip_node->y_max, bktr->line_length);
3502 bktr->last_y = bktr->yclip2;
3503 bktr->clip_start = j;
3504 }
3505 } else break ;
3506 }
3507 return TRUE;
3508 }
3509 }
3510 }
3511
3512 if (bktr->current_col <= bktr->line_length) {
3513 bktr->current_col = bktr->line_length;
3514 return TRUE;
3515 }
3516 return FALSE;
3517}
3518
3519static bool_t split(bktr_reg_t * bktr, volatile u_long **dma_prog, int width ,
3520 u_long operation, int pixel_width,
3521 volatile u_char ** target_buffer, int cols ) {
3522
3523 u_long flag, flag2;
3524 struct meteor_pixfmt *pf = &pixfmt_table[ bktr->pixfmt ].public;
3525 u_int skip, start_skip;
3526
3527 /* For RGB24, we need to align the component in FIFO Byte Lane 0 */
3528 /* to the 1st byte in the mem dword containing our start addr. */
3529 /* BTW, we know this pixfmt's 1st byte is Blue; thus the start addr */
3530 /* must be Blue. */
3531 start_skip = 0;
3532 if (( pf->type == METEOR_PIXTYPE_RGB ) && ( pf->Bpp == 3 ))
3533 switch ( ((uintptr_t) (volatile void *) *target_buffer) % 4 ) {
3534 case 2 : start_skip = 4 ; break;
3535 case 1 : start_skip = 8 ; break;
3536 }
3537
3538 if ((width * pixel_width) < DMA_BT848_SPLIT ) {
3539 if ( width == cols) {
3540 flag = OP_SOL | OP_EOL;
3541 } else if (bktr->current_col == 0 ) {
3542 flag = OP_SOL;
3543 } else if (bktr->current_col == cols) {
3544 flag = OP_EOL;
3545 } else flag = 0;
3546
3547 skip = 0;
3548 if (( flag & OP_SOL ) && ( start_skip > 0 )) {
3549 *(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip;
3550 flag &= ~OP_SOL;
3551 skip = start_skip;
3552 }
3553
3554 *(*dma_prog)++ = operation | flag | (width * pixel_width - skip);
3555 if (operation != OP_SKIP )
3556 *(*dma_prog)++ = (uintptr_t) (volatile void *) *target_buffer;
3557
3558 *target_buffer += width * pixel_width;
3559 bktr->current_col += width;
3560
3561 } else {
3562
3563 if (bktr->current_col == 0 && width == cols) {
3564 flag = OP_SOL ;
3565 flag2 = OP_EOL;
3566 } else if (bktr->current_col == 0 ) {
3567 flag = OP_SOL;
3568 flag2 = 0;
3569 } else if (bktr->current_col >= cols) {
3570 flag = 0;
3571 flag2 = OP_EOL;
3572 } else {
3573 flag = 0;
3574 flag2 = 0;
3575 }
3576
3577 skip = 0;
3578 if (( flag & OP_SOL ) && ( start_skip > 0 )) {
3579 *(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip;
3580 flag &= ~OP_SOL;
3581 skip = start_skip;
3582 }
3583
3584 *(*dma_prog)++ = operation | flag |
3585 (width * pixel_width / 2 - skip);
3586 if (operation != OP_SKIP )
3587 *(*dma_prog)++ = (uintptr_t) (volatile void *) *target_buffer ;
3588 *target_buffer += (width * pixel_width / 2) ;
3589
3590 if ( operation == OP_WRITE )
3591 operation = OP_WRITEC;
3592 *(*dma_prog)++ = operation | flag2 |
3593 (width * pixel_width / 2);
3594 *target_buffer += (width * pixel_width / 2) ;
3595 bktr->current_col += width;
3596
3597 }
3598 return TRUE;
3599}
3600
3601
3602/*
3603 * Generate the RISC instructions to capture both VBI and video images
3604 */
3605static void
3606rgb_vbi_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
3607{
3608 int i;
3609 bt848_ptr_t bt848;
3610 volatile u_long target_buffer, buffer, target,width;
3611 volatile u_long pitch;
| 2162 case BT848_I2CWR:
2163 par = *(u_long *)arg;
2164 write = (par >> 24) & 0xff ;
2165 i2c_addr = (par >> 16) & 0xff ;
2166 i2c_port = (par >> 8) & 0xff ;
2167 data = (par) & 0xff ;
2168
2169 if (write) {
2170 i2cWrite( bktr, i2c_addr, i2c_port, data);
2171 } else {
2172 data = i2cRead( bktr, i2c_addr);
2173 }
2174 *(u_long *)arg = (par & 0xffffff00) | ( data & 0xff );
2175 break;
2176
2177
2178 default:
2179 return common_ioctl( bktr, bt848, cmd, arg );
2180 }
2181
2182 return( 0 );
2183}
2184
2185
2186/*
2187 * common ioctls
2188 */
2189int
2190common_ioctl( bktr_ptr_t bktr, bt848_ptr_t bt848, int cmd, caddr_t arg )
2191{
2192 int pixfmt;
2193 unsigned int temp;
2194 struct meteor_pixfmt *pf_pub;
2195
2196 switch (cmd) {
2197
2198 case METEORSINPUT: /* set input device */
2199 /*Bt848 has 3 MUX Inputs. Bt848A/849A/878/879 has 4 MUX Inputs*/
2200 /* On the original bt848 boards, */
2201 /* Tuner is MUX0, RCA is MUX1, S-Video is MUX2 */
2202 /* On the Hauppauge bt878 boards, */
2203 /* Tuner is MUX0, RCA is MUX3 */
2204 /* Unfortunatly Meteor driver codes DEV_RCA as DEV_0, so we */
2205 /* stick with this system in our Meteor Emulation */
2206
2207 switch(*(unsigned long *)arg & METEOR_DEV_MASK) {
2208
2209 /* this is the RCA video input */
2210 case 0: /* default */
2211 case METEOR_INPUT_DEV0:
2212 /* METEOR_INPUT_DEV_RCA: */
2213 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
2214 | METEOR_DEV0;
2215 bt848->iform &= ~BT848_IFORM_MUXSEL;
2216
2217 /* work around for new Hauppauge 878 cards */
2218 if ((bktr->card.card_id == CARD_HAUPPAUGE) &&
2219 (bktr->id==BROOKTREE_878 ||
2220 bktr->id==BROOKTREE_879) )
2221 bt848->iform |= BT848_IFORM_M_MUX3;
2222 else
2223 bt848->iform |= BT848_IFORM_M_MUX1;
2224
2225 bt848->e_control &= ~BT848_E_CONTROL_COMP;
2226 bt848->o_control &= ~BT848_O_CONTROL_COMP;
2227 set_audio( bktr, AUDIO_EXTERN );
2228 break;
2229
2230 /* this is the tuner input */
2231 case METEOR_INPUT_DEV1:
2232 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
2233 | METEOR_DEV1;
2234 bt848->iform &= ~BT848_IFORM_MUXSEL;
2235 bt848->iform |= BT848_IFORM_M_MUX0;
2236 bt848->e_control &= ~BT848_E_CONTROL_COMP;
2237 bt848->o_control &= ~BT848_O_CONTROL_COMP;
2238 set_audio( bktr, AUDIO_TUNER );
2239 break;
2240
2241 /* this is the S-VHS input, but with a composite camera */
2242 case METEOR_INPUT_DEV2:
2243 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
2244 | METEOR_DEV2;
2245 bt848->iform &= ~BT848_IFORM_MUXSEL;
2246 bt848->iform |= BT848_IFORM_M_MUX2;
2247 bt848->e_control &= ~BT848_E_CONTROL_COMP;
2248 bt848->o_control &= ~BT848_O_CONTROL_COMP;
2249 set_audio( bktr, AUDIO_EXTERN );
2250 break;
2251
2252 /* this is the S-VHS input */
2253 case METEOR_INPUT_DEV_SVIDEO:
2254 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
2255 | METEOR_DEV_SVIDEO;
2256 bt848->iform &= ~BT848_IFORM_MUXSEL;
2257 bt848->iform |= BT848_IFORM_M_MUX2;
2258 bt848->e_control |= BT848_E_CONTROL_COMP;
2259 bt848->o_control |= BT848_O_CONTROL_COMP;
2260 set_audio( bktr, AUDIO_EXTERN );
2261 break;
2262
2263 case METEOR_INPUT_DEV3:
2264 if ((bktr->id == BROOKTREE_848A) ||
2265 (bktr->id == BROOKTREE_849A) ||
2266 (bktr->id == BROOKTREE_878) ||
2267 (bktr->id == BROOKTREE_879) ) {
2268 bktr->flags = (bktr->flags & ~METEOR_DEV_MASK)
2269 | METEOR_DEV3;
2270 bt848->iform &= ~BT848_IFORM_MUXSEL;
2271
2272 /* work around for new Hauppauge 878 cards */
2273 if ((bktr->card.card_id == CARD_HAUPPAUGE) &&
2274 (bktr->id==BROOKTREE_878 ||
2275 bktr->id==BROOKTREE_879) )
2276 bt848->iform |= BT848_IFORM_M_MUX1;
2277 else
2278 bt848->iform |= BT848_IFORM_M_MUX3;
2279
2280 bt848->e_control &= ~BT848_E_CONTROL_COMP;
2281 bt848->o_control &= ~BT848_O_CONTROL_COMP;
2282 set_audio( bktr, AUDIO_EXTERN );
2283
2284 break;
2285 }
2286
2287 default:
2288 return( EINVAL );
2289 }
2290 break;
2291
2292 case METEORGINPUT: /* get input device */
2293 *(u_long *)arg = bktr->flags & METEOR_DEV_MASK;
2294 break;
2295
2296 case METEORSACTPIXFMT:
2297 if (( *(int *)arg < 0 ) ||
2298 ( *(int *)arg >= PIXFMT_TABLE_SIZE ))
2299 return( EINVAL );
2300
2301 bktr->pixfmt = *(int *)arg;
2302 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
2303 bktr->pixfmt_compat = FALSE;
2304 break;
2305
2306 case METEORGACTPIXFMT:
2307 *(int *)arg = bktr->pixfmt;
2308 break;
2309
2310 case METEORGSUPPIXFMT :
2311 pf_pub = (struct meteor_pixfmt *)arg;
2312 pixfmt = pf_pub->index;
2313
2314 if (( pixfmt < 0 ) || ( pixfmt >= PIXFMT_TABLE_SIZE ))
2315 return( EINVAL );
2316
2317 memcpy( pf_pub, &pixfmt_table[ pixfmt ].public,
2318 sizeof( *pf_pub ) );
2319
2320 /* Patch in our format index */
2321 pf_pub->index = pixfmt;
2322 break;
2323
2324#if defined( STATUS_SUM )
2325 case BT848_GSTATUS: /* reap status */
2326 disable_intr();
2327 temp = status_sum;
2328 status_sum = 0;
2329 enable_intr();
2330 *(u_int*)arg = temp;
2331 break;
2332#endif /* STATUS_SUM */
2333
2334 default:
2335 return( ENOTTY );
2336 }
2337
2338 return( 0 );
2339}
2340
2341
2342
2343
2344/******************************************************************************
2345 * bt848 RISC programming routines:
2346 */
2347
2348
2349/*
2350 *
2351 */
2352#ifdef BT848_DEBUG
2353static int
2354dump_bt848( bt848_ptr_t bt848 )
2355{
2356 volatile u_char *bt848r = (u_char *)bt848;
2357 int r[60]={
2358 4, 8, 0xc, 0x8c, 0x10, 0x90, 0x14, 0x94,
2359 0x18, 0x98, 0x1c, 0x9c, 0x20, 0xa0, 0x24, 0xa4,
2360 0x28, 0x2c, 0xac, 0x30, 0x34, 0x38, 0x3c, 0x40,
2361 0xc0, 0x48, 0x4c, 0xcc, 0x50, 0xd0, 0xd4, 0x60,
2362 0x64, 0x68, 0x6c, 0xec, 0xd8, 0xdc, 0xe0, 0xe4,
2363 0, 0, 0, 0
2364 };
2365 int i;
2366
2367 for (i = 0; i < 40; i+=4) {
2368 printf(" Reg:value : \t%x:%x \t%x:%x \t %x:%x \t %x:%x\n",
2369 r[i], bt848r[r[i]],
2370 r[i+1], bt848r[r[i+1]],
2371 r[i+2], bt848r[r[i+2]],
2372 r[i+3], bt848r[r[i+3]]);
2373 }
2374
2375 printf(" INT STAT %x \n", bt848->int_stat);
2376 printf(" Reg INT_MASK %x \n", bt848->int_mask);
2377 printf(" Reg GPIO_DMA_CTL %x \n", bt848->gpio_dma_ctl);
2378
2379 return( 0 );
2380}
2381
2382#endif
2383
2384/*
2385 * build write instruction
2386 */
2387#define BKTR_FM1 0x6 /* packed data to follow */
2388#define BKTR_FM3 0xe /* planar data to follow */
2389#define BKTR_VRE 0x4 /* Marks the end of the even field */
2390#define BKTR_VRO 0xC /* Marks the end of the odd field */
2391#define BKTR_PXV 0x0 /* valid word (never used) */
2392#define BKTR_EOL 0x1 /* last dword, 4 bytes */
2393#define BKTR_SOL 0x2 /* first dword */
2394
2395#define OP_WRITE (0x1 << 28)
2396#define OP_SKIP (0x2 << 28)
2397#define OP_WRITEC (0x5 << 28)
2398#define OP_JUMP (0x7 << 28)
2399#define OP_SYNC (0x8 << 28)
2400#define OP_WRITE123 (0x9 << 28)
2401#define OP_WRITES123 (0xb << 28)
2402#define OP_SOL (1 << 27) /* first instr for scanline */
2403#define OP_EOL (1 << 26)
2404
2405#define BKTR_RESYNC (1 << 15)
2406#define BKTR_GEN_IRQ (1 << 24)
2407
2408/*
2409 * The RISC status bits can be set/cleared in the RISC programs
2410 * and tested in the Interrupt Handler
2411 */
2412#define BKTR_SET_RISC_STATUS_BIT0 (1 << 16)
2413#define BKTR_SET_RISC_STATUS_BIT1 (1 << 17)
2414#define BKTR_SET_RISC_STATUS_BIT2 (1 << 18)
2415#define BKTR_SET_RISC_STATUS_BIT3 (1 << 19)
2416
2417#define BKTR_CLEAR_RISC_STATUS_BIT0 (1 << 20)
2418#define BKTR_CLEAR_RISC_STATUS_BIT1 (1 << 21)
2419#define BKTR_CLEAR_RISC_STATUS_BIT2 (1 << 22)
2420#define BKTR_CLEAR_RISC_STATUS_BIT3 (1 << 23)
2421
2422#define BKTR_TEST_RISC_STATUS_BIT0 (1 << 28)
2423#define BKTR_TEST_RISC_STATUS_BIT1 (1 << 29)
2424#define BKTR_TEST_RISC_STATUS_BIT2 (1 << 30)
2425#define BKTR_TEST_RISC_STATUS_BIT3 (1 << 31)
2426
2427bool_t notclipped (bktr_reg_t * bktr, int x, int width) {
2428 int i;
2429 bktr_clip_t * clip_node;
2430 bktr->clip_start = -1;
2431 bktr->last_y = 0;
2432 bktr->y = 0;
2433 bktr->y2 = width;
2434 bktr->line_length = width;
2435 bktr->yclip = -1;
2436 bktr->yclip2 = -1;
2437 bktr->current_col = 0;
2438
2439 if (bktr->max_clip_node == 0 ) return TRUE;
2440 clip_node = (bktr_clip_t *) &bktr->clip_list[0];
2441
2442
2443 for (i = 0; i < bktr->max_clip_node; i++ ) {
2444 clip_node = (bktr_clip_t *) &bktr->clip_list[i];
2445 if (x >= clip_node->x_min && x <= clip_node->x_max ) {
2446 bktr->clip_start = i;
2447 return FALSE;
2448 }
2449 }
2450
2451 return TRUE;
2452}
2453
2454bool_t getline(bktr_reg_t *bktr, int x ) {
2455 int i, j;
2456 bktr_clip_t * clip_node ;
2457
2458 if (bktr->line_length == 0 ||
2459 bktr->current_col >= bktr->line_length) return FALSE;
2460
2461 bktr->y = min(bktr->last_y, bktr->line_length);
2462 bktr->y2 = bktr->line_length;
2463
2464 bktr->yclip = bktr->yclip2 = -1;
2465 for (i = bktr->clip_start; i < bktr->max_clip_node; i++ ) {
2466 clip_node = (bktr_clip_t *) &bktr->clip_list[i];
2467 if (x >= clip_node->x_min && x <= clip_node->x_max) {
2468 if (bktr->last_y <= clip_node->y_min) {
2469 bktr->y = min(bktr->last_y, bktr->line_length);
2470 bktr->y2 = min(clip_node->y_min, bktr->line_length);
2471 bktr->yclip = min(clip_node->y_min, bktr->line_length);
2472 bktr->yclip2 = min(clip_node->y_max, bktr->line_length);
2473 bktr->last_y = bktr->yclip2;
2474 bktr->clip_start = i;
2475
2476 for (j = i+1; j < bktr->max_clip_node; j++ ) {
2477 clip_node = (bktr_clip_t *) &bktr->clip_list[j];
2478 if (x >= clip_node->x_min && x <= clip_node->x_max) {
2479 if (bktr->last_y >= clip_node->y_min) {
2480 bktr->yclip2 = min(clip_node->y_max, bktr->line_length);
2481 bktr->last_y = bktr->yclip2;
2482 bktr->clip_start = j;
2483 }
2484 } else break ;
2485 }
2486 return TRUE;
2487 }
2488 }
2489 }
2490
2491 if (bktr->current_col <= bktr->line_length) {
2492 bktr->current_col = bktr->line_length;
2493 return TRUE;
2494 }
2495 return FALSE;
2496}
2497
2498static bool_t split(bktr_reg_t * bktr, volatile u_long **dma_prog, int width ,
2499 u_long operation, int pixel_width,
2500 volatile u_char ** target_buffer, int cols ) {
2501
2502 u_long flag, flag2;
2503 struct meteor_pixfmt *pf = &pixfmt_table[ bktr->pixfmt ].public;
2504 u_int skip, start_skip;
2505
2506 /* For RGB24, we need to align the component in FIFO Byte Lane 0 */
2507 /* to the 1st byte in the mem dword containing our start addr. */
2508 /* BTW, we know this pixfmt's 1st byte is Blue; thus the start addr */
2509 /* must be Blue. */
2510 start_skip = 0;
2511 if (( pf->type == METEOR_PIXTYPE_RGB ) && ( pf->Bpp == 3 ))
2512 switch ( ((uintptr_t) (volatile void *) *target_buffer) % 4 ) {
2513 case 2 : start_skip = 4 ; break;
2514 case 1 : start_skip = 8 ; break;
2515 }
2516
2517 if ((width * pixel_width) < DMA_BT848_SPLIT ) {
2518 if ( width == cols) {
2519 flag = OP_SOL | OP_EOL;
2520 } else if (bktr->current_col == 0 ) {
2521 flag = OP_SOL;
2522 } else if (bktr->current_col == cols) {
2523 flag = OP_EOL;
2524 } else flag = 0;
2525
2526 skip = 0;
2527 if (( flag & OP_SOL ) && ( start_skip > 0 )) {
2528 *(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip;
2529 flag &= ~OP_SOL;
2530 skip = start_skip;
2531 }
2532
2533 *(*dma_prog)++ = operation | flag | (width * pixel_width - skip);
2534 if (operation != OP_SKIP )
2535 *(*dma_prog)++ = (uintptr_t) (volatile void *) *target_buffer;
2536
2537 *target_buffer += width * pixel_width;
2538 bktr->current_col += width;
2539
2540 } else {
2541
2542 if (bktr->current_col == 0 && width == cols) {
2543 flag = OP_SOL ;
2544 flag2 = OP_EOL;
2545 } else if (bktr->current_col == 0 ) {
2546 flag = OP_SOL;
2547 flag2 = 0;
2548 } else if (bktr->current_col >= cols) {
2549 flag = 0;
2550 flag2 = OP_EOL;
2551 } else {
2552 flag = 0;
2553 flag2 = 0;
2554 }
2555
2556 skip = 0;
2557 if (( flag & OP_SOL ) && ( start_skip > 0 )) {
2558 *(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip;
2559 flag &= ~OP_SOL;
2560 skip = start_skip;
2561 }
2562
2563 *(*dma_prog)++ = operation | flag |
2564 (width * pixel_width / 2 - skip);
2565 if (operation != OP_SKIP )
2566 *(*dma_prog)++ = (uintptr_t) (volatile void *) *target_buffer ;
2567 *target_buffer += (width * pixel_width / 2) ;
2568
2569 if ( operation == OP_WRITE )
2570 operation = OP_WRITEC;
2571 *(*dma_prog)++ = operation | flag2 |
2572 (width * pixel_width / 2);
2573 *target_buffer += (width * pixel_width / 2) ;
2574 bktr->current_col += width;
2575
2576 }
2577 return TRUE;
2578}
2579
2580
2581/*
2582 * Generate the RISC instructions to capture both VBI and video images
2583 */
2584static void
2585rgb_vbi_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
2586{
2587 int i;
2588 bt848_ptr_t bt848;
2589 volatile u_long target_buffer, buffer, target,width;
2590 volatile u_long pitch;
|
3612 volatile u_long *dma_prog; /* DMA prog is an array of
| 2591 volatile u_long *dma_prog; /* DMA prog is an array of
|
3613 32 bit RISC instructions */
3614 volatile u_long *loop_point;
3615 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
3616 u_int Bpp = pf_int->public.Bpp;
3617 unsigned int vbisamples; /* VBI samples per line */
3618 unsigned int vbilines; /* VBI lines per field */
3619 unsigned int num_dwords; /* DWORDS per line */
3620
3621 vbisamples = format_params[bktr->format_params].vbi_num_samples;
3622 vbilines = format_params[bktr->format_params].vbi_num_lines;
3623 num_dwords = vbisamples/4;
3624
3625 bt848 = bktr->base;
3626
3627 bt848->color_fmt = pf_int->color_fmt;
3628 bt848->adc = SYNC_LEVEL;
3629 bt848->vbi_pack_size = ((num_dwords)) & 0xff;
3630 bt848->vbi_pack_del = ((num_dwords)>> 8) & 0x01; /* no hdelay */
3631 /* no ext frame */
3632
3633 bt848->oform = 0x00;
3634
3635 bt848->e_vscale_hi |= 0x40; /* set chroma comb */
3636 bt848->o_vscale_hi |= 0x40;
3637 bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */
3638 bt848->o_vscale_hi &= ~0x80;
3639
3640 /* disable gamma correction removal */
3641 bt848->color_ctl_gamma = 1;
3642
3643
3644 if (cols > 385 ) {
3645 bt848->e_vtc = 0;
3646 bt848->o_vtc = 0;
3647 } else {
3648 bt848->e_vtc = 1;
3649 bt848->o_vtc = 1;
3650 }
3651 bktr->capcontrol = 3 << 2 | 3;
3652
3653 dma_prog = (u_long *) bktr->dma_prog;
3654
3655 /* Construct Write */
3656
3657 if (bktr->video.addr) {
3658 target_buffer = (u_long) bktr->video.addr;
3659 pitch = bktr->video.width;
3660 }
3661 else {
3662 target_buffer = (u_long) vtophys(bktr->bigbuf);
3663 pitch = cols*Bpp;
3664 }
3665
3666 buffer = target_buffer;
3667
3668 /* Wait for the VRE sync marking the end of the Even and
3669 * the start of the Odd field. Resync here.
3670 */
3671 *dma_prog++ = OP_SYNC | BKTR_RESYNC |BKTR_VRE;
3672 *dma_prog++ = 0;
3673
3674 loop_point = dma_prog;
3675
3676 /* store the VBI data */
3677 /* look for sync with packed data */
3678 *dma_prog++ = OP_SYNC | BKTR_FM1;
3679 *dma_prog++ = 0;
3680 for(i = 0; i < vbilines; i++) {
3681 *dma_prog++ = OP_WRITE | OP_SOL | OP_EOL | vbisamples;
3682 *dma_prog++ = (u_long) vtophys(bktr->vbidata +
3683 (i * VBI_LINE_SIZE));
3684 }
3685
3686 if ( (i_flag == 2/*Odd*/) || (i_flag==3) /*interlaced*/ ) {
3687 /* store the Odd field video image */
3688 /* look for sync with packed data */
3689 *dma_prog++ = OP_SYNC | BKTR_FM1;
3690 *dma_prog++ = 0; /* NULL WORD */
3691 width = cols;
3692 for (i = 0; i < (rows/interlace); i++) {
3693 target = target_buffer;
3694 if ( notclipped(bktr, i, width)) {
3695 split(bktr, (volatile u_long **) &dma_prog,
3696 bktr->y2 - bktr->y, OP_WRITE,
3697 Bpp, (volatile u_char **) &target, cols);
3698
3699 } else {
3700 while(getline(bktr, i)) {
3701 if (bktr->y != bktr->y2 ) {
3702 split(bktr, (volatile u_long **) &dma_prog,
3703 bktr->y2 - bktr->y, OP_WRITE,
3704 Bpp, (volatile u_char **) &target, cols);
3705 }
3706 if (bktr->yclip != bktr->yclip2 ) {
3707 split(bktr,(volatile u_long **) &dma_prog,
3708 bktr->yclip2 - bktr->yclip,
3709 OP_SKIP,
3710 Bpp, (volatile u_char **) &target, cols);
3711 }
3712 }
3713
3714 }
3715
3716 target_buffer += interlace * pitch;
3717
3718 }
3719
3720 } /* end if */
3721
3722 /* Grab the Even field */
3723 /* Look for the VRO, end of Odd field, marker */
3724 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
3725 *dma_prog++ = 0; /* NULL WORD */
3726
3727 /* store the VBI data */
3728 /* look for sync with packed data */
3729 *dma_prog++ = OP_SYNC | BKTR_FM1;
3730 *dma_prog++ = 0;
3731 for(i = 0; i < vbilines; i++) {
3732 *dma_prog++ = OP_WRITE | OP_SOL | OP_EOL | vbisamples;
3733 *dma_prog++ = (u_long) vtophys(bktr->vbidata +
3734 ((i+MAX_VBI_LINES) * VBI_LINE_SIZE));
3735 }
3736
3737 /* store the video image */
3738 if (i_flag == 1) /*Even Only*/
3739 target_buffer = buffer;
3740 if (i_flag == 3) /*interlaced*/
3741 target_buffer = buffer+pitch;
3742
3743
3744 if ((i_flag == 1) /*Even Only*/ || (i_flag==3) /*interlaced*/) {
3745 /* look for sync with packed data */
3746 *dma_prog++ = OP_SYNC | BKTR_FM1;
3747 *dma_prog++ = 0; /* NULL WORD */
3748 width = cols;
3749 for (i = 0; i < (rows/interlace); i++) {
3750 target = target_buffer;
3751 if ( notclipped(bktr, i, width)) {
3752 split(bktr, (volatile u_long **) &dma_prog,
3753 bktr->y2 - bktr->y, OP_WRITE,
3754 Bpp, (volatile u_char **) &target, cols);
3755 } else {
3756 while(getline(bktr, i)) {
3757 if (bktr->y != bktr->y2 ) {
3758 split(bktr, (volatile u_long **) &dma_prog,
3759 bktr->y2 - bktr->y, OP_WRITE,
3760 Bpp, (volatile u_char **) &target,
3761 cols);
3762 }
3763 if (bktr->yclip != bktr->yclip2 ) {
3764 split(bktr, (volatile u_long **) &dma_prog,
3765 bktr->yclip2 - bktr->yclip, OP_SKIP,
3766 Bpp, (volatile u_char **) &target, cols);
3767 }
3768
3769 }
3770
3771 }
3772
3773 target_buffer += interlace * pitch;
3774
3775 }
3776 }
3777
3778 /* Look for end of 'Even Field' */
3779 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
3780 *dma_prog++ = 0; /* NULL WORD */
3781
3782 *dma_prog++ = OP_JUMP ;
3783 *dma_prog++ = (u_long ) vtophys(loop_point) ;
3784 *dma_prog++ = 0; /* NULL WORD */
3785
3786}
3787
3788
3789
3790
3791static void
3792rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
3793{
3794 int i;
3795 bt848_ptr_t bt848;
3796 volatile u_long target_buffer, buffer, target,width;
3797 volatile u_long pitch;
3798 volatile u_long *dma_prog;
3799 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
3800 u_int Bpp = pf_int->public.Bpp;
3801
3802 bt848 = bktr->base;
3803
3804 bt848->color_fmt = pf_int->color_fmt;
3805 bt848->vbi_pack_size = 0;
3806 bt848->vbi_pack_del = 0;
3807 bt848->adc = SYNC_LEVEL;
3808
3809 bt848->oform = 0x00;
3810
3811 bt848->e_vscale_hi |= 0x40; /* set chroma comb */
3812 bt848->o_vscale_hi |= 0x40;
3813 bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */
3814 bt848->o_vscale_hi &= ~0x80;
3815
3816 /* disable gamma correction removal */
3817 bt848->color_ctl_gamma = 1;
3818
3819
3820 if (cols > 385 ) {
3821 bt848->e_vtc = 0;
3822 bt848->o_vtc = 0;
3823 } else {
3824 bt848->e_vtc = 1;
3825 bt848->o_vtc = 1;
3826 }
3827 bktr->capcontrol = 3 << 2 | 3;
3828
3829 dma_prog = (u_long *) bktr->dma_prog;
3830
3831 /* Construct Write */
3832
3833 if (bktr->video.addr) {
3834 target_buffer = (u_long) bktr->video.addr;
3835 pitch = bktr->video.width;
3836 }
3837 else {
3838 target_buffer = (u_long) vtophys(bktr->bigbuf);
3839 pitch = cols*Bpp;
3840 }
3841
3842 buffer = target_buffer;
3843
3844 /* contruct sync : for video packet format */
3845 *dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM1;
3846
3847 /* sync, mode indicator packed data */
3848 *dma_prog++ = 0; /* NULL WORD */
3849 width = cols;
3850 for (i = 0; i < (rows/interlace); i++) {
3851 target = target_buffer;
3852 if ( notclipped(bktr, i, width)) {
3853 split(bktr, (volatile u_long **) &dma_prog,
3854 bktr->y2 - bktr->y, OP_WRITE,
3855 Bpp, (volatile u_char **) &target, cols);
3856
3857 } else {
3858 while(getline(bktr, i)) {
3859 if (bktr->y != bktr->y2 ) {
3860 split(bktr, (volatile u_long **) &dma_prog,
3861 bktr->y2 - bktr->y, OP_WRITE,
3862 Bpp, (volatile u_char **) &target, cols);
3863 }
3864 if (bktr->yclip != bktr->yclip2 ) {
3865 split(bktr,(volatile u_long **) &dma_prog,
3866 bktr->yclip2 - bktr->yclip,
3867 OP_SKIP,
3868 Bpp, (volatile u_char **) &target, cols);
3869 }
3870 }
3871
3872 }
3873
3874 target_buffer += interlace * pitch;
3875
3876 }
3877
3878 switch (i_flag) {
3879 case 1:
3880 /* sync vre */
3881 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO;
3882 *dma_prog++ = 0; /* NULL WORD */
3883
3884 *dma_prog++ = OP_JUMP;
3885 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3886 return;
3887
3888 case 2:
3889 /* sync vro */
3890 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE;
3891 *dma_prog++ = 0; /* NULL WORD */
3892
3893 *dma_prog++ = OP_JUMP;
3894 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3895 return;
3896
3897 case 3:
3898 /* sync vro */
3899 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
3900 *dma_prog++ = 0; /* NULL WORD */
3901 *dma_prog++ = OP_JUMP; ;
3902 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
3903 break;
3904 }
3905
3906 if (interlace == 2) {
3907
3908 target_buffer = buffer + pitch;
3909
3910 dma_prog = (u_long *) bktr->odd_dma_prog;
3911
3912 /* sync vre IRQ bit */
3913 *dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM1;
3914 *dma_prog++ = 0; /* NULL WORD */
3915 width = cols;
3916 for (i = 0; i < (rows/interlace); i++) {
3917 target = target_buffer;
3918 if ( notclipped(bktr, i, width)) {
3919 split(bktr, (volatile u_long **) &dma_prog,
3920 bktr->y2 - bktr->y, OP_WRITE,
3921 Bpp, (volatile u_char **) &target, cols);
3922 } else {
3923 while(getline(bktr, i)) {
3924 if (bktr->y != bktr->y2 ) {
3925 split(bktr, (volatile u_long **) &dma_prog,
3926 bktr->y2 - bktr->y, OP_WRITE,
3927 Bpp, (volatile u_char **) &target,
3928 cols);
3929 }
3930 if (bktr->yclip != bktr->yclip2 ) {
3931 split(bktr, (volatile u_long **) &dma_prog,
3932 bktr->yclip2 - bktr->yclip, OP_SKIP,
3933 Bpp, (volatile u_char **) &target, cols);
3934 }
3935
3936 }
3937
3938 }
3939
3940 target_buffer += interlace * pitch;
3941
3942 }
3943 }
3944
3945 /* sync vre IRQ bit */
3946 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
3947 *dma_prog++ = 0; /* NULL WORD */
3948 *dma_prog++ = OP_JUMP ;
3949 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ;
3950 *dma_prog++ = 0; /* NULL WORD */
3951}
3952
3953
3954/*
3955 *
3956 */
3957static void
3958yuvpack_prog( bktr_ptr_t bktr, char i_flag,
3959 int cols, int rows, int interlace )
3960{
3961 int i;
3962 volatile unsigned int inst;
3963 volatile unsigned int inst3;
3964 volatile u_long target_buffer, buffer;
3965 bt848_ptr_t bt848;
3966 volatile u_long *dma_prog;
3967 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
3968 int b;
3969
3970 bt848 = bktr->base;
3971
3972 bt848->color_fmt = pf_int->color_fmt;
3973
3974 bt848->e_scloop |= BT848_E_SCLOOP_CAGC; /* enable chroma comb */
3975 bt848->o_scloop |= BT848_O_SCLOOP_CAGC;
3976
3977 bt848->color_ctl_rgb_ded = 1;
3978 bt848->color_ctl_gamma = 1;
3979 bt848->adc = SYNC_LEVEL;
3980
3981 bktr->capcontrol = 1 << 6 | 1 << 4 | 1 << 2 | 3;
3982 bktr->capcontrol = 3 << 2 | 3;
3983
3984 dma_prog = (u_long *) bktr->dma_prog;
3985
3986 /* Construct Write */
3987
3988 /* write , sol, eol */
3989 inst = OP_WRITE | OP_SOL | (cols);
3990 /* write , sol, eol */
3991 inst3 = OP_WRITE | OP_EOL | (cols);
3992
3993 if (bktr->video.addr)
3994 target_buffer = (u_long) bktr->video.addr;
3995 else
3996 target_buffer = (u_long) vtophys(bktr->bigbuf);
3997
3998 buffer = target_buffer;
3999
4000 /* contruct sync : for video packet format */
4001 /* sync, mode indicator packed data */
4002 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM1;
4003 *dma_prog++ = 0; /* NULL WORD */
4004
4005 b = cols;
4006
4007 for (i = 0; i < (rows/interlace); i++) {
4008 *dma_prog++ = inst;
4009 *dma_prog++ = target_buffer;
4010 *dma_prog++ = inst3;
4011 *dma_prog++ = target_buffer + b;
4012 target_buffer += interlace*(cols * 2);
4013 }
4014
4015 switch (i_flag) {
4016 case 1:
4017 /* sync vre */
4018 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE;
4019 *dma_prog++ = 0; /* NULL WORD */
4020
4021 *dma_prog++ = OP_JUMP;
4022 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4023 return;
4024
4025 case 2:
4026 /* sync vro */
4027 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO;
4028 *dma_prog++ = 0; /* NULL WORD */
4029 *dma_prog++ = OP_JUMP;
4030 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4031 return;
4032
4033 case 3:
4034 /* sync vro */
4035 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO;
4036 *dma_prog++ = 0; /* NULL WORD */
4037 *dma_prog++ = OP_JUMP ;
4038 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
4039 break;
4040 }
4041
4042 if (interlace == 2) {
4043
4044 target_buffer = (u_long) buffer + cols*2;
4045
4046 dma_prog = (u_long * ) bktr->odd_dma_prog;
4047
4048 /* sync vre */
4049 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_FM1;
4050 *dma_prog++ = 0; /* NULL WORD */
4051
4052 for (i = 0; i < (rows/interlace) ; i++) {
4053 *dma_prog++ = inst;
4054 *dma_prog++ = target_buffer;
4055 *dma_prog++ = inst3;
4056 *dma_prog++ = target_buffer + b;
4057 target_buffer += interlace * ( cols*2);
4058 }
4059 }
4060
4061 /* sync vro IRQ bit */
4062 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE;
4063 *dma_prog++ = 0; /* NULL WORD */
4064 *dma_prog++ = OP_JUMP ;
4065 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4066
4067 *dma_prog++ = OP_JUMP;
4068 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4069 *dma_prog++ = 0; /* NULL WORD */
4070}
4071
4072
4073/*
4074 *
4075 */
4076static void
4077yuv422_prog( bktr_ptr_t bktr, char i_flag,
4078 int cols, int rows, int interlace ){
4079
4080 int i;
4081 volatile unsigned int inst;
4082 volatile u_long target_buffer, t1, buffer;
4083 bt848_ptr_t bt848;
4084 volatile u_long *dma_prog;
4085 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
4086
4087 bt848 = bktr->base;
4088
4089 bt848->color_fmt = pf_int->color_fmt;
4090
4091 dma_prog = (u_long *) bktr->dma_prog;
4092
4093 bktr->capcontrol = 1 << 6 | 1 << 4 | 3;
4094
4095 bt848->adc = SYNC_LEVEL;
4096 bt848->oform = 0x00;
4097
4098 bt848->e_control |= BT848_E_CONTROL_LDEC; /* disable luma decimation */
4099 bt848->o_control |= BT848_O_CONTROL_LDEC;
4100
4101 bt848->e_scloop |= BT848_O_SCLOOP_CAGC; /* chroma agc enable */
4102 bt848->o_scloop |= BT848_O_SCLOOP_CAGC;
4103
4104 bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */
4105 bt848->o_vscale_hi &= ~0x80;
4106 bt848->e_vscale_hi |= 0x40; /* set chroma comb */
4107 bt848->o_vscale_hi |= 0x40;
4108
4109 /* disable gamma correction removal */
4110 bt848->color_ctl_gamma = 1;
4111
4112 /* Construct Write */
4113 inst = OP_WRITE123 | OP_SOL | OP_EOL | (cols);
4114 if (bktr->video.addr)
4115 target_buffer = (u_long) bktr->video.addr;
4116 else
4117 target_buffer = (u_long) vtophys(bktr->bigbuf);
4118
4119 buffer = target_buffer;
4120
4121 t1 = buffer;
4122
4123 /* contruct sync : for video packet format */
4124 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; /*sync, mode indicator packed data*/
4125 *dma_prog++ = 0; /* NULL WORD */
4126
4127 for (i = 0; i < (rows/interlace ) ; i++) {
4128 *dma_prog++ = inst;
4129 *dma_prog++ = cols/2 | cols/2 << 16;
4130 *dma_prog++ = target_buffer;
4131 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
4132 *dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace;
4133 target_buffer += interlace*cols;
4134 }
4135
4136 switch (i_flag) {
4137 case 1:
4138 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; /*sync vre*/
4139 *dma_prog++ = 0; /* NULL WORD */
4140
4141 *dma_prog++ = OP_JUMP ;
4142 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4143 return;
4144
4145 case 2:
4146 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; /*sync vre*/
4147 *dma_prog++ = 0; /* NULL WORD */
4148
4149 *dma_prog++ = OP_JUMP;
4150 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4151 return;
4152
4153 case 3:
4154 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO;
4155 *dma_prog++ = 0; /* NULL WORD */
4156
4157 *dma_prog++ = OP_JUMP ;
4158 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
4159 break;
4160 }
4161
4162 if (interlace == 2) {
4163
4164 dma_prog = (u_long * ) bktr->odd_dma_prog;
4165
4166 target_buffer = (u_long) buffer + cols;
4167 t1 = buffer + cols/2;
4168 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3;
4169 *dma_prog++ = 0; /* NULL WORD */
4170
4171 for (i = 0; i < (rows/interlace ) ; i++) {
4172 *dma_prog++ = inst;
4173 *dma_prog++ = cols/2 | cols/2 << 16;
4174 *dma_prog++ = target_buffer;
4175 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
4176 *dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace;
4177 target_buffer += interlace*cols;
4178 }
4179 }
4180
4181 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE;
4182 *dma_prog++ = 0; /* NULL WORD */
4183 *dma_prog++ = OP_JUMP ;
4184 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ;
4185 *dma_prog++ = 0; /* NULL WORD */
4186}
4187
4188
4189/*
4190 *
4191 */
4192static void
4193yuv12_prog( bktr_ptr_t bktr, char i_flag,
4194 int cols, int rows, int interlace ){
4195
4196 int i;
4197 volatile unsigned int inst;
4198 volatile unsigned int inst1;
4199 volatile u_long target_buffer, t1, buffer;
4200 bt848_ptr_t bt848;
4201 volatile u_long *dma_prog;
4202 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
4203
4204 bt848 = bktr->base;
4205
4206 bt848->color_fmt = pf_int->color_fmt;
4207
4208 dma_prog = (u_long *) bktr->dma_prog;
4209
4210 bktr->capcontrol = 1 << 6 | 1 << 4 | 3;
4211
4212 bt848->adc = SYNC_LEVEL;
4213 bt848->oform = 0x0;
4214
4215 /* Construct Write */
4216 inst = OP_WRITE123 | OP_SOL | OP_EOL | (cols);
4217 inst1 = OP_WRITES123 | OP_SOL | OP_EOL | (cols);
4218 if (bktr->video.addr)
4219 target_buffer = (u_long) bktr->video.addr;
4220 else
4221 target_buffer = (u_long) vtophys(bktr->bigbuf);
4222
4223 buffer = target_buffer;
4224 t1 = buffer;
4225
4226 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; /*sync, mode indicator packed data*/
4227 *dma_prog++ = 0; /* NULL WORD */
4228
4229 for (i = 0; i < (rows/interlace )/2 ; i++) {
4230 *dma_prog++ = inst;
4231 *dma_prog++ = cols/2 | (cols/2 << 16);
4232 *dma_prog++ = target_buffer;
4233 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
4234 *dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace;
4235 target_buffer += interlace*cols;
4236 *dma_prog++ = inst1;
4237 *dma_prog++ = cols/2 | (cols/2 << 16);
4238 *dma_prog++ = target_buffer;
4239 target_buffer += interlace*cols;
4240
4241 }
4242
4243 switch (i_flag) {
4244 case 1:
4245 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; /*sync vre*/
4246 *dma_prog++ = 0; /* NULL WORD */
4247
4248 *dma_prog++ = OP_JUMP;
4249 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4250 return;
4251
4252 case 2:
4253 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; /*sync vro*/
4254 *dma_prog++ = 0; /* NULL WORD */
4255
4256 *dma_prog++ = OP_JUMP;
4257 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4258 return;
4259
4260 case 3:
4261 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO;
4262 *dma_prog++ = 0; /* NULL WORD */
4263 *dma_prog++ = OP_JUMP ;
4264 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
4265 break;
4266 }
4267
4268 if (interlace == 2) {
4269
4270 dma_prog = (u_long * ) bktr->odd_dma_prog;
4271
4272 target_buffer = (u_long) buffer + cols;
4273 t1 = buffer + cols/2;
4274 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3;
4275 *dma_prog++ = 0; /* NULL WORD */
4276
4277 for (i = 0; i < ((rows/interlace )/2 ) ; i++) {
4278 *dma_prog++ = inst;
4279 *dma_prog++ = cols/2 | (cols/2 << 16);
4280 *dma_prog++ = target_buffer;
4281 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
4282 *dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace;
4283 target_buffer += interlace*cols;
4284 *dma_prog++ = inst1;
4285 *dma_prog++ = cols/2 | (cols/2 << 16);
4286 *dma_prog++ = target_buffer;
4287 target_buffer += interlace*cols;
4288
4289 }
4290
4291
4292 }
4293
4294 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE;
4295 *dma_prog++ = 0; /* NULL WORD */
4296 *dma_prog++ = OP_JUMP;
4297 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
4298 *dma_prog++ = 0; /* NULL WORD */
4299}
4300
4301
4302
4303/*
4304 *
4305 */
4306static void
4307build_dma_prog( bktr_ptr_t bktr, char i_flag )
4308{
4309 int rows, cols, interlace;
4310 bt848_ptr_t bt848;
4311 int tmp_int;
4312 unsigned int temp;
4313 struct format_params *fp;
4314 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
4315
4316
4317 fp = &format_params[bktr->format_params];
4318
4319 bt848 = bktr->base;
4320 bt848->int_mask = ALL_INTS_DISABLED;
4321
4322 /* disable FIFO & RISC, leave other bits alone */
4323 bt848->gpio_dma_ctl &= ~FIFO_RISC_ENABLED;
4324
4325 /* set video parameters */
4326 if (bktr->capture_area_enabled)
4327 temp = ((quad_t ) fp->htotal* (quad_t) bktr->capture_area_x_size * 4096
4328 / fp->scaled_htotal / bktr->cols) - 4096;
4329 else
4330 temp = ((quad_t ) fp->htotal* (quad_t) fp->scaled_hactive * 4096
4331 / fp->scaled_htotal / bktr->cols) - 4096;
4332
4333 /* printf("HSCALE value is %d\n",temp); */
4334 bt848->e_hscale_lo = temp & 0xff;
4335 bt848->o_hscale_lo = temp & 0xff;
4336 bt848->e_hscale_hi = (temp >> 8) & 0xff;
4337 bt848->o_hscale_hi = (temp >> 8) & 0xff;
4338
4339 /* horizontal active */
4340 temp = bktr->cols;
4341 /* printf("HACTIVE value is %d\n",temp); */
4342 bt848->e_hactive_lo = temp & 0xff;
4343 bt848->o_hactive_lo = temp & 0xff;
4344 bt848->e_crop &= ~0x3;
4345 bt848->o_crop &= ~0x3;
4346 bt848->e_crop |= (temp >> 8) & 0x3;
4347 bt848->o_crop |= (temp >> 8) & 0x3;
4348
4349 /* horizontal delay */
4350 if (bktr->capture_area_enabled)
4351 temp = ( (fp->hdelay* fp->scaled_hactive + bktr->capture_area_x_offset* fp->scaled_htotal)
4352 * bktr->cols) / (bktr->capture_area_x_size * fp->hactive);
4353 else
4354 temp = (fp->hdelay * bktr->cols) / fp->hactive;
4355
4356 temp = temp & 0x3fe;
4357
4358 /* printf("HDELAY value is %d\n",temp); */
4359 bt848->e_delay_lo = temp & 0xff;
4360 bt848->o_delay_lo = temp & 0xff;
4361 bt848->e_crop &= ~0xc;
4362 bt848->o_crop &= ~0xc;
4363 bt848->e_crop |= (temp >> 6) & 0xc;
4364 bt848->o_crop |= (temp >> 6) & 0xc;
4365
4366 /* vertical scale */
4367
4368 if (bktr->capture_area_enabled) {
4369 if (bktr->flags & METEOR_ONLY_ODD_FIELDS ||
4370 bktr->flags & METEOR_ONLY_EVEN_FIELDS)
4371 tmp_int = 65536 -
4372 (((bktr->capture_area_y_size * 256 + (bktr->rows/2)) / bktr->rows) - 512);
4373 else {
4374 tmp_int = 65536 -
4375 (((bktr->capture_area_y_size * 512 + (bktr->rows / 2)) / bktr->rows) - 512);
4376 }
4377 } else {
4378 if (bktr->flags & METEOR_ONLY_ODD_FIELDS ||
4379 bktr->flags & METEOR_ONLY_EVEN_FIELDS)
4380 tmp_int = 65536 -
4381 (((fp->vactive * 256 + (bktr->rows/2)) / bktr->rows) - 512);
4382 else {
4383 tmp_int = 65536 -
4384 (((fp->vactive * 512 + (bktr->rows / 2)) / bktr->rows) - 512);
4385 }
4386 }
4387
4388 tmp_int &= 0x1fff;
4389 /* printf("VSCALE value is %d\n",tmp_int); */
4390 bt848->e_vscale_lo = tmp_int & 0xff;
4391 bt848->o_vscale_lo = tmp_int & 0xff;
4392 bt848->e_vscale_hi &= ~0x1f;
4393 bt848->o_vscale_hi &= ~0x1f;
4394 bt848->e_vscale_hi |= (tmp_int >> 8) & 0x1f;
4395 bt848->o_vscale_hi |= (tmp_int >> 8) & 0x1f;
4396
4397
4398 /* vertical active */
4399 if (bktr->capture_area_enabled)
4400 temp = bktr->capture_area_y_size;
4401 else
4402 temp = fp->vactive;
4403 /* printf("VACTIVE is %d\n",temp); */
4404 bt848->e_crop &= ~0x30;
4405 bt848->e_crop |= (temp >> 4) & 0x30;
4406 bt848->e_vactive_lo = temp & 0xff;
4407 bt848->o_crop &= ~0x30;
4408 bt848->o_crop |= (temp >> 4) & 0x30;
4409 bt848->o_vactive_lo = temp & 0xff;
4410
4411 /* vertical delay */
4412 if (bktr->capture_area_enabled)
4413 temp = fp->vdelay + (bktr->capture_area_y_offset);
4414 else
4415 temp = fp->vdelay;
4416 /* printf("VDELAY is %d\n",temp); */
4417 bt848->e_crop &= ~0xC0;
4418 bt848->e_crop |= (temp >> 2) & 0xC0;
4419 bt848->e_vdelay_lo = temp & 0xff;
4420 bt848->o_crop &= ~0xC0;
4421 bt848->o_crop |= (temp >> 2) & 0xC0;
4422 bt848->o_vdelay_lo = temp & 0xff;
4423
4424 /* end of video params */
4425
4426 if ((bktr->xtal_pll_mode == BT848_USE_PLL)
4427 && (fp->iform_xtsel==BT848_IFORM_X_XT1)) {
4428 bt848->tgctrl=8; /* Select PLL mode */
4429 } else {
4430 bt848->tgctrl=0; /* Select Normal xtal 0/xtal 1 mode */
4431 }
4432
4433 /* capture control */
4434 switch (i_flag) {
4435 case 1:
4436 bktr->bktr_cap_ctl =
4437 (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_EVEN);
4438 bt848->e_vscale_hi &= ~0x20;
4439 bt848->o_vscale_hi &= ~0x20;
4440 interlace = 1;
4441 break;
4442 case 2:
4443 bktr->bktr_cap_ctl =
4444 (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_ODD);
4445 bt848->e_vscale_hi &= ~0x20;
4446 bt848->o_vscale_hi &= ~0x20;
4447 interlace = 1;
4448 break;
4449 default:
4450 bktr->bktr_cap_ctl =
4451 (BT848_CAP_CTL_DITH_FRAME |
4452 BT848_CAP_CTL_EVEN | BT848_CAP_CTL_ODD);
4453 bt848->e_vscale_hi |= 0x20;
4454 bt848->o_vscale_hi |= 0x20;
4455 interlace = 2;
4456 break;
4457 }
4458
4459 bt848->risc_strt_add = vtophys(bktr->dma_prog);
4460
4461 rows = bktr->rows;
4462 cols = bktr->cols;
4463
4464 bktr->vbiflags &= ~VBI_CAPTURE; /* default - no vbi capture */
4465
4466 /* If /dev/vbi is already open, then use the rgb_vbi RISC program */
4467 if ( (pf_int->public.type == METEOR_PIXTYPE_RGB)
4468 &&(bktr->vbiflags & VBI_OPEN) ) {
4469 if (i_flag==1) bktr->bktr_cap_ctl |= BT848_CAP_CTL_VBI_EVEN;
4470 if (i_flag==2) bktr->bktr_cap_ctl |= BT848_CAP_CTL_VBI_ODD;
4471 if (i_flag==3) bktr->bktr_cap_ctl |=
4472 BT848_CAP_CTL_VBI_EVEN | BT848_CAP_CTL_VBI_ODD;
4473 bktr->bktr_cap_ctl |=
4474 BT848_CAP_CTL_VBI_EVEN | BT848_CAP_CTL_VBI_ODD;
4475 bktr->vbiflags |= VBI_CAPTURE;
4476 rgb_vbi_prog(bktr, i_flag, cols, rows, interlace);
4477 return;
4478 }
4479
4480 if ( pf_int->public.type == METEOR_PIXTYPE_RGB ) {
4481 rgb_prog(bktr, i_flag, cols, rows, interlace);
4482 return;
4483 }
4484
4485 if ( pf_int->public.type == METEOR_PIXTYPE_YUV ) {
4486 yuv422_prog(bktr, i_flag, cols, rows, interlace);
4487 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
4488 return;
4489 }
4490
4491 if ( pf_int->public.type == METEOR_PIXTYPE_YUV_PACKED ) {
4492 yuvpack_prog(bktr, i_flag, cols, rows, interlace);
4493 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
4494 return;
4495 }
4496
4497 if ( pf_int->public.type == METEOR_PIXTYPE_YUV_12 ) {
4498 yuv12_prog(bktr, i_flag, cols, rows, interlace);
4499 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
4500 return;
4501 }
4502 return;
4503}
4504
4505
4506/******************************************************************************
4507 * video & video capture specific routines:
4508 */
4509
4510
4511/*
4512 *
4513 */
4514static void
4515start_capture( bktr_ptr_t bktr, unsigned type )
4516{
4517 bt848_ptr_t bt848;
4518 u_char i_flag;
4519 struct format_params *fp;
4520
4521 fp = &format_params[bktr->format_params];
4522
4523 /* If requested, clear out capture buf first */
4524 if (bktr->clr_on_start && (bktr->video.addr == 0)) {
4525 bzero((caddr_t)bktr->bigbuf,
4526 (size_t)bktr->rows * bktr->cols * bktr->frames *
4527 pixfmt_table[ bktr->pixfmt ].public.Bpp);
4528 }
4529
4530 bt848 = bktr->base;
4531
4532 bt848->dstatus = 0;
4533 bt848->int_stat = bt848->int_stat;
4534
4535 bktr->flags |= type;
4536 bktr->flags &= ~METEOR_WANT_MASK;
4537 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
4538 case METEOR_ONLY_EVEN_FIELDS:
4539 bktr->flags |= METEOR_WANT_EVEN;
4540 i_flag = 1;
4541 break;
4542 case METEOR_ONLY_ODD_FIELDS:
4543 bktr->flags |= METEOR_WANT_ODD;
4544 i_flag = 2;
4545 break;
4546 default:
4547 bktr->flags |= METEOR_WANT_MASK;
4548 i_flag = 3;
4549 break;
4550 }
4551
4552 /* TDEC is only valid for continuous captures */
4553 if ( type == METEOR_SINGLE ) {
4554 u_short fps_save = bktr->fps;
4555
4556 set_fps(bktr, fp->frame_rate);
4557 bktr->fps = fps_save;
4558 }
4559 else
4560 set_fps(bktr, bktr->fps);
4561
4562 if (bktr->dma_prog_loaded == FALSE) {
4563 build_dma_prog(bktr, i_flag);
4564 bktr->dma_prog_loaded = TRUE;
4565 }
4566
4567
4568 bt848->risc_strt_add = vtophys(bktr->dma_prog);
4569
4570}
4571
4572
4573/*
4574 *
4575 */
4576static void
4577set_fps( bktr_ptr_t bktr, u_short fps )
4578{
4579 bt848_ptr_t bt848;
4580 struct format_params *fp;
4581 int i_flag;
4582
4583 fp = &format_params[bktr->format_params];
4584
4585 bt848 = bktr->base;
4586
4587 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
4588 case METEOR_ONLY_EVEN_FIELDS:
4589 bktr->flags |= METEOR_WANT_EVEN;
4590 i_flag = 1;
4591 break;
4592 case METEOR_ONLY_ODD_FIELDS:
4593 bktr->flags |= METEOR_WANT_ODD;
4594 i_flag = 1;
4595 break;
4596 default:
4597 bktr->flags |= METEOR_WANT_MASK;
4598 i_flag = 2;
4599 break;
4600 }
4601
4602 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
4603 bt848->int_stat = ALL_INTS_CLEARED;
4604
4605 bktr->fps = fps;
4606 bt848->tdec = 0;
4607
4608 if (fps < fp->frame_rate)
4609 bt848->tdec = i_flag*(fp->frame_rate - fps) & 0x3f;
4610 else
4611 bt848->tdec = 0;
4612 return;
4613
4614}
4615
4616
4617
4618
4619
4620/*
4621 * Given a pixfmt index, compute the bt848 swap_flags necessary to
4622 * achieve the specified swapping.
4623 * Note that without bt swapping, 2Bpp and 3Bpp modes are written
4624 * byte-swapped, and 4Bpp modes are byte and word swapped (see Table 6
4625 * and read R->L).
4626 * Note also that for 3Bpp, we may additionally need to do some creative
4627 * SKIPing to align the FIFO bytelines with the target buffer (see split()).
4628 * This is abstracted here: e.g. no swaps = RGBA; byte & short swap = ABGR
4629 * as one would expect.
4630 */
4631
4632static u_int pixfmt_swap_flags( int pixfmt )
4633{
4634 struct meteor_pixfmt *pf = &pixfmt_table[ pixfmt ].public;
4635 u_int swapf = 0;
4636
4637 switch ( pf->Bpp ) {
4638 case 2 : swapf = ( pf->swap_bytes ? 0 : BSWAP );
4639 break;
4640
4641 case 3 : /* no swaps supported for 3bpp - makes no sense w/ bt848 */
4642 break;
4643
4644 case 4 : if ( pf->swap_bytes )
4645 swapf = pf->swap_shorts ? 0 : WSWAP;
4646 else
4647 swapf = pf->swap_shorts ? BSWAP : (BSWAP | WSWAP);
4648 break;
4649 }
4650 return swapf;
4651}
4652
4653
4654
4655/*
4656 * Converts meteor-defined pixel formats (e.g. METEOR_GEO_RGB16) into
4657 * our pixfmt_table indices.
4658 */
4659
4660static int oformat_meteor_to_bt( u_long format )
4661{
4662 int i;
4663 struct meteor_pixfmt *pf1, *pf2;
4664
4665 /* Find format in compatibility table */
4666 for ( i = 0; i < METEOR_PIXFMT_TABLE_SIZE; i++ )
4667 if ( meteor_pixfmt_table[i].meteor_format == format )
4668 break;
4669
4670 if ( i >= METEOR_PIXFMT_TABLE_SIZE )
4671 return -1;
4672 pf1 = &meteor_pixfmt_table[i].public;
4673
4674 /* Match it with an entry in master pixel format table */
4675 for ( i = 0; i < PIXFMT_TABLE_SIZE; i++ ) {
4676 pf2 = &pixfmt_table[i].public;
4677
4678 if (( pf1->type == pf2->type ) &&
4679 ( pf1->Bpp == pf2->Bpp ) &&
4680 !bcmp( pf1->masks, pf2->masks, sizeof( pf1->masks )) &&
4681 ( pf1->swap_bytes == pf2->swap_bytes ) &&
4682 ( pf1->swap_shorts == pf2->swap_shorts ))
4683 break;
4684 }
4685 if ( i >= PIXFMT_TABLE_SIZE )
4686 return -1;
4687
4688 return i;
4689}
4690
4691/******************************************************************************
4692 * i2c primitives:
4693 */
4694
4695/* */
4696#define I2CBITTIME (0x5<<4) /* 5 * 0.48uS */
4697#define I2CBITTIME_878 (1 << 7)
4698#define I2C_READ 0x01
4699#define I2C_COMMAND (I2CBITTIME | \
4700 BT848_DATA_CTL_I2CSCL | \
4701 BT848_DATA_CTL_I2CSDA)
4702
4703#define I2C_COMMAND_878 (I2CBITTIME_878 | \
4704 BT848_DATA_CTL_I2CSCL | \
4705 BT848_DATA_CTL_I2CSDA)
4706
4707/* Select between old i2c code and new iicbus / smbus code */
4708#if (defined(__FreeBSD__) && (NSMBUS > 0))
4709
4710/*
4711 * The hardware interface is actually SMB commands
4712 */
| 2592 32 bit RISC instructions */
2593 volatile u_long *loop_point;
2594 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
2595 u_int Bpp = pf_int->public.Bpp;
2596 unsigned int vbisamples; /* VBI samples per line */
2597 unsigned int vbilines; /* VBI lines per field */
2598 unsigned int num_dwords; /* DWORDS per line */
2599
2600 vbisamples = format_params[bktr->format_params].vbi_num_samples;
2601 vbilines = format_params[bktr->format_params].vbi_num_lines;
2602 num_dwords = vbisamples/4;
2603
2604 bt848 = bktr->base;
2605
2606 bt848->color_fmt = pf_int->color_fmt;
2607 bt848->adc = SYNC_LEVEL;
2608 bt848->vbi_pack_size = ((num_dwords)) & 0xff;
2609 bt848->vbi_pack_del = ((num_dwords)>> 8) & 0x01; /* no hdelay */
2610 /* no ext frame */
2611
2612 bt848->oform = 0x00;
2613
2614 bt848->e_vscale_hi |= 0x40; /* set chroma comb */
2615 bt848->o_vscale_hi |= 0x40;
2616 bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */
2617 bt848->o_vscale_hi &= ~0x80;
2618
2619 /* disable gamma correction removal */
2620 bt848->color_ctl_gamma = 1;
2621
2622
2623 if (cols > 385 ) {
2624 bt848->e_vtc = 0;
2625 bt848->o_vtc = 0;
2626 } else {
2627 bt848->e_vtc = 1;
2628 bt848->o_vtc = 1;
2629 }
2630 bktr->capcontrol = 3 << 2 | 3;
2631
2632 dma_prog = (u_long *) bktr->dma_prog;
2633
2634 /* Construct Write */
2635
2636 if (bktr->video.addr) {
2637 target_buffer = (u_long) bktr->video.addr;
2638 pitch = bktr->video.width;
2639 }
2640 else {
2641 target_buffer = (u_long) vtophys(bktr->bigbuf);
2642 pitch = cols*Bpp;
2643 }
2644
2645 buffer = target_buffer;
2646
2647 /* Wait for the VRE sync marking the end of the Even and
2648 * the start of the Odd field. Resync here.
2649 */
2650 *dma_prog++ = OP_SYNC | BKTR_RESYNC |BKTR_VRE;
2651 *dma_prog++ = 0;
2652
2653 loop_point = dma_prog;
2654
2655 /* store the VBI data */
2656 /* look for sync with packed data */
2657 *dma_prog++ = OP_SYNC | BKTR_FM1;
2658 *dma_prog++ = 0;
2659 for(i = 0; i < vbilines; i++) {
2660 *dma_prog++ = OP_WRITE | OP_SOL | OP_EOL | vbisamples;
2661 *dma_prog++ = (u_long) vtophys(bktr->vbidata +
2662 (i * VBI_LINE_SIZE));
2663 }
2664
2665 if ( (i_flag == 2/*Odd*/) || (i_flag==3) /*interlaced*/ ) {
2666 /* store the Odd field video image */
2667 /* look for sync with packed data */
2668 *dma_prog++ = OP_SYNC | BKTR_FM1;
2669 *dma_prog++ = 0; /* NULL WORD */
2670 width = cols;
2671 for (i = 0; i < (rows/interlace); i++) {
2672 target = target_buffer;
2673 if ( notclipped(bktr, i, width)) {
2674 split(bktr, (volatile u_long **) &dma_prog,
2675 bktr->y2 - bktr->y, OP_WRITE,
2676 Bpp, (volatile u_char **) &target, cols);
2677
2678 } else {
2679 while(getline(bktr, i)) {
2680 if (bktr->y != bktr->y2 ) {
2681 split(bktr, (volatile u_long **) &dma_prog,
2682 bktr->y2 - bktr->y, OP_WRITE,
2683 Bpp, (volatile u_char **) &target, cols);
2684 }
2685 if (bktr->yclip != bktr->yclip2 ) {
2686 split(bktr,(volatile u_long **) &dma_prog,
2687 bktr->yclip2 - bktr->yclip,
2688 OP_SKIP,
2689 Bpp, (volatile u_char **) &target, cols);
2690 }
2691 }
2692
2693 }
2694
2695 target_buffer += interlace * pitch;
2696
2697 }
2698
2699 } /* end if */
2700
2701 /* Grab the Even field */
2702 /* Look for the VRO, end of Odd field, marker */
2703 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
2704 *dma_prog++ = 0; /* NULL WORD */
2705
2706 /* store the VBI data */
2707 /* look for sync with packed data */
2708 *dma_prog++ = OP_SYNC | BKTR_FM1;
2709 *dma_prog++ = 0;
2710 for(i = 0; i < vbilines; i++) {
2711 *dma_prog++ = OP_WRITE | OP_SOL | OP_EOL | vbisamples;
2712 *dma_prog++ = (u_long) vtophys(bktr->vbidata +
2713 ((i+MAX_VBI_LINES) * VBI_LINE_SIZE));
2714 }
2715
2716 /* store the video image */
2717 if (i_flag == 1) /*Even Only*/
2718 target_buffer = buffer;
2719 if (i_flag == 3) /*interlaced*/
2720 target_buffer = buffer+pitch;
2721
2722
2723 if ((i_flag == 1) /*Even Only*/ || (i_flag==3) /*interlaced*/) {
2724 /* look for sync with packed data */
2725 *dma_prog++ = OP_SYNC | BKTR_FM1;
2726 *dma_prog++ = 0; /* NULL WORD */
2727 width = cols;
2728 for (i = 0; i < (rows/interlace); i++) {
2729 target = target_buffer;
2730 if ( notclipped(bktr, i, width)) {
2731 split(bktr, (volatile u_long **) &dma_prog,
2732 bktr->y2 - bktr->y, OP_WRITE,
2733 Bpp, (volatile u_char **) &target, cols);
2734 } else {
2735 while(getline(bktr, i)) {
2736 if (bktr->y != bktr->y2 ) {
2737 split(bktr, (volatile u_long **) &dma_prog,
2738 bktr->y2 - bktr->y, OP_WRITE,
2739 Bpp, (volatile u_char **) &target,
2740 cols);
2741 }
2742 if (bktr->yclip != bktr->yclip2 ) {
2743 split(bktr, (volatile u_long **) &dma_prog,
2744 bktr->yclip2 - bktr->yclip, OP_SKIP,
2745 Bpp, (volatile u_char **) &target, cols);
2746 }
2747
2748 }
2749
2750 }
2751
2752 target_buffer += interlace * pitch;
2753
2754 }
2755 }
2756
2757 /* Look for end of 'Even Field' */
2758 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
2759 *dma_prog++ = 0; /* NULL WORD */
2760
2761 *dma_prog++ = OP_JUMP ;
2762 *dma_prog++ = (u_long ) vtophys(loop_point) ;
2763 *dma_prog++ = 0; /* NULL WORD */
2764
2765}
2766
2767
2768
2769
2770static void
2771rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
2772{
2773 int i;
2774 bt848_ptr_t bt848;
2775 volatile u_long target_buffer, buffer, target,width;
2776 volatile u_long pitch;
2777 volatile u_long *dma_prog;
2778 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
2779 u_int Bpp = pf_int->public.Bpp;
2780
2781 bt848 = bktr->base;
2782
2783 bt848->color_fmt = pf_int->color_fmt;
2784 bt848->vbi_pack_size = 0;
2785 bt848->vbi_pack_del = 0;
2786 bt848->adc = SYNC_LEVEL;
2787
2788 bt848->oform = 0x00;
2789
2790 bt848->e_vscale_hi |= 0x40; /* set chroma comb */
2791 bt848->o_vscale_hi |= 0x40;
2792 bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */
2793 bt848->o_vscale_hi &= ~0x80;
2794
2795 /* disable gamma correction removal */
2796 bt848->color_ctl_gamma = 1;
2797
2798
2799 if (cols > 385 ) {
2800 bt848->e_vtc = 0;
2801 bt848->o_vtc = 0;
2802 } else {
2803 bt848->e_vtc = 1;
2804 bt848->o_vtc = 1;
2805 }
2806 bktr->capcontrol = 3 << 2 | 3;
2807
2808 dma_prog = (u_long *) bktr->dma_prog;
2809
2810 /* Construct Write */
2811
2812 if (bktr->video.addr) {
2813 target_buffer = (u_long) bktr->video.addr;
2814 pitch = bktr->video.width;
2815 }
2816 else {
2817 target_buffer = (u_long) vtophys(bktr->bigbuf);
2818 pitch = cols*Bpp;
2819 }
2820
2821 buffer = target_buffer;
2822
2823 /* contruct sync : for video packet format */
2824 *dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM1;
2825
2826 /* sync, mode indicator packed data */
2827 *dma_prog++ = 0; /* NULL WORD */
2828 width = cols;
2829 for (i = 0; i < (rows/interlace); i++) {
2830 target = target_buffer;
2831 if ( notclipped(bktr, i, width)) {
2832 split(bktr, (volatile u_long **) &dma_prog,
2833 bktr->y2 - bktr->y, OP_WRITE,
2834 Bpp, (volatile u_char **) &target, cols);
2835
2836 } else {
2837 while(getline(bktr, i)) {
2838 if (bktr->y != bktr->y2 ) {
2839 split(bktr, (volatile u_long **) &dma_prog,
2840 bktr->y2 - bktr->y, OP_WRITE,
2841 Bpp, (volatile u_char **) &target, cols);
2842 }
2843 if (bktr->yclip != bktr->yclip2 ) {
2844 split(bktr,(volatile u_long **) &dma_prog,
2845 bktr->yclip2 - bktr->yclip,
2846 OP_SKIP,
2847 Bpp, (volatile u_char **) &target, cols);
2848 }
2849 }
2850
2851 }
2852
2853 target_buffer += interlace * pitch;
2854
2855 }
2856
2857 switch (i_flag) {
2858 case 1:
2859 /* sync vre */
2860 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO;
2861 *dma_prog++ = 0; /* NULL WORD */
2862
2863 *dma_prog++ = OP_JUMP;
2864 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
2865 return;
2866
2867 case 2:
2868 /* sync vro */
2869 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE;
2870 *dma_prog++ = 0; /* NULL WORD */
2871
2872 *dma_prog++ = OP_JUMP;
2873 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
2874 return;
2875
2876 case 3:
2877 /* sync vro */
2878 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
2879 *dma_prog++ = 0; /* NULL WORD */
2880 *dma_prog++ = OP_JUMP; ;
2881 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
2882 break;
2883 }
2884
2885 if (interlace == 2) {
2886
2887 target_buffer = buffer + pitch;
2888
2889 dma_prog = (u_long *) bktr->odd_dma_prog;
2890
2891 /* sync vre IRQ bit */
2892 *dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM1;
2893 *dma_prog++ = 0; /* NULL WORD */
2894 width = cols;
2895 for (i = 0; i < (rows/interlace); i++) {
2896 target = target_buffer;
2897 if ( notclipped(bktr, i, width)) {
2898 split(bktr, (volatile u_long **) &dma_prog,
2899 bktr->y2 - bktr->y, OP_WRITE,
2900 Bpp, (volatile u_char **) &target, cols);
2901 } else {
2902 while(getline(bktr, i)) {
2903 if (bktr->y != bktr->y2 ) {
2904 split(bktr, (volatile u_long **) &dma_prog,
2905 bktr->y2 - bktr->y, OP_WRITE,
2906 Bpp, (volatile u_char **) &target,
2907 cols);
2908 }
2909 if (bktr->yclip != bktr->yclip2 ) {
2910 split(bktr, (volatile u_long **) &dma_prog,
2911 bktr->yclip2 - bktr->yclip, OP_SKIP,
2912 Bpp, (volatile u_char **) &target, cols);
2913 }
2914
2915 }
2916
2917 }
2918
2919 target_buffer += interlace * pitch;
2920
2921 }
2922 }
2923
2924 /* sync vre IRQ bit */
2925 *dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
2926 *dma_prog++ = 0; /* NULL WORD */
2927 *dma_prog++ = OP_JUMP ;
2928 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ;
2929 *dma_prog++ = 0; /* NULL WORD */
2930}
2931
2932
2933/*
2934 *
2935 */
2936static void
2937yuvpack_prog( bktr_ptr_t bktr, char i_flag,
2938 int cols, int rows, int interlace )
2939{
2940 int i;
2941 volatile unsigned int inst;
2942 volatile unsigned int inst3;
2943 volatile u_long target_buffer, buffer;
2944 bt848_ptr_t bt848;
2945 volatile u_long *dma_prog;
2946 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
2947 int b;
2948
2949 bt848 = bktr->base;
2950
2951 bt848->color_fmt = pf_int->color_fmt;
2952
2953 bt848->e_scloop |= BT848_E_SCLOOP_CAGC; /* enable chroma comb */
2954 bt848->o_scloop |= BT848_O_SCLOOP_CAGC;
2955
2956 bt848->color_ctl_rgb_ded = 1;
2957 bt848->color_ctl_gamma = 1;
2958 bt848->adc = SYNC_LEVEL;
2959
2960 bktr->capcontrol = 1 << 6 | 1 << 4 | 1 << 2 | 3;
2961 bktr->capcontrol = 3 << 2 | 3;
2962
2963 dma_prog = (u_long *) bktr->dma_prog;
2964
2965 /* Construct Write */
2966
2967 /* write , sol, eol */
2968 inst = OP_WRITE | OP_SOL | (cols);
2969 /* write , sol, eol */
2970 inst3 = OP_WRITE | OP_EOL | (cols);
2971
2972 if (bktr->video.addr)
2973 target_buffer = (u_long) bktr->video.addr;
2974 else
2975 target_buffer = (u_long) vtophys(bktr->bigbuf);
2976
2977 buffer = target_buffer;
2978
2979 /* contruct sync : for video packet format */
2980 /* sync, mode indicator packed data */
2981 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM1;
2982 *dma_prog++ = 0; /* NULL WORD */
2983
2984 b = cols;
2985
2986 for (i = 0; i < (rows/interlace); i++) {
2987 *dma_prog++ = inst;
2988 *dma_prog++ = target_buffer;
2989 *dma_prog++ = inst3;
2990 *dma_prog++ = target_buffer + b;
2991 target_buffer += interlace*(cols * 2);
2992 }
2993
2994 switch (i_flag) {
2995 case 1:
2996 /* sync vre */
2997 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE;
2998 *dma_prog++ = 0; /* NULL WORD */
2999
3000 *dma_prog++ = OP_JUMP;
3001 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3002 return;
3003
3004 case 2:
3005 /* sync vro */
3006 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO;
3007 *dma_prog++ = 0; /* NULL WORD */
3008 *dma_prog++ = OP_JUMP;
3009 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3010 return;
3011
3012 case 3:
3013 /* sync vro */
3014 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO;
3015 *dma_prog++ = 0; /* NULL WORD */
3016 *dma_prog++ = OP_JUMP ;
3017 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
3018 break;
3019 }
3020
3021 if (interlace == 2) {
3022
3023 target_buffer = (u_long) buffer + cols*2;
3024
3025 dma_prog = (u_long * ) bktr->odd_dma_prog;
3026
3027 /* sync vre */
3028 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_FM1;
3029 *dma_prog++ = 0; /* NULL WORD */
3030
3031 for (i = 0; i < (rows/interlace) ; i++) {
3032 *dma_prog++ = inst;
3033 *dma_prog++ = target_buffer;
3034 *dma_prog++ = inst3;
3035 *dma_prog++ = target_buffer + b;
3036 target_buffer += interlace * ( cols*2);
3037 }
3038 }
3039
3040 /* sync vro IRQ bit */
3041 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE;
3042 *dma_prog++ = 0; /* NULL WORD */
3043 *dma_prog++ = OP_JUMP ;
3044 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3045
3046 *dma_prog++ = OP_JUMP;
3047 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3048 *dma_prog++ = 0; /* NULL WORD */
3049}
3050
3051
3052/*
3053 *
3054 */
3055static void
3056yuv422_prog( bktr_ptr_t bktr, char i_flag,
3057 int cols, int rows, int interlace ){
3058
3059 int i;
3060 volatile unsigned int inst;
3061 volatile u_long target_buffer, t1, buffer;
3062 bt848_ptr_t bt848;
3063 volatile u_long *dma_prog;
3064 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
3065
3066 bt848 = bktr->base;
3067
3068 bt848->color_fmt = pf_int->color_fmt;
3069
3070 dma_prog = (u_long *) bktr->dma_prog;
3071
3072 bktr->capcontrol = 1 << 6 | 1 << 4 | 3;
3073
3074 bt848->adc = SYNC_LEVEL;
3075 bt848->oform = 0x00;
3076
3077 bt848->e_control |= BT848_E_CONTROL_LDEC; /* disable luma decimation */
3078 bt848->o_control |= BT848_O_CONTROL_LDEC;
3079
3080 bt848->e_scloop |= BT848_O_SCLOOP_CAGC; /* chroma agc enable */
3081 bt848->o_scloop |= BT848_O_SCLOOP_CAGC;
3082
3083 bt848->e_vscale_hi &= ~0x80; /* clear Ycomb */
3084 bt848->o_vscale_hi &= ~0x80;
3085 bt848->e_vscale_hi |= 0x40; /* set chroma comb */
3086 bt848->o_vscale_hi |= 0x40;
3087
3088 /* disable gamma correction removal */
3089 bt848->color_ctl_gamma = 1;
3090
3091 /* Construct Write */
3092 inst = OP_WRITE123 | OP_SOL | OP_EOL | (cols);
3093 if (bktr->video.addr)
3094 target_buffer = (u_long) bktr->video.addr;
3095 else
3096 target_buffer = (u_long) vtophys(bktr->bigbuf);
3097
3098 buffer = target_buffer;
3099
3100 t1 = buffer;
3101
3102 /* contruct sync : for video packet format */
3103 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; /*sync, mode indicator packed data*/
3104 *dma_prog++ = 0; /* NULL WORD */
3105
3106 for (i = 0; i < (rows/interlace ) ; i++) {
3107 *dma_prog++ = inst;
3108 *dma_prog++ = cols/2 | cols/2 << 16;
3109 *dma_prog++ = target_buffer;
3110 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
3111 *dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace;
3112 target_buffer += interlace*cols;
3113 }
3114
3115 switch (i_flag) {
3116 case 1:
3117 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; /*sync vre*/
3118 *dma_prog++ = 0; /* NULL WORD */
3119
3120 *dma_prog++ = OP_JUMP ;
3121 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3122 return;
3123
3124 case 2:
3125 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; /*sync vre*/
3126 *dma_prog++ = 0; /* NULL WORD */
3127
3128 *dma_prog++ = OP_JUMP;
3129 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3130 return;
3131
3132 case 3:
3133 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO;
3134 *dma_prog++ = 0; /* NULL WORD */
3135
3136 *dma_prog++ = OP_JUMP ;
3137 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
3138 break;
3139 }
3140
3141 if (interlace == 2) {
3142
3143 dma_prog = (u_long * ) bktr->odd_dma_prog;
3144
3145 target_buffer = (u_long) buffer + cols;
3146 t1 = buffer + cols/2;
3147 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3;
3148 *dma_prog++ = 0; /* NULL WORD */
3149
3150 for (i = 0; i < (rows/interlace ) ; i++) {
3151 *dma_prog++ = inst;
3152 *dma_prog++ = cols/2 | cols/2 << 16;
3153 *dma_prog++ = target_buffer;
3154 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
3155 *dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace;
3156 target_buffer += interlace*cols;
3157 }
3158 }
3159
3160 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE;
3161 *dma_prog++ = 0; /* NULL WORD */
3162 *dma_prog++ = OP_JUMP ;
3163 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ;
3164 *dma_prog++ = 0; /* NULL WORD */
3165}
3166
3167
3168/*
3169 *
3170 */
3171static void
3172yuv12_prog( bktr_ptr_t bktr, char i_flag,
3173 int cols, int rows, int interlace ){
3174
3175 int i;
3176 volatile unsigned int inst;
3177 volatile unsigned int inst1;
3178 volatile u_long target_buffer, t1, buffer;
3179 bt848_ptr_t bt848;
3180 volatile u_long *dma_prog;
3181 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
3182
3183 bt848 = bktr->base;
3184
3185 bt848->color_fmt = pf_int->color_fmt;
3186
3187 dma_prog = (u_long *) bktr->dma_prog;
3188
3189 bktr->capcontrol = 1 << 6 | 1 << 4 | 3;
3190
3191 bt848->adc = SYNC_LEVEL;
3192 bt848->oform = 0x0;
3193
3194 /* Construct Write */
3195 inst = OP_WRITE123 | OP_SOL | OP_EOL | (cols);
3196 inst1 = OP_WRITES123 | OP_SOL | OP_EOL | (cols);
3197 if (bktr->video.addr)
3198 target_buffer = (u_long) bktr->video.addr;
3199 else
3200 target_buffer = (u_long) vtophys(bktr->bigbuf);
3201
3202 buffer = target_buffer;
3203 t1 = buffer;
3204
3205 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3; /*sync, mode indicator packed data*/
3206 *dma_prog++ = 0; /* NULL WORD */
3207
3208 for (i = 0; i < (rows/interlace )/2 ; i++) {
3209 *dma_prog++ = inst;
3210 *dma_prog++ = cols/2 | (cols/2 << 16);
3211 *dma_prog++ = target_buffer;
3212 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
3213 *dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace;
3214 target_buffer += interlace*cols;
3215 *dma_prog++ = inst1;
3216 *dma_prog++ = cols/2 | (cols/2 << 16);
3217 *dma_prog++ = target_buffer;
3218 target_buffer += interlace*cols;
3219
3220 }
3221
3222 switch (i_flag) {
3223 case 1:
3224 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRE; /*sync vre*/
3225 *dma_prog++ = 0; /* NULL WORD */
3226
3227 *dma_prog++ = OP_JUMP;
3228 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3229 return;
3230
3231 case 2:
3232 *dma_prog++ = OP_SYNC | 1 << 24 | BKTR_VRO; /*sync vro*/
3233 *dma_prog++ = 0; /* NULL WORD */
3234
3235 *dma_prog++ = OP_JUMP;
3236 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3237 return;
3238
3239 case 3:
3240 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRO;
3241 *dma_prog++ = 0; /* NULL WORD */
3242 *dma_prog++ = OP_JUMP ;
3243 *dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
3244 break;
3245 }
3246
3247 if (interlace == 2) {
3248
3249 dma_prog = (u_long * ) bktr->odd_dma_prog;
3250
3251 target_buffer = (u_long) buffer + cols;
3252 t1 = buffer + cols/2;
3253 *dma_prog++ = OP_SYNC | 1 << 15 | BKTR_FM3;
3254 *dma_prog++ = 0; /* NULL WORD */
3255
3256 for (i = 0; i < ((rows/interlace )/2 ) ; i++) {
3257 *dma_prog++ = inst;
3258 *dma_prog++ = cols/2 | (cols/2 << 16);
3259 *dma_prog++ = target_buffer;
3260 *dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
3261 *dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace;
3262 target_buffer += interlace*cols;
3263 *dma_prog++ = inst1;
3264 *dma_prog++ = cols/2 | (cols/2 << 16);
3265 *dma_prog++ = target_buffer;
3266 target_buffer += interlace*cols;
3267
3268 }
3269
3270
3271 }
3272
3273 *dma_prog++ = OP_SYNC | 1 << 24 | 1 << 15 | BKTR_VRE;
3274 *dma_prog++ = 0; /* NULL WORD */
3275 *dma_prog++ = OP_JUMP;
3276 *dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
3277 *dma_prog++ = 0; /* NULL WORD */
3278}
3279
3280
3281
3282/*
3283 *
3284 */
3285static void
3286build_dma_prog( bktr_ptr_t bktr, char i_flag )
3287{
3288 int rows, cols, interlace;
3289 bt848_ptr_t bt848;
3290 int tmp_int;
3291 unsigned int temp;
3292 struct format_params *fp;
3293 struct meteor_pixfmt_internal *pf_int = &pixfmt_table[ bktr->pixfmt ];
3294
3295
3296 fp = &format_params[bktr->format_params];
3297
3298 bt848 = bktr->base;
3299 bt848->int_mask = ALL_INTS_DISABLED;
3300
3301 /* disable FIFO & RISC, leave other bits alone */
3302 bt848->gpio_dma_ctl &= ~FIFO_RISC_ENABLED;
3303
3304 /* set video parameters */
3305 if (bktr->capture_area_enabled)
3306 temp = ((quad_t ) fp->htotal* (quad_t) bktr->capture_area_x_size * 4096
3307 / fp->scaled_htotal / bktr->cols) - 4096;
3308 else
3309 temp = ((quad_t ) fp->htotal* (quad_t) fp->scaled_hactive * 4096
3310 / fp->scaled_htotal / bktr->cols) - 4096;
3311
3312 /* printf("HSCALE value is %d\n",temp); */
3313 bt848->e_hscale_lo = temp & 0xff;
3314 bt848->o_hscale_lo = temp & 0xff;
3315 bt848->e_hscale_hi = (temp >> 8) & 0xff;
3316 bt848->o_hscale_hi = (temp >> 8) & 0xff;
3317
3318 /* horizontal active */
3319 temp = bktr->cols;
3320 /* printf("HACTIVE value is %d\n",temp); */
3321 bt848->e_hactive_lo = temp & 0xff;
3322 bt848->o_hactive_lo = temp & 0xff;
3323 bt848->e_crop &= ~0x3;
3324 bt848->o_crop &= ~0x3;
3325 bt848->e_crop |= (temp >> 8) & 0x3;
3326 bt848->o_crop |= (temp >> 8) & 0x3;
3327
3328 /* horizontal delay */
3329 if (bktr->capture_area_enabled)
3330 temp = ( (fp->hdelay* fp->scaled_hactive + bktr->capture_area_x_offset* fp->scaled_htotal)
3331 * bktr->cols) / (bktr->capture_area_x_size * fp->hactive);
3332 else
3333 temp = (fp->hdelay * bktr->cols) / fp->hactive;
3334
3335 temp = temp & 0x3fe;
3336
3337 /* printf("HDELAY value is %d\n",temp); */
3338 bt848->e_delay_lo = temp & 0xff;
3339 bt848->o_delay_lo = temp & 0xff;
3340 bt848->e_crop &= ~0xc;
3341 bt848->o_crop &= ~0xc;
3342 bt848->e_crop |= (temp >> 6) & 0xc;
3343 bt848->o_crop |= (temp >> 6) & 0xc;
3344
3345 /* vertical scale */
3346
3347 if (bktr->capture_area_enabled) {
3348 if (bktr->flags & METEOR_ONLY_ODD_FIELDS ||
3349 bktr->flags & METEOR_ONLY_EVEN_FIELDS)
3350 tmp_int = 65536 -
3351 (((bktr->capture_area_y_size * 256 + (bktr->rows/2)) / bktr->rows) - 512);
3352 else {
3353 tmp_int = 65536 -
3354 (((bktr->capture_area_y_size * 512 + (bktr->rows / 2)) / bktr->rows) - 512);
3355 }
3356 } else {
3357 if (bktr->flags & METEOR_ONLY_ODD_FIELDS ||
3358 bktr->flags & METEOR_ONLY_EVEN_FIELDS)
3359 tmp_int = 65536 -
3360 (((fp->vactive * 256 + (bktr->rows/2)) / bktr->rows) - 512);
3361 else {
3362 tmp_int = 65536 -
3363 (((fp->vactive * 512 + (bktr->rows / 2)) / bktr->rows) - 512);
3364 }
3365 }
3366
3367 tmp_int &= 0x1fff;
3368 /* printf("VSCALE value is %d\n",tmp_int); */
3369 bt848->e_vscale_lo = tmp_int & 0xff;
3370 bt848->o_vscale_lo = tmp_int & 0xff;
3371 bt848->e_vscale_hi &= ~0x1f;
3372 bt848->o_vscale_hi &= ~0x1f;
3373 bt848->e_vscale_hi |= (tmp_int >> 8) & 0x1f;
3374 bt848->o_vscale_hi |= (tmp_int >> 8) & 0x1f;
3375
3376
3377 /* vertical active */
3378 if (bktr->capture_area_enabled)
3379 temp = bktr->capture_area_y_size;
3380 else
3381 temp = fp->vactive;
3382 /* printf("VACTIVE is %d\n",temp); */
3383 bt848->e_crop &= ~0x30;
3384 bt848->e_crop |= (temp >> 4) & 0x30;
3385 bt848->e_vactive_lo = temp & 0xff;
3386 bt848->o_crop &= ~0x30;
3387 bt848->o_crop |= (temp >> 4) & 0x30;
3388 bt848->o_vactive_lo = temp & 0xff;
3389
3390 /* vertical delay */
3391 if (bktr->capture_area_enabled)
3392 temp = fp->vdelay + (bktr->capture_area_y_offset);
3393 else
3394 temp = fp->vdelay;
3395 /* printf("VDELAY is %d\n",temp); */
3396 bt848->e_crop &= ~0xC0;
3397 bt848->e_crop |= (temp >> 2) & 0xC0;
3398 bt848->e_vdelay_lo = temp & 0xff;
3399 bt848->o_crop &= ~0xC0;
3400 bt848->o_crop |= (temp >> 2) & 0xC0;
3401 bt848->o_vdelay_lo = temp & 0xff;
3402
3403 /* end of video params */
3404
3405 if ((bktr->xtal_pll_mode == BT848_USE_PLL)
3406 && (fp->iform_xtsel==BT848_IFORM_X_XT1)) {
3407 bt848->tgctrl=8; /* Select PLL mode */
3408 } else {
3409 bt848->tgctrl=0; /* Select Normal xtal 0/xtal 1 mode */
3410 }
3411
3412 /* capture control */
3413 switch (i_flag) {
3414 case 1:
3415 bktr->bktr_cap_ctl =
3416 (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_EVEN);
3417 bt848->e_vscale_hi &= ~0x20;
3418 bt848->o_vscale_hi &= ~0x20;
3419 interlace = 1;
3420 break;
3421 case 2:
3422 bktr->bktr_cap_ctl =
3423 (BT848_CAP_CTL_DITH_FRAME | BT848_CAP_CTL_ODD);
3424 bt848->e_vscale_hi &= ~0x20;
3425 bt848->o_vscale_hi &= ~0x20;
3426 interlace = 1;
3427 break;
3428 default:
3429 bktr->bktr_cap_ctl =
3430 (BT848_CAP_CTL_DITH_FRAME |
3431 BT848_CAP_CTL_EVEN | BT848_CAP_CTL_ODD);
3432 bt848->e_vscale_hi |= 0x20;
3433 bt848->o_vscale_hi |= 0x20;
3434 interlace = 2;
3435 break;
3436 }
3437
3438 bt848->risc_strt_add = vtophys(bktr->dma_prog);
3439
3440 rows = bktr->rows;
3441 cols = bktr->cols;
3442
3443 bktr->vbiflags &= ~VBI_CAPTURE; /* default - no vbi capture */
3444
3445 /* If /dev/vbi is already open, then use the rgb_vbi RISC program */
3446 if ( (pf_int->public.type == METEOR_PIXTYPE_RGB)
3447 &&(bktr->vbiflags & VBI_OPEN) ) {
3448 if (i_flag==1) bktr->bktr_cap_ctl |= BT848_CAP_CTL_VBI_EVEN;
3449 if (i_flag==2) bktr->bktr_cap_ctl |= BT848_CAP_CTL_VBI_ODD;
3450 if (i_flag==3) bktr->bktr_cap_ctl |=
3451 BT848_CAP_CTL_VBI_EVEN | BT848_CAP_CTL_VBI_ODD;
3452 bktr->bktr_cap_ctl |=
3453 BT848_CAP_CTL_VBI_EVEN | BT848_CAP_CTL_VBI_ODD;
3454 bktr->vbiflags |= VBI_CAPTURE;
3455 rgb_vbi_prog(bktr, i_flag, cols, rows, interlace);
3456 return;
3457 }
3458
3459 if ( pf_int->public.type == METEOR_PIXTYPE_RGB ) {
3460 rgb_prog(bktr, i_flag, cols, rows, interlace);
3461 return;
3462 }
3463
3464 if ( pf_int->public.type == METEOR_PIXTYPE_YUV ) {
3465 yuv422_prog(bktr, i_flag, cols, rows, interlace);
3466 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
3467 return;
3468 }
3469
3470 if ( pf_int->public.type == METEOR_PIXTYPE_YUV_PACKED ) {
3471 yuvpack_prog(bktr, i_flag, cols, rows, interlace);
3472 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
3473 return;
3474 }
3475
3476 if ( pf_int->public.type == METEOR_PIXTYPE_YUV_12 ) {
3477 yuv12_prog(bktr, i_flag, cols, rows, interlace);
3478 bt848->color_ctl_swap = pixfmt_swap_flags( bktr->pixfmt );
3479 return;
3480 }
3481 return;
3482}
3483
3484
3485/******************************************************************************
3486 * video & video capture specific routines:
3487 */
3488
3489
3490/*
3491 *
3492 */
3493static void
3494start_capture( bktr_ptr_t bktr, unsigned type )
3495{
3496 bt848_ptr_t bt848;
3497 u_char i_flag;
3498 struct format_params *fp;
3499
3500 fp = &format_params[bktr->format_params];
3501
3502 /* If requested, clear out capture buf first */
3503 if (bktr->clr_on_start && (bktr->video.addr == 0)) {
3504 bzero((caddr_t)bktr->bigbuf,
3505 (size_t)bktr->rows * bktr->cols * bktr->frames *
3506 pixfmt_table[ bktr->pixfmt ].public.Bpp);
3507 }
3508
3509 bt848 = bktr->base;
3510
3511 bt848->dstatus = 0;
3512 bt848->int_stat = bt848->int_stat;
3513
3514 bktr->flags |= type;
3515 bktr->flags &= ~METEOR_WANT_MASK;
3516 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
3517 case METEOR_ONLY_EVEN_FIELDS:
3518 bktr->flags |= METEOR_WANT_EVEN;
3519 i_flag = 1;
3520 break;
3521 case METEOR_ONLY_ODD_FIELDS:
3522 bktr->flags |= METEOR_WANT_ODD;
3523 i_flag = 2;
3524 break;
3525 default:
3526 bktr->flags |= METEOR_WANT_MASK;
3527 i_flag = 3;
3528 break;
3529 }
3530
3531 /* TDEC is only valid for continuous captures */
3532 if ( type == METEOR_SINGLE ) {
3533 u_short fps_save = bktr->fps;
3534
3535 set_fps(bktr, fp->frame_rate);
3536 bktr->fps = fps_save;
3537 }
3538 else
3539 set_fps(bktr, bktr->fps);
3540
3541 if (bktr->dma_prog_loaded == FALSE) {
3542 build_dma_prog(bktr, i_flag);
3543 bktr->dma_prog_loaded = TRUE;
3544 }
3545
3546
3547 bt848->risc_strt_add = vtophys(bktr->dma_prog);
3548
3549}
3550
3551
3552/*
3553 *
3554 */
3555static void
3556set_fps( bktr_ptr_t bktr, u_short fps )
3557{
3558 bt848_ptr_t bt848;
3559 struct format_params *fp;
3560 int i_flag;
3561
3562 fp = &format_params[bktr->format_params];
3563
3564 bt848 = bktr->base;
3565
3566 switch(bktr->flags & METEOR_ONLY_FIELDS_MASK) {
3567 case METEOR_ONLY_EVEN_FIELDS:
3568 bktr->flags |= METEOR_WANT_EVEN;
3569 i_flag = 1;
3570 break;
3571 case METEOR_ONLY_ODD_FIELDS:
3572 bktr->flags |= METEOR_WANT_ODD;
3573 i_flag = 1;
3574 break;
3575 default:
3576 bktr->flags |= METEOR_WANT_MASK;
3577 i_flag = 2;
3578 break;
3579 }
3580
3581 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
3582 bt848->int_stat = ALL_INTS_CLEARED;
3583
3584 bktr->fps = fps;
3585 bt848->tdec = 0;
3586
3587 if (fps < fp->frame_rate)
3588 bt848->tdec = i_flag*(fp->frame_rate - fps) & 0x3f;
3589 else
3590 bt848->tdec = 0;
3591 return;
3592
3593}
3594
3595
3596
3597
3598
3599/*
3600 * Given a pixfmt index, compute the bt848 swap_flags necessary to
3601 * achieve the specified swapping.
3602 * Note that without bt swapping, 2Bpp and 3Bpp modes are written
3603 * byte-swapped, and 4Bpp modes are byte and word swapped (see Table 6
3604 * and read R->L).
3605 * Note also that for 3Bpp, we may additionally need to do some creative
3606 * SKIPing to align the FIFO bytelines with the target buffer (see split()).
3607 * This is abstracted here: e.g. no swaps = RGBA; byte & short swap = ABGR
3608 * as one would expect.
3609 */
3610
3611static u_int pixfmt_swap_flags( int pixfmt )
3612{
3613 struct meteor_pixfmt *pf = &pixfmt_table[ pixfmt ].public;
3614 u_int swapf = 0;
3615
3616 switch ( pf->Bpp ) {
3617 case 2 : swapf = ( pf->swap_bytes ? 0 : BSWAP );
3618 break;
3619
3620 case 3 : /* no swaps supported for 3bpp - makes no sense w/ bt848 */
3621 break;
3622
3623 case 4 : if ( pf->swap_bytes )
3624 swapf = pf->swap_shorts ? 0 : WSWAP;
3625 else
3626 swapf = pf->swap_shorts ? BSWAP : (BSWAP | WSWAP);
3627 break;
3628 }
3629 return swapf;
3630}
3631
3632
3633
3634/*
3635 * Converts meteor-defined pixel formats (e.g. METEOR_GEO_RGB16) into
3636 * our pixfmt_table indices.
3637 */
3638
3639static int oformat_meteor_to_bt( u_long format )
3640{
3641 int i;
3642 struct meteor_pixfmt *pf1, *pf2;
3643
3644 /* Find format in compatibility table */
3645 for ( i = 0; i < METEOR_PIXFMT_TABLE_SIZE; i++ )
3646 if ( meteor_pixfmt_table[i].meteor_format == format )
3647 break;
3648
3649 if ( i >= METEOR_PIXFMT_TABLE_SIZE )
3650 return -1;
3651 pf1 = &meteor_pixfmt_table[i].public;
3652
3653 /* Match it with an entry in master pixel format table */
3654 for ( i = 0; i < PIXFMT_TABLE_SIZE; i++ ) {
3655 pf2 = &pixfmt_table[i].public;
3656
3657 if (( pf1->type == pf2->type ) &&
3658 ( pf1->Bpp == pf2->Bpp ) &&
3659 !bcmp( pf1->masks, pf2->masks, sizeof( pf1->masks )) &&
3660 ( pf1->swap_bytes == pf2->swap_bytes ) &&
3661 ( pf1->swap_shorts == pf2->swap_shorts ))
3662 break;
3663 }
3664 if ( i >= PIXFMT_TABLE_SIZE )
3665 return -1;
3666
3667 return i;
3668}
3669
3670/******************************************************************************
3671 * i2c primitives:
3672 */
3673
3674/* */
3675#define I2CBITTIME (0x5<<4) /* 5 * 0.48uS */
3676#define I2CBITTIME_878 (1 << 7)
3677#define I2C_READ 0x01
3678#define I2C_COMMAND (I2CBITTIME | \
3679 BT848_DATA_CTL_I2CSCL | \
3680 BT848_DATA_CTL_I2CSDA)
3681
3682#define I2C_COMMAND_878 (I2CBITTIME_878 | \
3683 BT848_DATA_CTL_I2CSCL | \
3684 BT848_DATA_CTL_I2CSDA)
3685
3686/* Select between old i2c code and new iicbus / smbus code */
3687#if (defined(__FreeBSD__) && (NSMBUS > 0))
3688
3689/*
3690 * The hardware interface is actually SMB commands
3691 */
|
4713static int
| 3692int
|
4714i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 )
4715{
4716 char cmd;
4717
4718 if (bktr->id == BROOKTREE_848 ||
4719 bktr->id == BROOKTREE_848A ||
4720 bktr->id == BROOKTREE_849A)
4721 cmd = I2C_COMMAND;
4722 else
4723 cmd = I2C_COMMAND_878;
4724
4725 if (byte2 != -1) {
4726 if (smbus_writew(bktr->i2c_sc.smbus, addr, cmd,
4727 (short)(((byte2 & 0xff) << 8) | (byte1 & 0xff))))
4728 return (-1);
4729 } else {
4730 if (smbus_writeb(bktr->i2c_sc.smbus, addr, cmd,
4731 (char)(byte1 & 0xff)))
4732 return (-1);
4733 }
4734
4735 /* return OK */
4736 return( 0 );
4737}
4738
| 3693i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 )
3694{
3695 char cmd;
3696
3697 if (bktr->id == BROOKTREE_848 ||
3698 bktr->id == BROOKTREE_848A ||
3699 bktr->id == BROOKTREE_849A)
3700 cmd = I2C_COMMAND;
3701 else
3702 cmd = I2C_COMMAND_878;
3703
3704 if (byte2 != -1) {
3705 if (smbus_writew(bktr->i2c_sc.smbus, addr, cmd,
3706 (short)(((byte2 & 0xff) << 8) | (byte1 & 0xff))))
3707 return (-1);
3708 } else {
3709 if (smbus_writeb(bktr->i2c_sc.smbus, addr, cmd,
3710 (char)(byte1 & 0xff)))
3711 return (-1);
3712 }
3713
3714 /* return OK */
3715 return( 0 );
3716}
3717
|
4739static int
| 3718int
|
4740i2cRead( bktr_ptr_t bktr, int addr )
4741{
4742 char result;
4743 char cmd;
4744
4745 if (bktr->id == BROOKTREE_848 ||
4746 bktr->id == BROOKTREE_848A ||
4747 bktr->id == BROOKTREE_849A)
4748 cmd = I2C_COMMAND;
4749 else
4750 cmd = I2C_COMMAND_878;
4751
4752 if (smbus_readb(bktr->i2c_sc.smbus, addr, cmd, &result))
4753 return (-1);
4754
4755 return ((int)((unsigned char)result));
4756}
4757
4758#define IICBUS(bktr) ((bktr)->i2c_sc.iicbus)
4759
4760/* The MSP34xx Audio chip require i2c bus writes of up to 5 bytes which the */
4761/* bt848 automated i2c bus controller cannot handle */
4762/* Therefore we need low level control of the i2c bus hardware */
4763
4764/* Write to the MSP registers */
| 3719i2cRead( bktr_ptr_t bktr, int addr )
3720{
3721 char result;
3722 char cmd;
3723
3724 if (bktr->id == BROOKTREE_848 ||
3725 bktr->id == BROOKTREE_848A ||
3726 bktr->id == BROOKTREE_849A)
3727 cmd = I2C_COMMAND;
3728 else
3729 cmd = I2C_COMMAND_878;
3730
3731 if (smbus_readb(bktr->i2c_sc.smbus, addr, cmd, &result))
3732 return (-1);
3733
3734 return ((int)((unsigned char)result));
3735}
3736
3737#define IICBUS(bktr) ((bktr)->i2c_sc.iicbus)
3738
3739/* The MSP34xx Audio chip require i2c bus writes of up to 5 bytes which the */
3740/* bt848 automated i2c bus controller cannot handle */
3741/* Therefore we need low level control of the i2c bus hardware */
3742
3743/* Write to the MSP registers */
|
4765static void
| 3744void
|
4766msp_write(bktr_ptr_t bktr, unsigned char dev, unsigned int addr, unsigned int data)
4767{
4768 unsigned char addr_l, addr_h, data_h, data_l ;
4769
4770 addr_h = (addr >>8) & 0xff;
4771 addr_l = addr & 0xff;
4772 data_h = (data >>8) & 0xff;
4773 data_l = data & 0xff;
4774
| 3745msp_write(bktr_ptr_t bktr, unsigned char dev, unsigned int addr, unsigned int data)
3746{
3747 unsigned char addr_l, addr_h, data_h, data_l ;
3748
3749 addr_h = (addr >>8) & 0xff;
3750 addr_l = addr & 0xff;
3751 data_h = (data >>8) & 0xff;
3752 data_l = data & 0xff;
3753
|
4775 iicbus_start(IICBUS(bktr), MSP3400C_WADDR, 0 /* no timeout? */);
| 3754 iicbus_start(IICBUS(bktr), bktr->msp_addr, 0 /* no timeout? */);
|
4776
4777 iicbus_write_byte(IICBUS(bktr), dev, 0);
4778 iicbus_write_byte(IICBUS(bktr), addr_h, 0);
4779 iicbus_write_byte(IICBUS(bktr), addr_l, 0);
4780 iicbus_write_byte(IICBUS(bktr), data_h, 0);
4781 iicbus_write_byte(IICBUS(bktr), data_l, 0);
4782
4783 iicbus_stop(IICBUS(bktr));
4784
4785 return;
4786}
4787
4788/* Write to the MSP registers */
| 3755
3756 iicbus_write_byte(IICBUS(bktr), dev, 0);
3757 iicbus_write_byte(IICBUS(bktr), addr_h, 0);
3758 iicbus_write_byte(IICBUS(bktr), addr_l, 0);
3759 iicbus_write_byte(IICBUS(bktr), data_h, 0);
3760 iicbus_write_byte(IICBUS(bktr), data_l, 0);
3761
3762 iicbus_stop(IICBUS(bktr));
3763
3764 return;
3765}
3766
3767/* Write to the MSP registers */
|
4789static unsigned int
| 3768unsigned int
|
4790msp_read(bktr_ptr_t bktr, unsigned char dev, unsigned int addr)
4791{
4792 unsigned int data;
4793 unsigned char addr_l, addr_h, dev_r;
4794 int read;
4795 u_char data_read[2];
4796
4797 addr_h = (addr >>8) & 0xff;
4798 addr_l = addr & 0xff;
4799 dev_r = dev+1;
4800
4801 /* XXX errors ignored */
| 3769msp_read(bktr_ptr_t bktr, unsigned char dev, unsigned int addr)
3770{
3771 unsigned int data;
3772 unsigned char addr_l, addr_h, dev_r;
3773 int read;
3774 u_char data_read[2];
3775
3776 addr_h = (addr >>8) & 0xff;
3777 addr_l = addr & 0xff;
3778 dev_r = dev+1;
3779
3780 /* XXX errors ignored */
|
4802 iicbus_start(IICBUS(bktr), MSP3400C_WADDR, 0 /* no timeout? */);
| 3781 iicbus_start(IICBUS(bktr), bktr->msp_addr, 0 /* no timeout? */);
|
4803
4804 iicbus_write_byte(IICBUS(bktr), dev_r, 0);
4805 iicbus_write_byte(IICBUS(bktr), addr_h, 0);
4806 iicbus_write_byte(IICBUS(bktr), addr_l, 0);
4807
| 3782
3783 iicbus_write_byte(IICBUS(bktr), dev_r, 0);
3784 iicbus_write_byte(IICBUS(bktr), addr_h, 0);
3785 iicbus_write_byte(IICBUS(bktr), addr_l, 0);
3786
|
4808 iicbus_repeated_start(IICBUS(bktr), MSP3400C_RADDR, 0 /* no timeout? */);
| 3787 iicbus_repeated_start(IICBUS(bktr), bktr->msp_addr +1, 0 /* no timeout? */);
|
4809 iicbus_read(IICBUS(bktr), data_read, 2, &read, IIC_LAST_READ, 0);
4810 iicbus_stop(IICBUS(bktr));
4811
4812 data = (data_read[0]<<8) | data_read[1];
4813
4814 return (data);
4815}
4816
4817/* Reset the MSP chip */
4818/* The user can block the reset (which is handy if you initialise the
4819 * MSP audio in another operating system first (eg in Windows)
4820 */
| 3788 iicbus_read(IICBUS(bktr), data_read, 2, &read, IIC_LAST_READ, 0);
3789 iicbus_stop(IICBUS(bktr));
3790
3791 data = (data_read[0]<<8) | data_read[1];
3792
3793 return (data);
3794}
3795
3796/* Reset the MSP chip */
3797/* The user can block the reset (which is handy if you initialise the
3798 * MSP audio in another operating system first (eg in Windows)
3799 */
|
4821static void
| 3800void
|
4822msp_reset( bktr_ptr_t bktr )
4823{
4824
4825#ifndef BKTR_NO_MSP_RESET
4826 /* put into reset mode */
| 3801msp_reset( bktr_ptr_t bktr )
3802{
3803
3804#ifndef BKTR_NO_MSP_RESET
3805 /* put into reset mode */
|
4827 iicbus_start(IICBUS(bktr), MSP3400C_WADDR, 0 /* no timeout? */);
| 3806 iicbus_start(IICBUS(bktr), bktr->msp_addr, 0 /* no timeout? */);
|
4828 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
4829 iicbus_write_byte(IICBUS(bktr), 0x80, 0);
4830 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
4831 iicbus_stop(IICBUS(bktr));
4832
4833 /* put back to operational mode */
| 3807 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
3808 iicbus_write_byte(IICBUS(bktr), 0x80, 0);
3809 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
3810 iicbus_stop(IICBUS(bktr));
3811
3812 /* put back to operational mode */
|
4834 iicbus_start(IICBUS(bktr), MSP3400C_WADDR, 0 /* no timeout? */);
| 3813 iicbus_start(IICBUS(bktr), bktr->msp_addr, 0 /* no timeout? */);
|
4835 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
4836 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
4837 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
4838 iicbus_stop(IICBUS(bktr));
4839#endif
4840 return;
4841}
4842
4843static void remote_read(bktr_ptr_t bktr, struct bktr_remote *remote) {
4844 int read;
4845
4846 /* XXX errors ignored */
4847 iicbus_start(IICBUS(bktr), bktr->remote_control_addr, 0 /* no timeout? */);
4848 iicbus_read(IICBUS(bktr), remote->data, 3, &read, IIC_LAST_READ, 0);
4849 iicbus_stop(IICBUS(bktr));
4850
4851 return;
4852}
4853
4854#else /* defined(__FreeBSD__) && (NSMBUS > 0) */
4855
4856/*
4857 * Program the i2c bus directly
4858 */
| 3814 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
3815 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
3816 iicbus_write_byte(IICBUS(bktr), 0x00, 0);
3817 iicbus_stop(IICBUS(bktr));
3818#endif
3819 return;
3820}
3821
3822static void remote_read(bktr_ptr_t bktr, struct bktr_remote *remote) {
3823 int read;
3824
3825 /* XXX errors ignored */
3826 iicbus_start(IICBUS(bktr), bktr->remote_control_addr, 0 /* no timeout? */);
3827 iicbus_read(IICBUS(bktr), remote->data, 3, &read, IIC_LAST_READ, 0);
3828 iicbus_stop(IICBUS(bktr));
3829
3830 return;
3831}
3832
3833#else /* defined(__FreeBSD__) && (NSMBUS > 0) */
3834
3835/*
3836 * Program the i2c bus directly
3837 */
|
4859static int
| 3838int
|
4860i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 )
4861{
4862 u_long x;
4863 u_long data;
4864 bt848_ptr_t bt848;
4865
4866 bt848 = bktr->base;
4867
4868 /* clear status bits */
4869 bt848->int_stat = (BT848_INT_RACK | BT848_INT_I2CDONE);
4870
4871 /* build the command datum */
4872 if (bktr->id == BROOKTREE_848 ||
4873 bktr->id == BROOKTREE_848A ||
4874 bktr->id == BROOKTREE_849A) {
4875 data = ((addr & 0xff) << 24) | ((byte1 & 0xff) << 16) | I2C_COMMAND;
4876 } else {
4877 data = ((addr & 0xff) << 24) | ((byte1 & 0xff) << 16) | I2C_COMMAND_878;
4878 }
4879 if ( byte2 != -1 ) {
4880 data |= ((byte2 & 0xff) << 8);
4881 data |= BT848_DATA_CTL_I2CW3B;
4882 }
4883
4884 /* write the address and data */
4885 bt848->i2c_data_ctl = data;
4886
4887 /* wait for completion */
4888 for ( x = 0x7fffffff; x; --x ) { /* safety valve */
4889 if ( bt848->int_stat & BT848_INT_I2CDONE )
4890 break;
4891 }
4892
4893 /* check for ACK */
4894 if ( !x || !(bt848->int_stat & BT848_INT_RACK) )
4895 return( -1 );
4896
4897 /* return OK */
4898 return( 0 );
4899}
4900
4901
4902/*
4903 *
4904 */
| 3839i2cWrite( bktr_ptr_t bktr, int addr, int byte1, int byte2 )
3840{
3841 u_long x;
3842 u_long data;
3843 bt848_ptr_t bt848;
3844
3845 bt848 = bktr->base;
3846
3847 /* clear status bits */
3848 bt848->int_stat = (BT848_INT_RACK | BT848_INT_I2CDONE);
3849
3850 /* build the command datum */
3851 if (bktr->id == BROOKTREE_848 ||
3852 bktr->id == BROOKTREE_848A ||
3853 bktr->id == BROOKTREE_849A) {
3854 data = ((addr & 0xff) << 24) | ((byte1 & 0xff) << 16) | I2C_COMMAND;
3855 } else {
3856 data = ((addr & 0xff) << 24) | ((byte1 & 0xff) << 16) | I2C_COMMAND_878;
3857 }
3858 if ( byte2 != -1 ) {
3859 data |= ((byte2 & 0xff) << 8);
3860 data |= BT848_DATA_CTL_I2CW3B;
3861 }
3862
3863 /* write the address and data */
3864 bt848->i2c_data_ctl = data;
3865
3866 /* wait for completion */
3867 for ( x = 0x7fffffff; x; --x ) { /* safety valve */
3868 if ( bt848->int_stat & BT848_INT_I2CDONE )
3869 break;
3870 }
3871
3872 /* check for ACK */
3873 if ( !x || !(bt848->int_stat & BT848_INT_RACK) )
3874 return( -1 );
3875
3876 /* return OK */
3877 return( 0 );
3878}
3879
3880
3881/*
3882 *
3883 */
|
4905static int
| 3884int
|
4906i2cRead( bktr_ptr_t bktr, int addr )
4907{
4908 u_long x;
4909 bt848_ptr_t bt848;
4910
4911 bt848 = bktr->base;
4912
4913 /* clear status bits */
4914 bt848->int_stat = (BT848_INT_RACK | BT848_INT_I2CDONE);
4915
4916 /* write the READ address */
4917 /* The Bt878 and Bt879 differed on the treatment of i2c commands */
4918
4919 if (bktr->id == BROOKTREE_848 ||
4920 bktr->id == BROOKTREE_848A ||
4921 bktr->id == BROOKTREE_849A) {
4922 bt848->i2c_data_ctl = ((addr & 0xff) << 24) | I2C_COMMAND;
4923 } else {
4924 bt848->i2c_data_ctl = ((addr & 0xff) << 24) | I2C_COMMAND_878;
4925 }
4926
4927 /* wait for completion */
4928 for ( x = 0x7fffffff; x; --x ) { /* safety valve */
4929 if ( bt848->int_stat & BT848_INT_I2CDONE )
4930 break;
4931 }
4932
4933 /* check for ACK */
4934 if ( !x || !(bt848->int_stat & BT848_INT_RACK) )
4935 return( -1 );
4936
4937 /* it was a read */
4938 return( (bt848->i2c_data_ctl >> 8) & 0xff );
4939}
4940
4941/* The MSP34xx Audio chip require i2c bus writes of up to 5 bytes which the */
4942/* bt848 automated i2c bus controller cannot handle */
4943/* Therefore we need low level control of the i2c bus hardware */
4944/* Idea for the following functions are from elsewhere in this driver and */
4945/* from the Linux BTTV i2c driver by Gerd Knorr <kraxel@cs.tu-berlin.de> */
4946
4947#define BITD 40
4948static void i2c_start( bktr_ptr_t bktr) {
4949 bt848_ptr_t bt848;
4950 bt848 = bktr->base;
4951
4952 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release data */
4953 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release clock */
4954 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* lower data */
4955 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock */
4956}
4957
4958static void i2c_stop( bktr_ptr_t bktr) {
4959 bt848_ptr_t bt848;
4960 bt848 = bktr->base;
4961
4962 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock & data */
4963 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* release clock */
4964 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release data */
4965}
4966
4967static int i2c_write_byte( bktr_ptr_t bktr, unsigned char data) {
4968 int x;
4969 int status;
4970 bt848_ptr_t bt848;
4971 bt848 = bktr->base;
4972
4973 /* write out the byte */
4974 for ( x = 7; x >= 0; --x ) {
4975 if ( data & (1<<x) ) {
4976 bt848->i2c_data_ctl = 1;
4977 DELAY( BITD ); /* assert HI data */
4978 bt848->i2c_data_ctl = 3;
4979 DELAY( BITD ); /* strobe clock */
4980 bt848->i2c_data_ctl = 1;
4981 DELAY( BITD ); /* release clock */
4982 }
4983 else {
4984 bt848->i2c_data_ctl = 0;
4985 DELAY( BITD ); /* assert LO data */
4986 bt848->i2c_data_ctl = 2;
4987 DELAY( BITD ); /* strobe clock */
4988 bt848->i2c_data_ctl = 0;
4989 DELAY( BITD ); /* release clock */
4990 }
4991 }
4992
4993 /* look for an ACK */
4994 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* float data */
4995 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* strobe clock */
4996 status = bt848->i2c_data_ctl & 1; /* read the ACK bit */
4997 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release clock */
4998
4999 return( status );
5000}
5001
5002static int i2c_read_byte( bktr_ptr_t bktr, unsigned char *data, int last ) {
5003 int x;
5004 int bit;
5005 int byte = 0;
5006 bt848_ptr_t bt848;
5007 bt848 = bktr->base;
5008
5009 /* read in the byte */
5010 bt848->i2c_data_ctl = 1;
5011 DELAY( BITD ); /* float data */
5012 for ( x = 7; x >= 0; --x ) {
5013 bt848->i2c_data_ctl = 3;
5014 DELAY( BITD ); /* strobe clock */
5015 bit = bt848->i2c_data_ctl & 1; /* read the data bit */
5016 if ( bit ) byte |= (1<<x);
5017 bt848->i2c_data_ctl = 1;
5018 DELAY( BITD ); /* release clock */
5019 }
5020 /* After reading the byte, send an ACK */
5021 /* (unless that was the last byte, for which we send a NAK */
5022 if (last) { /* send NAK - same a writing a 1 */
5023 bt848->i2c_data_ctl = 1;
5024 DELAY( BITD ); /* set data bit */
5025 bt848->i2c_data_ctl = 3;
5026 DELAY( BITD ); /* strobe clock */
5027 bt848->i2c_data_ctl = 1;
5028 DELAY( BITD ); /* release clock */
5029 } else { /* send ACK - same as writing a 0 */
5030 bt848->i2c_data_ctl = 0;
5031 DELAY( BITD ); /* set data bit */
5032 bt848->i2c_data_ctl = 2;
5033 DELAY( BITD ); /* strobe clock */
5034 bt848->i2c_data_ctl = 0;
5035 DELAY( BITD ); /* release clock */
5036 }
5037
5038 *data=byte;
5039 return 0;
5040}
5041#undef BITD
5042
5043/* Write to the MSP registers */
| 3885i2cRead( bktr_ptr_t bktr, int addr )
3886{
3887 u_long x;
3888 bt848_ptr_t bt848;
3889
3890 bt848 = bktr->base;
3891
3892 /* clear status bits */
3893 bt848->int_stat = (BT848_INT_RACK | BT848_INT_I2CDONE);
3894
3895 /* write the READ address */
3896 /* The Bt878 and Bt879 differed on the treatment of i2c commands */
3897
3898 if (bktr->id == BROOKTREE_848 ||
3899 bktr->id == BROOKTREE_848A ||
3900 bktr->id == BROOKTREE_849A) {
3901 bt848->i2c_data_ctl = ((addr & 0xff) << 24) | I2C_COMMAND;
3902 } else {
3903 bt848->i2c_data_ctl = ((addr & 0xff) << 24) | I2C_COMMAND_878;
3904 }
3905
3906 /* wait for completion */
3907 for ( x = 0x7fffffff; x; --x ) { /* safety valve */
3908 if ( bt848->int_stat & BT848_INT_I2CDONE )
3909 break;
3910 }
3911
3912 /* check for ACK */
3913 if ( !x || !(bt848->int_stat & BT848_INT_RACK) )
3914 return( -1 );
3915
3916 /* it was a read */
3917 return( (bt848->i2c_data_ctl >> 8) & 0xff );
3918}
3919
3920/* The MSP34xx Audio chip require i2c bus writes of up to 5 bytes which the */
3921/* bt848 automated i2c bus controller cannot handle */
3922/* Therefore we need low level control of the i2c bus hardware */
3923/* Idea for the following functions are from elsewhere in this driver and */
3924/* from the Linux BTTV i2c driver by Gerd Knorr <kraxel@cs.tu-berlin.de> */
3925
3926#define BITD 40
3927static void i2c_start( bktr_ptr_t bktr) {
3928 bt848_ptr_t bt848;
3929 bt848 = bktr->base;
3930
3931 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release data */
3932 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release clock */
3933 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* lower data */
3934 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock */
3935}
3936
3937static void i2c_stop( bktr_ptr_t bktr) {
3938 bt848_ptr_t bt848;
3939 bt848 = bktr->base;
3940
3941 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock & data */
3942 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* release clock */
3943 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release data */
3944}
3945
3946static int i2c_write_byte( bktr_ptr_t bktr, unsigned char data) {
3947 int x;
3948 int status;
3949 bt848_ptr_t bt848;
3950 bt848 = bktr->base;
3951
3952 /* write out the byte */
3953 for ( x = 7; x >= 0; --x ) {
3954 if ( data & (1<<x) ) {
3955 bt848->i2c_data_ctl = 1;
3956 DELAY( BITD ); /* assert HI data */
3957 bt848->i2c_data_ctl = 3;
3958 DELAY( BITD ); /* strobe clock */
3959 bt848->i2c_data_ctl = 1;
3960 DELAY( BITD ); /* release clock */
3961 }
3962 else {
3963 bt848->i2c_data_ctl = 0;
3964 DELAY( BITD ); /* assert LO data */
3965 bt848->i2c_data_ctl = 2;
3966 DELAY( BITD ); /* strobe clock */
3967 bt848->i2c_data_ctl = 0;
3968 DELAY( BITD ); /* release clock */
3969 }
3970 }
3971
3972 /* look for an ACK */
3973 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* float data */
3974 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* strobe clock */
3975 status = bt848->i2c_data_ctl & 1; /* read the ACK bit */
3976 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release clock */
3977
3978 return( status );
3979}
3980
3981static int i2c_read_byte( bktr_ptr_t bktr, unsigned char *data, int last ) {
3982 int x;
3983 int bit;
3984 int byte = 0;
3985 bt848_ptr_t bt848;
3986 bt848 = bktr->base;
3987
3988 /* read in the byte */
3989 bt848->i2c_data_ctl = 1;
3990 DELAY( BITD ); /* float data */
3991 for ( x = 7; x >= 0; --x ) {
3992 bt848->i2c_data_ctl = 3;
3993 DELAY( BITD ); /* strobe clock */
3994 bit = bt848->i2c_data_ctl & 1; /* read the data bit */
3995 if ( bit ) byte |= (1<<x);
3996 bt848->i2c_data_ctl = 1;
3997 DELAY( BITD ); /* release clock */
3998 }
3999 /* After reading the byte, send an ACK */
4000 /* (unless that was the last byte, for which we send a NAK */
4001 if (last) { /* send NAK - same a writing a 1 */
4002 bt848->i2c_data_ctl = 1;
4003 DELAY( BITD ); /* set data bit */
4004 bt848->i2c_data_ctl = 3;
4005 DELAY( BITD ); /* strobe clock */
4006 bt848->i2c_data_ctl = 1;
4007 DELAY( BITD ); /* release clock */
4008 } else { /* send ACK - same as writing a 0 */
4009 bt848->i2c_data_ctl = 0;
4010 DELAY( BITD ); /* set data bit */
4011 bt848->i2c_data_ctl = 2;
4012 DELAY( BITD ); /* strobe clock */
4013 bt848->i2c_data_ctl = 0;
4014 DELAY( BITD ); /* release clock */
4015 }
4016
4017 *data=byte;
4018 return 0;
4019}
4020#undef BITD
4021
4022/* Write to the MSP registers */
|
5044static void msp_write( bktr_ptr_t bktr, unsigned char dev, unsigned int addr, unsigned int data){
5045 unsigned int msp_w_addr = MSP3400C_WADDR;
| 4023void msp_write( bktr_ptr_t bktr, unsigned char dev, unsigned int addr, unsigned int data){
4024 unsigned int msp_w_addr = bktr->msp_addr;
|
5046 unsigned char addr_l, addr_h, data_h, data_l ;
5047 addr_h = (addr >>8) & 0xff;
5048 addr_l = addr & 0xff;
5049 data_h = (data >>8) & 0xff;
5050 data_l = data & 0xff;
5051
5052 i2c_start(bktr);
5053 i2c_write_byte(bktr, msp_w_addr);
5054 i2c_write_byte(bktr, dev);
5055 i2c_write_byte(bktr, addr_h);
5056 i2c_write_byte(bktr, addr_l);
5057 i2c_write_byte(bktr, data_h);
5058 i2c_write_byte(bktr, data_l);
5059 i2c_stop(bktr);
5060}
5061
5062/* Write to the MSP registers */
| 4025 unsigned char addr_l, addr_h, data_h, data_l ;
4026 addr_h = (addr >>8) & 0xff;
4027 addr_l = addr & 0xff;
4028 data_h = (data >>8) & 0xff;
4029 data_l = data & 0xff;
4030
4031 i2c_start(bktr);
4032 i2c_write_byte(bktr, msp_w_addr);
4033 i2c_write_byte(bktr, dev);
4034 i2c_write_byte(bktr, addr_h);
4035 i2c_write_byte(bktr, addr_l);
4036 i2c_write_byte(bktr, data_h);
4037 i2c_write_byte(bktr, data_l);
4038 i2c_stop(bktr);
4039}
4040
4041/* Write to the MSP registers */
|
5063static unsigned int msp_read(bktr_ptr_t bktr, unsigned char dev, unsigned int addr){
| 4042unsigned int msp_read(bktr_ptr_t bktr, unsigned char dev, unsigned int addr){
|
5064 unsigned int data;
5065 unsigned char addr_l, addr_h, data_1, data_2, dev_r ;
5066 addr_h = (addr >>8) & 0xff;
5067 addr_l = addr & 0xff;
5068 dev_r = dev+1;
5069
5070 i2c_start(bktr);
| 4043 unsigned int data;
4044 unsigned char addr_l, addr_h, data_1, data_2, dev_r ;
4045 addr_h = (addr >>8) & 0xff;
4046 addr_l = addr & 0xff;
4047 dev_r = dev+1;
4048
4049 i2c_start(bktr);
|
5071 i2c_write_byte(bktr,MSP3400C_WADDR);
| 4050 i2c_write_byte(bktr,bktr->msp_addr);
|
5072 i2c_write_byte(bktr,dev_r);
5073 i2c_write_byte(bktr,addr_h);
5074 i2c_write_byte(bktr,addr_l);
5075
5076 i2c_start(bktr);
| 4051 i2c_write_byte(bktr,dev_r);
4052 i2c_write_byte(bktr,addr_h);
4053 i2c_write_byte(bktr,addr_l);
4054
4055 i2c_start(bktr);
|
5077 i2c_write_byte(bktr,MSP3400C_RADDR);
| 4056 i2c_write_byte(bktr,bktr->msp_addr+1);
|
5078 i2c_read_byte(bktr,&data_1, 0);
5079 i2c_read_byte(bktr,&data_2, 1);
5080 i2c_stop(bktr);
5081 data = (data_1<<8) | data_2;
5082 return data;
5083}
5084
5085/* Reset the MSP chip */
5086/* The user can block the reset (which is handy if you initialise the
5087 * MSP audio in another operating system first (eg in Windows)
5088 */
| 4057 i2c_read_byte(bktr,&data_1, 0);
4058 i2c_read_byte(bktr,&data_2, 1);
4059 i2c_stop(bktr);
4060 data = (data_1<<8) | data_2;
4061 return data;
4062}
4063
4064/* Reset the MSP chip */
4065/* The user can block the reset (which is handy if you initialise the
4066 * MSP audio in another operating system first (eg in Windows)
4067 */
|
5089static void msp_reset( bktr_ptr_t bktr ) {
| 4068void msp_reset( bktr_ptr_t bktr ) {
|
5090
5091#ifndef BKTR_NO_MSP_RESET
5092 /* put into reset mode */
5093 i2c_start(bktr);
| 4069
4070#ifndef BKTR_NO_MSP_RESET
4071 /* put into reset mode */
4072 i2c_start(bktr);
|
5094 i2c_write_byte(bktr, MSP3400C_WADDR);
| 4073 i2c_write_byte(bktr, bktr->msp_addr);
|
5095 i2c_write_byte(bktr, 0x00);
5096 i2c_write_byte(bktr, 0x80);
5097 i2c_write_byte(bktr, 0x00);
5098 i2c_stop(bktr);
5099
5100 /* put back to operational mode */
5101 i2c_start(bktr);
| 4074 i2c_write_byte(bktr, 0x00);
4075 i2c_write_byte(bktr, 0x80);
4076 i2c_write_byte(bktr, 0x00);
4077 i2c_stop(bktr);
4078
4079 /* put back to operational mode */
4080 i2c_start(bktr);
|
5102 i2c_write_byte(bktr, MSP3400C_WADDR);
| 4081 i2c_write_byte(bktr, bktr->msp_addr);
|
5103 i2c_write_byte(bktr, 0x00);
5104 i2c_write_byte(bktr, 0x00);
5105 i2c_write_byte(bktr, 0x00);
5106 i2c_stop(bktr);
5107#endif
5108 return;
5109
5110}
5111
5112static void remote_read(bktr_ptr_t bktr, struct bktr_remote *remote) {
5113
5114 /* XXX errors ignored */
5115 i2c_start(bktr);
5116 i2c_write_byte(bktr,bktr->remote_control_addr);
5117 i2c_read_byte(bktr,&(remote->data[0]), 0);
5118 i2c_read_byte(bktr,&(remote->data[1]), 0);
5119 i2c_read_byte(bktr,&(remote->data[2]), 0);
5120 i2c_stop(bktr);
5121
5122 return;
5123}
5124
5125#endif /* defined(__FreeBSD__) && (NSMBUS > 0) */
5126
5127
5128#if defined( I2C_SOFTWARE_PROBE )
5129
5130/*
5131 * we are keeping this around for any parts that we need to probe
5132 * but that CANNOT be probed via an i2c read.
5133 * this is necessary because the hardware i2c mechanism
5134 * cannot be programmed for 1 byte writes.
5135 * currently there are no known i2c parts that we need to probe
5136 * and that cannot be safely read.
5137 */
5138static int i2cProbe( bktr_ptr_t bktr, int addr );
5139#define BITD 40
5140#define EXTRA_START
5141
5142/*
5143 * probe for an I2C device at addr.
5144 */
5145static int
5146i2cProbe( bktr_ptr_t bktr, int addr )
5147{
5148 int x, status;
5149 bt848_ptr_t bt848;
5150
5151 bt848 = bktr->base;
5152
5153 /* the START */
5154#if defined( EXTRA_START )
5155 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release data */
5156 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release clock */
5157#endif /* EXTRA_START */
5158 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* lower data */
5159 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock */
5160
5161 /* write addr */
5162 for ( x = 7; x >= 0; --x ) {
5163 if ( addr & (1<<x) ) {
5164 bt848->i2c_data_ctl = 1;
5165 DELAY( BITD ); /* assert HI data */
5166 bt848->i2c_data_ctl = 3;
5167 DELAY( BITD ); /* strobe clock */
5168 bt848->i2c_data_ctl = 1;
5169 DELAY( BITD ); /* release clock */
5170 }
5171 else {
5172 bt848->i2c_data_ctl = 0;
5173 DELAY( BITD ); /* assert LO data */
5174 bt848->i2c_data_ctl = 2;
5175 DELAY( BITD ); /* strobe clock */
5176 bt848->i2c_data_ctl = 0;
5177 DELAY( BITD ); /* release clock */
5178 }
5179 }
5180
5181 /* look for an ACK */
5182 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* float data */
5183 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* strobe clock */
5184 status = bt848->i2c_data_ctl & 1; /* read the ACK bit */
5185 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release clock */
5186
5187 /* the STOP */
5188 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock & data */
5189 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* release clock */
5190 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release data */
5191
5192 return( status );
5193}
5194#undef EXTRA_START
5195#undef BITD
5196
5197#endif /* I2C_SOFTWARE_PROBE */
5198
5199
| 4082 i2c_write_byte(bktr, 0x00);
4083 i2c_write_byte(bktr, 0x00);
4084 i2c_write_byte(bktr, 0x00);
4085 i2c_stop(bktr);
4086#endif
4087 return;
4088
4089}
4090
4091static void remote_read(bktr_ptr_t bktr, struct bktr_remote *remote) {
4092
4093 /* XXX errors ignored */
4094 i2c_start(bktr);
4095 i2c_write_byte(bktr,bktr->remote_control_addr);
4096 i2c_read_byte(bktr,&(remote->data[0]), 0);
4097 i2c_read_byte(bktr,&(remote->data[1]), 0);
4098 i2c_read_byte(bktr,&(remote->data[2]), 0);
4099 i2c_stop(bktr);
4100
4101 return;
4102}
4103
4104#endif /* defined(__FreeBSD__) && (NSMBUS > 0) */
4105
4106
4107#if defined( I2C_SOFTWARE_PROBE )
4108
4109/*
4110 * we are keeping this around for any parts that we need to probe
4111 * but that CANNOT be probed via an i2c read.
4112 * this is necessary because the hardware i2c mechanism
4113 * cannot be programmed for 1 byte writes.
4114 * currently there are no known i2c parts that we need to probe
4115 * and that cannot be safely read.
4116 */
4117static int i2cProbe( bktr_ptr_t bktr, int addr );
4118#define BITD 40
4119#define EXTRA_START
4120
4121/*
4122 * probe for an I2C device at addr.
4123 */
4124static int
4125i2cProbe( bktr_ptr_t bktr, int addr )
4126{
4127 int x, status;
4128 bt848_ptr_t bt848;
4129
4130 bt848 = bktr->base;
4131
4132 /* the START */
4133#if defined( EXTRA_START )
4134 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release data */
4135 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release clock */
4136#endif /* EXTRA_START */
4137 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* lower data */
4138 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock */
4139
4140 /* write addr */
4141 for ( x = 7; x >= 0; --x ) {
4142 if ( addr & (1<<x) ) {
4143 bt848->i2c_data_ctl = 1;
4144 DELAY( BITD ); /* assert HI data */
4145 bt848->i2c_data_ctl = 3;
4146 DELAY( BITD ); /* strobe clock */
4147 bt848->i2c_data_ctl = 1;
4148 DELAY( BITD ); /* release clock */
4149 }
4150 else {
4151 bt848->i2c_data_ctl = 0;
4152 DELAY( BITD ); /* assert LO data */
4153 bt848->i2c_data_ctl = 2;
4154 DELAY( BITD ); /* strobe clock */
4155 bt848->i2c_data_ctl = 0;
4156 DELAY( BITD ); /* release clock */
4157 }
4158 }
4159
4160 /* look for an ACK */
4161 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* float data */
4162 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* strobe clock */
4163 status = bt848->i2c_data_ctl & 1; /* read the ACK bit */
4164 bt848->i2c_data_ctl = 1; DELAY( BITD ); /* release clock */
4165
4166 /* the STOP */
4167 bt848->i2c_data_ctl = 0; DELAY( BITD ); /* lower clock & data */
4168 bt848->i2c_data_ctl = 2; DELAY( BITD ); /* release clock */
4169 bt848->i2c_data_ctl = 3; DELAY( BITD ); /* release data */
4170
4171 return( status );
4172}
4173#undef EXTRA_START
4174#undef BITD
4175
4176#endif /* I2C_SOFTWARE_PROBE */
4177
4178
|
5200/*
5201 *
5202 */
5203static int
5204writeEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data )
5205{
5206 return( -1 );
5207}
5208
5209
5210/*
5211 *
5212 */
5213static int
5214readEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data )
5215{
5216 int x;
5217 int addr;
5218 int max;
5219 int byte;
5220
5221 /* get the address of the EEProm */
5222 addr = (int)(bktr->card.eepromAddr & 0xff);
5223 if ( addr == 0 )
5224 return( -1 );
5225
5226 max = (int)(bktr->card.eepromSize * EEPROMBLOCKSIZE);
5227 if ( (offset + count) > max )
5228 return( -1 );
5229
5230 /* set the start address */
5231 if ( i2cWrite( bktr, addr, offset, -1 ) == -1 )
5232 return( -1 );
5233
5234 /* the read cycle */
5235 for ( x = 0; x < count; ++x ) {
5236 if ( (byte = i2cRead( bktr, (addr | 1) )) == -1 )
5237 return( -1 );
5238 data[ x ] = byte;
5239 }
5240
5241 return( 0 );
5242}
5243
| |
5244#define ABSENT (-1)
5245
| 4179#define ABSENT (-1)
4180
|
5246/*
5247 * get a signature of the card
5248 * read all 128 possible i2c read addresses from 0x01 thru 0xff
5249 * build a bit array with a 1 bit for each i2c device that responds
5250 *
5251 * XXX FIXME: use offset & count args
5252 */
5253static int
5254signCard( bktr_ptr_t bktr, int offset, int count, u_char* sig )
5255{
5256 int x;
5257
5258 for ( x = 0; x < 16; ++x )
5259 sig[ x ] = 0;
5260
5261 for ( x = 0; x < count; ++x ) {
5262 if ( i2cRead( bktr, (2 * x) + 1 ) != ABSENT ) {
5263 sig[ x / 8 ] |= (1 << (x % 8) );
5264 }
5265 }
5266
5267 return( 0 );
5268}
5269
5270/*
5271 * any_i2c_devices.
5272 * Some BT848/BT848A cards have no tuner and no additional i2c devices
5273 * eg stereo decoder. These are used for video conferencing or capture from
5274 * a video camera. (VideoLogic Captivator PCI, Intel SmartCapture card).
5275 *
5276 * Determine if there are any i2c devices present. There are none present if
5277 * a) reading from all 128 devices returns ABSENT (-1) for each one
5278 * (eg VideoLogic Captivator PCI with BT848)
5279 * b) reading from all 128 devices returns 0 for each one
5280 * (eg VideoLogic Captivator PCI rev. 2F with BT848A)
5281 */
5282static int check_for_i2c_devices( bktr_ptr_t bktr ){
5283 int x, temp_read;
5284 int i2c_all_0 = 1;
5285 int i2c_all_absent = 1;
5286 for ( x = 0; x < 128; ++x ) {
5287 temp_read = i2cRead( bktr, (2 * x) + 1 );
5288 if (temp_read != 0) i2c_all_0 = 0;
5289 if (temp_read != ABSENT) i2c_all_absent = 0;
5290 }
5291
5292 if ((i2c_all_0) || (i2c_all_absent)) return 0;
5293 else return 1;
5294}
5295
5296/*
5297 * Temic/Philips datasheets say tuners can be at i2c addresses 0xc0, 0xc2,
5298 * 0xc4 or 0xc6, settable by links on the tuner
5299 * Determine the actual address used on the TV card by probing read addresses
5300 */
5301static int locate_tuner_address( bktr_ptr_t bktr) {
5302 if (i2cRead( bktr, 0xc1) != ABSENT) return 0xc0;
5303 if (i2cRead( bktr, 0xc3) != ABSENT) return 0xc2;
5304 if (i2cRead( bktr, 0xc5) != ABSENT) return 0xc4;
5305 if (i2cRead( bktr, 0xc7) != ABSENT) return 0xc6;
5306 return -1; /* no tuner found */
5307}
5308
5309/*
5310 * Search for a configuration EEPROM on the i2c bus by looking at i2c addresses
5311 * where EEPROMs are usually found.
5312 */
5313static int locate_eeprom_address( bktr_ptr_t bktr) {
5314 if (i2cRead( bktr, 0xa0) != ABSENT) return 0xa0;
5315 if (i2cRead( bktr, 0xac) != ABSENT) return 0xac;
5316 if (i2cRead( bktr, 0xae) != ABSENT) return 0xae;
5317 return -1; /* no eeprom found */
5318}
5319
5320/*
5321 * determine the card brand/model
5322 * OVERRIDE_CARD, OVERRIDE_TUNER, OVERRIDE_DBX and OVERRIDE_MSP
5323 * can be used to select a specific device, regardless of the
5324 * autodetection and i2c device checks.
5325 *
5326 * The scheme used for probing cards has one major drawback:
5327 * on bt848/849 based cards, it is impossible to work out which type
5328 * of tuner is actually fitted, or if there is extra hardware on board
5329 * connected to GPIO pins (eg radio chips or MSP34xx reset logic)
5330 * The driver cannot tell if the Tuner is PAL,NTSC, Temic or Philips.
5331 *
5332 * All Hauppauge cards have a configuration eeprom which tells us the
5333 * tuner type and other features of the their cards.
5334 * Also, Bt878 based cards (certainly Hauppauge and AverMedia) should support
5335 * sub-system vendor id, identifying the make and model of the card.
5336 *
5337 * The current probe code works as follows
5338 * 1) Check if it is a BT878. If so, read the sub-system vendor id.
5339 * Select the required tuner and other onboard features.
5340 * 2) If it is a BT848, 848A or 849A, continue on:
5341 * 3) Some cards have no I2C devices. Check if the i2c bus is empty
5342 * and if so, our detection job is nearly over.
5343 * 4) Check I2C address 0xa0. If present this will be a Hauppauge card
5344 * or an Osprey card. The Hauppauge EEPROM can determine on board tuner
5345 * type and other features.
5346 * 4) Check I2C address 0xa8. If present this is a STB card.
5347 * Still have to guess on the tuner type.
5348 * 5) Otherwise we are in the dark. Miro cards have the tuner type
5349 * hard-coded on the GPIO pins, but we do not actually know if we have
5350 * a Miro card.
5351 * Some older makes of card put Philips tuners and Temic tuners at
5352 * different I2C addresses, so an i2c bus probe can help, but it is
5353 * really just a guess.
5354 *
5355 * 6) After determining the Tuner Type, we probe the i2c bus for other
5356 * devices at known locations, eg IR-Remote Control, MSP34xx and TDA
5357 * stereo chips.
5358 */
5359
5360#define VENDOR_AVER_MEDIA 0x1461
5361#define VENDOR_HAUPPAUGE 0x0070
5362#define VENDOR_FLYVIDEO 0x1851
5363#define VENDOR_STB 0x10B4
5364
5365static void
5366probeCard( bktr_ptr_t bktr, int verbose, int unit )
5367{
5368 int card, i,j, card_found;
5369 int status;
5370 bt848_ptr_t bt848;
5371 u_char probe_signature[128], *probe_temp;
5372 int any_i2c_devices;
5373 u_char eeprom[256];
5374 int tuner_i2c_address = -1;
5375 int eeprom_i2c_address = -1;
5376
5377 bt848 = bktr->base;
5378
5379 /* Select all GPIO bits as inputs */
5380 bt848->gpio_out_en = 0;
5381 if (bootverbose)
5382 printf("bktr: GPIO is 0x%08x\n", bt848->gpio_data);
5383
5384#ifdef HAUPPAUGE_MSP_RESET
5385 /* Reset the MSP34xx audio chip. This resolves bootup card
5386 * detection problems with old Bt848 based Hauppauge cards with
5387 * MSP34xx stereo audio chips. This must be user enabled because
5388 * at this point the probe function does not know the card type. */
5389 bt848->gpio_out_en = bt848->gpio_out_en | (1<<5);
5390 bt848->gpio_data = bt848->gpio_data | (1<<5); /* write '1' */
5391 DELAY(2500); /* wait 2.5ms */
5392 bt848->gpio_data = bt848->gpio_data & ~(1<<5); /* write '0' */
5393 DELAY(2500); /* wait 2.5ms */
5394 bt848->gpio_data = bt848->gpio_data | (1<<5); /* write '1' */
5395 DELAY(2500); /* wait 2.5ms */
5396#endif
5397
5398 /* Check for the presence of i2c devices */
5399 any_i2c_devices = check_for_i2c_devices( bktr );
5400
5401
5402 /* Check for a user specified override on the card selection */
5403#if defined( OVERRIDE_CARD )
5404 bktr->card = cards[ (card = OVERRIDE_CARD) ];
5405 goto checkEEPROM;
5406#endif
5407 if (bktr->bt848_card != -1 ) {
5408 bktr->card = cards[ (card = bktr->bt848_card) ];
5409 goto checkEEPROM;
5410 }
5411
5412
5413 /* No override, so try and determine the make of the card */
5414
5415 /* On BT878/879 cards, read the sub-system vendor id */
5416 /* This identifies the manufacturer of the card and the model */
5417 /* In theory this can be read from PCI registers but this does not */
5418 /* appear to work on the FlyVideo 98. Hauppauge also warned that */
5419 /* the PCI registers are sometimes not loaded correctly. */
5420 /* Therefore, I will read the sub-system vendor ID from the EEPROM */
5421 /* (just like the Bt878 does during power up initialisation) */
5422
5423 if (bktr->id==BROOKTREE_878 || bktr->id==BROOKTREE_879) {
5424
5425 /* Try and locate the EEPROM */
5426 eeprom_i2c_address = locate_eeprom_address( bktr );
5427 if (eeprom_i2c_address != -1) {
5428
5429 unsigned int subsystem_vendor_id; /* vendors PCI-SIG ID */
5430 unsigned int subsystem_id; /* board model number */
5431 unsigned int byte_252, byte_253, byte_254, byte_255;
5432
5433 bktr->card = cards[ (card = CARD_UNKNOWN) ];
5434 bktr->card.eepromAddr = eeprom_i2c_address;
5435 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5436
5437 readEEProm(bktr, 0, 256, (u_char *) &eeprom );
5438 byte_252 = (unsigned int)eeprom[252];
5439 byte_253 = (unsigned int)eeprom[253];
5440 byte_254 = (unsigned int)eeprom[254];
5441 byte_255 = (unsigned int)eeprom[255];
5442
5443 subsystem_id = (byte_252 << 8) | byte_253;
5444 subsystem_vendor_id = (byte_254 << 8) | byte_255;
5445
5446 if ( bootverbose )
5447 printf("subsytem 0x%04x 0x%04x\n",subsystem_vendor_id,
5448 subsystem_id);
5449
5450 if (subsystem_vendor_id == VENDOR_AVER_MEDIA) {
5451 bktr->card = cards[ (card = CARD_AVER_MEDIA) ];
5452 bktr->card.eepromAddr = eeprom_i2c_address;
5453 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5454 goto checkTuner;
5455 }
5456
5457 if (subsystem_vendor_id == VENDOR_HAUPPAUGE) {
5458 bktr->card = cards[ (card = CARD_HAUPPAUGE) ];
5459 bktr->card.eepromAddr = eeprom_i2c_address;
5460 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5461 goto checkTuner;
5462 }
5463
5464 if (subsystem_vendor_id == VENDOR_FLYVIDEO) {
5465 bktr->card = cards[ (card = CARD_FLYVIDEO) ];
5466 bktr->card.eepromAddr = eeprom_i2c_address;
5467 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5468 goto checkTuner;
5469 }
5470
5471 if (subsystem_vendor_id == VENDOR_STB) {
5472 bktr->card = cards[ (card = CARD_STB) ];
5473 bktr->card.eepromAddr = eeprom_i2c_address;
5474 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5475 goto checkTuner;
5476 }
5477
5478 /* Vendor is unknown. We will use the standard probe code */
5479 /* which may not give best results */
5480 printf("Warning - card vendor 0x%04x (model 0x%04x) unknown. This may cause poor performance\n",subsystem_vendor_id,subsystem_id);
5481 }
5482 else
5483 {
5484 printf("Warning - card has no configuration EEPROM. Cannot determine card make. This may cause poor performance\n");
5485 }
5486 } /* end of bt878/bt879 card detection code */
5487
5488 /* If we get to this point, we must have a Bt848/848A/849A card */
5489 /* or a Bt878/879 with an unknown subsystem vendor id */
5490 /* Try and determine the make of card by clever i2c probing */
5491
5492 /* Check for i2c devices. If none, move on */
5493 if (!any_i2c_devices) {
5494 bktr->card = cards[ (card = CARD_INTEL) ];
5495 bktr->card.eepromAddr = 0;
5496 bktr->card.eepromSize = 0;
5497 goto checkTuner;
5498 }
5499
5500
5501 /* Look for Hauppauge, STB and Osprey cards by the presence */
5502 /* of an EEPROM */
5503 /* Note: Bt878 based cards also use EEPROMs so we can only do this */
5504 /* test on BT848/848A and 849A based cards. */
5505 if ((bktr->id==BROOKTREE_848) ||
5506 (bktr->id==BROOKTREE_848A) ||
5507 (bktr->id==BROOKTREE_849A)) {
5508
5509 /* At i2c address 0xa0, look for Hauppauge and Osprey cards */
5510 if ( (status = i2cRead( bktr, PFC8582_RADDR )) != ABSENT ) {
5511
5512 /* Read the eeprom contents */
5513 bktr->card = cards[ (card = CARD_UNKNOWN) ];
5514 bktr->card.eepromAddr = PFC8582_WADDR;
5515 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5516 readEEProm(bktr, 0, 128, (u_char *) &eeprom );
5517
5518 /* For Hauppauge, check the EEPROM begins with 0x84 */
5519 if (eeprom[0] == 0x84) {
5520 bktr->card = cards[ (card = CARD_HAUPPAUGE) ];
5521 bktr->card.eepromAddr = PFC8582_WADDR;
5522 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5523 goto checkTuner;
5524 }
5525
5526 /* For Osprey, check the EEPROM begins with "MMAC" */
5527 if ( (eeprom[0] == 'M') &&(eeprom[1] == 'M')
5528 &&(eeprom[2] == 'A') &&(eeprom[3] == 'C')) {
5529 bktr->card = cards[ (card = CARD_OSPREY) ];
5530 bktr->card.eepromAddr = PFC8582_WADDR;
5531 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5532 goto checkTuner;
5533 }
5534 printf("Warning: Unknown card type. EEPROM data not recognised\n");
5535 printf("%x %x %x %x\n",eeprom[0],eeprom[1],eeprom[2],eeprom[3]);
5536 }
5537
5538 /* look for an STB card */
5539 if ( (status = i2cRead( bktr, X24C01_RADDR )) != ABSENT ) {
5540 bktr->card = cards[ (card = CARD_STB) ];
5541 bktr->card.eepromAddr = X24C01_WADDR;
5542 bktr->card.eepromSize = (u_char)(128 / EEPROMBLOCKSIZE);
5543 goto checkTuner;
5544 }
5545
5546 }
5547
5548 signCard( bktr, 1, 128, (u_char *) &probe_signature );
5549
5550 if (bootverbose) {
5551 printf("card signature \n");
5552 for (j = 0; j < Bt848_MAX_SIGN; j++) {
5553 printf(" %02x ", probe_signature[j]);
5554 }
5555 printf("\n\n");
5556 }
5557 for (i = 0;
5558 i < (sizeof bt848_card_signature)/ sizeof (struct bt848_card_sig);
5559 i++ ) {
5560
5561 card_found = 1;
5562 probe_temp = (u_char *) &bt848_card_signature[i].signature;
5563
5564 for (j = 0; j < Bt848_MAX_SIGN; j++) {
5565 if ((probe_temp[j] & 0xf) != (probe_signature[j] & 0xf)) {
5566 card_found = 0;
5567 break;
5568 }
5569
5570 }
5571 if (card_found) {
5572 bktr->card = cards[ card = bt848_card_signature[i].card];
5573 bktr->card.tuner = &tuners[ bt848_card_signature[i].tuner];
5574 eeprom_i2c_address = locate_eeprom_address( bktr );
5575 if (eeprom_i2c_address != -1) {
5576 bktr->card.eepromAddr = eeprom_i2c_address;
5577 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5578 } else {
5579 bktr->card.eepromAddr = 0;
5580 bktr->card.eepromSize = 0;
5581 }
5582 goto checkDBX;
5583 }
5584 }
5585
5586 /* We do not know the card type. Default to Miro */
5587 bktr->card = cards[ (card = CARD_MIRO) ];
5588
5589
5590checkEEPROM:
5591 /* look for a configuration eeprom */
5592 eeprom_i2c_address = locate_eeprom_address( bktr );
5593 if (eeprom_i2c_address != -1) {
5594 bktr->card.eepromAddr = eeprom_i2c_address;
5595 bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
5596 } else {
5597 bktr->card.eepromAddr = 0;
5598 bktr->card.eepromSize = 0;
5599 }
5600
5601
5602checkTuner:
5603
5604 /* look for a tuner */
5605 tuner_i2c_address = locate_tuner_address( bktr );
5606 if ( tuner_i2c_address == -1 ) {
5607 bktr->card.tuner = &tuners[ NO_TUNER ];
5608 goto checkDBX;
5609 }
5610
5611#if defined( OVERRIDE_TUNER )
5612 bktr->card.tuner = &tuners[ OVERRIDE_TUNER ];
5613 goto checkDBX;
5614#endif
5615 if (bktr->bt848_tuner != -1 ) {
5616 bktr->card.tuner = &tuners[ bktr->bt848_tuner & 0xff ];
5617 goto checkDBX;
5618 }
5619
5620 /* Check for i2c devices */
5621 if (!any_i2c_devices) {
5622 bktr->card.tuner = &tuners[ NO_TUNER ];
5623 goto checkDBX;
5624 }
5625
5626 /* differentiate type of tuner */
5627
5628 switch (card) {
5629 case CARD_MIRO:
5630 switch (((bt848->gpio_data >> 10)-1)&7) {
5631 case 0: bktr->card.tuner = &tuners[ TEMIC_PAL ]; break;
5632 case 1: bktr->card.tuner = &tuners[ PHILIPS_PAL ]; break;
5633 case 2: bktr->card.tuner = &tuners[ PHILIPS_NTSC ]; break;
5634 case 3: bktr->card.tuner = &tuners[ PHILIPS_SECAM ]; break;
5635 case 4: bktr->card.tuner = &tuners[ NO_TUNER ]; break;
5636 case 5: bktr->card.tuner = &tuners[ PHILIPS_PALI ]; break;
5637 case 6: bktr->card.tuner = &tuners[ TEMIC_NTSC ]; break;
5638 case 7: bktr->card.tuner = &tuners[ TEMIC_PALI ]; break;
5639 }
5640 goto checkDBX;
5641 break;
5642
5643 case CARD_HAUPPAUGE:
5644 /* Hauppauge kindly supplied the following Tuner Table */
5645 /* FIXME: I think the tuners the driver selects for types */
5646 /* 0x08 and 0x15 may be incorrect but no one has complained. */
5647 /*
5648 ID Tuner Model Format We select Format
5649 0 NONE
5650 1 EXTERNAL
5651 2 OTHER
5652 3 Philips FI1216 BG
5653 4 Philips FI1216MF BGLL'
5654 5 Philips FI1236 MN PHILIPS_NTSC
5655 6 Philips FI1246 I PHILIPS_PALI
5656 7 Philips FI1256 DK
5657 8 Philips FI1216 MK2 BG PHILIPS_PALI
5658 9 Philips FI1216MF MK2 BGLL'
5659 a Philips FI1236 MK2 MN PHILIPS_NTSC
5660 b Philips FI1246 MK2 I PHILIPS_PALI
5661 c Philips FI1256 MK2 DK
5662 d Temic 4032FY5 NTSC TEMIC_NTSC
5663 e Temic 4002FH5 BG TEMIC_PAL
5664 f Temic 4062FY5 I TEMIC_PALI
5665 10 Philips FR1216 MK2 BG
5666 11 Philips FR1216MF MK2 BGLL'
5667 12 Philips FR1236 MK2 MN PHILIPS_FR1236_NTSC
5668 13 Philips FR1246 MK2 I
5669 14 Philips FR1256 MK2 DK
5670 15 Philips FM1216 BG PHILIPS_FR1216_PAL
5671 16 Philips FM1216MF BGLL'
5672 17 Philips FM1236 MN PHILIPS_FR1236_NTSC
5673 18 Philips FM1246 I
5674 19 Philips FM1256 DK
5675 1a Temic 4036FY5 MN - FI1236 MK2 clone
5676 1b Samsung TCPN9082D MN
5677 1c Samsung TCPM9092P Pal BG/I/DK
5678 1d Temic 4006FH5 BG PHILIPS_PALI clone
5679 1e Samsung TCPN9085D MN/Radio
5680 1f Samsung TCPB9085P Pal BG/I/DK / Radio
5681 20 Samsung TCPL9091P Pal BG & Secam L/L'
5682 21 Temic 4039FY5 NTSC Radio
5683
5684 */
5685
5686 if (bktr->card.eepromAddr != 0) {
5687 u_char tuner_code;
5688 u_int model;
5689 u_int revision;
5690
5691 readEEProm(bktr, 0, 128, (u_char *) &eeprom );
5692
5693
5694 /* Determine the model number from the eeprom */
5695 model = (eeprom[12] << 8 | eeprom[11]);
5696 revision = (eeprom[15] << 16 | eeprom[14] << 8 | eeprom[13]);
5697 if (verbose)
5698 printf("bktr%d: Hauppauge Model %d %c%c%c%c\n",
5699 unit,
5700 model,
5701 ((revision >> 18) & 0x3f) + 32,
5702 ((revision >> 12) & 0x3f) + 32,
5703 ((revision >> 6) & 0x3f) + 32,
5704 ((revision >> 0) & 0x3f) + 32 );
5705
5706 /* Determine the tuner type from the eeprom */
5707 tuner_code = eeprom[9];
5708 switch (tuner_code) {
5709
5710 case 0x5:
5711 case 0x0a:
5712 case 0x1a:
5713 bktr->card.tuner = &tuners[ PHILIPS_NTSC ];
5714 goto checkDBX;
5715
5716 case 0x12:
5717 case 0x17:
5718 bktr->card.tuner = &tuners[ PHILIPS_FR1236_NTSC ];
5719 goto checkDBX;
5720
5721 case 0x6:
5722 case 0x8:
5723 case 0xb:
5724 case 0x1d:
5725 bktr->card.tuner = &tuners[ PHILIPS_PALI ];
5726 goto checkDBX;
5727
5728 case 0xd:
5729 bktr->card.tuner = &tuners[ TEMIC_NTSC ];
5730 goto checkDBX;
5731
5732 case 0xe:
5733 bktr->card.tuner = &tuners[ TEMIC_PAL];
5734 goto checkDBX;
5735
5736 case 0xf:
5737 bktr->card.tuner = &tuners[ TEMIC_PALI ];
5738 goto checkDBX;
5739
5740 case 0x15:
5741 bktr->card.tuner = &tuners[ PHILIPS_FR1216_PAL];
5742 goto checkDBX;
5743
5744 default :
5745 printf("Warning - Unknown Hauppauge Tuner 0x%x\n",tuner_code);
5746 }
5747 }
5748 break;
5749
5750 case CARD_AVER_MEDIA:
5751 /* AVerMedia kindly supplied some details of their EEPROM contents
5752 * which allow us to auto select the Tuner Type.
5753 * Only the newer AVerMedia cards actually have an EEPROM.
5754 */
5755 if (bktr->card.eepromAddr != 0) {
5756
5757 u_char tuner_make; /* Eg Philips, Temic */
5758 u_char tuner_tv_fm; /* TV or TV with FM Radio */
5759 u_char tuner_format; /* Eg NTSC, PAL, SECAM */
5760 int tuner;
5761
5762 int tuner_0_table[] = {
5763 PHILIPS_NTSC, PHILIPS_PAL,
5764 PHILIPS_PAL, PHILIPS_PAL,
5765 PHILIPS_PAL, PHILIPS_PAL,
5766 PHILIPS_SECAM, PHILIPS_SECAM,
5767 PHILIPS_SECAM, PHILIPS_PAL};
5768
5769 int tuner_0_fm_table[] = {
5770 PHILIPS_FR1236_NTSC, PHILIPS_FR1216_PAL,
5771 PHILIPS_FR1216_PAL, PHILIPS_FR1216_PAL,
5772 PHILIPS_FR1216_PAL, PHILIPS_FR1216_PAL,
5773 PHILIPS_FR1236_SECAM, PHILIPS_FR1236_SECAM,
5774 PHILIPS_FR1236_SECAM, PHILIPS_FR1216_PAL};
5775
5776 int tuner_1_table[] = {
5777 TEMIC_NTSC, TEMIC_PAL, TEMIC_PAL,
5778 TEMIC_PAL, TEMIC_PAL, TEMIC_PAL,
5779 TEMIC_SECAM, TEMIC_SECAM, TEMIC_SECAM,
5780 TEMIC_PAL};
5781
5782
5783 /* Extract information from the EEPROM data */
5784 readEEProm(bktr, 0, 128, (u_char *) &eeprom );
5785 tuner_make = (eeprom[0x41] & 0x7);
5786 tuner_tv_fm = (eeprom[0x41] & 0x18) >> 3;
5787 tuner_format = (eeprom[0x42] & 0xf0) >> 4;
5788
5789 /* Treat tuner makes 0 (Philips) and 2 (LG) the same */
5790 if ( ((tuner_make == 0) || (tuner_make == 2))
5791 && (tuner_format <= 9) && (tuner_tv_fm == 0) ) {
5792 tuner = tuner_0_table[tuner_format];
5793 bktr->card.tuner = &tuners[ tuner ];
5794 goto checkDBX;
5795 }
5796
5797 if ( ((tuner_make == 0) || (tuner_make == 2))
5798 && (tuner_format <= 9) && (tuner_tv_fm == 1) ) {
5799 tuner = tuner_0_fm_table[tuner_format];
5800 bktr->card.tuner = &tuners[ tuner ];
5801 goto checkDBX;
5802 }
5803
5804 if ( (tuner_make == 1) && (tuner_format <= 9) ) {
5805 tuner = tuner_1_table[tuner_format];
5806 bktr->card.tuner = &tuners[ tuner ];
5807 goto checkDBX;
5808 }
5809
5810 printf("Warning - Unknown AVerMedia Tuner Make %d Format %d\n",
5811 tuner_make, tuner_format);
5812 }
5813 break;
5814
5815 } /* end switch(card) */
5816
5817 /* At this point, a goto checkDBX has not occured */
5818 /* We have not been able to select a Tuner */
5819 /* Some cards make use of the tuner address to */
5820 /* identify the make/model of tuner */
5821
5822 /* At address 0xc0/0xc1 we often find a TEMIC NTSC */
5823 if ( i2cRead( bktr, 0xc1 ) != ABSENT ) {
5824 bktr->card.tuner = &tuners[ TEMIC_NTSC ];
5825 goto checkDBX;
5826 }
5827
5828 /* At address 0xc6/0xc7 we often find a PHILIPS NTSC Tuner */
5829 if ( i2cRead( bktr, 0xc7 ) != ABSENT ) {
5830 bktr->card.tuner = &tuners[ PHILIPS_NTSC ];
5831 goto checkDBX;
5832 }
5833
5834 /* Address 0xc2/0xc3 is default (or common address) for several */
5835 /* tuners and we cannot tell which is which. */
5836 /* And for all other tuner i2c addresses, select the default */
5837 bktr->card.tuner = &tuners[ DEFAULT_TUNER ];
5838
5839
5840checkDBX:
5841#if defined( OVERRIDE_DBX )
5842 bktr->card.dbx = OVERRIDE_DBX;
5843 goto checkMSP;
5844#endif
5845 /* Check for i2c devices */
5846 if (!any_i2c_devices) {
5847 goto checkMSP;
5848 }
5849
5850 /* probe for BTSC (dbx) chip */
5851 if ( i2cRead( bktr, TDA9850_RADDR ) != ABSENT )
5852 bktr->card.dbx = 1;
5853
5854checkMSP:
5855 /* If this is a Hauppauge Bt878 card, we need to enable the
5856 * MSP 34xx audio chip.
5857 * If this is a Hauppauge Bt848 card, reset the MSP device.
5858 * The MSP reset line is wired to GPIO pin 5. On Bt878 cards a pulldown
5859 * resistor holds the device in reset until we set GPIO pin 5.
5860 */
5861
5862 /* Optionally skip the MSP reset. This is handy if you initialise the
5863 * MSP audio in another operating system (eg Windows) first and then
5864 * do a soft reboot.
5865 */
5866
5867#ifndef BKTR_NO_MSP_RESET
5868 if (card == CARD_HAUPPAUGE) {
5869 bt848->gpio_out_en = bt848->gpio_out_en | (1<<5);
5870 bt848->gpio_data = bt848->gpio_data | (1<<5); /* write '1' */
5871 DELAY(2500); /* wait 2.5ms */
5872 bt848->gpio_data = bt848->gpio_data & ~(1<<5); /* write '0' */
5873 DELAY(2500); /* wait 2.5ms */
5874 bt848->gpio_data = bt848->gpio_data | (1<<5); /* write '1' */
5875 DELAY(2500); /* wait 2.5ms */
5876 }
5877#endif
5878
5879#if defined( OVERRIDE_MSP )
5880 bktr->card.msp3400c = OVERRIDE_MSP;
5881 goto checkMSPEnd;
5882#endif
5883
5884 /* Check for i2c devices */
5885 if (!any_i2c_devices) {
5886 goto checkMSPEnd;
5887 }
5888
5889 if ( i2cRead( bktr, MSP3400C_RADDR ) != ABSENT )
5890 bktr->card.msp3400c = 1;
5891
5892checkMSPEnd:
5893
5894/* Start of Check Remote */
5895 /* Check for the Hauppauge IR Remote Control */
5896 /* If there is an external unit, the internal will be ignored */
5897
5898 bktr->remote_control = 0; /* initial value */
5899
5900 if (any_i2c_devices) {
5901 if (i2cRead( bktr, HAUP_REMOTE_EXT_RADDR ) != ABSENT )
5902 {
5903 bktr->remote_control = 1;
5904 bktr->remote_control_addr = HAUP_REMOTE_EXT_RADDR;
5905 }
5906 else if (i2cRead( bktr, HAUP_REMOTE_INT_RADDR ) != ABSENT )
5907 {
5908 bktr->remote_control = 1;
5909 bktr->remote_control_addr = HAUP_REMOTE_INT_RADDR;
5910 }
5911
5912 }
5913 /* If a remote control is found, poll it 5 times to turn off the LED */
5914 if (bktr->remote_control) {
5915 int i;
5916 for (i=0; i<5; i++)
5917 i2cRead( bktr, bktr->remote_control_addr );
5918 }
5919/* End of Check Remote */
5920
5921#if defined( BKTR_USE_PLL )
5922 bktr->xtal_pll_mode = BT848_USE_PLL;
5923 goto checkPLLEnd;
5924#endif
5925 /* Default is to use XTALS and not PLL mode */
5926 bktr->xtal_pll_mode = BT848_USE_XTALS;
5927
5928 /* Enable PLL mode for PAL/SECAM users on Hauppauge 878 cards */
5929 if ((card == CARD_HAUPPAUGE) &&
5930 (bktr->id==BROOKTREE_878 || bktr->id==BROOKTREE_879) )
5931 bktr->xtal_pll_mode = BT848_USE_PLL;
5932
5933
5934 /* Enable PLL mode for OSPREY users */
5935 if (card == CARD_OSPREY)
5936 bktr->xtal_pll_mode = BT848_USE_PLL;
5937
5938 /* Enable PLL mode for PAL/SECAM users on FlyVideo 878 cards */
5939 if ((card == CARD_FLYVIDEO) &&
5940 (bktr->id==BROOKTREE_878 || bktr->id==BROOKTREE_879) )
5941 bktr->xtal_pll_mode = BT848_USE_PLL;
5942
5943 /* Enable PLL mode for Video Highway Xtreme users */
5944 if (card == CARD_VIDEO_HIGHWAY_XTREME)
5945 bktr->xtal_pll_mode = BT848_USE_PLL;
5946
5947#if defined( BKTR_USE_PLL )
5948checkPLLEnd:
5949#endif
5950
5951
5952 bktr->card.tuner_pllAddr = tuner_i2c_address;
5953
5954 if ( verbose ) {
5955 printf( "%s", bktr->card.name );
5956 if ( bktr->card.tuner )
5957 printf( ", %s tuner", bktr->card.tuner->name );
5958 if ( bktr->card.dbx )
5959 printf( ", dbx stereo" );
5960 if ( bktr->card.msp3400c )
5961 printf( ", msp3400c stereo" );
5962 if ( bktr->remote_control )
5963 printf( ", remote control" );
5964 printf( ".\n" );
5965 }
5966}
5967#undef ABSENT
5968
5969
5970/******************************************************************************
5971 * tuner specific routines:
5972 */
5973
5974
5975/* scaling factor for frequencies expressed as ints */
5976#define FREQFACTOR 16
5977
5978/*
5979 * Format:
5980 * entry 0: MAX legal channel
5981 * entry 1: IF frequency
5982 * expressed as fi{mHz} * 16,
5983 * eg 45.75mHz == 45.75 * 16 = 732
5984 * entry 2: [place holder/future]
5985 * entry 3: base of channel record 0
5986 * entry 3 + (x*3): base of channel record 'x'
5987 * entry LAST: NULL channel entry marking end of records
5988 *
5989 * Record:
5990 * int 0: base channel
5991 * int 1: frequency of base channel,
5992 * expressed as fb{mHz} * 16,
5993 * int 2: offset frequency between channels,
5994 * expressed as fo{mHz} * 16,
5995 */
5996
5997/*
5998 * North American Broadcast Channels:
5999 *
6000 * 2: 55.25 mHz - 4: 67.25 mHz
6001 * 5: 77.25 mHz - 6: 83.25 mHz
6002 * 7: 175.25 mHz - 13: 211.25 mHz
6003 * 14: 471.25 mHz - 83: 885.25 mHz
6004 *
6005 * IF freq: 45.75 mHz
6006 */
6007#define OFFSET 6.00
6008static int nabcst[] = {
6009 83, (int)( 45.75 * FREQFACTOR), 0,
6010 14, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6011 7, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6012 5, (int)( 77.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6013 2, (int)( 55.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6014 0
6015};
6016#undef OFFSET
6017
6018/*
6019 * North American Cable Channels, IRC:
6020 *
6021 * 2: 55.25 mHz - 4: 67.25 mHz
6022 * 5: 77.25 mHz - 6: 83.25 mHz
6023 * 7: 175.25 mHz - 13: 211.25 mHz
6024 * 14: 121.25 mHz - 22: 169.25 mHz
6025 * 23: 217.25 mHz - 94: 643.25 mHz
6026 * 95: 91.25 mHz - 99: 115.25 mHz
6027 *
6028 * IF freq: 45.75 mHz
6029 */
6030#define OFFSET 6.00
6031static int irccable[] = {
6032 99, (int)( 45.75 * FREQFACTOR), 0,
6033 95, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6034 23, (int)(217.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6035 14, (int)(121.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6036 7, (int)(175.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6037 5, (int)( 77.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6038 2, (int)( 55.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6039 0
6040};
6041#undef OFFSET
6042
6043/*
6044 * North American Cable Channels, HRC:
6045 *
6046 * 2: 54 mHz - 4: 66 mHz
6047 * 5: 78 mHz - 6: 84 mHz
6048 * 7: 174 mHz - 13: 210 mHz
6049 * 14: 120 mHz - 22: 168 mHz
6050 * 23: 216 mHz - 94: 642 mHz
6051 * 95: 90 mHz - 99: 114 mHz
6052 *
6053 * IF freq: 45.75 mHz
6054 */
6055#define OFFSET 6.00
6056static int hrccable[] = {
6057 99, (int)( 45.75 * FREQFACTOR), 0,
6058 95, (int)( 90.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6059 23, (int)(216.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6060 14, (int)(120.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6061 7, (int)(174.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6062 5, (int)( 78.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6063 2, (int)( 54.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6064 0
6065};
6066#undef OFFSET
6067
6068/*
6069 * Western European broadcast channels:
6070 *
6071 * (there are others that appear to vary between countries - rmt)
6072 *
6073 * here's the table Philips provides:
6074 * caution, some of the offsets don't compute...
6075 *
6076 * 1 4525 700 N21
6077 *
6078 * 2 4825 700 E2
6079 * 3 5525 700 E3
6080 * 4 6225 700 E4
6081 *
6082 * 5 17525 700 E5
6083 * 6 18225 700 E6
6084 * 7 18925 700 E7
6085 * 8 19625 700 E8
6086 * 9 20325 700 E9
6087 * 10 21025 700 E10
6088 * 11 21725 700 E11
6089 * 12 22425 700 E12
6090 *
6091 * 13 5375 700 ITA
6092 * 14 6225 700 ITB
6093 *
6094 * 15 8225 700 ITC
6095 *
6096 * 16 17525 700 ITD
6097 * 17 18325 700 ITE
6098 *
6099 * 18 19225 700 ITF
6100 * 19 20125 700 ITG
6101 * 20 21025 700 ITH
6102 *
6103 * 21 47125 800 E21
6104 * 22 47925 800 E22
6105 * 23 48725 800 E23
6106 * 24 49525 800 E24
6107 * 25 50325 800 E25
6108 * 26 51125 800 E26
6109 * 27 51925 800 E27
6110 * 28 52725 800 E28
6111 * 29 53525 800 E29
6112 * 30 54325 800 E30
6113 * 31 55125 800 E31
6114 * 32 55925 800 E32
6115 * 33 56725 800 E33
6116 * 34 57525 800 E34
6117 * 35 58325 800 E35
6118 * 36 59125 800 E36
6119 * 37 59925 800 E37
6120 * 38 60725 800 E38
6121 * 39 61525 800 E39
6122 * 40 62325 800 E40
6123 * 41 63125 800 E41
6124 * 42 63925 800 E42
6125 * 43 64725 800 E43
6126 * 44 65525 800 E44
6127 * 45 66325 800 E45
6128 * 46 67125 800 E46
6129 * 47 67925 800 E47
6130 * 48 68725 800 E48
6131 * 49 69525 800 E49
6132 * 50 70325 800 E50
6133 * 51 71125 800 E51
6134 * 52 71925 800 E52
6135 * 53 72725 800 E53
6136 * 54 73525 800 E54
6137 * 55 74325 800 E55
6138 * 56 75125 800 E56
6139 * 57 75925 800 E57
6140 * 58 76725 800 E58
6141 * 59 77525 800 E59
6142 * 60 78325 800 E60
6143 * 61 79125 800 E61
6144 * 62 79925 800 E62
6145 * 63 80725 800 E63
6146 * 64 81525 800 E64
6147 * 65 82325 800 E65
6148 * 66 83125 800 E66
6149 * 67 83925 800 E67
6150 * 68 84725 800 E68
6151 * 69 85525 800 E69
6152 *
6153 * 70 4575 800 IA
6154 * 71 5375 800 IB
6155 * 72 6175 800 IC
6156 *
6157 * 74 6925 700 S01
6158 * 75 7625 700 S02
6159 * 76 8325 700 S03
6160 *
6161 * 80 10525 700 S1
6162 * 81 11225 700 S2
6163 * 82 11925 700 S3
6164 * 83 12625 700 S4
6165 * 84 13325 700 S5
6166 * 85 14025 700 S6
6167 * 86 14725 700 S7
6168 * 87 15425 700 S8
6169 * 88 16125 700 S9
6170 * 89 16825 700 S10
6171 * 90 23125 700 S11
6172 * 91 23825 700 S12
6173 * 92 24525 700 S13
6174 * 93 25225 700 S14
6175 * 94 25925 700 S15
6176 * 95 26625 700 S16
6177 * 96 27325 700 S17
6178 * 97 28025 700 S18
6179 * 98 28725 700 S19
6180 * 99 29425 700 S20
6181 *
6182 *
6183 * Channels S21 - S41 are taken from
6184 * http://gemma.apple.com:80/dev/technotes/tn/tn1012.html
6185 *
6186 * 100 30325 800 S21
6187 * 101 31125 800 S22
6188 * 102 31925 800 S23
6189 * 103 32725 800 S24
6190 * 104 33525 800 S25
6191 * 105 34325 800 S26
6192 * 106 35125 800 S27
6193 * 107 35925 800 S28
6194 * 108 36725 800 S29
6195 * 109 37525 800 S30
6196 * 110 38325 800 S31
6197 * 111 39125 800 S32
6198 * 112 39925 800 S33
6199 * 113 40725 800 S34
6200 * 114 41525 800 S35
6201 * 115 42325 800 S36
6202 * 116 43125 800 S37
6203 * 117 43925 800 S38
6204 * 118 44725 800 S39
6205 * 119 45525 800 S40
6206 * 120 46325 800 S41
6207 *
6208 * 121 3890 000 IFFREQ
6209 *
6210 */
6211static int weurope[] = {
6212 121, (int)( 38.90 * FREQFACTOR), 0,
6213 100, (int)(303.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6214 90, (int)(231.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR),
6215 80, (int)(105.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR),
6216 74, (int)( 69.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR),
6217 21, (int)(471.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6218 17, (int)(183.25 * FREQFACTOR), (int)(9.00 * FREQFACTOR),
6219 16, (int)(175.25 * FREQFACTOR), (int)(9.00 * FREQFACTOR),
6220 15, (int)(82.25 * FREQFACTOR), (int)(8.50 * FREQFACTOR),
6221 13, (int)(53.75 * FREQFACTOR), (int)(8.50 * FREQFACTOR),
6222 5, (int)(175.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR),
6223 2, (int)(48.25 * FREQFACTOR), (int)(7.00 * FREQFACTOR),
6224 0
6225};
6226
6227/*
6228 * Japanese Broadcast Channels:
6229 *
6230 * 1: 91.25MHz - 3: 103.25MHz
6231 * 4: 171.25MHz - 7: 189.25MHz
6232 * 8: 193.25MHz - 12: 217.25MHz (VHF)
6233 * 13: 471.25MHz - 62: 765.25MHz (UHF)
6234 *
6235 * IF freq: 45.75 mHz
6236 * OR
6237 * IF freq: 58.75 mHz
6238 */
6239#define OFFSET 6.00
6240#define IF_FREQ 45.75
6241static int jpnbcst[] = {
6242 62, (int)(IF_FREQ * FREQFACTOR), 0,
6243 13, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6244 8, (int)(193.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6245 4, (int)(171.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6246 1, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6247 0
6248};
6249#undef IF_FREQ
6250#undef OFFSET
6251
6252/*
6253 * Japanese Cable Channels:
6254 *
6255 * 1: 91.25MHz - 3: 103.25MHz
6256 * 4: 171.25MHz - 7: 189.25MHz
6257 * 8: 193.25MHz - 12: 217.25MHz
6258 * 13: 109.25MHz - 21: 157.25MHz
6259 * 22: 165.25MHz
6260 * 23: 223.25MHz - 63: 463.25MHz
6261 *
6262 * IF freq: 45.75 mHz
6263 */
6264#define OFFSET 6.00
6265#define IF_FREQ 45.75
6266static int jpncable[] = {
6267 63, (int)(IF_FREQ * FREQFACTOR), 0,
6268 23, (int)(223.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6269 22, (int)(165.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6270 13, (int)(109.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6271 8, (int)(193.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6272 4, (int)(171.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6273 1, (int)( 91.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6274 0
6275};
6276#undef IF_FREQ
6277#undef OFFSET
6278
6279/*
6280 * xUSSR Broadcast Channels:
6281 *
6282 * 1: 49.75MHz - 2: 59.25MHz
6283 * 3: 77.25MHz - 5: 93.25MHz
6284 * 6: 175.25MHz - 12: 223.25MHz
6285 * 13-20 - not exist
6286 * 21: 471.25MHz - 34: 575.25MHz
6287 * 35: 583.25MHz - 69: 855.25MHz
6288 *
6289 * Cable channels
6290 *
6291 * 70: 111.25MHz - 77: 167.25MHz
6292 * 78: 231.25MHz -107: 463.25MHz
6293 *
6294 * IF freq: 38.90 MHz
6295 */
6296#define IF_FREQ 38.90
6297static int xussr[] = {
6298 107, (int)(IF_FREQ * FREQFACTOR), 0,
6299 78, (int)(231.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6300 70, (int)(111.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6301 35, (int)(583.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6302 21, (int)(471.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6303 6, (int)(175.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6304 3, (int)( 77.25 * FREQFACTOR), (int)(8.00 * FREQFACTOR),
6305 1, (int)( 49.75 * FREQFACTOR), (int)(9.50 * FREQFACTOR),
6306 0
6307};
6308#undef IF_FREQ
6309
6310/*
6311 * Australian broadcast channels
6312 */
6313#define OFFSET 7.00
6314static int australia[] = {
6315 83, (int)( 45.00 * FREQFACTOR), 0,
6316 28, (int)(520.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6317 14, (int)(471.25 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6318 11, (int)(214.50 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6319 10, (int)(201.50 * FREQFACTOR), (int)( 13.00 * FREQFACTOR),
6320 7, (int)(174.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6321 3, (int)( 85.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6322 2, (int)( 56.00 * FREQFACTOR), (int)(OFFSET * FREQFACTOR),
6323 0
6324};
6325#undef OFFSET
6326
6327static struct {
6328 int *ptr;
6329 char name[BT848_MAX_CHNLSET_NAME_LEN];
6330} freqTable[] = {
6331 {NULL, ""},
6332 {nabcst, "nabcst"},
6333 {irccable, "cableirc"},
6334 {hrccable, "cablehrc"},
6335 {weurope, "weurope"},
6336 {jpnbcst, "jpnbcst"},
6337 {jpncable, "jpncable"},
6338 {xussr, "xussr"},
6339 {australia, "australia"},
6340
6341};
6342
6343#define TBL_CHNL freqTable[ bktr->tuner.chnlset ].ptr[ x ]
6344#define TBL_BASE_FREQ freqTable[ bktr->tuner.chnlset ].ptr[ x + 1 ]
6345#define TBL_OFFSET freqTable[ bktr->tuner.chnlset ].ptr[ x + 2 ]
6346static int
6347frequency_lookup( bktr_ptr_t bktr, int channel )
6348{
6349 int x;
6350
6351 /* check for "> MAX channel" */
6352 x = 0;
6353 if ( channel > TBL_CHNL )
6354 return( -1 );
6355
6356 /* search the table for data */
6357 for ( x = 3; TBL_CHNL; x += 3 ) {
6358 if ( channel >= TBL_CHNL ) {
6359 return( TBL_BASE_FREQ +
6360 ((channel - TBL_CHNL) * TBL_OFFSET) );
6361 }
6362 }
6363
6364 /* not found, must be below the MIN channel */
6365 return( -1 );
6366}
6367#undef TBL_OFFSET
6368#undef TBL_BASE_FREQ
6369#undef TBL_CHNL
6370
6371
6372#define TBL_IF freqTable[ bktr->tuner.chnlset ].ptr[ 1 ]
6373/*
6374 * set the frequency of the tuner
6375 */
6376static int
6377tv_freq( bktr_ptr_t bktr, int frequency )
6378{
6379 const struct TUNER* tuner;
6380 u_char addr;
6381 u_char control;
6382 u_char band;
6383 int N;
6384
6385 tuner = bktr->card.tuner;
6386 if ( tuner == NULL )
6387 return( -1 );
6388
6389 /*
6390 * select the band based on frequency
6391 * XXX FIXME: get the cross-over points from the tuner struct
6392 */
6393 if ( frequency < (160 * FREQFACTOR) )
6394 N = 0;
6395 else if ( frequency < (454 * FREQFACTOR) )
6396 N = 1;
6397 else
6398 N = 2;
6399
6400 if(frequency > RADIO_OFFSET) {
6401 N=3;
6402 frequency -= RADIO_OFFSET;
6403 }
6404
6405 /* set the address of the PLL */
6406 addr = bktr->card.tuner_pllAddr;
6407 control = tuner->pllControl[ N ];
6408 band = tuner->bandAddrs[ N ];
6409 if(!(band && control)) /* Don't try to set un- */
6410 return(-1); /* supported modes. */
6411
6412 if(N==3)
6413 band |= bktr->tuner.radio_mode;
6414
6415 /*
6416 * N = 16 * { fRF(pc) + fIF(pc) }
6417 * where:
6418 * pc is picture carrier, fRF & fIF are in mHz
6419 *
6420 * frequency was passed in as mHz * 16
6421 */
6422#if defined( TEST_TUNER_AFC )
6423 if ( bktr->tuner.afc )
6424 frequency -= 4;
6425#endif
6426
6427 if(bktr->bt848_tuner == ALPS_TSCH5 && N == 3) /* for FM frequency */
6428 N = frequency;
6429 else
6430 N = frequency + TBL_IF;
6431
6432 if ( frequency > bktr->tuner.frequency ) {
6433 i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff );
6434 i2cWrite( bktr, addr, control, band );
6435 }
6436 else {
6437 i2cWrite( bktr, addr, control, band );
6438 i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff );
6439 }
6440
6441#if defined( TUNER_AFC )
6442 if ( bktr->tuner.afc == TRUE ) {
6443 if ( (N = do_afc( bktr, addr, N )) < 0 ) {
6444 /* AFC failed, restore requested frequency */
6445 N = frequency + TBL_IF;
6446 i2cWrite( bktr, addr, (N>>8) & 0x7f, N & 0xff );
6447 }
6448 else
6449 frequency = N - TBL_IF;
6450 }
6451#endif /* TUNER_AFC */
6452
6453 /* update frequency */
6454 bktr->tuner.frequency = frequency;
6455
6456 return( 0 );
6457}
6458
6459#if defined( TUNER_AFC )
6460/*
6461 *
6462 */
6463static int
6464do_afc( bktr_ptr_t bktr, int addr, int frequency )
6465{
6466 int step;
6467 int status;
6468 int origFrequency;
6469
6470 origFrequency = frequency;
6471
6472 /* wait for first setting to take effect */
6473 tsleep( BKTR_SLEEP, PZERO, "tuning", hz/8 );
6474
6475 if ( (status = i2cRead( bktr, addr + 1 )) < 0 )
6476 return( -1 );
6477
6478#if defined( TEST_TUNER_AFC )
6479 printf( "\nOriginal freq: %d, status: 0x%02x\n", frequency, status );
6480#endif
6481 for ( step = 0; step < AFC_MAX_STEP; ++step ) {
6482 if ( (status = i2cRead( bktr, addr + 1 )) < 0 )
6483 goto fubar;
6484 if ( !(status & 0x40) ) {
6485#if defined( TEST_TUNER_AFC )
6486 printf( "no lock!\n" );
6487#endif
6488 goto fubar;
6489 }
6490
6491 switch( status & AFC_BITS ) {
6492 case AFC_FREQ_CENTERED:
6493#if defined( TEST_TUNER_AFC )
6494 printf( "Centered, freq: %d, status: 0x%02x\n", frequency, status );
6495#endif
6496 return( frequency );
6497
6498 case AFC_FREQ_MINUS_125:
6499 case AFC_FREQ_MINUS_62:
6500#if defined( TEST_TUNER_AFC )
6501 printf( "Low, freq: %d, status: 0x%02x\n", frequency, status );
6502#endif
6503 --frequency;
6504 break;
6505
6506 case AFC_FREQ_PLUS_62:
6507 case AFC_FREQ_PLUS_125:
6508#if defined( TEST_TUNER_AFC )
6509 printf( "Hi, freq: %d, status: 0x%02x\n", frequency, status );
6510#endif
6511 ++frequency;
6512 break;
6513 }
6514
6515 i2cWrite( bktr, addr,
6516 (frequency>>8) & 0x7f, frequency & 0xff );
6517 DELAY( AFC_DELAY );
6518 }
6519
6520 fubar:
6521 i2cWrite( bktr, addr,
6522 (origFrequency>>8) & 0x7f, origFrequency & 0xff );
6523
6524 return( -1 );
6525}
6526#endif /* TUNER_AFC */
6527#undef TBL_IF
6528
6529
6530/*
6531 * set the channel of the tuner
6532 */
6533static int
6534tv_channel( bktr_ptr_t bktr, int channel )
6535{
6536 int frequency;
6537
6538 /* calculate the frequency according to tuner type */
6539 if ( (frequency = frequency_lookup( bktr, channel )) < 0 )
6540 return( -1 );
6541
6542 /* set the new frequency */
6543 if ( tv_freq( bktr, frequency ) < 0 )
6544 return( -1 );
6545
6546 /* OK to update records */
6547 return( (bktr->tuner.channel = channel) );
6548}
6549
6550/*
6551 * get channelset name
6552 */
6553static int
6554tuner_getchnlset(struct bktr_chnlset *chnlset)
6555{
6556 if (( chnlset->index < CHNLSET_MIN ) ||
6557 ( chnlset->index > CHNLSET_MAX ))
6558 return( EINVAL );
6559
6560 memcpy(&chnlset->name, &freqTable[chnlset->index].name,
6561 BT848_MAX_CHNLSET_NAME_LEN);
6562
6563 chnlset->max_channel=freqTable[chnlset->index].ptr[0];
6564 return( 0 );
6565}
6566/******************************************************************************
6567 * audio specific routines:
6568 */
6569
6570
6571/*
6572 *
6573 */
6574#define AUDIOMUX_DISCOVER_NOT
6575static int
6576set_audio( bktr_ptr_t bktr, int cmd )
6577{
6578 bt848_ptr_t bt848;
6579 u_long temp;
6580 volatile u_char idx;
6581
6582#if defined( AUDIOMUX_DISCOVER )
6583 if ( cmd >= 200 )
6584 cmd -= 200;
6585 else
6586#endif /* AUDIOMUX_DISCOVER */
6587
6588 /* check for existance of audio MUXes */
6589 if ( !bktr->card.audiomuxs[ 4 ] )
6590 return( -1 );
6591
6592 switch (cmd) {
6593 case AUDIO_TUNER:
6594#ifdef BKTR_REVERSEMUTE
6595 bktr->audio_mux_select = 3;
6596#else
6597 bktr->audio_mux_select = 0;
6598#endif
6599
6600 if (bktr->reverse_mute )
6601 bktr->audio_mux_select = 0;
6602 else
6603 bktr->audio_mux_select = 3;
6604
6605 break;
6606 case AUDIO_EXTERN:
6607 bktr->audio_mux_select = 1;
6608 break;
6609 case AUDIO_INTERN:
6610 bktr->audio_mux_select = 2;
6611 break;
6612 case AUDIO_MUTE:
6613 bktr->audio_mute_state = TRUE; /* set mute */
6614 break;
6615 case AUDIO_UNMUTE:
6616 bktr->audio_mute_state = FALSE; /* clear mute */
6617 break;
6618 default:
6619 printf("bktr: audio cmd error %02x\n", cmd);
6620 return( -1 );
6621 }
6622
6623
6624 /* Most cards have a simple audio multiplexer to select the
6625 * audio source. The I/O_GV card has a more advanced multiplexer
6626 * and requires special handling.
6627 */
6628 if ( bktr->bt848_card == CARD_IO_GV ) {
6629 set_bctv_audio( bktr );
6630 return( 0 );
6631 }
6632
6633 /* Proceed with the simpler audio multiplexer code for the majority
6634 * of Bt848 cards.
6635 */
6636
6637 bt848 = bktr->base;
6638
6639 /*
6640 * Leave the upper bits of the GPIO port alone in case they control
6641 * something like the dbx or teletext chips. This doesn't guarantee
6642 * success, but follows the rule of least astonishment.
6643 */
6644
6645 if ( bktr->audio_mute_state == TRUE ) {
6646#ifdef BKTR_REVERSEMUTE
6647 idx = 0;
6648#else
6649 idx = 3;
6650#endif
6651
6652 if (bktr->reverse_mute )
6653 idx = 3;
6654 else
6655 idx = 0;
6656
6657 }
6658 else
6659 idx = bktr->audio_mux_select;
6660
6661 temp = bt848->gpio_data & ~bktr->card.gpio_mux_bits;
6662 bt848->gpio_data =
6663#if defined( AUDIOMUX_DISCOVER )
6664 bt848->gpio_data = temp | (cmd & 0xff);
6665 printf("cmd: %d audio mux %x temp %x \n", cmd,bktr->card.audiomuxs[ idx ], temp );
6666#else
6667 temp | bktr->card.audiomuxs[ idx ];
6668#endif /* AUDIOMUX_DISCOVER */
6669
6670 return( 0 );
6671}
6672
6673
6674/*
6675 *
6676 */
6677static void
6678temp_mute( bktr_ptr_t bktr, int flag )
6679{
6680 static int muteState = FALSE;
6681
6682 if ( flag == TRUE ) {
6683 muteState = bktr->audio_mute_state;
6684 set_audio( bktr, AUDIO_MUTE ); /* prevent 'click' */
6685 }
6686 else {
6687 tsleep( BKTR_SLEEP, PZERO, "tuning", hz/8 );
6688 if ( muteState == FALSE )
6689 set_audio( bktr, AUDIO_UNMUTE );
6690 }
6691}
6692
6693
6694/*
6695 * initialise the dbx chip
6696 * taken from the Linux bttv driver TDA9850 initialisation code
6697 */
6698static void
6699init_BTSC( bktr_ptr_t bktr )
6700{
6701 i2cWrite(bktr, TDA9850_WADDR, CON1ADDR, 0x08); /* noise threshold st */
6702 i2cWrite(bktr, TDA9850_WADDR, CON2ADDR, 0x08); /* noise threshold sap */
6703 i2cWrite(bktr, TDA9850_WADDR, CON3ADDR, 0x40); /* stereo mode */
6704 i2cWrite(bktr, TDA9850_WADDR, CON4ADDR, 0x07); /* 0 dB input gain? */
6705 i2cWrite(bktr, TDA9850_WADDR, ALI1ADDR, 0x10); /* wideband alignment? */
6706 i2cWrite(bktr, TDA9850_WADDR, ALI2ADDR, 0x10); /* spectral alignment? */
6707 i2cWrite(bktr, TDA9850_WADDR, ALI3ADDR, 0x03);
6708}
6709
6710/*
6711 * setup the dbx chip
6712 * XXX FIXME: alot of work to be done here, this merely unmutes it.
6713 */
6714static int
6715set_BTSC( bktr_ptr_t bktr, int control )
6716{
6717 return( i2cWrite( bktr, TDA9850_WADDR, CON3ADDR, control ) );
6718}
6719
6720/*
6721 * CARD_GV_BCTV specific functions.
6722 */
6723
6724#define BCTV_AUDIO_MAIN 0x10 /* main audio program */
6725#define BCTV_AUDIO_SUB 0x20 /* sub audio program */
6726#define BCTV_AUDIO_BOTH 0x30 /* main(L) + sub(R) program */
6727
6728#define BCTV_GPIO_REG0 1
6729#define BCTV_GPIO_REG1 3
6730
6731#define BCTV_GR0_AUDIO_MODE 3
6732#define BCTV_GR0_AUDIO_MAIN 0 /* main program */
6733#define BCTV_GR0_AUDIO_SUB 3 /* sub program */
6734#define BCTV_GR0_AUDIO_BOTH 1 /* main(L) + sub(R) */
6735#define BCTV_GR0_AUDIO_MUTE 4 /* audio mute */
6736#define BCTV_GR0_AUDIO_MONO 8 /* force mono */
6737
6738static void
6739set_bctv_audio( bktr_ptr_t bktr )
6740{
6741 int data;
6742
6743 switch (bktr->audio_mux_select) {
6744 case 1: /* external */
6745 case 2: /* internal */
6746 bctv_gpio_write(bktr, BCTV_GPIO_REG1, 0);
6747 break;
6748 default: /* tuner */
6749 bctv_gpio_write(bktr, BCTV_GPIO_REG1, 1);
6750 break;
6751 }
6752/* switch (bktr->audio_sap_select) { */
6753 switch (BCTV_AUDIO_BOTH) {
6754 case BCTV_AUDIO_SUB:
6755 data = BCTV_GR0_AUDIO_SUB;
6756 break;
6757 case BCTV_AUDIO_BOTH:
6758 data = BCTV_GR0_AUDIO_BOTH;
6759 break;
6760 case BCTV_AUDIO_MAIN:
6761 default:
6762 data = BCTV_GR0_AUDIO_MAIN;
6763 break;
6764 }
6765 if (bktr->audio_mute_state == TRUE)
6766 data |= BCTV_GR0_AUDIO_MUTE;
6767
6768 bctv_gpio_write(bktr, BCTV_GPIO_REG0, data);
6769
6770 return;
6771}
6772
6773/* gpio_data bit assignment */
6774#define BCTV_GPIO_ADDR_MASK 0x000300
6775#define BCTV_GPIO_WE 0x000400
6776#define BCTV_GPIO_OE 0x000800
6777#define BCTV_GPIO_VAL_MASK 0x00f000
6778
6779#define BCTV_GPIO_PORT_MASK 3
6780#define BCTV_GPIO_ADDR_SHIFT 8
6781#define BCTV_GPIO_VAL_SHIFT 12
6782
6783/* gpio_out_en value for read/write */
6784#define BCTV_GPIO_OUT_RMASK 0x000f00
6785#define BCTV_GPIO_OUT_WMASK 0x00ff00
6786
6787#define BCTV_BITS 100
6788
6789static void
6790bctv_gpio_write( bktr_ptr_t bktr, int port, int val )
6791{
6792 bt848_ptr_t bt848 = bktr->base;
6793 u_long data, outbits;
6794
6795 port &= BCTV_GPIO_PORT_MASK;
6796 switch (port) {
6797 case 1:
6798 case 3:
6799 data = ((val << BCTV_GPIO_VAL_SHIFT) & BCTV_GPIO_VAL_MASK) |
6800 ((port << BCTV_GPIO_ADDR_SHIFT) & BCTV_GPIO_ADDR_MASK) |
6801 BCTV_GPIO_WE | BCTV_GPIO_OE;
6802 outbits = BCTV_GPIO_OUT_WMASK;
6803 break;
6804 default:
6805 return;
6806 }
6807 bt848->gpio_out_en = 0;
6808 bt848->gpio_data = data;
6809 bt848->gpio_out_en = outbits;
6810 DELAY(BCTV_BITS);
6811 bt848->gpio_data = data & ~BCTV_GPIO_WE;
6812 DELAY(BCTV_BITS);
6813 bt848->gpio_data = data;
6814 DELAY(BCTV_BITS);
6815 bt848->gpio_data = ~0;
6816 bt848->gpio_out_en = 0;
6817}
6818
6819/* Not yet used
6820static int
6821bctv_gpio_read( bktr_ptr_t bktr, int port )
6822{
6823 bt848_ptr_t bt848 = bktr->base;
6824 u_long data, outbits, ret;
6825
6826 port &= BCTV_GPIO_PORT_MASK;
6827 switch (port) {
6828 case 1:
6829 case 3:
6830 data = ((port << BCTV_GPIO_ADDR_SHIFT) & BCTV_GPIO_ADDR_MASK) |
6831 BCTV_GPIO_WE | BCTV_GPIO_OE;
6832 outbits = BCTV_GPIO_OUT_RMASK;
6833 break;
6834 default:
6835 return( -1 );
6836 }
6837 bt848->gpio_out_en = 0;
6838 bt848->gpio_data = data;
6839 bt848->gpio_out_en = outbits;
6840 DELAY(BCTV_BITS);
6841 bt848->gpio_data = data & ~BCTV_GPIO_OE;
6842 DELAY(BCTV_BITS);
6843 ret = bt848->gpio_data;
6844 DELAY(BCTV_BITS);
6845 bt848->gpio_data = data;
6846 DELAY(BCTV_BITS);
6847 bt848->gpio_data = ~0;
6848 bt848->gpio_out_en = 0;
6849 return( (ret & BCTV_GPIO_VAL_MASK) >> BCTV_GPIO_VAL_SHIFT );
6850}
6851*/
6852
6853/*
6854 * setup the MSP34xx Stereo Audio Chip
6855 * This uses the Auto Configuration Option on MSP3410D and MSP3415D chips
6856 * and DBX mode selection for MSP3430G chips.
6857 * For MSP3400C support, the full programming sequence is required and is
6858 * not yet supported.
6859 */
6860
6861/* Read the MSP version string */
6862static void msp_read_id( bktr_ptr_t bktr, int unit ){
6863 int rev1=0, rev2=0;
6864 rev1 = msp_read(bktr, 0x12, 0x001e);
6865 rev2 = msp_read(bktr, 0x12, 0x001f);
6866
6867 sprintf(bktr->msp_version_string, "34%02d%c-%c%d",
6868 (rev2>>8)&0xff, (rev1&0xff)+'@', ((rev1>>8)&0xff)+'@', rev2&0x1f);
6869
6870 printf("bktr%d: Detected a MSP%s\n",unit,bktr->msp_version_string);
6871}
6872
6873
6874/* Configure the MSP chip to Auto-detect the audio format */
6875static void msp_autodetect( bktr_ptr_t bktr ) {
6876
6877 if (strncmp("3430G", bktr->msp_version_string, 5) == 0){
6878
6879 /* For MSP3430G - countries with mono and DBX stereo */
6880 msp_write(bktr, 0x10, 0x0030,0x2003);/* Enable Auto format detection */
6881 msp_write(bktr, 0x10, 0x0020,0x0020);/* Standard Select Reg. = BTSC-Stereo*/
6882 msp_write(bktr, 0x12, 0x000E,0x2403);/* darned if I know */
6883 msp_write(bktr, 0x12, 0x0008,0x0320);/* Source select = (St or A) */
6884 /* & Ch. Matrix = St */
6885 msp_write(bktr, 0x12, 0x0000,0x7300);/* Set volume to 0db gain */
6886
6887 } else {
6888
6889 /* For MSP3410 / 3415 - countries with mono, FM stereo and NICAM */
6890 msp_write(bktr, 0x12, 0x0000,0x7300);/* Set volume to 0db gain */
6891 msp_write(bktr, 0x10, 0x0020,0x0001);/* Enable Auto format detection */
6892 msp_write(bktr, 0x10, 0x0021,0x0001);/* Auto selection of NICAM/MONO mode */
6893 }
6894
6895 /* uncomment the following line to enable the MSP34xx 1Khz Tone Generator */
6896 /* turn your speaker volume down low before trying this */
6897 /* msp_write(bktr, 0x12, 0x0014, 0x7f40); */
6898}
6899
6900
6901
6902/*
6903 *
6904 * Operating System Dependant Parts
6905 * This section contains OS Dependant code like
6906 * probe and attach and the cdev open/close/read/mmap interface
6907 *
6908 */
6909
6910/****************************/
6911/* *** FreeBSD 4.x code *** */
6912/****************************/
6913#if (__FreeBSD_version >= 400000)
6914
6915static int bktr_probe( device_t dev );
6916static int bktr_attach( device_t dev );
6917static int bktr_detach( device_t dev );
6918static int bktr_shutdown( device_t dev );
6919static void bktr_intr(void *arg) { common_bktr_intr(arg); }
6920
6921static device_method_t bktr_methods[] = {
6922 /* Device interface */
6923 DEVMETHOD(device_probe, bktr_probe),
6924 DEVMETHOD(device_attach, bktr_attach),
6925 DEVMETHOD(device_detach, bktr_detach),
6926 DEVMETHOD(device_shutdown, bktr_shutdown),
6927
6928 { 0, 0 }
6929};
6930
6931static driver_t bktr_driver = {
6932 "bktr",
6933 bktr_methods,
6934 sizeof(struct bktr_softc),
6935};
6936
6937static devclass_t bktr_devclass;
6938
6939static d_open_t bktr_open;
6940static d_close_t bktr_close;
6941static d_read_t bktr_read;
6942static d_write_t bktr_write;
6943static d_ioctl_t bktr_ioctl;
6944static d_mmap_t bktr_mmap;
6945static d_poll_t bktr_poll;
6946
6947#define CDEV_MAJOR 92
6948static struct cdevsw bktr_cdevsw = {
6949 /* open */ bktr_open,
6950 /* close */ bktr_close,
6951 /* read */ bktr_read,
6952 /* write */ bktr_write,
6953 /* ioctl */ bktr_ioctl,
6954 /* poll */ bktr_poll,
6955 /* mmap */ bktr_mmap,
6956 /* strategy */ nostrategy,
6957 /* name */ "bktr",
6958 /* maj */ CDEV_MAJOR,
6959 /* dump */ nodump,
6960 /* psize */ nopsize,
6961 /* flags */ 0,
6962 /* bmaj */ -1
6963};
6964
6965DEV_DRIVER_MODULE(bktr, pci, bktr_driver, bktr_devclass, bktr_cdevsw, 0, 0);
6966
6967
6968/*
6969 * the boot time probe routine.
6970 */
6971static int
6972bktr_probe( device_t dev )
6973{
6974 unsigned int type = pci_get_devid(dev);
6975 unsigned int rev = pci_get_revid(dev);
6976 static int once;
6977
6978 if (!once++)
6979 cdevsw_add(&bktr_cdevsw);
6980
6981 switch (type) {
6982 case BROOKTREE_848_PCI_ID:
6983 if (rev == 0x12) device_set_desc(dev, "BrookTree 848A");
6984 else device_set_desc(dev, "BrookTree 848");
6985 return 0;
6986 case BROOKTREE_849_PCI_ID:
6987 device_set_desc(dev, "BrookTree 849A");
6988 return 0;
6989 case BROOKTREE_878_PCI_ID:
6990 device_set_desc(dev, "BrookTree 878");
6991 return 0;
6992 case BROOKTREE_879_PCI_ID:
6993 device_set_desc(dev, "BrookTree 879");
6994 return 0;
6995 };
6996
6997 return ENXIO;
6998}
6999
7000
7001/*
7002 * the attach routine.
7003 */
7004static int
7005bktr_attach( device_t dev )
7006{
7007 bt848_ptr_t bt848;
7008 u_long latency;
7009 u_long fun;
7010 u_long val;
7011 unsigned int rev;
7012 unsigned int unit;
7013 int error = 0;
7014 int rid;
7015#ifdef BROOKTREE_IRQ
7016 u_long old_irq, new_irq;
7017#endif
7018
7019 struct bktr_softc *bktr = device_get_softc(dev);
7020
7021 unit = device_get_unit(dev);
7022
7023 /*
7024 * Enable bus mastering and Memory Mapped device
7025 */
7026 val = pci_read_config(dev, PCIR_COMMAND, 4);
7027 val |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
7028 pci_write_config(dev, PCIR_COMMAND, val, 4);
7029
7030 /*
7031 * Map control/status registers.
7032 */
7033 rid = PCI_MAP_REG_START;
7034 bktr->res_mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
7035 0, ~0, 1, RF_ACTIVE);
7036
7037 if (!bktr->res_mem) {
7038 device_printf(dev, "could not map memory\n");
7039 error = ENXIO;
7040 goto fail;
7041 }
7042 bktr->base = rman_get_virtual(bktr->res_mem); /* XXX use bus_space */
7043
7044 /*
7045 * Disable the brooktree device
7046 */
7047 bt848 = bktr->base;
7048 bt848->int_mask = ALL_INTS_DISABLED;
7049 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
7050
7051
7052#ifdef BROOKTREE_IRQ /* from the configuration file */
7053 old_irq = pci_conf_read(tag, PCI_INTERRUPT_REG);
7054 pci_conf_write(tag, PCI_INTERRUPT_REG, BROOKTREE_IRQ);
7055 new_irq = pci_conf_read(tag, PCI_INTERRUPT_REG);
7056 printf("bktr%d: attach: irq changed from %d to %d\n",
7057 unit, (old_irq & 0xff), (new_irq & 0xff));
7058#endif
7059
7060 /*
7061 * Allocate our interrupt.
7062 */
7063 rid = 0;
7064 bktr->res_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
7065 RF_SHAREABLE | RF_ACTIVE);
7066 if (bktr->res_irq == NULL) {
7067 device_printf(dev, "could not map interrupt\n");
7068 error = ENXIO;
7069 goto fail;
7070 }
7071
7072 error = bus_setup_intr(dev, bktr->res_irq, INTR_TYPE_NET,
7073 bktr_intr, bktr, &bktr->res_ih);
7074 if (error) {
7075 device_printf(dev, "could not setup irq\n");
7076 goto fail;
7077
7078 }
7079
7080
7081 /* Update the Device Control Register */
7082 /* on Bt878 and Bt879 cards */
7083 fun = pci_read_config( dev, 0x40, 2);
7084 fun = fun | 1; /* Enable writes to the sub-system vendor ID */
7085
7086#if defined( BKTR_430_FX_MODE )
7087 if (bootverbose) printf("Using 430 FX chipset compatibilty mode\n");
7088 fun = fun | 2; /* Enable Intel 430 FX compatibility mode */
7089#endif
7090
7091#if defined( BKTR_SIS_VIA_MODE )
7092 if (bootverbose) printf("Using SiS/VIA chipset compatibilty mode\n");
7093 fun = fun | 4; /* Enable SiS/VIA compatibility mode (usefull for
7094 OPTi chipset motherboards too */
7095#endif
7096 pci_write_config(dev, 0x40, fun, 2);
7097
7098
7099 /* XXX call bt848_i2c dependent attach() routine */
7100#if (NSMBUS > 0)
7101 if (bt848_i2c_attach(unit, bktr->base, &bktr->i2c_sc))
7102 printf("bktr%d: i2c_attach: can't attach\n", unit);
7103#endif
7104
7105
7106/*
7107 * PCI latency timer. 32 is a good value for 4 bus mastering slots, if
7108 * you have more than four, then 16 would probably be a better value.
7109 */
7110#ifndef BROOKTREE_DEF_LATENCY_VALUE
7111#define BROOKTREE_DEF_LATENCY_VALUE 10
7112#endif
7113 latency = pci_read_config(dev, PCI_LATENCY_TIMER, 4);
7114 latency = (latency >> 8) & 0xff;
7115 if ( bootverbose ) {
7116 if (latency)
7117 printf("brooktree%d: PCI bus latency is", unit);
7118 else
7119 printf("brooktree%d: PCI bus latency was 0 changing to",
7120 unit);
7121 }
7122 if ( !latency ) {
7123 latency = BROOKTREE_DEF_LATENCY_VALUE;
7124 pci_write_config(dev, PCI_LATENCY_TIMER, latency<<8, 4);
7125 }
7126 if ( bootverbose ) {
7127 printf(" %d.\n", (int) latency);
7128 }
7129
7130 /* read the pci device id and revision id */
7131 fun = pci_get_devid(dev);
7132 rev = pci_get_revid(dev);
7133
7134 /* call the common attach code */
7135 common_bktr_attach( bktr, unit, fun, rev );
7136
7137 make_dev(&bktr_cdevsw, unit, 0, 0, 0444, "bktr%d", unit);
7138 make_dev(&bktr_cdevsw, unit+16, 0, 0, 0444, "tuner%d", unit);
7139 make_dev(&bktr_cdevsw, unit+32, 0, 0, 0444, "vbi%d", unit);
7140
7141 return 0;
7142
7143fail:
7144 return error;
7145
7146}
7147
7148/*
7149 * the detach routine.
7150 */
7151static int
7152bktr_detach( device_t dev )
7153{
7154 struct bktr_softc *bktr = device_get_softc(dev);
7155 bt848_ptr_t bt848;
7156
7157 /* Disable the brooktree device */
7158 bt848 = bktr->base;
7159 bt848->int_mask = ALL_INTS_DISABLED;
7160 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
7161
7162 /* FIXME - Free memory for RISC programs, grab buffer, vbi buffers */
7163
7164 /*
7165 * Deallocate resources.
7166 */
7167 bus_teardown_intr(dev, bktr->res_irq, bktr->res_ih);
7168 bus_release_resource(dev, SYS_RES_IRQ, 0, bktr->res_irq);
7169 bus_release_resource(dev, SYS_RES_MEMORY, PCI_MAP_REG_START, bktr->res_mem);
7170
7171 return 0;
7172}
7173
7174/*
7175 * the shutdown routine.
7176 */
7177static int
7178bktr_shutdown( device_t dev )
7179{
7180 struct bktr_softc *bktr = device_get_softc(dev);
7181 bt848_ptr_t bt848;
7182
7183 /* Disable the brooktree device */
7184 bt848 = bktr->base;
7185 bt848->int_mask = ALL_INTS_DISABLED;
7186 bt848->gpio_dma_ctl = FIFO_RISC_DISABLED;
7187
7188 return 0;
7189}
7190
7191
7192/*
7193 * Special Memory Allocation
7194 */
7195static vm_offset_t
7196get_bktr_mem( int unit, unsigned size )
7197{
7198 vm_offset_t addr = 0;
7199
7200 addr = vm_page_alloc_contig(size, 0, 0xffffffff, 1<<24);
7201 if (addr == 0)
7202 addr = vm_page_alloc_contig(size, 0, 0xffffffff, PAGE_SIZE);
7203 if (addr == 0) {
7204 printf("bktr%d: Unable to allocate %d bytes of memory.\n",
7205 unit, size);
7206 }
7207
7208 return( addr );
7209}
7210
7211
7212/*---------------------------------------------------------
7213**
7214** BrookTree 848 character device driver routines
7215**
7216**---------------------------------------------------------
7217*/
7218
7219#define VIDEO_DEV 0x00
7220#define TUNER_DEV 0x01
7221#define VBI_DEV 0x02
7222
7223#define UNIT(x) ((x) & 0x0f)
7224#define FUNCTION(x) (x >> 4)
7225
7226/*
7227 *
7228 */
7229int
7230bktr_open( dev_t dev, int flags, int fmt, struct proc *p )
7231{
7232 bktr_ptr_t bktr;
7233 int unit;
7234 int result;
7235
7236 unit = UNIT( minor(dev) );
7237
7238 /* Get the device data */
7239 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7240 if (bktr == NULL) {
7241 /* the device is no longer valid/functioning */
7242 return (ENXIO);
7243 }
7244
7245 if (!(bktr->flags & METEOR_INITALIZED)) /* device not found */
7246 return( ENXIO );
7247
7248 /* Record that the device is now busy */
7249 device_busy(devclass_get_device(bktr_devclass, unit));
7250
7251
7252 if (bt848_card != -1) {
7253 if ((bt848_card >> 8 == unit ) &&
7254 ( (bt848_card & 0xff) < Bt848_MAX_CARD )) {
7255 if ( bktr->bt848_card != (bt848_card & 0xff) ) {
7256 bktr->bt848_card = (bt848_card & 0xff);
7257 probeCard(bktr, FALSE, unit);
7258 }
7259 }
7260 }
7261
7262 if (bt848_tuner != -1) {
7263 if ((bt848_tuner >> 8 == unit ) &&
7264 ( (bt848_tuner & 0xff) < Bt848_MAX_TUNER )) {
7265 if ( bktr->bt848_tuner != (bt848_tuner & 0xff) ) {
7266 bktr->bt848_tuner = (bt848_tuner & 0xff);
7267 probeCard(bktr, FALSE, unit);
7268 }
7269 }
7270 }
7271
7272 if (bt848_reverse_mute != -1) {
7273 if (((bt848_reverse_mute >> 8) == unit ) &&
7274 ((bt848_reverse_mute & 0xff) < Bt848_MAX_TUNER) ) {
7275 bktr->reverse_mute = bt848_reverse_mute & 0xff;
7276 bt848_reverse_mute = -1;
7277 }
7278 }
7279
7280 switch ( FUNCTION( minor(dev) ) ) {
7281 case VIDEO_DEV:
7282 result = video_open( bktr );
7283 break;
7284 case TUNER_DEV:
7285 result = tuner_open( bktr );
7286 break;
7287 case VBI_DEV:
7288 result = vbi_open( bktr );
7289 break;
7290 default:
7291 result = ENXIO;
7292 break;
7293 }
7294
7295 /* If there was an error opening the device, undo the busy status */
7296 if (result != 0)
7297 device_unbusy(devclass_get_device(bktr_devclass, unit));
7298 return( result );
7299}
7300
7301
7302/*
7303 *
7304 */
7305int
7306bktr_close( dev_t dev, int flags, int fmt, struct proc *p )
7307{
7308 bktr_ptr_t bktr;
7309 int unit;
7310 int result;
7311
7312 unit = UNIT( minor(dev) );
7313
7314 /* Get the device data */
7315 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7316 if (bktr == NULL) {
7317 /* the device is no longer valid/functioning */
7318 return (ENXIO);
7319 }
7320
7321 switch ( FUNCTION( minor(dev) ) ) {
7322 case VIDEO_DEV:
7323 result = video_close( bktr );
7324 break;
7325 case TUNER_DEV:
7326 result = tuner_close( bktr );
7327 break;
7328 case VBI_DEV:
7329 result = vbi_close( bktr );
7330 break;
7331 default:
7332 return (ENXIO);
7333 break;
7334 }
7335
7336 device_unbusy(devclass_get_device(bktr_devclass, unit));
7337 return( result );
7338}
7339
7340
7341/*
7342 *
7343 */
7344int
7345bktr_read( dev_t dev, struct uio *uio, int ioflag )
7346{
7347 bktr_ptr_t bktr;
7348 int unit;
7349
7350 unit = UNIT(minor(dev));
7351
7352 /* Get the device data */
7353 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7354 if (bktr == NULL) {
7355 /* the device is no longer valid/functioning */
7356 return (ENXIO);
7357 }
7358
7359 switch ( FUNCTION( minor(dev) ) ) {
7360 case VIDEO_DEV:
7361 return( video_read( bktr, unit, dev, uio ) );
7362 case VBI_DEV:
7363 return( vbi_read( bktr, uio, ioflag ) );
7364 }
7365 return( ENXIO );
7366}
7367
7368
7369/*
7370 *
7371 */
7372int
7373bktr_write( dev_t dev, struct uio *uio, int ioflag )
7374{
7375 return( EINVAL ); /* XXX or ENXIO ? */
7376}
7377
7378
7379/*
7380 *
7381 */
7382int
7383bktr_ioctl( dev_t dev, ioctl_cmd_t cmd, caddr_t arg, int flag, struct proc* pr )
7384{
7385 bktr_ptr_t bktr;
7386 int unit;
7387
7388 unit = UNIT(minor(dev));
7389
7390 /* Get the device data */
7391 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7392 if (bktr == NULL) {
7393 /* the device is no longer valid/functioning */
7394 return (ENXIO);
7395 }
7396
7397 if (bktr->bigbuf == 0) /* no frame buffer allocated (ioctl failed) */
7398 return( ENOMEM );
7399
7400 switch ( FUNCTION( minor(dev) ) ) {
7401 case VIDEO_DEV:
7402 return( video_ioctl( bktr, unit, cmd, arg, pr ) );
7403 case TUNER_DEV:
7404 return( tuner_ioctl( bktr, unit, cmd, arg, pr ) );
7405 }
7406
7407 return( ENXIO );
7408}
7409
7410
7411/*
7412 *
7413 */
7414int
7415bktr_mmap( dev_t dev, vm_offset_t offset, int nprot )
7416{
7417 int unit;
7418 bktr_ptr_t bktr;
7419
7420 unit = UNIT(minor(dev));
7421
7422 if (FUNCTION(minor(dev)) > 0) /* only allow mmap on /dev/bktr[n] */
7423 return( -1 );
7424
7425 /* Get the device data */
7426 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7427 if (bktr == NULL) {
7428 /* the device is no longer valid/functioning */
7429 return (ENXIO);
7430 }
7431
7432 if (nprot & PROT_EXEC)
7433 return( -1 );
7434
7435 if (offset < 0)
7436 return( -1 );
7437
7438 if (offset >= bktr->alloc_pages * PAGE_SIZE)
7439 return( -1 );
7440
7441 return( i386_btop(vtophys(bktr->bigbuf) + offset) );
7442}
7443
7444int bktr_poll( dev_t dev, int events, struct proc *p)
7445{
7446 int unit;
7447 bktr_ptr_t bktr;
7448 int revents = 0;
7449
7450 unit = UNIT(minor(dev));
7451
7452 /* Get the device data */
7453 bktr = (struct bktr_softc*)devclass_get_softc(bktr_devclass, unit);
7454 if (bktr == NULL) {
7455 /* the device is no longer valid/functioning */
7456 return (ENXIO);
7457 }
7458
7459 disable_intr();
7460
7461 if (events & (POLLIN | POLLRDNORM)) {
7462
7463 switch ( FUNCTION( minor(dev) ) ) {
7464 case VBI_DEV:
7465 if(bktr->vbisize == 0)
7466 selrecord(p, &bktr->vbi_select);
7467 else
7468 revents |= events & (POLLIN | POLLRDNORM);
7469 break;
7470 }
7471 }
7472
7473 enable_intr();
7474
7475 return (revents);
7476}
7477
7478#endif /* FreeBSD 4.x specific kernel interface routines */
7479
7480
7481/**********************************/
7482/* *** FreeBSD 2.2.x and 3.x *** */
7483/**********************************/
7484
7485#if ((__FreeBSD__ == 2) || (__FreeBSD__ == 3))
7486#endif /* FreeBSD 2.2.x and 3.x specific kernel interface routines */
7487
7488
7489/*****************/
7490/* *** BSDI *** */
7491/*****************/
7492
7493#if defined(__bsdi__)
7494#endif /* __bsdi__ BSDI specific kernel interface routines */
7495
7496
7497/*****************************/
7498/* *** OpenBSD / NetBSD *** */
7499/*****************************/
7500#if defined(__NetBSD__) || defined(__OpenBSD__)
7501#endif /* __NetBSD__ || __OpenBSD__ */
7502
7503
7504
| |
7505#endif /* FreeBSD, BSDI, NetBSD, OpenBSD */
7506
| 4181#endif /* FreeBSD, BSDI, NetBSD, OpenBSD */
4182
|
7507
7508/* Local Variables: */
7509/* mode: C */
7510/* c-indent-level: 8 */
7511/* c-brace-offset: -8 */
7512/* c-argdecl-indent: 8 */
7513/* c-label-offset: -8 */
7514/* c-continued-statement-offset: 8 */
7515/* c-tab-always-indent: nil */
7516/* tab-width: 8 */
7517/* End: */
| |
| |