| if_bgereg.h (253408) | if_bgereg.h (253480) |
|---|---|
| 1/*- 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2001 4 * Bill Paul <wpaul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 16 unchanged lines hidden (view full) --- 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * | 1/*- 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2001 4 * Bill Paul <wpaul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 16 unchanged lines hidden (view full) --- 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * |
| 33 * $FreeBSD: head/sys/dev/bge/if_bgereg.h 253408 2013-07-17 04:53:53Z yongari $ | 33 * $FreeBSD: head/sys/dev/bge/if_bgereg.h 253480 2013-07-20 07:09:50Z yongari $ |
| 34 */ 35 36/* 37 * BCM570x memory map. The internal memory layout varies somewhat 38 * depending on whether or not we have external SSRAM attached. 39 * The BCM5700 can have up to 16MB of external memory. The BCM5701 40 * is apparently not designed to use external SSRAM. The mappings 41 * up to the first 4 send rings are the same for both internal and --- 331 unchanged lines hidden (view full) --- 373#define BGE_CHIPREV_5704_AX 0x20 374#define BGE_CHIPREV_5704_BX 0x21 375#define BGE_CHIPREV_5750_AX 0x40 376#define BGE_CHIPREV_5750_BX 0x41 377/* BGE_PCI_PRODID_ASICREV chip rev. identifiers. */ 378#define BGE_CHIPREV_5717_AX 0x57170 379#define BGE_CHIPREV_5717_BX 0x57171 380#define BGE_CHIPREV_5761_AX 0x57611 | 34 */ 35 36/* 37 * BCM570x memory map. The internal memory layout varies somewhat 38 * depending on whether or not we have external SSRAM attached. 39 * The BCM5700 can have up to 16MB of external memory. The BCM5701 40 * is apparently not designed to use external SSRAM. The mappings 41 * up to the first 4 send rings are the same for both internal and --- 331 unchanged lines hidden (view full) --- 373#define BGE_CHIPREV_5704_AX 0x20 374#define BGE_CHIPREV_5704_BX 0x21 375#define BGE_CHIPREV_5750_AX 0x40 376#define BGE_CHIPREV_5750_BX 0x41 377/* BGE_PCI_PRODID_ASICREV chip rev. identifiers. */ 378#define BGE_CHIPREV_5717_AX 0x57170 379#define BGE_CHIPREV_5717_BX 0x57171 380#define BGE_CHIPREV_5761_AX 0x57611 |
| 381#define BGE_CHIPREV_57765_AX 0x577850 |
|
| 381#define BGE_CHIPREV_5784_AX 0x57841 382 383/* PCI DMA Read/Write Control register */ 384#define BGE_PCIDMARWCTL_MINDMA 0x000000FF 385#define BGE_PCIDMARWCTL_DIS_CACHE_ALIGNMENT 0x00000001 386#define BGE_PCIDMARWCTL_RDADRR_BNDRY 0x00000700 387#define BGE_PCIDMARWCTL_WRADDR_BNDRY 0x00003800 388#define BGE_PCIDMARWCTL_ONEDMA_ATONCE 0x0000C000 --- 895 unchanged lines hidden (view full) --- 1284#define BGE_CPMU_LSPD_1000MB_CLK 0x360C 1285#define BGE_CPMU_LNK_AWARE_PWRMD 0x3610 1286#define BGE_CPMU_HST_ACC 0x361C 1287#define BGE_CPMU_CLCK_ORIDE 0x3624 1288#define BGE_CPMU_CLCK_STAT 0x3630 1289#define BGE_CPMU_MUTEX_REQ 0x365C 1290#define BGE_CPMU_MUTEX_GNT 0x3660 1291#define BGE_CPMU_PHY_STRAP 0x3664 | 382#define BGE_CHIPREV_5784_AX 0x57841 383 384/* PCI DMA Read/Write Control register */ 385#define BGE_PCIDMARWCTL_MINDMA 0x000000FF 386#define BGE_PCIDMARWCTL_DIS_CACHE_ALIGNMENT 0x00000001 387#define BGE_PCIDMARWCTL_RDADRR_BNDRY 0x00000700 388#define BGE_PCIDMARWCTL_WRADDR_BNDRY 0x00003800 389#define BGE_PCIDMARWCTL_ONEDMA_ATONCE 0x0000C000 --- 895 unchanged lines hidden (view full) --- 1285#define BGE_CPMU_LSPD_1000MB_CLK 0x360C 1286#define BGE_CPMU_LNK_AWARE_PWRMD 0x3610 1287#define BGE_CPMU_HST_ACC 0x361C 1288#define BGE_CPMU_CLCK_ORIDE 0x3624 1289#define BGE_CPMU_CLCK_STAT 0x3630 1290#define BGE_CPMU_MUTEX_REQ 0x365C 1291#define BGE_CPMU_MUTEX_GNT 0x3660 1292#define BGE_CPMU_PHY_STRAP 0x3664 |
| 1293#define BGE_CPMU_PADRNG_CTL 0x3668 |
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| 1292 1293/* Central Power Management Unit (CPMU) register */ 1294#define BGE_CPMU_CTRL_LINK_IDLE_MODE 0x00000200 1295#define BGE_CPMU_CTRL_LINK_AWARE_MODE 0x00000400 1296#define BGE_CPMU_CTRL_LINK_SPEED_MODE 0x00004000 1297#define BGE_CPMU_CTRL_GPHY_10MB_RXONLY 0x00010000 1298 1299/* Link Speed 10MB/No Link Power Mode Clock Policy register */ --- 23 unchanged lines hidden (view full) --- 1323 1324/* CPMU Mutex Request register */ 1325#define BGE_CPMU_MUTEX_REQ_DRIVER 0x00001000 1326#define BGE_CPMU_MUTEX_GNT_DRIVER 0x00001000 1327 1328/* CPMU GPHY Strap register */ 1329#define BGE_CPMU_PHY_STRAP_IS_SERDES 0x00000020 1330 | 1294 1295/* Central Power Management Unit (CPMU) register */ 1296#define BGE_CPMU_CTRL_LINK_IDLE_MODE 0x00000200 1297#define BGE_CPMU_CTRL_LINK_AWARE_MODE 0x00000400 1298#define BGE_CPMU_CTRL_LINK_SPEED_MODE 0x00004000 1299#define BGE_CPMU_CTRL_GPHY_10MB_RXONLY 0x00010000 1300 1301/* Link Speed 10MB/No Link Power Mode Clock Policy register */ --- 23 unchanged lines hidden (view full) --- 1325 1326/* CPMU Mutex Request register */ 1327#define BGE_CPMU_MUTEX_REQ_DRIVER 0x00001000 1328#define BGE_CPMU_MUTEX_GNT_DRIVER 0x00001000 1329 1330/* CPMU GPHY Strap register */ 1331#define BGE_CPMU_PHY_STRAP_IS_SERDES 0x00000020 1332 |
| 1333/* CPMU Padring Control register */ 1334#define BGE_CPMU_PADRNG_CTL_RDIV2 0x00040000 1335 |
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| 1331/* 1332 * Mbuf Cluster Free registers (has nothing to do with BSD mbufs) 1333 */ 1334#define BGE_MBCF_MODE 0x3800 1335#define BGE_MBCF_STATUS 0x3804 1336 1337/* Mbuf Cluster Free mode register */ 1338#define BGE_MBCFMODE_RESET 0x00000001 --- 1709 unchanged lines hidden --- | 1336/* 1337 * Mbuf Cluster Free registers (has nothing to do with BSD mbufs) 1338 */ 1339#define BGE_MBCF_MODE 0x3800 1340#define BGE_MBCF_STATUS 0x3804 1341 1342/* Mbuf Cluster Free mode register */ 1343#define BGE_MBCFMODE_RESET 0x00000001 --- 1709 unchanged lines hidden --- |