if_bgereg.h (213333) | if_bgereg.h (213411) |
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1/*- 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2001 4 * Bill Paul <wpaul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 16 unchanged lines hidden (view full) --- 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * | 1/*- 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2001 4 * Bill Paul <wpaul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 16 unchanged lines hidden (view full) --- 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * |
33 * $FreeBSD: head/sys/dev/bge/if_bgereg.h 213333 2010-10-01 17:46:15Z yongari $ | 33 * $FreeBSD: head/sys/dev/bge/if_bgereg.h 213411 2010-10-04 18:09:01Z yongari $ |
34 */ 35 36/* 37 * BCM570x memory map. The internal memory layout varies somewhat 38 * depending on whether or not we have external SSRAM attached. 39 * The BCM5700 can have up to 16MB of external memory. The BCM5701 40 * is apparently not designed to use external SSRAM. The mappings 41 * up to the first 4 send rings are the same for both internal and --- 1384 unchanged lines hidden (view full) --- 1426#define BGE_BMANSTAT_LOWMBUF_ERROR 0x00000010 1427 1428 1429/* 1430 * Read DMA Control registers 1431 */ 1432#define BGE_RDMA_MODE 0x4800 1433#define BGE_RDMA_STATUS 0x4804 | 34 */ 35 36/* 37 * BCM570x memory map. The internal memory layout varies somewhat 38 * depending on whether or not we have external SSRAM attached. 39 * The BCM5700 can have up to 16MB of external memory. The BCM5701 40 * is apparently not designed to use external SSRAM. The mappings 41 * up to the first 4 send rings are the same for both internal and --- 1384 unchanged lines hidden (view full) --- 1426#define BGE_BMANSTAT_LOWMBUF_ERROR 0x00000010 1427 1428 1429/* 1430 * Read DMA Control registers 1431 */ 1432#define BGE_RDMA_MODE 0x4800 1433#define BGE_RDMA_STATUS 0x4804 |
1434#define BGE_RDMA_RSRVCTRL 0x4900 |
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1434 1435/* Read DMA mode register */ 1436#define BGE_RDMAMODE_RESET 0x00000001 1437#define BGE_RDMAMODE_ENABLE 0x00000002 1438#define BGE_RDMAMODE_PCI_TGT_ABRT_ATTN 0x00000004 1439#define BGE_RDMAMODE_PCI_MSTR_ABRT_ATTN 0x00000008 1440#define BGE_RDMAMODE_PCI_PERR_ATTN 0x00000010 1441#define BGE_RDMAMODE_PCI_ADDROFLOW_ATTN 0x00000020 --- 15 unchanged lines hidden (view full) --- 1457#define BGE_RDMASTAT_PCI_MSTR_ABRT_ATTN 0x00000008 1458#define BGE_RDMASTAT_PCI_PERR_ATTN 0x00000010 1459#define BGE_RDMASTAT_PCI_ADDROFLOW_ATTN 0x00000020 1460#define BGE_RDMASTAT_PCI_FIFOOFLOW_ATTN 0x00000040 1461#define BGE_RDMASTAT_PCI_FIFOUFLOW_ATTN 0x00000080 1462#define BGE_RDMASTAT_PCI_FIFOOREAD_ATTN 0x00000100 1463#define BGE_RDMASTAT_LOCWRITE_TOOBIG 0x00000200 1464 | 1435 1436/* Read DMA mode register */ 1437#define BGE_RDMAMODE_RESET 0x00000001 1438#define BGE_RDMAMODE_ENABLE 0x00000002 1439#define BGE_RDMAMODE_PCI_TGT_ABRT_ATTN 0x00000004 1440#define BGE_RDMAMODE_PCI_MSTR_ABRT_ATTN 0x00000008 1441#define BGE_RDMAMODE_PCI_PERR_ATTN 0x00000010 1442#define BGE_RDMAMODE_PCI_ADDROFLOW_ATTN 0x00000020 --- 15 unchanged lines hidden (view full) --- 1458#define BGE_RDMASTAT_PCI_MSTR_ABRT_ATTN 0x00000008 1459#define BGE_RDMASTAT_PCI_PERR_ATTN 0x00000010 1460#define BGE_RDMASTAT_PCI_ADDROFLOW_ATTN 0x00000020 1461#define BGE_RDMASTAT_PCI_FIFOOFLOW_ATTN 0x00000040 1462#define BGE_RDMASTAT_PCI_FIFOUFLOW_ATTN 0x00000080 1463#define BGE_RDMASTAT_PCI_FIFOOREAD_ATTN 0x00000100 1464#define BGE_RDMASTAT_LOCWRITE_TOOBIG 0x00000200 1465 |
1466/* Read DMA Reserved Control register */ 1467#define BGE_RDMA_RSRVCTRL_FIFO_OFLW_FIX 0x00000004 1468 |
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1465/* 1466 * Write DMA control registers 1467 */ 1468#define BGE_WDMA_MODE 0x4C00 1469#define BGE_WDMA_STATUS 0x4C04 1470 1471/* Write DMA mode register */ 1472#define BGE_WDMAMODE_RESET 0x00000001 --- 1258 unchanged lines hidden --- | 1469/* 1470 * Write DMA control registers 1471 */ 1472#define BGE_WDMA_MODE 0x4C00 1473#define BGE_WDMA_STATUS 0x4C04 1474 1475/* Write DMA mode register */ 1476#define BGE_WDMAMODE_RESET 0x00000001 --- 1258 unchanged lines hidden --- |