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if_bge.c (92934) if_bge.c (93751)
1/*
2 * Copyright (c) 2001 Wind River Systems
3 * Copyright (c) 1997, 1998, 1999, 2001
4 * Bill Paul <wpaul@windriver.com>. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 16 unchanged lines hidden (view full) ---

25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
32 *
1/*
2 * Copyright (c) 2001 Wind River Systems
3 * Copyright (c) 1997, 1998, 1999, 2001
4 * Bill Paul <wpaul@windriver.com>. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * $FreeBSD: head/sys/dev/bge/if_bge.c 92934 2002-03-22 06:45:40Z wpaul $
33 * $FreeBSD: head/sys/dev/bge/if_bge.c 93751 2002-04-04 06:01:31Z wpaul $
34 */
35
36/*
37 * Broadcom BCM570x family gigabit ethernet driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@windriver.com>
40 * Senior Engineer, Wind River Systems
41 */

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117
118MODULE_DEPEND(bge, miibus, 1, 1, 1);
119
120/* "controller miibus0" required. See GENERIC if you get errors here. */
121#include "miibus_if.h"
122
123#if !defined(lint)
124static const char rcsid[] =
34 */
35
36/*
37 * Broadcom BCM570x family gigabit ethernet driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@windriver.com>
40 * Senior Engineer, Wind River Systems
41 */

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117
118MODULE_DEPEND(bge, miibus, 1, 1, 1);
119
120/* "controller miibus0" required. See GENERIC if you get errors here. */
121#include "miibus_if.h"
122
123#if !defined(lint)
124static const char rcsid[] =
125 "$FreeBSD: head/sys/dev/bge/if_bge.c 92934 2002-03-22 06:45:40Z wpaul $";
125 "$FreeBSD: head/sys/dev/bge/if_bge.c 93751 2002-04-04 06:01:31Z wpaul $";
126#endif
127
128/*
129 * Various supported device vendors/types and their names. Note: the
130 * spec seems to indicate that the hardware still has Alteon's vendor
131 * ID burned into it, though it will always be overriden by the vendor
132 * ID in the EEPROM. Just to be safe, we cover all possibilities.
133 */

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477 int i;
478
479 sc = device_get_softc(dev);
480 ifp = &sc->arpcom.ac_if;
481
482 if (sc->bge_asicrev == BGE_ASICREV_BCM5701_B5 && phy != 1)
483 return(0);
484
126#endif
127
128/*
129 * Various supported device vendors/types and their names. Note: the
130 * spec seems to indicate that the hardware still has Alteon's vendor
131 * ID burned into it, though it will always be overriden by the vendor
132 * ID in the EEPROM. Just to be safe, we cover all possibilities.
133 */

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477 int i;
478
479 sc = device_get_softc(dev);
480 ifp = &sc->arpcom.ac_if;
481
482 if (sc->bge_asicrev == BGE_ASICREV_BCM5701_B5 && phy != 1)
483 return(0);
484
485 if (ifp->if_flags & IFF_RUNNING)
486 BGE_CLRBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
487
488 CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_READ|BGE_MICOMM_BUSY|
489 BGE_MIPHY(phy)|BGE_MIREG(reg));
490
491 for (i = 0; i < BGE_TIMEOUT; i++) {
492 val = CSR_READ_4(sc, BGE_MI_COMM);
493 if (!(val & BGE_MICOMM_BUSY))
494 break;
495 }
496
497 if (i == BGE_TIMEOUT) {
498 printf("bge%d: PHY read timed out\n", sc->bge_unit);
499 return(0);
500 }
501
502 val = CSR_READ_4(sc, BGE_MI_COMM);
503
485 CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_READ|BGE_MICOMM_BUSY|
486 BGE_MIPHY(phy)|BGE_MIREG(reg));
487
488 for (i = 0; i < BGE_TIMEOUT; i++) {
489 val = CSR_READ_4(sc, BGE_MI_COMM);
490 if (!(val & BGE_MICOMM_BUSY))
491 break;
492 }
493
494 if (i == BGE_TIMEOUT) {
495 printf("bge%d: PHY read timed out\n", sc->bge_unit);
496 return(0);
497 }
498
499 val = CSR_READ_4(sc, BGE_MI_COMM);
500
504 if (ifp->if_flags & IFF_RUNNING)
505 BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
506
507 if (val & BGE_MICOMM_READFAIL)
508 return(0);
509
510 return(val & 0xFFFF);
511}
512
513static int
514bge_miibus_writereg(dev, phy, reg, val)

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1418 /* ack/clear link change events */
1419 CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
1420 BGE_MACSTAT_CFG_CHANGED);
1421 CSR_WRITE_4(sc, BGE_MI_STS, 0);
1422
1423 /* Enable PHY auto polling (for MII/GMII only) */
1424 if (sc->bge_tbi) {
1425 CSR_WRITE_4(sc, BGE_MI_STS, BGE_MISTS_LINK);
501 if (val & BGE_MICOMM_READFAIL)
502 return(0);
503
504 return(val & 0xFFFF);
505}
506
507static int
508bge_miibus_writereg(dev, phy, reg, val)

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1412 /* ack/clear link change events */
1413 CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
1414 BGE_MACSTAT_CFG_CHANGED);
1415 CSR_WRITE_4(sc, BGE_MI_STS, 0);
1416
1417 /* Enable PHY auto polling (for MII/GMII only) */
1418 if (sc->bge_tbi) {
1419 CSR_WRITE_4(sc, BGE_MI_STS, BGE_MISTS_LINK);
1426 } else
1420 } else {
1427 BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL|10<<16);
1421 BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL|10<<16);
1422 if (sc->bge_asicrev == BGE_ASICREV_BCM5700)
1423 CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
1424 BGE_EVTENB_MI_INTERRUPT);
1425 }
1428
1429 /* Enable link state change attentions. */
1430 BGE_SETBIT(sc, BGE_MAC_EVT_ENB, BGE_EVTENB_LINK_CHANGED);
1431
1432 return(0);
1433}
1434
1435/*

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1473static int
1474bge_attach(dev)
1475 device_t dev;
1476{
1477 int s;
1478 u_int32_t command;
1479 struct ifnet *ifp;
1480 struct bge_softc *sc;
1426
1427 /* Enable link state change attentions. */
1428 BGE_SETBIT(sc, BGE_MAC_EVT_ENB, BGE_EVTENB_LINK_CHANGED);
1429
1430 return(0);
1431}
1432
1433/*

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1471static int
1472bge_attach(dev)
1473 device_t dev;
1474{
1475 int s;
1476 u_int32_t command;
1477 struct ifnet *ifp;
1478 struct bge_softc *sc;
1479 u_int32_t hwcfg = 0;
1481 int unit, error = 0, rid;
1482
1483 s = splimp();
1484
1485 sc = device_get_softc(dev);
1486 unit = device_get_unit(dev);
1487 sc->bge_dev = dev;
1488 sc->bge_unit = unit;

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1627 ifp->if_capenable = ifp->if_capabilities;
1628
1629 /* Save ASIC rev. */
1630
1631 sc->bge_asicrev =
1632 pci_read_config(dev, BGE_PCI_MISC_CTL, 4) &
1633 BGE_PCIMISCCTL_ASICREV;
1634
1480 int unit, error = 0, rid;
1481
1482 s = splimp();
1483
1484 sc = device_get_softc(dev);
1485 unit = device_get_unit(dev);
1486 sc->bge_dev = dev;
1487 sc->bge_unit = unit;

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1626 ifp->if_capenable = ifp->if_capabilities;
1627
1628 /* Save ASIC rev. */
1629
1630 sc->bge_asicrev =
1631 pci_read_config(dev, BGE_PCI_MISC_CTL, 4) &
1632 BGE_PCIMISCCTL_ASICREV;
1633
1634 /* Pretend all 5700s are the same */
1635 if ((sc->bge_asicrev & 0xFF000000) == BGE_ASICREV_BCM5700)
1636 sc->bge_asicrev = BGE_ASICREV_BCM5700;
1637
1638 /*
1639 * Figure out what sort of media we have by checking the
1640 * hardware config word in the EEPROM. Note: on some BCM5700
1641 * cards, this value appears to be unset. If that's the
1642 * case, we have to rely on identifying the NIC by its PCI
1643 * subsystem ID, as we do below for the SysKonnect SK-9D41.
1644 */
1645 bge_read_eeprom(sc, (caddr_t)&hwcfg,
1646 BGE_EE_HWCFG_OFFSET, sizeof(hwcfg));
1647 if ((ntohl(hwcfg) & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER)
1648 sc->bge_tbi = 1;
1649
1635 /* The SysKonnect SK-9D41 is a 1000baseSX card. */
1636 if ((pci_read_config(dev, BGE_PCI_SUBSYS, 4) >> 16) == SK_SUBSYSID_9D41)
1637 sc->bge_tbi = 1;
1638
1639 if (sc->bge_tbi) {
1640 ifmedia_init(&sc->bge_ifmedia, IFM_IMASK,
1641 bge_ifmedia_upd, bge_ifmedia_sts);
1642 ifmedia_add(&sc->bge_ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL);

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1982 /* Avoid this for now -- checking this register is expensive. */
1983 /* Make sure this is really our interrupt. */
1984 if (!(CSR_READ_4(sc, BGE_MISC_LOCAL_CTL) & BGE_MLC_INTR_STATE))
1985 return;
1986#endif
1987 /* Ack interrupt and stop others from occuring. */
1988 CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1);
1989
1650 /* The SysKonnect SK-9D41 is a 1000baseSX card. */
1651 if ((pci_read_config(dev, BGE_PCI_SUBSYS, 4) >> 16) == SK_SUBSYSID_9D41)
1652 sc->bge_tbi = 1;
1653
1654 if (sc->bge_tbi) {
1655 ifmedia_init(&sc->bge_ifmedia, IFM_IMASK,
1656 bge_ifmedia_upd, bge_ifmedia_sts);
1657 ifmedia_add(&sc->bge_ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL);

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1997 /* Avoid this for now -- checking this register is expensive. */
1998 /* Make sure this is really our interrupt. */
1999 if (!(CSR_READ_4(sc, BGE_MISC_LOCAL_CTL) & BGE_MLC_INTR_STATE))
2000 return;
2001#endif
2002 /* Ack interrupt and stop others from occuring. */
2003 CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1);
2004
1990 /* Process link state changes. */
1991 if (sc->bge_rdata->bge_status_block.bge_status &
1992 BGE_STATFLAG_LINKSTATE_CHANGED) {
1993 if (sc->bge_asicrev != BGE_ASICREV_BCM5701_B5) {
2005 /*
2006 * Process link state changes.
2007 * Grrr. The link status word in the status block does
2008 * not work correctly on the BCM5700 rev AX and BX chips,
2009 * according to all avaibable information. Hence, we have
2010 * to enable MII interrupts in order to properly obtain
2011 * async link changes. Unfortunately, this also means that
2012 * we have to read the MAC status register to detect link
2013 * changes, thereby adding an additional register access to
2014 * the interrupt handler.
2015 */
2016
2017 if (sc->bge_asicrev == BGE_ASICREV_BCM5700) {
2018 u_int32_t status;
2019
2020 status = CSR_READ_4(sc, BGE_MAC_STS);
2021 if (status & BGE_MACSTAT_MI_INTERRUPT) {
1994 sc->bge_link = 0;
1995 untimeout(bge_tick, sc, sc->bge_stat_ch);
1996 bge_tick(sc);
2022 sc->bge_link = 0;
2023 untimeout(bge_tick, sc, sc->bge_stat_ch);
2024 bge_tick(sc);
2025 /* Clear the interrupt */
2026 CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
2027 BGE_EVTENB_MI_INTERRUPT);
2028 bge_miibus_readreg(sc->bge_dev, 1, BRGPHY_MII_ISR);
2029 bge_miibus_writereg(sc->bge_dev, 1, BRGPHY_MII_IMR,
2030 BRGPHY_INTRS);
1997 }
2031 }
1998 /* ack the event to clear/reset it */
1999 CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
2000 BGE_MACSTAT_CFG_CHANGED);
2001 CSR_WRITE_4(sc, BGE_MI_STS, 0);
2032 } else {
2033 if (sc->bge_rdata->bge_status_block.bge_status &
2034 BGE_STATFLAG_LINKSTATE_CHANGED) {
2035 sc->bge_link = 0;
2036 untimeout(bge_tick, sc, sc->bge_stat_ch);
2037 bge_tick(sc);
2038 /* Clear the interrupt */
2039 CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
2040 BGE_MACSTAT_CFG_CHANGED);
2041 }
2002 }
2003
2004 if (ifp->if_flags & IFF_RUNNING) {
2005 /* Check RX return ring producer/consumer */
2006 bge_rxeof(sc);
2007
2008 /* Check TX ring producer/consumer */
2009 bge_txeof(sc);

--- 695 unchanged lines hidden --- 		2042 }
2043
2044 if (ifp->if_flags & IFF_RUNNING) {
2045 /* Check RX return ring producer/consumer */
2046 bge_rxeof(sc);
2047
2048 /* Check TX ring producer/consumer */
2049 bge_txeof(sc);

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