| if_bge.c (241343) | if_bge.c (241388) |
|---|---|
| 1/*- 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2001 4 * Bill Paul <wpaul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 18 unchanged lines hidden (view full) --- 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2001 4 * Bill Paul <wpaul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 18 unchanged lines hidden (view full) --- 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34#include <sys/cdefs.h> |
| 35__FBSDID("$FreeBSD: head/sys/dev/bge/if_bge.c 241343 2012-10-08 07:33:43Z yongari $"); | 35__FBSDID("$FreeBSD: head/sys/dev/bge/if_bge.c 241388 2012-10-10 01:24:02Z yongari $"); |
| 36 37/* 38 * Broadcom BCM570x family gigabit ethernet driver for FreeBSD. 39 * 40 * The Broadcom BCM5700 is based on technology originally developed by 41 * Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet 42 * MAC chips. The BCM5700, sometimes referred to as the Tigon III, has 43 * two on-board MIPS R4000 CPUs and can have as much as 16MB of external --- 1417 unchanged lines hidden (view full) --- 1461 } 1462 1463 /* 1464 * Set up the PCI DMA control register. 1465 */ 1466 dma_rw_ctl = BGE_PCIDMARWCTL_RD_CMD_SHIFT(6) | 1467 BGE_PCIDMARWCTL_WR_CMD_SHIFT(7); 1468 if (sc->bge_flags & BGE_FLAG_PCIE) { | 36 37/* 38 * Broadcom BCM570x family gigabit ethernet driver for FreeBSD. 39 * 40 * The Broadcom BCM5700 is based on technology originally developed by 41 * Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet 42 * MAC chips. The BCM5700, sometimes referred to as the Tigon III, has 43 * two on-board MIPS R4000 CPUs and can have as much as 16MB of external --- 1417 unchanged lines hidden (view full) --- 1461 } 1462 1463 /* 1464 * Set up the PCI DMA control register. 1465 */ 1466 dma_rw_ctl = BGE_PCIDMARWCTL_RD_CMD_SHIFT(6) | 1467 BGE_PCIDMARWCTL_WR_CMD_SHIFT(7); 1468 if (sc->bge_flags & BGE_FLAG_PCIE) { |
| 1469 /* Read watermark not used, 128 bytes for write. */ 1470 dma_rw_ctl |= BGE_PCIDMARWCTL_WR_WAT_SHIFT(3); | 1469 if (sc->bge_mps >= 256) 1470 dma_rw_ctl |= BGE_PCIDMARWCTL_WR_WAT_SHIFT(7); 1471 else 1472 dma_rw_ctl |= BGE_PCIDMARWCTL_WR_WAT_SHIFT(3); |
| 1471 } else if (sc->bge_flags & BGE_FLAG_PCIX) { 1472 if (BGE_IS_5714_FAMILY(sc)) { 1473 /* 256 bytes for read and write. */ 1474 dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(2) | 1475 BGE_PCIDMARWCTL_WR_WAT_SHIFT(2); 1476 dma_rw_ctl |= (sc->bge_asicrev == BGE_ASICREV_BCM5780) ? 1477 BGE_PCIDMARWCTL_ONEDMA_ATONCE_GLOBAL : 1478 BGE_PCIDMARWCTL_ONEDMA_ATONCE_LOCAL; --- 1677 unchanged lines hidden (view full) --- 3156 */ 3157 if (pci_find_cap(dev, PCIY_EXPRESS, ®) == 0) { 3158 /* 3159 * Found a PCI Express capabilities register, this 3160 * must be a PCI Express device. 3161 */ 3162 sc->bge_flags |= BGE_FLAG_PCIE; 3163 sc->bge_expcap = reg; | 1473 } else if (sc->bge_flags & BGE_FLAG_PCIX) { 1474 if (BGE_IS_5714_FAMILY(sc)) { 1475 /* 256 bytes for read and write. */ 1476 dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(2) | 1477 BGE_PCIDMARWCTL_WR_WAT_SHIFT(2); 1478 dma_rw_ctl |= (sc->bge_asicrev == BGE_ASICREV_BCM5780) ? 1479 BGE_PCIDMARWCTL_ONEDMA_ATONCE_GLOBAL : 1480 BGE_PCIDMARWCTL_ONEDMA_ATONCE_LOCAL; --- 1677 unchanged lines hidden (view full) --- 3158 */ 3159 if (pci_find_cap(dev, PCIY_EXPRESS, ®) == 0) { 3160 /* 3161 * Found a PCI Express capabilities register, this 3162 * must be a PCI Express device. 3163 */ 3164 sc->bge_flags |= BGE_FLAG_PCIE; 3165 sc->bge_expcap = reg; |
| 3166 /* Extract supported maximum payload size. */ 3167 sc->bge_mps = pci_read_config(dev, sc->bge_expcap + 3168 PCIER_DEVICE_CAP, 2); 3169 sc->bge_mps = 128 << (sc->bge_mps & PCIEM_CAP_MAX_PAYLOAD); |
|
| 3164 if (sc->bge_asicrev == BGE_ASICREV_BCM5719 || 3165 sc->bge_asicrev == BGE_ASICREV_BCM5720) | 3170 if (sc->bge_asicrev == BGE_ASICREV_BCM5719 || 3171 sc->bge_asicrev == BGE_ASICREV_BCM5720) |
| 3166 pci_set_max_read_req(dev, 2048); 3167 else if (pci_get_max_read_req(dev) != 4096) 3168 pci_set_max_read_req(dev, 4096); | 3172 sc->bge_expmrq = 2048; 3173 else 3174 sc->bge_expmrq = 4096; 3175 pci_set_max_read_req(dev, sc->bge_expmrq); |
| 3169 } else { 3170 /* 3171 * Check if the device is in PCI-X Mode. 3172 * (This bit is not valid on PCI Express controllers.) 3173 */ 3174 if (pci_find_cap(dev, PCIY_PCIX, ®) == 0) 3175 sc->bge_pcixcap = reg; 3176 if ((pci_read_config(dev, BGE_PCI_PCISTATE, 4) & --- 460 unchanged lines hidden (view full) --- 3637 } 3638 devctl = pci_read_config(dev, 3639 sc->bge_expcap + PCIER_DEVICE_CTL, 2); 3640 /* Clear enable no snoop and disable relaxed ordering. */ 3641 devctl &= ~(PCIEM_CTL_RELAXED_ORD_ENABLE | 3642 PCIEM_CTL_NOSNOOP_ENABLE); 3643 pci_write_config(dev, sc->bge_expcap + PCIER_DEVICE_CTL, 3644 devctl, 2); | 3176 } else { 3177 /* 3178 * Check if the device is in PCI-X Mode. 3179 * (This bit is not valid on PCI Express controllers.) 3180 */ 3181 if (pci_find_cap(dev, PCIY_PCIX, ®) == 0) 3182 sc->bge_pcixcap = reg; 3183 if ((pci_read_config(dev, BGE_PCI_PCISTATE, 4) & --- 460 unchanged lines hidden (view full) --- 3644 } 3645 devctl = pci_read_config(dev, 3646 sc->bge_expcap + PCIER_DEVICE_CTL, 2); 3647 /* Clear enable no snoop and disable relaxed ordering. */ 3648 devctl &= ~(PCIEM_CTL_RELAXED_ORD_ENABLE | 3649 PCIEM_CTL_NOSNOOP_ENABLE); 3650 pci_write_config(dev, sc->bge_expcap + PCIER_DEVICE_CTL, 3651 devctl, 2); |
| 3652 pci_set_max_read_req(dev, sc->bge_expmrq); |
|
| 3645 /* Clear error status. */ 3646 pci_write_config(dev, sc->bge_expcap + PCIER_DEVICE_STA, 3647 PCIEM_STA_CORRECTABLE_ERROR | 3648 PCIEM_STA_NON_FATAL_ERROR | PCIEM_STA_FATAL_ERROR | 3649 PCIEM_STA_UNSUPPORTED_REQ, 2); 3650 } 3651 3652 /* Reset some of the PCI state that got zapped by reset. */ --- 2548 unchanged lines hidden --- | 3653 /* Clear error status. */ 3654 pci_write_config(dev, sc->bge_expcap + PCIER_DEVICE_STA, 3655 PCIEM_STA_CORRECTABLE_ERROR | 3656 PCIEM_STA_NON_FATAL_ERROR | PCIEM_STA_FATAL_ERROR | 3657 PCIEM_STA_UNSUPPORTED_REQ, 2); 3658 } 3659 3660 /* Reset some of the PCI state that got zapped by reset. */ --- 2548 unchanged lines hidden --- |