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if_bge.c (155170) if_bge.c (155180)
1/*-
2 * Copyright (c) 2001 Wind River Systems
3 * Copyright (c) 1997, 1998, 1999, 2001
4 * Bill Paul <wpaul@windriver.com>. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2001 Wind River Systems
3 * Copyright (c) 1997, 1998, 1999, 2001
4 * Bill Paul <wpaul@windriver.com>. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#include <sys/cdefs.h>
35__FBSDID("$FreeBSD: head/sys/dev/bge/if_bge.c 155170 2006-02-01 10:11:24Z ru $");
35__FBSDID("$FreeBSD: head/sys/dev/bge/if_bge.c 155180 2006-02-01 14:26:35Z oleg $");
36
37/*
38 * Broadcom BCM570x family gigabit ethernet driver for FreeBSD.
39 *
40 * The Broadcom BCM5700 is based on technology originally developed by
41 * Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet
42 * MAC chips. The BCM5700, sometimes refered to as the Tigon III, has
43 * two on-board MIPS R4000 CPUs and can have as much as 16MB of external

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2782#endif
2783
2784 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
2785 sc->bge_cdata.bge_status_map, BUS_DMASYNC_POSTREAD);
2786
2787 statusword =
2788 atomic_readandclear_32(&sc->bge_ldata.bge_status_block->bge_status);
2789
36
37/*
38 * Broadcom BCM570x family gigabit ethernet driver for FreeBSD.
39 *
40 * The Broadcom BCM5700 is based on technology originally developed by
41 * Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet
42 * MAC chips. The BCM5700, sometimes refered to as the Tigon III, has
43 * two on-board MIPS R4000 CPUs and can have as much as 16MB of external

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2782#endif
2783
2784 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
2785 sc->bge_cdata.bge_status_map, BUS_DMASYNC_POSTREAD);
2786
2787 statusword =
2788 atomic_readandclear_32(&sc->bge_ldata.bge_status_block->bge_status);
2789
2790 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
2791 sc->bge_cdata.bge_status_map, BUS_DMASYNC_PREREAD);
2792
2790#ifdef notdef
2791 /* Avoid this for now -- checking this register is expensive. */
2792 /* Make sure this is really our interrupt. */
2793 if (!(CSR_READ_4(sc, BGE_MISC_LOCAL_CTL) & BGE_MLC_INTR_STATE))
2794 return;
2795#endif
2796 /* Ack interrupt and stop others from occuring. */
2797 CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1);
2798
2799 if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
2800 sc->bge_chipid != BGE_CHIPID_BCM5700_B1) ||
2793#ifdef notdef
2794 /* Avoid this for now -- checking this register is expensive. */
2795 /* Make sure this is really our interrupt. */
2796 if (!(CSR_READ_4(sc, BGE_MISC_LOCAL_CTL) & BGE_MLC_INTR_STATE))
2797 return;
2798#endif
2799 /* Ack interrupt and stop others from occuring. */
2800 CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1);
2801
2802 if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
2803 sc->bge_chipid != BGE_CHIPID_BCM5700_B1) ||
2801 statusword & BGE_STATFLAG_LINKSTATE_CHANGED)
2804 statusword & BGE_STATFLAG_LINKSTATE_CHANGED || sc->bge_link_evt)
2802 bge_link_upd(sc);
2803
2804 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
2805 /* Check RX return ring producer/consumer */
2806 bge_rxeof(sc);
2807
2808 /* Check TX ring producer/consumer */
2809 bge_txeof(sc);

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2821 return;
2822}
2823
2824static void
2825bge_tick_locked(sc)
2826 struct bge_softc *sc;
2827{
2828 struct mii_data *mii = NULL;
2805 bge_link_upd(sc);
2806
2807 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
2808 /* Check RX return ring producer/consumer */
2809 bge_rxeof(sc);
2810
2811 /* Check TX ring producer/consumer */
2812 bge_txeof(sc);

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2824 return;
2825}
2826
2827static void
2828bge_tick_locked(sc)
2829 struct bge_softc *sc;
2830{
2831 struct mii_data *mii = NULL;
2829 struct ifnet *ifp;
2830
2831 BGE_LOCK_ASSERT(sc);
2832
2832
2833 BGE_LOCK_ASSERT(sc);
2834
2833 ifp = sc->bge_ifp;
2834
2835 if (sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
2836 sc->bge_asicrev == BGE_ASICREV_BCM5750)
2837 bge_stats_update_regs(sc);
2838 else
2839 bge_stats_update(sc);
2840
2841 if (!sc->bge_tbi) {
2842 mii = device_get_softc(sc->bge_miibus);
2843 mii_tick(mii);
2835 if (sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
2836 sc->bge_asicrev == BGE_ASICREV_BCM5750)
2837 bge_stats_update_regs(sc);
2838 else
2839 bge_stats_update(sc);
2840
2841 if (!sc->bge_tbi) {
2842 mii = device_get_softc(sc->bge_miibus);
2843 mii_tick(mii);
2844 } else {
2845 /*
2846 * Since in TBI mode auto-polling can't be used we should poll
2847 * link status manually. Here we register pending link event
2848 * and trigger interrupt.
2849 */
2850#ifdef DEVICE_POLLING
2851 /* In polling mode we poll link state in bge_poll_locked() */
2852 if (!(sc->bge_ifp->if_capenable & IFCAP_POLLING))
2853#endif
2854 {
2855 sc->bge_link_evt++;
2856 BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_SET);
2857 }
2844 }
2845
2846 callout_reset(&sc->bge_stat_ch, hz, bge_tick, sc);
2847}
2848
2849static void
2850bge_tick(xsc)
2851 void *xsc;

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3720bge_link_upd(sc)
3721 struct bge_softc *sc;
3722{
3723 struct mii_data *mii;
3724 uint32_t link, status;
3725
3726 BGE_LOCK_ASSERT(sc);
3727
2858 }
2859
2860 callout_reset(&sc->bge_stat_ch, hz, bge_tick, sc);
2861}
2862
2863static void
2864bge_tick(xsc)
2865 void *xsc;

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3734bge_link_upd(sc)
3735 struct bge_softc *sc;
3736{
3737 struct mii_data *mii;
3738 uint32_t link, status;
3739
3740 BGE_LOCK_ASSERT(sc);
3741
3742 /* Clear 'pending link event' flag */
3743 sc->bge_link_evt = 0;
3744
3728 /*
3729 * Process link state changes.
3730 * Grrr. The link status word in the status block does
3731 * not work correctly on the BCM5700 rev AX and BX chips,
3732 * according to all available information. Hence, we have
3733 * to enable MII interrupts in order to properly obtain
3734 * async link changes. Unfortunately, this also means that
3735 * we have to read the MAC status register to detect link

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3768 bge_miibus_readreg(sc->bge_dev, 1, BRGPHY_MII_ISR);
3769 bge_miibus_writereg(sc->bge_dev, 1, BRGPHY_MII_IMR,
3770 BRGPHY_INTRS);
3771 }
3772 return;
3773 }
3774
3775 if (sc->bge_tbi) {
3745 /*
3746 * Process link state changes.
3747 * Grrr. The link status word in the status block does
3748 * not work correctly on the BCM5700 rev AX and BX chips,
3749 * according to all available information. Hence, we have
3750 * to enable MII interrupts in order to properly obtain
3751 * async link changes. Unfortunately, this also means that
3752 * we have to read the MAC status register to detect link

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3785 bge_miibus_readreg(sc->bge_dev, 1, BRGPHY_MII_ISR);
3786 bge_miibus_writereg(sc->bge_dev, 1, BRGPHY_MII_IMR,
3787 BRGPHY_INTRS);
3788 }
3789 return;
3790 }
3791
3792 if (sc->bge_tbi) {
3776 /*
3777 * Sometimes PCS encoding errors are detected in
3778 * TBI mode (on fiber NICs), and for some reason
3779 * the chip will signal them as link changes.
3780 * If we get a link change event, but the 'PCS
3781 * encoding error' bit in the MAC status register
3782 * is set, don't bother doing a link check.
3783 * This avoids spurious "link UP" messages
3784 * that sometimes appear on fiber NICs during
3785 * periods of heavy traffic. (There should be no
3786 * effect on copper NICs.)
3787 */
3788 status = CSR_READ_4(sc, BGE_MAC_STS);
3793 status = CSR_READ_4(sc, BGE_MAC_STS);
3789 if (!(status & (BGE_MACSTAT_PORT_DECODE_ERROR|
3790 BGE_MACSTAT_MI_COMPLETE))) {
3791 if (!sc->bge_link &&
3792 (status & BGE_MACSTAT_TBI_PCS_SYNCHED)) {
3794 if (status & BGE_MACSTAT_TBI_PCS_SYNCHED) {
3795 if (!sc->bge_link) {
3793 sc->bge_link++;
3794 if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
3795 BGE_CLRBIT(sc, BGE_MAC_MODE,
3796 BGE_MACMODE_TBI_SEND_CFGS);
3797 CSR_WRITE_4(sc, BGE_MAC_STS, 0xFFFFFFFF);
3798 if (bootverbose)
3799 if_printf(sc->bge_ifp, "link UP\n");
3796 sc->bge_link++;
3797 if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
3798 BGE_CLRBIT(sc, BGE_MAC_MODE,
3799 BGE_MACMODE_TBI_SEND_CFGS);
3800 CSR_WRITE_4(sc, BGE_MAC_STS, 0xFFFFFFFF);
3801 if (bootverbose)
3802 if_printf(sc->bge_ifp, "link UP\n");
3800 } else if (sc->bge_link) {
3801 sc->bge_link = 0;
3802 if (bootverbose)
3803 if_printf(sc->bge_ifp, "link DOWN\n");
3803 if_link_state_change(sc->bge_ifp, LINK_STATE_UP);
3804 }
3804 }
3805 } else if (sc->bge_link) {
3806 sc->bge_link = 0;
3807 if (bootverbose)
3808 if_printf(sc->bge_ifp, "link DOWN\n");
3809 if_link_state_change(sc->bge_ifp, LINK_STATE_DOWN);
3805 }
3806 } else {
3807 /*
3808 * Some broken BCM chips have BGE_STATFLAG_LINKSTATE_CHANGED bit
3809 * in status word always set. Workaround this bug by reading
3810 * PHY link status directly.
3811 */
3812 link = (CSR_READ_4(sc, BGE_MI_STS) & BGE_MISTS_LINK) ? 1 : 0;

--- 28 unchanged lines hidden --- 		3810 }
3811 } else {
3812 /*
3813 * Some broken BCM chips have BGE_STATFLAG_LINKSTATE_CHANGED bit
3814 * in status word always set. Workaround this bug by reading
3815 * PHY link status directly.
3816 */
3817 link = (CSR_READ_4(sc, BGE_MI_STS) & BGE_MISTS_LINK) ? 1 : 0;

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