| if_bge.c (106937) | if_bge.c (108847) |
|---|---|
| 1/* 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2001 4 * Bill Paul <wpaul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 16 unchanged lines hidden (view full) --- 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * | 1/* 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2001 4 * Bill Paul <wpaul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 16 unchanged lines hidden (view full) --- 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * |
| 33 * $FreeBSD: head/sys/dev/bge/if_bge.c 106937 2002-11-14 23:54:55Z sam $ | 33 * $FreeBSD: head/sys/dev/bge/if_bge.c 108847 2003-01-06 23:46:47Z jdp $ |
| 34 */ 35 36/* 37 * Broadcom BCM570x family gigabit ethernet driver for FreeBSD. 38 * 39 * Written by Bill Paul <wpaul@windriver.com> 40 * Senior Engineer, Wind River Systems 41 */ --- 75 unchanged lines hidden (view full) --- 117 118MODULE_DEPEND(bge, miibus, 1, 1, 1); 119 120/* "controller miibus0" required. See GENERIC if you get errors here. */ 121#include "miibus_if.h" 122 123#if !defined(lint) 124static const char rcsid[] = | 34 */ 35 36/* 37 * Broadcom BCM570x family gigabit ethernet driver for FreeBSD. 38 * 39 * Written by Bill Paul <wpaul@windriver.com> 40 * Senior Engineer, Wind River Systems 41 */ --- 75 unchanged lines hidden (view full) --- 117 118MODULE_DEPEND(bge, miibus, 1, 1, 1); 119 120/* "controller miibus0" required. See GENERIC if you get errors here. */ 121#include "miibus_if.h" 122 123#if !defined(lint) 124static const char rcsid[] = |
| 125 "$FreeBSD: head/sys/dev/bge/if_bge.c 106937 2002-11-14 23:54:55Z sam $"; | 125 "$FreeBSD: head/sys/dev/bge/if_bge.c 108847 2003-01-06 23:46:47Z jdp $"; |
| 126#endif 127 128/* 129 * Various supported device vendors/types and their names. Note: the 130 * spec seems to indicate that the hardware still has Alteon's vendor 131 * ID burned into it, though it will always be overriden by the vendor 132 * ID in the EEPROM. Just to be safe, we cover all possibilities. 133 */ --- 710 unchanged lines hidden (view full) --- 844} 845 846static int 847bge_init_rx_ring_jumbo(sc) 848 struct bge_softc *sc; 849{ 850 int i; 851 struct bge_rcb *rcb; | 126#endif 127 128/* 129 * Various supported device vendors/types and their names. Note: the 130 * spec seems to indicate that the hardware still has Alteon's vendor 131 * ID burned into it, though it will always be overriden by the vendor 132 * ID in the EEPROM. Just to be safe, we cover all possibilities. 133 */ --- 710 unchanged lines hidden (view full) --- 844} 845 846static int 847bge_init_rx_ring_jumbo(sc) 848 struct bge_softc *sc; 849{ 850 int i; 851 struct bge_rcb *rcb; |
| 852 struct bge_rcb_opaque *rcbo; | |
| 853 854 for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) { 855 if (bge_newbuf_jumbo(sc, i, NULL) == ENOBUFS) 856 return(ENOBUFS); 857 }; 858 859 sc->bge_jumbo = i - 1; 860 861 rcb = &sc->bge_rdata->bge_info.bge_jumbo_rx_rcb; | 852 853 for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) { 854 if (bge_newbuf_jumbo(sc, i, NULL) == ENOBUFS) 855 return(ENOBUFS); 856 }; 857 858 sc->bge_jumbo = i - 1; 859 860 rcb = &sc->bge_rdata->bge_info.bge_jumbo_rx_rcb; |
| 862 rcbo = (struct bge_rcb_opaque *)rcb; 863 rcb->bge_flags = 0; 864 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcbo->bge_reg2); | 861 rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0, 0); 862 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags); |
| 865 866 CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo); 867 868 return(0); 869} 870 871static void 872bge_free_rx_ring_jumbo(sc) --- 188 unchanged lines hidden (view full) --- 1061 return(0); 1062} 1063 1064static int 1065bge_blockinit(sc) 1066 struct bge_softc *sc; 1067{ 1068 struct bge_rcb *rcb; | 863 864 CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo); 865 866 return(0); 867} 868 869static void 870bge_free_rx_ring_jumbo(sc) --- 188 unchanged lines hidden (view full) --- 1059 return(0); 1060} 1061 1062static int 1063bge_blockinit(sc) 1064 struct bge_softc *sc; 1065{ 1066 struct bge_rcb *rcb; |
| 1069 struct bge_rcb_opaque *rcbo; | 1067 volatile struct bge_rcb *vrcb; |
| 1070 int i; 1071 1072 /* 1073 * Initialize the memory window pointer register so that 1074 * we can access the first 32K of internal NIC RAM. This will 1075 * allow us to set up the TX send ring RCBs and the RX return 1076 * ring RCBs, plus other things which live in NIC memory. 1077 */ --- 54 unchanged lines hidden (view full) --- 1132 sc->bge_unit); 1133 return(ENXIO); 1134 } 1135 1136 /* Initialize the standard RX ring control block */ 1137 rcb = &sc->bge_rdata->bge_info.bge_std_rx_rcb; 1138 BGE_HOSTADDR(rcb->bge_hostaddr) = 1139 vtophys(&sc->bge_rdata->bge_rx_std_ring); | 1068 int i; 1069 1070 /* 1071 * Initialize the memory window pointer register so that 1072 * we can access the first 32K of internal NIC RAM. This will 1073 * allow us to set up the TX send ring RCBs and the RX return 1074 * ring RCBs, plus other things which live in NIC memory. 1075 */ --- 54 unchanged lines hidden (view full) --- 1130 sc->bge_unit); 1131 return(ENXIO); 1132 } 1133 1134 /* Initialize the standard RX ring control block */ 1135 rcb = &sc->bge_rdata->bge_info.bge_std_rx_rcb; 1136 BGE_HOSTADDR(rcb->bge_hostaddr) = 1137 vtophys(&sc->bge_rdata->bge_rx_std_ring); |
| 1140 rcb->bge_max_len = BGE_MAX_FRAMELEN; | 1138 rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(BGE_MAX_FRAMELEN, 0); |
| 1141 if (sc->bge_extram) 1142 rcb->bge_nicaddr = BGE_EXT_STD_RX_RINGS; 1143 else 1144 rcb->bge_nicaddr = BGE_STD_RX_RINGS; | 1139 if (sc->bge_extram) 1140 rcb->bge_nicaddr = BGE_EXT_STD_RX_RINGS; 1141 else 1142 rcb->bge_nicaddr = BGE_STD_RX_RINGS; |
| 1145 rcb->bge_flags = 0; 1146 rcbo = (struct bge_rcb_opaque *)rcb; 1147 CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_HI, rcbo->bge_reg0); 1148 CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_LO, rcbo->bge_reg1); 1149 CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcbo->bge_reg2); 1150 CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcbo->bge_reg3); | 1143 CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_HI, rcb->bge_hostaddr.bge_addr_hi); 1144 CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_LO, rcb->bge_hostaddr.bge_addr_lo); 1145 CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags); 1146 CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcb->bge_nicaddr); |
| 1151 1152 /* 1153 * Initialize the jumbo RX ring control block 1154 * We set the 'ring disabled' bit in the flags 1155 * field until we're actually ready to start 1156 * using this ring (i.e. once we set the MTU 1157 * high enough to require it). 1158 */ 1159 rcb = &sc->bge_rdata->bge_info.bge_jumbo_rx_rcb; 1160 BGE_HOSTADDR(rcb->bge_hostaddr) = 1161 vtophys(&sc->bge_rdata->bge_rx_jumbo_ring); | 1147 1148 /* 1149 * Initialize the jumbo RX ring control block 1150 * We set the 'ring disabled' bit in the flags 1151 * field until we're actually ready to start 1152 * using this ring (i.e. once we set the MTU 1153 * high enough to require it). 1154 */ 1155 rcb = &sc->bge_rdata->bge_info.bge_jumbo_rx_rcb; 1156 BGE_HOSTADDR(rcb->bge_hostaddr) = 1157 vtophys(&sc->bge_rdata->bge_rx_jumbo_ring); |
| 1162 rcb->bge_max_len = BGE_MAX_FRAMELEN; | 1158 rcb->bge_maxlen_flags = 1159 BGE_RCB_MAXLEN_FLAGS(BGE_MAX_FRAMELEN, BGE_RCB_FLAG_RING_DISABLED); |
| 1163 if (sc->bge_extram) 1164 rcb->bge_nicaddr = BGE_EXT_JUMBO_RX_RINGS; 1165 else 1166 rcb->bge_nicaddr = BGE_JUMBO_RX_RINGS; | 1160 if (sc->bge_extram) 1161 rcb->bge_nicaddr = BGE_EXT_JUMBO_RX_RINGS; 1162 else 1163 rcb->bge_nicaddr = BGE_JUMBO_RX_RINGS; |
| 1167 rcb->bge_flags = BGE_RCB_FLAG_RING_DISABLED; | 1164 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_HI, 1165 rcb->bge_hostaddr.bge_addr_hi); 1166 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_LO, 1167 rcb->bge_hostaddr.bge_addr_lo); 1168 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags); 1169 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_NICADDR, rcb->bge_nicaddr); |
| 1168 | 1170 |
| 1169 rcbo = (struct bge_rcb_opaque *)rcb; 1170 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_HI, rcbo->bge_reg0); 1171 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_LO, rcbo->bge_reg1); 1172 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcbo->bge_reg2); 1173 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_NICADDR, rcbo->bge_reg3); 1174 | |
| 1175 /* Set up dummy disabled mini ring RCB */ 1176 rcb = &sc->bge_rdata->bge_info.bge_mini_rx_rcb; | 1171 /* Set up dummy disabled mini ring RCB */ 1172 rcb = &sc->bge_rdata->bge_info.bge_mini_rx_rcb; |
| 1177 rcb->bge_flags = BGE_RCB_FLAG_RING_DISABLED; 1178 rcbo = (struct bge_rcb_opaque *)rcb; 1179 CSR_WRITE_4(sc, BGE_RX_MINI_RCB_MAXLEN_FLAGS, rcbo->bge_reg2); | 1173 rcb->bge_maxlen_flags = 1174 BGE_RCB_MAXLEN_FLAGS(0, BGE_RCB_FLAG_RING_DISABLED); 1175 CSR_WRITE_4(sc, BGE_RX_MINI_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags); |
| 1180 1181 /* 1182 * Set the BD ring replentish thresholds. The recommended 1183 * values are 1/8th the number of descriptors allocated to 1184 * each ring. 1185 */ 1186 CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, BGE_STD_RX_RING_CNT/8); 1187 CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, BGE_JUMBO_RX_RING_CNT/8); 1188 1189 /* 1190 * Disable all unused send rings by setting the 'ring disabled' 1191 * bit in the flags field of all the TX send ring control blocks. 1192 * These are located in NIC memory. 1193 */ | 1176 1177 /* 1178 * Set the BD ring replentish thresholds. The recommended 1179 * values are 1/8th the number of descriptors allocated to 1180 * each ring. 1181 */ 1182 CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, BGE_STD_RX_RING_CNT/8); 1183 CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, BGE_JUMBO_RX_RING_CNT/8); 1184 1185 /* 1186 * Disable all unused send rings by setting the 'ring disabled' 1187 * bit in the flags field of all the TX send ring control blocks. 1188 * These are located in NIC memory. 1189 */ |
| 1194 rcb = (struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START + | 1190 vrcb = (volatile struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START + |
| 1195 BGE_SEND_RING_RCB); 1196 for (i = 0; i < BGE_TX_RINGS_EXTSSRAM_MAX; i++) { | 1191 BGE_SEND_RING_RCB); 1192 for (i = 0; i < BGE_TX_RINGS_EXTSSRAM_MAX; i++) { |
| 1197 rcb->bge_flags = BGE_RCB_FLAG_RING_DISABLED; 1198 rcb->bge_max_len = 0; 1199 rcb->bge_nicaddr = 0; 1200 rcb++; | 1193 vrcb->bge_maxlen_flags = 1194 BGE_RCB_MAXLEN_FLAGS(0, BGE_RCB_FLAG_RING_DISABLED); 1195 vrcb->bge_nicaddr = 0; 1196 vrcb++; |
| 1201 } 1202 1203 /* Configure TX RCB 0 (we use only the first ring) */ | 1197 } 1198 1199 /* Configure TX RCB 0 (we use only the first ring) */ |
| 1204 rcb = (struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START + | 1200 vrcb = (volatile struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START + |
| 1205 BGE_SEND_RING_RCB); | 1201 BGE_SEND_RING_RCB); |
| 1206 rcb->bge_hostaddr.bge_addr_hi = 0; 1207 BGE_HOSTADDR(rcb->bge_hostaddr) = | 1202 vrcb->bge_hostaddr.bge_addr_hi = 0; 1203 BGE_HOSTADDR(vrcb->bge_hostaddr) = |
| 1208 vtophys(&sc->bge_rdata->bge_tx_ring); | 1204 vtophys(&sc->bge_rdata->bge_tx_ring); |
| 1209 rcb->bge_nicaddr = BGE_NIC_TXRING_ADDR(0, BGE_TX_RING_CNT); 1210 rcb->bge_max_len = BGE_TX_RING_CNT; 1211 rcb->bge_flags = 0; | 1205 vrcb->bge_nicaddr = BGE_NIC_TXRING_ADDR(0, BGE_TX_RING_CNT); 1206 vrcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(BGE_TX_RING_CNT, 0); |
| 1212 1213 /* Disable all unused RX return rings */ | 1207 1208 /* Disable all unused RX return rings */ |
| 1214 rcb = (struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START + | 1209 vrcb = (volatile struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START + |
| 1215 BGE_RX_RETURN_RING_RCB); 1216 for (i = 0; i < BGE_RX_RINGS_MAX; i++) { | 1210 BGE_RX_RETURN_RING_RCB); 1211 for (i = 0; i < BGE_RX_RINGS_MAX; i++) { |
| 1217 rcb->bge_hostaddr.bge_addr_hi = 0; 1218 rcb->bge_hostaddr.bge_addr_lo = 0; 1219 rcb->bge_flags = BGE_RCB_FLAG_RING_DISABLED; 1220 rcb->bge_max_len = BGE_RETURN_RING_CNT; 1221 rcb->bge_nicaddr = 0; | 1212 vrcb->bge_hostaddr.bge_addr_hi = 0; 1213 vrcb->bge_hostaddr.bge_addr_lo = 0; 1214 vrcb->bge_maxlen_flags = 1215 BGE_RCB_MAXLEN_FLAGS(BGE_RETURN_RING_CNT, 1216 BGE_RCB_FLAG_RING_DISABLED); 1217 vrcb->bge_nicaddr = 0; |
| 1222 CSR_WRITE_4(sc, BGE_MBX_RX_CONS0_LO + 1223 (i * (sizeof(u_int64_t))), 0); | 1218 CSR_WRITE_4(sc, BGE_MBX_RX_CONS0_LO + 1219 (i * (sizeof(u_int64_t))), 0); |
| 1224 rcb++; | 1220 vrcb++; |
| 1225 } 1226 1227 /* Initialize RX ring indexes */ 1228 CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, 0); 1229 CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, 0); 1230 CSR_WRITE_4(sc, BGE_MBX_RX_MINI_PROD_LO, 0); 1231 1232 /* 1233 * Set up RX return ring 0 1234 * Note that the NIC address for RX return rings is 0x00000000. 1235 * The return rings live entirely within the host, so the 1236 * nicaddr field in the RCB isn't used. 1237 */ | 1221 } 1222 1223 /* Initialize RX ring indexes */ 1224 CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, 0); 1225 CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, 0); 1226 CSR_WRITE_4(sc, BGE_MBX_RX_MINI_PROD_LO, 0); 1227 1228 /* 1229 * Set up RX return ring 0 1230 * Note that the NIC address for RX return rings is 0x00000000. 1231 * The return rings live entirely within the host, so the 1232 * nicaddr field in the RCB isn't used. 1233 */ |
| 1238 rcb = (struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START + | 1234 vrcb = (volatile struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START + |
| 1239 BGE_RX_RETURN_RING_RCB); | 1235 BGE_RX_RETURN_RING_RCB); |
| 1240 rcb->bge_hostaddr.bge_addr_hi = 0; 1241 BGE_HOSTADDR(rcb->bge_hostaddr) = | 1236 vrcb->bge_hostaddr.bge_addr_hi = 0; 1237 BGE_HOSTADDR(vrcb->bge_hostaddr) = |
| 1242 vtophys(&sc->bge_rdata->bge_rx_return_ring); | 1238 vtophys(&sc->bge_rdata->bge_rx_return_ring); |
| 1243 rcb->bge_nicaddr = 0x00000000; 1244 rcb->bge_max_len = BGE_RETURN_RING_CNT; 1245 rcb->bge_flags = 0; | 1239 vrcb->bge_nicaddr = 0x00000000; 1240 vrcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(BGE_RETURN_RING_CNT, 0); |
| 1246 1247 /* Set random backoff seed for TX */ 1248 CSR_WRITE_4(sc, BGE_TX_RANDOM_BACKOFF, 1249 sc->arpcom.ac_enaddr[0] + sc->arpcom.ac_enaddr[1] + 1250 sc->arpcom.ac_enaddr[2] + sc->arpcom.ac_enaddr[3] + 1251 sc->arpcom.ac_enaddr[4] + sc->arpcom.ac_enaddr[5] + 1252 BGE_TX_BACKOFF_SEED_MASK); 1253 --- 1486 unchanged lines hidden --- | 1241 1242 /* Set random backoff seed for TX */ 1243 CSR_WRITE_4(sc, BGE_TX_RANDOM_BACKOFF, 1244 sc->arpcom.ac_enaddr[0] + sc->arpcom.ac_enaddr[1] + 1245 sc->arpcom.ac_enaddr[2] + sc->arpcom.ac_enaddr[3] + 1246 sc->arpcom.ac_enaddr[4] + sc->arpcom.ac_enaddr[5] + 1247 BGE_TX_BACKOFF_SEED_MASK); 1248 --- 1486 unchanged lines hidden --- |