33c33
< * $FreeBSD: head/sys/dev/bge/if_bge.c 92934 2002-03-22 06:45:40Z wpaul $
---
> * $FreeBSD: head/sys/dev/bge/if_bge.c 93751 2002-04-04 06:01:31Z wpaul $
125c125
< "$FreeBSD: head/sys/dev/bge/if_bge.c 92934 2002-03-22 06:45:40Z wpaul $";
---
> "$FreeBSD: head/sys/dev/bge/if_bge.c 93751 2002-04-04 06:01:31Z wpaul $";
485,487d484
< if (ifp->if_flags & IFF_RUNNING)
< BGE_CLRBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
<
504,506d500
< if (ifp->if_flags & IFF_RUNNING)
< BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
<
1426c1420
< } else
---
> } else {
1427a1422,1425
> if (sc->bge_asicrev == BGE_ASICREV_BCM5700)
> CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
> BGE_EVTENB_MI_INTERRUPT);
> }
1480a1479
> u_int32_t hwcfg = 0;
1634a1634,1649
> /* Pretend all 5700s are the same */
> if ((sc->bge_asicrev & 0xFF000000) == BGE_ASICREV_BCM5700)
> sc->bge_asicrev = BGE_ASICREV_BCM5700;
>
> /*
> * Figure out what sort of media we have by checking the
> * hardware config word in the EEPROM. Note: on some BCM5700
> * cards, this value appears to be unset. If that's the
> * case, we have to rely on identifying the NIC by its PCI
> * subsystem ID, as we do below for the SysKonnect SK-9D41.
> */
> bge_read_eeprom(sc, (caddr_t)&hwcfg,
> BGE_EE_HWCFG_OFFSET, sizeof(hwcfg));
> if ((ntohl(hwcfg) & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER)
> sc->bge_tbi = 1;
>
1990,1993c2005,2021
< /* Process link state changes. */
< if (sc->bge_rdata->bge_status_block.bge_status &
< BGE_STATFLAG_LINKSTATE_CHANGED) {
< if (sc->bge_asicrev != BGE_ASICREV_BCM5701_B5) {
---
> /*
> * Process link state changes.
> * Grrr. The link status word in the status block does
> * not work correctly on the BCM5700 rev AX and BX chips,
> * according to all avaibable information. Hence, we have
> * to enable MII interrupts in order to properly obtain
> * async link changes. Unfortunately, this also means that
> * we have to read the MAC status register to detect link
> * changes, thereby adding an additional register access to
> * the interrupt handler.
> */
>
> if (sc->bge_asicrev == BGE_ASICREV_BCM5700) {
> u_int32_t status;
>
> status = CSR_READ_4(sc, BGE_MAC_STS);
> if (status & BGE_MACSTAT_MI_INTERRUPT) {
1996a2025,2030
> /* Clear the interrupt */
> CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
> BGE_EVTENB_MI_INTERRUPT);
> bge_miibus_readreg(sc->bge_dev, 1, BRGPHY_MII_ISR);
> bge_miibus_writereg(sc->bge_dev, 1, BRGPHY_MII_IMR,
> BRGPHY_INTRS);
1998,2001c2032,2041
< /* ack the event to clear/reset it */
< CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
< BGE_MACSTAT_CFG_CHANGED);
< CSR_WRITE_4(sc, BGE_MI_STS, 0);
---
> } else {
> if (sc->bge_rdata->bge_status_block.bge_status &
> BGE_STATFLAG_LINKSTATE_CHANGED) {
> sc->bge_link = 0;
> untimeout(bge_tick, sc, sc->bge_stat_ch);
> bge_tick(sc);
> /* Clear the interrupt */
> CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
> BGE_MACSTAT_CFG_CHANGED);
> }