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if_bce.c (173839) if_bce.c (176448)
1/*-
1/*-
2 * Copyright (c) 2006-2007 Broadcom Corporation
2 * Copyright (c) 2006-2008 Broadcom Corporation
3 * David Christensen <davidch@broadcom.com>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.

--- 13 unchanged lines hidden (view full) ---

24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <sys/cdefs.h>
3 * David Christensen <davidch@broadcom.com>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.

--- 13 unchanged lines hidden (view full) ---

24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/dev/bce/if_bce.c 173839 2007-11-22 02:45:00Z yongari $");
32__FBSDID("$FreeBSD: head/sys/dev/bce/if_bce.c 176448 2008-02-22 00:46:22Z davidch $");
33
34/*
35 * The following controllers are supported by this driver:
36 * BCM5706C A2, A3
33
34/*
35 * The following controllers are supported by this driver:
36 * BCM5706C A2, A3
37 * BCM5706S A2, A3
37 * BCM5708C B1, B2
38 * BCM5708C B1, B2
39 * BCM5708S B1, B2
38 *
39 * The following controllers are not supported by this driver:
40 *
41 * The following controllers are not supported by this driver:
40 * BCM5706C A0, A1
41 * BCM5706S A0, A1, A2, A3
42 * BCM5708C A0, B0
43 * BCM5708S A0, B0, B1, B2
42 * BCM5706C A0, A1 (pre-production)
43 * BCM5706S A0, A1 (pre-production)
44 * BCM5708C A0, B0 (pre-production)
45 * BCM5708S A0, B0 (pre-production)
44 */
45
46#include "opt_bce.h"
47
48#include <dev/bce/if_bcereg.h>
49#include <dev/bce/if_bcefw.h>
50
51/****************************************************************************/

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213static int bce_detach (device_t);
214static int bce_shutdown (device_t);
215
216
217/****************************************************************************/
218/* BCE Debug Data Structure Dump Routines */
219/****************************************************************************/
220#ifdef BCE_DEBUG
46 */
47
48#include "opt_bce.h"
49
50#include <dev/bce/if_bcereg.h>
51#include <dev/bce/if_bcefw.h>
52
53/****************************************************************************/

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215static int bce_detach (device_t);
216static int bce_shutdown (device_t);
217
218
219/****************************************************************************/
220/* BCE Debug Data Structure Dump Routines */
221/****************************************************************************/
222#ifdef BCE_DEBUG
223static u32 bce_ctx_rd (struct bce_softc *, u32, u32);
221static void bce_dump_mbuf (struct bce_softc *, struct mbuf *);
224static void bce_dump_mbuf (struct bce_softc *, struct mbuf *);
222static void bce_dump_tx_mbuf_chain (struct bce_softc *, int, int);
223static void bce_dump_rx_mbuf_chain (struct bce_softc *, int, int);
225static void bce_dump_tx_mbuf_chain (struct bce_softc *, u16, int);
226static void bce_dump_rx_mbuf_chain (struct bce_softc *, u16, int);
227static void bce_dump_pg_mbuf_chain (struct bce_softc *, u16, int);
224static void bce_dump_txbd (struct bce_softc *, int, struct tx_bd *);
225static void bce_dump_rxbd (struct bce_softc *, int, struct rx_bd *);
228static void bce_dump_txbd (struct bce_softc *, int, struct tx_bd *);
229static void bce_dump_rxbd (struct bce_softc *, int, struct rx_bd *);
230static void bce_dump_pgbd (struct bce_softc *, int, struct rx_bd *);
226static void bce_dump_l2fhdr (struct bce_softc *, int, struct l2_fhdr *);
231static void bce_dump_l2fhdr (struct bce_softc *, int, struct l2_fhdr *);
227static void bce_dump_tx_chain (struct bce_softc *, int, int);
228static void bce_dump_rx_chain (struct bce_softc *, int, int);
232static void bce_dump_ctx (struct bce_softc *, u16);
233static void bce_dump_ftqs (struct bce_softc *);
234static void bce_dump_tx_chain (struct bce_softc *, u16, int);
235static void bce_dump_rx_chain (struct bce_softc *, u16, int);
236static void bce_dump_pg_chain (struct bce_softc *, u16, int);
229static void bce_dump_status_block (struct bce_softc *);
230static void bce_dump_stats_block (struct bce_softc *);
231static void bce_dump_driver_state (struct bce_softc *);
232static void bce_dump_hw_state (struct bce_softc *);
233static void bce_dump_bc_state (struct bce_softc *);
234static void bce_breakpoint (struct bce_softc *);
235#endif
236

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280static void bce_load_rv2p_fw (struct bce_softc *, u32 *, u32, u32);
281static void bce_load_cpu_fw (struct bce_softc *, struct cpu_reg *, struct fw_info *);
282static void bce_init_cpus (struct bce_softc *);
283
284static void bce_stop (struct bce_softc *);
285static int bce_reset (struct bce_softc *, u32);
286static int bce_chipinit (struct bce_softc *);
287static int bce_blockinit (struct bce_softc *);
237static void bce_dump_status_block (struct bce_softc *);
238static void bce_dump_stats_block (struct bce_softc *);
239static void bce_dump_driver_state (struct bce_softc *);
240static void bce_dump_hw_state (struct bce_softc *);
241static void bce_dump_bc_state (struct bce_softc *);
242static void bce_breakpoint (struct bce_softc *);
243#endif
244

--- 43 unchanged lines hidden (view full) ---

288static void bce_load_rv2p_fw (struct bce_softc *, u32 *, u32, u32);
289static void bce_load_cpu_fw (struct bce_softc *, struct cpu_reg *, struct fw_info *);
290static void bce_init_cpus (struct bce_softc *);
291
292static void bce_stop (struct bce_softc *);
293static int bce_reset (struct bce_softc *, u32);
294static int bce_chipinit (struct bce_softc *);
295static int bce_blockinit (struct bce_softc *);
288static int bce_get_buf (struct bce_softc *, struct mbuf *, u16 *, u16 *, u32 *);
296static int bce_get_rx_buf (struct bce_softc *, struct mbuf *, u16 *, u16 *, u32 *);
297static int bce_get_pg_buf (struct bce_softc *, struct mbuf *, u16 *, u16 *);
289
290static int bce_init_tx_chain (struct bce_softc *);
298
299static int bce_init_tx_chain (struct bce_softc *);
291static void bce_fill_rx_chain (struct bce_softc *);
300static void bce_free_tx_chain (struct bce_softc *);
301
292static int bce_init_rx_chain (struct bce_softc *);
302static int bce_init_rx_chain (struct bce_softc *);
303static void bce_fill_rx_chain (struct bce_softc *);
293static void bce_free_rx_chain (struct bce_softc *);
304static void bce_free_rx_chain (struct bce_softc *);
294static void bce_free_tx_chain (struct bce_softc *);
295
305
306static int bce_init_pg_chain (struct bce_softc *);
307static void bce_fill_pg_chain (struct bce_softc *);
308static void bce_free_pg_chain (struct bce_softc *);
309
296static int bce_tx_encap (struct bce_softc *, struct mbuf **);
297static void bce_start_locked (struct ifnet *);
298static void bce_start (struct ifnet *);
299static int bce_ioctl (struct ifnet *, u_long, caddr_t);
300static void bce_watchdog (struct bce_softc *);
301static int bce_ifmedia_upd (struct ifnet *);
302static void bce_ifmedia_upd_locked (struct ifnet *);
303static void bce_ifmedia_sts (struct ifnet *, struct ifmediareq *);
304static void bce_init_locked (struct bce_softc *);
305static void bce_init (void *);
306static void bce_mgmt_init_locked (struct bce_softc *sc);
307
310static int bce_tx_encap (struct bce_softc *, struct mbuf **);
311static void bce_start_locked (struct ifnet *);
312static void bce_start (struct ifnet *);
313static int bce_ioctl (struct ifnet *, u_long, caddr_t);
314static void bce_watchdog (struct bce_softc *);
315static int bce_ifmedia_upd (struct ifnet *);
316static void bce_ifmedia_upd_locked (struct ifnet *);
317static void bce_ifmedia_sts (struct ifnet *, struct ifmediareq *);
318static void bce_init_locked (struct bce_softc *);
319static void bce_init (void *);
320static void bce_mgmt_init_locked (struct bce_softc *sc);
321
308static void bce_init_context (struct bce_softc *);
322static void bce_init_ctx (struct bce_softc *);
309static void bce_get_mac_addr (struct bce_softc *);
310static void bce_set_mac_addr (struct bce_softc *);
311static void bce_phy_intr (struct bce_softc *);
323static void bce_get_mac_addr (struct bce_softc *);
324static void bce_set_mac_addr (struct bce_softc *);
325static void bce_phy_intr (struct bce_softc *);
326static inline u16 bce_get_hw_rx_cons(struct bce_softc *);
312static void bce_rx_intr (struct bce_softc *);
313static void bce_tx_intr (struct bce_softc *);
314static void bce_disable_intr (struct bce_softc *);
315static void bce_enable_intr (struct bce_softc *);
316
317#ifdef DEVICE_POLLING
318static void bce_poll_locked (struct ifnet *, enum poll_cmd, int);
319static void bce_poll (struct ifnet *, enum poll_cmd, int);

--- 5 unchanged lines hidden (view full) ---

325static void bce_pulse (void *);
326static void bce_add_sysctls (struct bce_softc *);
327
328
329/****************************************************************************/
330/* FreeBSD device dispatch table. */
331/****************************************************************************/
332static device_method_t bce_methods[] = {
327static void bce_rx_intr (struct bce_softc *);
328static void bce_tx_intr (struct bce_softc *);
329static void bce_disable_intr (struct bce_softc *);
330static void bce_enable_intr (struct bce_softc *);
331
332#ifdef DEVICE_POLLING
333static void bce_poll_locked (struct ifnet *, enum poll_cmd, int);
334static void bce_poll (struct ifnet *, enum poll_cmd, int);

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340static void bce_pulse (void *);
341static void bce_add_sysctls (struct bce_softc *);
342
343
344/****************************************************************************/
345/* FreeBSD device dispatch table. */
346/****************************************************************************/
347static device_method_t bce_methods[] = {
333 /* Device interface */
348 /* Device interface (device_if.h) */
334 DEVMETHOD(device_probe, bce_probe),
335 DEVMETHOD(device_attach, bce_attach),
336 DEVMETHOD(device_detach, bce_detach),
337 DEVMETHOD(device_shutdown, bce_shutdown),
349 DEVMETHOD(device_probe, bce_probe),
350 DEVMETHOD(device_attach, bce_attach),
351 DEVMETHOD(device_detach, bce_detach),
352 DEVMETHOD(device_shutdown, bce_shutdown),
353/* Supported by device interface but not used here. */
354/* DEVMETHOD(device_identify, bce_identify), */
355/* DEVMETHOD(device_suspend, bce_suspend), */
356/* DEVMETHOD(device_resume, bce_resume), */
357/* DEVMETHOD(device_quiesce, bce_quiesce), */
338
358
339 /* bus interface */
359 /* Bus interface (bus_if.h) */
340 DEVMETHOD(bus_print_child, bus_generic_print_child),
341 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
342
360 DEVMETHOD(bus_print_child, bus_generic_print_child),
361 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
362
343 /* MII interface */
363 /* MII interface (miibus_if.h) */
344 DEVMETHOD(miibus_readreg, bce_miibus_read_reg),
345 DEVMETHOD(miibus_writereg, bce_miibus_write_reg),
346 DEVMETHOD(miibus_statchg, bce_miibus_statchg),
364 DEVMETHOD(miibus_readreg, bce_miibus_read_reg),
365 DEVMETHOD(miibus_writereg, bce_miibus_write_reg),
366 DEVMETHOD(miibus_statchg, bce_miibus_statchg),
367/* Supported by MII interface but not used here. */
368/* DEVMETHOD(miibus_linkchg, bce_miibus_linkchg), */
369/* DEVMETHOD(miibus_mediainit, bce_miibus_mediainit), */
347
348 { 0, 0 }
349};
350
351static driver_t bce_driver = {
352 "bce",
353 bce_methods,
354 sizeof(struct bce_softc)

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365
366
367/****************************************************************************/
368/* Tunable device values */
369/****************************************************************************/
370static int bce_tso_enable = TRUE;
371static int bce_msi_enable = 1;
372
370
371 { 0, 0 }
372};
373
374static driver_t bce_driver = {
375 "bce",
376 bce_methods,
377 sizeof(struct bce_softc)

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388
389
390/****************************************************************************/
391/* Tunable device values */
392/****************************************************************************/
393static int bce_tso_enable = TRUE;
394static int bce_msi_enable = 1;
395
396SYSCTL_NODE(_hw, OID_AUTO, bce, CTLFLAG_RD, 0, "bce driver parameters");
397
373/* Allowable values are TRUE or FALSE */
374TUNABLE_INT("hw.bce.tso_enable", &bce_tso_enable);
398/* Allowable values are TRUE or FALSE */
399TUNABLE_INT("hw.bce.tso_enable", &bce_tso_enable);
375/* Allowable values are 0 (IRQ only) and 1 (IRQ or MSI) */
376TUNABLE_INT("hw.bce.msi_enable", &bce_msi_enable);
377
378SYSCTL_NODE(_hw, OID_AUTO, bce, CTLFLAG_RD, 0, "bce driver parameters");
379SYSCTL_UINT(_hw_bce, OID_AUTO, tso_enable, CTLFLAG_RDTUN, &bce_tso_enable, 0,
380"TSO Enable/Disable");
400SYSCTL_UINT(_hw_bce, OID_AUTO, tso_enable, CTLFLAG_RDTUN, &bce_tso_enable, 0,
401"TSO Enable/Disable");
402
403/* Allowable values are 0 (IRQ only) and 1 (IRQ or MSI) */
404TUNABLE_INT("hw.bce.msi_enable", &bce_msi_enable);
381SYSCTL_UINT(_hw_bce, OID_AUTO, msi_enable, CTLFLAG_RDTUN, &bce_msi_enable, 0,
382"MSI | INTx selector");
383
405SYSCTL_UINT(_hw_bce, OID_AUTO, msi_enable, CTLFLAG_RDTUN, &bce_msi_enable, 0,
406"MSI | INTx selector");
407
408/* ToDo: Add tunable to enable/disable strict MTU handling. */
409/* Currently allows "loose" RX MTU checking (i.e. sets the */
410/* h/w RX MTU to the size of the largest receive buffer, or */
411/* 2048 bytes). */
412
384/****************************************************************************/
385/* Device probe function. */
386/* */
387/* Compares the device to the driver's list of supported devices and */
388/* reports back to the OS whether this is the right driver for the device. */
389/* */
390/* Returns: */
391/* BUS_PROBE_DEFAULT on success, positive value on failure. */

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455/* 0 on success, positive value on failure. */
456/****************************************************************************/
457static int
458bce_attach(device_t dev)
459{
460 struct bce_softc *sc;
461 struct ifnet *ifp;
462 u32 val;
413/****************************************************************************/
414/* Device probe function. */
415/* */
416/* Compares the device to the driver's list of supported devices and */
417/* reports back to the OS whether this is the right driver for the device. */
418/* */
419/* Returns: */
420/* BUS_PROBE_DEFAULT on success, positive value on failure. */

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484/* 0 on success, positive value on failure. */
485/****************************************************************************/
486static int
487bce_attach(device_t dev)
488{
489 struct bce_softc *sc;
490 struct ifnet *ifp;
491 u32 val;
463 int count, mbuf, rid, rc = 0;
492 int count, rid, rc = 0;
464
465 sc = device_get_softc(dev);
466 sc->bce_dev = dev;
467
468 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
469
493
494 sc = device_get_softc(dev);
495 sc->bce_dev = dev;
496
497 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
498
470 mbuf = device_get_unit(dev);
499 sc->bce_unit = device_get_unit(dev);
471
472 /* Set initial device and PHY flags */
473 sc->bce_flags = 0;
474 sc->bce_phy_flags = 0;
475
500
501 /* Set initial device and PHY flags */
502 sc->bce_flags = 0;
503 sc->bce_phy_flags = 0;
504
476 sc->bce_unit = mbuf;
477
478 pci_enable_busmaster(dev);
479
480 /* Allocate PCI memory resources. */
481 rid = PCIR_BAR(0);
482 sc->bce_res_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
483 &rid, RF_ACTIVE | PCI_RF_DENSE);
484
485 if (sc->bce_res_mem == NULL) {

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567 if ((val & BCE_SHM_HDR_SIGNATURE_SIG_MASK) == BCE_SHM_HDR_SIGNATURE_SIG)
568 sc->bce_shmem_base = REG_RD_IND(sc, BCE_SHM_HDR_ADDR_0);
569 else
570 sc->bce_shmem_base = HOST_VIEW_SHMEM_BASE;
571
572 DBPRINT(sc, BCE_VERBOSE_FIRMWARE, "%s(): bce_shmem_base = 0x%08X\n",
573 __FUNCTION__, sc->bce_shmem_base);
574
505 pci_enable_busmaster(dev);
506
507 /* Allocate PCI memory resources. */
508 rid = PCIR_BAR(0);
509 sc->bce_res_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
510 &rid, RF_ACTIVE | PCI_RF_DENSE);
511
512 if (sc->bce_res_mem == NULL) {

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594 if ((val & BCE_SHM_HDR_SIGNATURE_SIG_MASK) == BCE_SHM_HDR_SIGNATURE_SIG)
595 sc->bce_shmem_base = REG_RD_IND(sc, BCE_SHM_HDR_ADDR_0);
596 else
597 sc->bce_shmem_base = HOST_VIEW_SHMEM_BASE;
598
599 DBPRINT(sc, BCE_VERBOSE_FIRMWARE, "%s(): bce_shmem_base = 0x%08X\n",
600 __FUNCTION__, sc->bce_shmem_base);
601
602 /* Fetch the bootcode revision. */
575 sc->bce_fw_ver = REG_RD_IND(sc, sc->bce_shmem_base +
576 BCE_DEV_INFO_BC_REV);
603 sc->bce_fw_ver = REG_RD_IND(sc, sc->bce_shmem_base +
604 BCE_DEV_INFO_BC_REV);
577 DBPRINT(sc, BCE_INFO_FIRMWARE, "%s(): bce_fw_ver = 0x%08X\n",
578 __FUNCTION__, sc->bce_fw_ver);
579
580 /* Check if any management firmware is running. */
581 val = REG_RD_IND(sc, sc->bce_shmem_base + BCE_PORT_FEATURE);
605
606 /* Check if any management firmware is running. */
607 val = REG_RD_IND(sc, sc->bce_shmem_base + BCE_PORT_FEATURE);
582 if (val & (BCE_PORT_FEATURE_ASF_ENABLED | BCE_PORT_FEATURE_IMD_ENABLED)) {
608 if (val & (BCE_PORT_FEATURE_ASF_ENABLED | BCE_PORT_FEATURE_IMD_ENABLED))
583 sc->bce_flags |= BCE_MFW_ENABLE_FLAG;
609 sc->bce_flags |= BCE_MFW_ENABLE_FLAG;
584 DBPRINT(sc, BCE_INFO_LOAD, "%s(): BCE_MFW_ENABLE_FLAG\n",
585 __FUNCTION__);
586 }
587
588 /* Get PCI bus information (speed and type). */
589 val = REG_RD(sc, BCE_PCICFG_MISC_STATUS);
590 if (val & BCE_PCICFG_MISC_STATUS_PCIX_DET) {
591 u32 clkreg;
592
593 sc->bce_flags |= BCE_PCIX_FLAG;
594

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752 ifp->if_capabilities = BCE_IF_CAPABILITIES | IFCAP_TSO4;
753 } else {
754 ifp->if_hwassist = BCE_IF_HWASSIST;
755 ifp->if_capabilities = BCE_IF_CAPABILITIES;
756 }
757
758 ifp->if_capenable = ifp->if_capabilities;
759
610
611 /* Get PCI bus information (speed and type). */
612 val = REG_RD(sc, BCE_PCICFG_MISC_STATUS);
613 if (val & BCE_PCICFG_MISC_STATUS_PCIX_DET) {
614 u32 clkreg;
615
616 sc->bce_flags |= BCE_PCIX_FLAG;
617

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775 ifp->if_capabilities = BCE_IF_CAPABILITIES | IFCAP_TSO4;
776 } else {
777 ifp->if_hwassist = BCE_IF_HWASSIST;
778 ifp->if_capabilities = BCE_IF_CAPABILITIES;
779 }
780
781 ifp->if_capenable = ifp->if_capabilities;
782
760 /* Assume a standard 1500 byte MTU size for mbuf allocations. */
761 sc->mbuf_alloc_size = MCLBYTES;
783 /* Use standard mbuf sizes for buffer allocation. */
784 sc->rx_bd_mbuf_alloc_size = MHLEN;
785 sc->pg_bd_mbuf_alloc_size = MCLBYTES;
786
762#ifdef DEVICE_POLLING
763 ifp->if_capabilities |= IFCAP_POLLING;
764#endif
765
766 ifp->if_snd.ifq_drv_maxlen = USABLE_TX_BD;
767 IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
768 IFQ_SET_READY(&ifp->if_snd);
769

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805
806 /*
807 * At this point we've acquired all the resources
808 * we need to run so there's no turning back, we're
809 * cleared for launch.
810 */
811
812 /* Print some important debugging info. */
787#ifdef DEVICE_POLLING
788 ifp->if_capabilities |= IFCAP_POLLING;
789#endif
790
791 ifp->if_snd.ifq_drv_maxlen = USABLE_TX_BD;
792 IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
793 IFQ_SET_READY(&ifp->if_snd);
794

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830
831 /*
832 * At this point we've acquired all the resources
833 * we need to run so there's no turning back, we're
834 * cleared for launch.
835 */
836
837 /* Print some important debugging info. */
813 DBRUN(BCE_INFO, bce_dump_driver_state(sc));
838 DBRUNMSG(BCE_INFO, bce_dump_driver_state(sc));
814
815 /* Add the supported sysctls to the kernel. */
816 bce_add_sysctls(sc);
817
818 BCE_LOCK(sc);
819 /*
820 * The chip reset earlier notified the bootcode that
821 * a driver is present. We now need to start our pulse

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839 if (sc->bce_flags & BCE_MFW_ENABLE_FLAG)
840 printf("MFW ");
841 if (sc->bce_flags & BCE_USING_MSI_FLAG)
842 printf("MSI ");
843 if (sc->bce_phy_flags & BCE_PHY_2_5G_CAPABLE_FLAG)
844 printf("2.5G ");
845 printf(")\n");
846
839
840 /* Add the supported sysctls to the kernel. */
841 bce_add_sysctls(sc);
842
843 BCE_LOCK(sc);
844 /*
845 * The chip reset earlier notified the bootcode that
846 * a driver is present. We now need to start our pulse

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864 if (sc->bce_flags & BCE_MFW_ENABLE_FLAG)
865 printf("MFW ");
866 if (sc->bce_flags & BCE_USING_MSI_FLAG)
867 printf("MSI ");
868 if (sc->bce_phy_flags & BCE_PHY_2_5G_CAPABLE_FLAG)
869 printf("2.5G ");
870 printf(")\n");
871
872 DBPRINT(sc, BCE_FATAL, "%s(): sc = %p\n",
873 __FUNCTION__, sc);
874
847 goto bce_attach_exit;
848
849bce_attach_fail:
850 bce_release_resources(sc);
851
852bce_attach_exit:
853
854 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);

--- 21 unchanged lines hidden (view full) ---

876
877 ifp = sc->bce_ifp;
878
879#ifdef DEVICE_POLLING
880 if (ifp->if_capenable & IFCAP_POLLING)
881 ether_poll_deregister(ifp);
882#endif
883
875 goto bce_attach_exit;
876
877bce_attach_fail:
878 bce_release_resources(sc);
879
880bce_attach_exit:
881
882 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);

--- 21 unchanged lines hidden (view full) ---

904
905 ifp = sc->bce_ifp;
906
907#ifdef DEVICE_POLLING
908 if (ifp->if_capenable & IFCAP_POLLING)
909 ether_poll_deregister(ifp);
910#endif
911
912 /* Stop and reset the controller. */
913 BCE_LOCK(sc);
914
884 /* Stop the pulse so the bootcode can go to driver absent state. */
885 callout_stop(&sc->bce_pulse_callout);
886
915 /* Stop the pulse so the bootcode can go to driver absent state. */
916 callout_stop(&sc->bce_pulse_callout);
917
887 /* Stop and reset the controller. */
888 BCE_LOCK(sc);
889 bce_stop(sc);
890 if (sc->bce_flags & BCE_NO_WOL_FLAG)
891 msg = BCE_DRV_MSG_CODE_UNLOAD_LNK_DN;
892 else
893 msg = BCE_DRV_MSG_CODE_UNLOAD;
894 bce_reset(sc, msg);
918 bce_stop(sc);
919 if (sc->bce_flags & BCE_NO_WOL_FLAG)
920 msg = BCE_DRV_MSG_CODE_UNLOAD_LNK_DN;
921 else
922 msg = BCE_DRV_MSG_CODE_UNLOAD;
923 bce_reset(sc, msg);
924
895 BCE_UNLOCK(sc);
896
897 ether_ifdetach(ifp);
898
899 /* If we have a child device on the MII bus remove it too. */
900 bus_generic_detach(dev);
901 device_delete_child(dev, sc->bce_miibus);
902

--- 87 unchanged lines hidden (view full) ---

990 DBPRINT(sc, BCE_EXCESSIVE, "%s(); offset = 0x%08X, val = 0x%08X\n",
991 __FUNCTION__, offset, val);
992
993 pci_write_config(dev, BCE_PCICFG_REG_WINDOW_ADDRESS, offset, 4);
994 pci_write_config(dev, BCE_PCICFG_REG_WINDOW, val, 4);
995}
996
997
925 BCE_UNLOCK(sc);
926
927 ether_ifdetach(ifp);
928
929 /* If we have a child device on the MII bus remove it too. */
930 bus_generic_detach(dev);
931 device_delete_child(dev, sc->bce_miibus);
932

--- 87 unchanged lines hidden (view full) ---

1020 DBPRINT(sc, BCE_EXCESSIVE, "%s(); offset = 0x%08X, val = 0x%08X\n",
1021 __FUNCTION__, offset, val);
1022
1023 pci_write_config(dev, BCE_PCICFG_REG_WINDOW_ADDRESS, offset, 4);
1024 pci_write_config(dev, BCE_PCICFG_REG_WINDOW, val, 4);
1025}
1026
1027
1028#ifdef BCE_DEBUG
998/****************************************************************************/
1029/****************************************************************************/
1030/* Context memory read. */
1031/* */
1032/* The NetXtreme II controller uses context memory to track connection */
1033/* information for L2 and higher network protocols. */
1034/* */
1035/* Returns: */
1036/* The requested 32 bit value of context memory. */
1037/****************************************************************************/
1038static u32
1039bce_ctx_rd(struct bce_softc *sc, u32 cid_addr, u32 offset)
1040{
1041 u32 val;
1042
1043 offset += cid_addr;
1044 REG_WR(sc, BCE_CTX_DATA_ADR, offset);
1045 val = REG_RD(sc, BCE_CTX_DATA);
1046
1047 DBPRINT(sc, BCE_EXCESSIVE, "%s(); cid_addr = 0x%08X, offset = 0x%08X, "
1048 "val = 0x%08X\n", __FUNCTION__, cid_addr, offset, val);
1049
1050 return(val);
1051}
1052#endif
1053
1054
1055/****************************************************************************/
999/* Context memory write. */
1000/* */
1001/* The NetXtreme II controller uses context memory to track connection */
1002/* information for L2 and higher network protocols. */
1003/* */
1004/* Returns: */
1005/* Nothing. */
1006/****************************************************************************/

--- 200 unchanged lines hidden (view full) ---

1207 val |= BCE_EMAC_MODE_25G;
1208 /* fall-through */
1209 case IFM_1000_T:
1210 case IFM_1000_SX:
1211 DBPRINT(sc, BCE_INFO, "Enabling GMII interface.\n");
1212 val |= BCE_EMAC_MODE_PORT_GMII;
1213 break;
1214 default:
1056/* Context memory write. */
1057/* */
1058/* The NetXtreme II controller uses context memory to track connection */
1059/* information for L2 and higher network protocols. */
1060/* */
1061/* Returns: */
1062/* Nothing. */
1063/****************************************************************************/

--- 200 unchanged lines hidden (view full) ---

1264 val |= BCE_EMAC_MODE_25G;
1265 /* fall-through */
1266 case IFM_1000_T:
1267 case IFM_1000_SX:
1268 DBPRINT(sc, BCE_INFO, "Enabling GMII interface.\n");
1269 val |= BCE_EMAC_MODE_PORT_GMII;
1270 break;
1271 default:
1215 DBPRINT(sc, BCE_INFO, "Enabling default GMII interface.\n");
1272 DBPRINT(sc, BCE_INFO, "Unknown speed, enabling default GMII "
1273 "interface.\n");
1216 val |= BCE_EMAC_MODE_PORT_GMII;
1217 }
1218
1219 /* Set half or full duplex based on the duplicity negotiated by the PHY. */
1220 if ((mii->mii_media_active & IFM_GMASK) == IFM_HDX) {
1221 DBPRINT(sc, BCE_INFO, "Setting Half-Duplex interface.\n");
1222 val |= BCE_EMAC_MODE_HALF_DUPLEX;
1223 } else
1224 DBPRINT(sc, BCE_INFO, "Setting Full-Duplex interface.\n");
1225
1226 REG_WR(sc, BCE_EMAC_MODE, val);
1227
1228#if 0
1274 val |= BCE_EMAC_MODE_PORT_GMII;
1275 }
1276
1277 /* Set half or full duplex based on the duplicity negotiated by the PHY. */
1278 if ((mii->mii_media_active & IFM_GMASK) == IFM_HDX) {
1279 DBPRINT(sc, BCE_INFO, "Setting Half-Duplex interface.\n");
1280 val |= BCE_EMAC_MODE_HALF_DUPLEX;
1281 } else
1282 DBPRINT(sc, BCE_INFO, "Setting Full-Duplex interface.\n");
1283
1284 REG_WR(sc, BCE_EMAC_MODE, val);
1285
1286#if 0
1229 /* Todo: Enable flow control support in brgphy and bge. */
1287 /* ToDo: Enable flow control support in brgphy and bge. */
1230 /* FLAG0 is set if RX is enabled and FLAG1 if TX is enabled */
1231 if (mii->mii_media_active & IFM_FLAG0)
1232 BCE_SETBIT(sc, BCE_EMAC_RX_MODE, BCE_EMAC_RX_MODE_FLOW_EN);
1233 if (mii->mii_media_active & IFM_FLAG1)
1234 BCE_SETBIT(sc, BCE_EMAC_RX_MODE, BCE_EMAC_TX_MODE_FLOW_EN);
1235#endif
1236
1237}

--- 852 unchanged lines hidden (view full) ---

2090static void
2091bce_dma_free(struct bce_softc *sc)
2092{
2093 int i;
2094
2095 DBPRINT(sc,BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
2096
2097 /* Destroy the status block. */
1288 /* FLAG0 is set if RX is enabled and FLAG1 if TX is enabled */
1289 if (mii->mii_media_active & IFM_FLAG0)
1290 BCE_SETBIT(sc, BCE_EMAC_RX_MODE, BCE_EMAC_RX_MODE_FLOW_EN);
1291 if (mii->mii_media_active & IFM_FLAG1)
1292 BCE_SETBIT(sc, BCE_EMAC_RX_MODE, BCE_EMAC_TX_MODE_FLOW_EN);
1293#endif
1294
1295}

--- 852 unchanged lines hidden (view full) ---

2148static void
2149bce_dma_free(struct bce_softc *sc)
2150{
2151 int i;
2152
2153 DBPRINT(sc,BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
2154
2155 /* Destroy the status block. */
2098 if (sc->status_block != NULL)
2156 if (sc->status_block != NULL) {
2099 bus_dmamem_free(
2100 sc->status_tag,
2101 sc->status_block,
2102 sc->status_map);
2157 bus_dmamem_free(
2158 sc->status_tag,
2159 sc->status_block,
2160 sc->status_map);
2161 sc->status_block = NULL;
2162 }
2103
2104 if (sc->status_map != NULL) {
2105 bus_dmamap_unload(
2106 sc->status_tag,
2107 sc->status_map);
2108 bus_dmamap_destroy(sc->status_tag,
2109 sc->status_map);
2163
2164 if (sc->status_map != NULL) {
2165 bus_dmamap_unload(
2166 sc->status_tag,
2167 sc->status_map);
2168 bus_dmamap_destroy(sc->status_tag,
2169 sc->status_map);
2170 sc->status_map = NULL;
2110 }
2111
2171 }
2172
2112 if (sc->status_tag != NULL)
2173 if (sc->status_tag != NULL) {
2113 bus_dma_tag_destroy(sc->status_tag);
2174 bus_dma_tag_destroy(sc->status_tag);
2175 sc->status_tag = NULL;
2176 }
2114
2115
2116 /* Destroy the statistics block. */
2177
2178
2179 /* Destroy the statistics block. */
2117 if (sc->stats_block != NULL)
2180 if (sc->stats_block != NULL) {
2118 bus_dmamem_free(
2119 sc->stats_tag,
2120 sc->stats_block,
2121 sc->stats_map);
2181 bus_dmamem_free(
2182 sc->stats_tag,
2183 sc->stats_block,
2184 sc->stats_map);
2185 sc->stats_block = NULL;
2186 }
2122
2123 if (sc->stats_map != NULL) {
2124 bus_dmamap_unload(
2125 sc->stats_tag,
2126 sc->stats_map);
2127 bus_dmamap_destroy(sc->stats_tag,
2128 sc->stats_map);
2187
2188 if (sc->stats_map != NULL) {
2189 bus_dmamap_unload(
2190 sc->stats_tag,
2191 sc->stats_map);
2192 bus_dmamap_destroy(sc->stats_tag,
2193 sc->stats_map);
2194 sc->stats_map = NULL;
2129 }
2130
2195 }
2196
2131 if (sc->stats_tag != NULL)
2197 if (sc->stats_tag != NULL) {
2132 bus_dma_tag_destroy(sc->stats_tag);
2198 bus_dma_tag_destroy(sc->stats_tag);
2199 sc->stats_tag = NULL;
2200 }
2133
2134
2135 /* Free, unmap and destroy all TX buffer descriptor chain pages. */
2136 for (i = 0; i < TX_PAGES; i++ ) {
2201
2202
2203 /* Free, unmap and destroy all TX buffer descriptor chain pages. */
2204 for (i = 0; i < TX_PAGES; i++ ) {
2137 if (sc->tx_bd_chain[i] != NULL)
2205 if (sc->tx_bd_chain[i] != NULL) {
2138 bus_dmamem_free(
2139 sc->tx_bd_chain_tag,
2140 sc->tx_bd_chain[i],
2141 sc->tx_bd_chain_map[i]);
2206 bus_dmamem_free(
2207 sc->tx_bd_chain_tag,
2208 sc->tx_bd_chain[i],
2209 sc->tx_bd_chain_map[i]);
2210 sc->tx_bd_chain[i] = NULL;
2211 }
2142
2143 if (sc->tx_bd_chain_map[i] != NULL) {
2144 bus_dmamap_unload(
2145 sc->tx_bd_chain_tag,
2146 sc->tx_bd_chain_map[i]);
2147 bus_dmamap_destroy(
2148 sc->tx_bd_chain_tag,
2149 sc->tx_bd_chain_map[i]);
2212
2213 if (sc->tx_bd_chain_map[i] != NULL) {
2214 bus_dmamap_unload(
2215 sc->tx_bd_chain_tag,
2216 sc->tx_bd_chain_map[i]);
2217 bus_dmamap_destroy(
2218 sc->tx_bd_chain_tag,
2219 sc->tx_bd_chain_map[i]);
2220 sc->tx_bd_chain_map[i] = NULL;
2150 }
2221 }
2151
2152 }
2153
2154 /* Destroy the TX buffer descriptor tag. */
2222 }
2223
2224 /* Destroy the TX buffer descriptor tag. */
2155 if (sc->tx_bd_chain_tag != NULL)
2225 if (sc->tx_bd_chain_tag != NULL) {
2156 bus_dma_tag_destroy(sc->tx_bd_chain_tag);
2226 bus_dma_tag_destroy(sc->tx_bd_chain_tag);
2227 sc->tx_bd_chain_tag = NULL;
2228 }
2157
2158
2159 /* Free, unmap and destroy all RX buffer descriptor chain pages. */
2160 for (i = 0; i < RX_PAGES; i++ ) {
2229
2230
2231 /* Free, unmap and destroy all RX buffer descriptor chain pages. */
2232 for (i = 0; i < RX_PAGES; i++ ) {
2161 if (sc->rx_bd_chain[i] != NULL)
2233 if (sc->rx_bd_chain[i] != NULL) {
2162 bus_dmamem_free(
2163 sc->rx_bd_chain_tag,
2164 sc->rx_bd_chain[i],
2165 sc->rx_bd_chain_map[i]);
2234 bus_dmamem_free(
2235 sc->rx_bd_chain_tag,
2236 sc->rx_bd_chain[i],
2237 sc->rx_bd_chain_map[i]);
2238 sc->rx_bd_chain[i] = NULL;
2239 }
2166
2167 if (sc->rx_bd_chain_map[i] != NULL) {
2168 bus_dmamap_unload(
2169 sc->rx_bd_chain_tag,
2170 sc->rx_bd_chain_map[i]);
2171 bus_dmamap_destroy(
2172 sc->rx_bd_chain_tag,
2173 sc->rx_bd_chain_map[i]);
2240
2241 if (sc->rx_bd_chain_map[i] != NULL) {
2242 bus_dmamap_unload(
2243 sc->rx_bd_chain_tag,
2244 sc->rx_bd_chain_map[i]);
2245 bus_dmamap_destroy(
2246 sc->rx_bd_chain_tag,
2247 sc->rx_bd_chain_map[i]);
2248 sc->rx_bd_chain_map[i] = NULL;
2174 }
2175 }
2176
2177 /* Destroy the RX buffer descriptor tag. */
2249 }
2250 }
2251
2252 /* Destroy the RX buffer descriptor tag. */
2178 if (sc->rx_bd_chain_tag != NULL)
2253 if (sc->rx_bd_chain_tag != NULL) {
2179 bus_dma_tag_destroy(sc->rx_bd_chain_tag);
2254 bus_dma_tag_destroy(sc->rx_bd_chain_tag);
2255 sc->rx_bd_chain_tag = NULL;
2256 }
2180
2181
2257
2258
2259 /* Free, unmap and destroy all page buffer descriptor chain pages. */
2260 for (i = 0; i < PG_PAGES; i++ ) {
2261 if (sc->pg_bd_chain[i] != NULL) {
2262 bus_dmamem_free(
2263 sc->pg_bd_chain_tag,
2264 sc->pg_bd_chain[i],
2265 sc->pg_bd_chain_map[i]);
2266 sc->pg_bd_chain[i] = NULL;
2267 }
2268
2269 if (sc->pg_bd_chain_map[i] != NULL) {
2270 bus_dmamap_unload(
2271 sc->pg_bd_chain_tag,
2272 sc->pg_bd_chain_map[i]);
2273 bus_dmamap_destroy(
2274 sc->pg_bd_chain_tag,
2275 sc->pg_bd_chain_map[i]);
2276 sc->pg_bd_chain_map[i] = NULL;
2277 }
2278 }
2279
2280 /* Destroy the page buffer descriptor tag. */
2281 if (sc->pg_bd_chain_tag != NULL) {
2282 bus_dma_tag_destroy(sc->pg_bd_chain_tag);
2283 sc->pg_bd_chain_tag = NULL;
2284 }
2285
2286
2182 /* Unload and destroy the TX mbuf maps. */
2183 for (i = 0; i < TOTAL_TX_BD; i++) {
2184 if (sc->tx_mbuf_map[i] != NULL) {
2185 bus_dmamap_unload(sc->tx_mbuf_tag,
2186 sc->tx_mbuf_map[i]);
2187 bus_dmamap_destroy(sc->tx_mbuf_tag,
2188 sc->tx_mbuf_map[i]);
2287 /* Unload and destroy the TX mbuf maps. */
2288 for (i = 0; i < TOTAL_TX_BD; i++) {
2289 if (sc->tx_mbuf_map[i] != NULL) {
2290 bus_dmamap_unload(sc->tx_mbuf_tag,
2291 sc->tx_mbuf_map[i]);
2292 bus_dmamap_destroy(sc->tx_mbuf_tag,
2293 sc->tx_mbuf_map[i]);
2294 sc->tx_mbuf_map[i] = NULL;
2189 }
2190 }
2191
2192 /* Destroy the TX mbuf tag. */
2295 }
2296 }
2297
2298 /* Destroy the TX mbuf tag. */
2193 if (sc->tx_mbuf_tag != NULL)
2299 if (sc->tx_mbuf_tag != NULL) {
2194 bus_dma_tag_destroy(sc->tx_mbuf_tag);
2300 bus_dma_tag_destroy(sc->tx_mbuf_tag);
2301 sc->tx_mbuf_tag = NULL;
2302 }
2195
2303
2196
2197 /* Unload and destroy the RX mbuf maps. */
2198 for (i = 0; i < TOTAL_RX_BD; i++) {
2199 if (sc->rx_mbuf_map[i] != NULL) {
2200 bus_dmamap_unload(sc->rx_mbuf_tag,
2201 sc->rx_mbuf_map[i]);
2202 bus_dmamap_destroy(sc->rx_mbuf_tag,
2203 sc->rx_mbuf_map[i]);
2304 /* Unload and destroy the RX mbuf maps. */
2305 for (i = 0; i < TOTAL_RX_BD; i++) {
2306 if (sc->rx_mbuf_map[i] != NULL) {
2307 bus_dmamap_unload(sc->rx_mbuf_tag,
2308 sc->rx_mbuf_map[i]);
2309 bus_dmamap_destroy(sc->rx_mbuf_tag,
2310 sc->rx_mbuf_map[i]);
2311 sc->rx_mbuf_map[i] = NULL;
2204 }
2205 }
2206
2207 /* Destroy the RX mbuf tag. */
2312 }
2313 }
2314
2315 /* Destroy the RX mbuf tag. */
2208 if (sc->rx_mbuf_tag != NULL)
2316 if (sc->rx_mbuf_tag != NULL) {
2209 bus_dma_tag_destroy(sc->rx_mbuf_tag);
2317 bus_dma_tag_destroy(sc->rx_mbuf_tag);
2318 sc->rx_mbuf_tag = NULL;
2319 }
2210
2320
2321 /* Unload and destroy the page mbuf maps. */
2322 for (i = 0; i < TOTAL_PG_BD; i++) {
2323 if (sc->pg_mbuf_map[i] != NULL) {
2324 bus_dmamap_unload(sc->pg_mbuf_tag,
2325 sc->pg_mbuf_map[i]);
2326 bus_dmamap_destroy(sc->pg_mbuf_tag,
2327 sc->pg_mbuf_map[i]);
2328 sc->pg_mbuf_map[i] = NULL;
2329 }
2330 }
2211
2331
2332 /* Destroy the page mbuf tag. */
2333 if (sc->pg_mbuf_tag != NULL) {
2334 bus_dma_tag_destroy(sc->pg_mbuf_tag);
2335 sc->pg_mbuf_tag = NULL;
2336 }
2337
2212 /* Destroy the parent tag */
2338 /* Destroy the parent tag */
2213 if (sc->parent_tag != NULL)
2339 if (sc->parent_tag != NULL) {
2214 bus_dma_tag_destroy(sc->parent_tag);
2340 bus_dma_tag_destroy(sc->parent_tag);
2341 sc->parent_tag = NULL;
2342 }
2215
2216 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
2217
2218}
2219
2220
2221/****************************************************************************/
2222/* Get DMA memory from the OS. */

--- 278 unchanged lines hidden (view full) ---

2501 __FILE__, __LINE__);
2502 rc = ENOMEM;
2503 goto bce_dma_alloc_exit;
2504 }
2505 }
2506
2507 /*
2508 * Create a DMA tag for the RX buffer descriptor chain,
2343
2344 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
2345
2346}
2347
2348
2349/****************************************************************************/
2350/* Get DMA memory from the OS. */

--- 278 unchanged lines hidden (view full) ---

2629 __FILE__, __LINE__);
2630 rc = ENOMEM;
2631 goto bce_dma_alloc_exit;
2632 }
2633 }
2634
2635 /*
2636 * Create a DMA tag for the RX buffer descriptor chain,
2509 * allocate and clear the memory, and fetch the physical
2637 * allocate and clear the memory, and fetch the physical
2510 * address of the blocks.
2511 */
2512 if (bus_dma_tag_create(sc->parent_tag,
2513 BCM_PAGE_SIZE,
2514 BCE_DMA_BOUNDARY,
2515 BUS_SPACE_MAXADDR,
2516 sc->max_bus_addr,
2517 NULL, NULL,

--- 42 unchanged lines hidden (view full) ---

2560 /* DRC - Fix for 64 bit systems. */
2561 DBPRINT(sc, BCE_INFO, "rx_bd_chain_paddr[%d] = 0x%08X\n",
2562 i, (u32) sc->rx_bd_chain_paddr[i]);
2563 }
2564
2565 /*
2566 * Create a DMA tag for RX mbufs.
2567 */
2638 * address of the blocks.
2639 */
2640 if (bus_dma_tag_create(sc->parent_tag,
2641 BCM_PAGE_SIZE,
2642 BCE_DMA_BOUNDARY,
2643 BUS_SPACE_MAXADDR,
2644 sc->max_bus_addr,
2645 NULL, NULL,

--- 42 unchanged lines hidden (view full) ---

2688 /* DRC - Fix for 64 bit systems. */
2689 DBPRINT(sc, BCE_INFO, "rx_bd_chain_paddr[%d] = 0x%08X\n",
2690 i, (u32) sc->rx_bd_chain_paddr[i]);
2691 }
2692
2693 /*
2694 * Create a DMA tag for RX mbufs.
2695 */
2696 max_size = max_seg_size = ((sc->rx_bd_mbuf_alloc_size < MCLBYTES) ?
2697 MCLBYTES : sc->rx_bd_mbuf_alloc_size);
2698
2568 if (bus_dma_tag_create(sc->parent_tag,
2569 1,
2570 BCE_DMA_BOUNDARY,
2571 sc->max_bus_addr,
2572 BUS_SPACE_MAXADDR,
2573 NULL, NULL,
2699 if (bus_dma_tag_create(sc->parent_tag,
2700 1,
2701 BCE_DMA_BOUNDARY,
2702 sc->max_bus_addr,
2703 BUS_SPACE_MAXADDR,
2704 NULL, NULL,
2574 MJUM9BYTES,
2575 BCE_MAX_SEGMENTS,
2576 MJUM9BYTES,
2705 max_size,
2706 1,
2707 max_seg_size,
2577 0,
2578 NULL, NULL,
2579 &sc->rx_mbuf_tag)) {
2580 BCE_PRINTF("%s(%d): Could not allocate RX mbuf DMA tag!\n",
2581 __FILE__, __LINE__);
2582 rc = ENOMEM;
2583 goto bce_dma_alloc_exit;
2584 }

--- 4 unchanged lines hidden (view full) ---

2589 &sc->rx_mbuf_map[i])) {
2590 BCE_PRINTF("%s(%d): Unable to create RX mbuf DMA map!\n",
2591 __FILE__, __LINE__);
2592 rc = ENOMEM;
2593 goto bce_dma_alloc_exit;
2594 }
2595 }
2596
2708 0,
2709 NULL, NULL,
2710 &sc->rx_mbuf_tag)) {
2711 BCE_PRINTF("%s(%d): Could not allocate RX mbuf DMA tag!\n",
2712 __FILE__, __LINE__);
2713 rc = ENOMEM;
2714 goto bce_dma_alloc_exit;
2715 }

--- 4 unchanged lines hidden (view full) ---

2720 &sc->rx_mbuf_map[i])) {
2721 BCE_PRINTF("%s(%d): Unable to create RX mbuf DMA map!\n",
2722 __FILE__, __LINE__);
2723 rc = ENOMEM;
2724 goto bce_dma_alloc_exit;
2725 }
2726 }
2727
2728 /*
2729 * Create a DMA tag for the page buffer descriptor chain,
2730 * allocate and clear the memory, and fetch the physical
2731 * address of the blocks.
2732 */
2733 if (bus_dma_tag_create(sc->parent_tag,
2734 BCM_PAGE_SIZE,
2735 BCE_DMA_BOUNDARY,
2736 BUS_SPACE_MAXADDR,
2737 sc->max_bus_addr,
2738 NULL, NULL,
2739 BCE_PG_CHAIN_PAGE_SZ,
2740 1,
2741 BCE_PG_CHAIN_PAGE_SZ,
2742 0,
2743 NULL, NULL,
2744 &sc->pg_bd_chain_tag)) {
2745 BCE_PRINTF("%s(%d): Could not allocate page descriptor chain DMA tag!\n",
2746 __FILE__, __LINE__);
2747 rc = ENOMEM;
2748 goto bce_dma_alloc_exit;
2749 }
2750
2751 for (i = 0; i < PG_PAGES; i++) {
2752
2753 if (bus_dmamem_alloc(sc->pg_bd_chain_tag,
2754 (void **)&sc->pg_bd_chain[i],
2755 BUS_DMA_NOWAIT,
2756 &sc->pg_bd_chain_map[i])) {
2757 BCE_PRINTF("%s(%d): Could not allocate page descriptor chain "
2758 "DMA memory!\n", __FILE__, __LINE__);
2759 rc = ENOMEM;
2760 goto bce_dma_alloc_exit;
2761 }
2762
2763 bzero((char *)sc->pg_bd_chain[i], BCE_PG_CHAIN_PAGE_SZ);
2764
2765 error = bus_dmamap_load(sc->pg_bd_chain_tag,
2766 sc->pg_bd_chain_map[i],
2767 sc->pg_bd_chain[i],
2768 BCE_PG_CHAIN_PAGE_SZ,
2769 bce_dma_map_addr,
2770 &busaddr,
2771 BUS_DMA_NOWAIT);
2772
2773 if (error) {
2774 BCE_PRINTF("%s(%d): Could not map page descriptor chain DMA memory!\n",
2775 __FILE__, __LINE__);
2776 rc = ENOMEM;
2777 goto bce_dma_alloc_exit;
2778 }
2779
2780 sc->pg_bd_chain_paddr[i] = busaddr;
2781 /* DRC - Fix for 64 bit systems. */
2782 DBPRINT(sc, BCE_INFO, "pg_bd_chain_paddr[%d] = 0x%08X\n",
2783 i, (u32) sc->pg_bd_chain_paddr[i]);
2784 }
2785
2786 /*
2787 * Create a DMA tag for page mbufs.
2788 */
2789 max_size = max_seg_size = ((sc->pg_bd_mbuf_alloc_size < MCLBYTES) ?
2790 MCLBYTES : sc->rx_bd_mbuf_alloc_size);
2791
2792 if (bus_dma_tag_create(sc->parent_tag,
2793 1,
2794 BCE_DMA_BOUNDARY,
2795 sc->max_bus_addr,
2796 BUS_SPACE_MAXADDR,
2797 NULL, NULL,
2798 max_size,
2799 1,
2800 max_seg_size,
2801 0,
2802 NULL, NULL,
2803 &sc->pg_mbuf_tag)) {
2804 BCE_PRINTF("%s(%d): Could not allocate page mbuf DMA tag!\n",
2805 __FILE__, __LINE__);
2806 rc = ENOMEM;
2807 goto bce_dma_alloc_exit;
2808 }
2809
2810 /* Create DMA maps for the page mbuf clusters. */
2811 for (i = 0; i < TOTAL_PG_BD; i++) {
2812 if (bus_dmamap_create(sc->pg_mbuf_tag, BUS_DMA_NOWAIT,
2813 &sc->pg_mbuf_map[i])) {
2814 BCE_PRINTF("%s(%d): Unable to create page mbuf DMA map!\n",
2815 __FILE__, __LINE__);
2816 rc = ENOMEM;
2817 goto bce_dma_alloc_exit;
2818 }
2819 }
2820
2597bce_dma_alloc_exit:
2598 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
2599
2600 return(rc);
2601}
2602
2603
2604/****************************************************************************/

--- 119 unchanged lines hidden (view full) ---

2724/****************************************************************************/
2725static void
2726bce_load_rv2p_fw(struct bce_softc *sc, u32 *rv2p_code,
2727 u32 rv2p_code_len, u32 rv2p_proc)
2728{
2729 int i;
2730 u32 val;
2731
2821bce_dma_alloc_exit:
2822 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
2823
2824 return(rc);
2825}
2826
2827
2828/****************************************************************************/

--- 119 unchanged lines hidden (view full) ---

2948/****************************************************************************/
2949static void
2950bce_load_rv2p_fw(struct bce_softc *sc, u32 *rv2p_code,
2951 u32 rv2p_code_len, u32 rv2p_proc)
2952{
2953 int i;
2954 u32 val;
2955
2956 /* Set the page size used by RV2P. */
2957 if (rv2p_proc == RV2P_PROC2) {
2958 BCE_RV2P_PROC2_CHG_MAX_BD_PAGE(USABLE_RX_BD_PER_PAGE);
2959 }
2960
2732 for (i = 0; i < rv2p_code_len; i += 8) {
2733 REG_WR(sc, BCE_RV2P_INSTR_HIGH, *rv2p_code);
2734 rv2p_code++;
2735 REG_WR(sc, BCE_RV2P_INSTR_LOW, *rv2p_code);
2736 rv2p_code++;
2737
2738 if (rv2p_proc == RV2P_PROC1) {
2739 val = (i / 8) | BCE_RV2P_PROC1_ADDR_CMD_RDWR;

--- 300 unchanged lines hidden (view full) ---

3040
3041 fw.rodata_addr = bce_COM_b06FwRodataAddr;
3042 fw.rodata_len = bce_COM_b06FwRodataLen;
3043 fw.rodata_index = 0;
3044 fw.rodata = bce_COM_b06FwRodata;
3045
3046 DBPRINT(sc, BCE_INFO_RESET, "Loading COM firmware.\n");
3047 bce_load_cpu_fw(sc, &cpu_reg, &fw);
2961 for (i = 0; i < rv2p_code_len; i += 8) {
2962 REG_WR(sc, BCE_RV2P_INSTR_HIGH, *rv2p_code);
2963 rv2p_code++;
2964 REG_WR(sc, BCE_RV2P_INSTR_LOW, *rv2p_code);
2965 rv2p_code++;
2966
2967 if (rv2p_proc == RV2P_PROC1) {
2968 val = (i / 8) | BCE_RV2P_PROC1_ADDR_CMD_RDWR;

--- 300 unchanged lines hidden (view full) ---

3269
3270 fw.rodata_addr = bce_COM_b06FwRodataAddr;
3271 fw.rodata_len = bce_COM_b06FwRodataLen;
3272 fw.rodata_index = 0;
3273 fw.rodata = bce_COM_b06FwRodata;
3274
3275 DBPRINT(sc, BCE_INFO_RESET, "Loading COM firmware.\n");
3276 bce_load_cpu_fw(sc, &cpu_reg, &fw);
3277
3278 /* Initialize the Command Processor. */
3279 cpu_reg.mode = BCE_CP_CPU_MODE;
3280 cpu_reg.mode_value_halt = BCE_CP_CPU_MODE_SOFT_HALT;
3281 cpu_reg.mode_value_sstep = BCE_CP_CPU_MODE_STEP_ENA;
3282 cpu_reg.state = BCE_CP_CPU_STATE;
3283 cpu_reg.state_value_clear = 0xffffff;
3284 cpu_reg.gpr0 = BCE_CP_CPU_REG_FILE;
3285 cpu_reg.evmask = BCE_CP_CPU_EVENT_MASK;
3286 cpu_reg.pc = BCE_CP_CPU_PROGRAM_COUNTER;
3287 cpu_reg.inst = BCE_CP_CPU_INSTRUCTION;
3288 cpu_reg.bp = BCE_CP_CPU_HW_BREAKPOINT;
3289 cpu_reg.spad_base = BCE_CP_SCRATCH;
3290 cpu_reg.mips_view_base = 0x8000000;
3291
3292 fw.ver_major = bce_CP_b06FwReleaseMajor;
3293 fw.ver_minor = bce_CP_b06FwReleaseMinor;
3294 fw.ver_fix = bce_CP_b06FwReleaseFix;
3295 fw.start_addr = bce_CP_b06FwStartAddr;
3296
3297 fw.text_addr = bce_CP_b06FwTextAddr;
3298 fw.text_len = bce_CP_b06FwTextLen;
3299 fw.text_index = 0;
3300 fw.text = bce_CP_b06FwText;
3301
3302 fw.data_addr = bce_CP_b06FwDataAddr;
3303 fw.data_len = bce_CP_b06FwDataLen;
3304 fw.data_index = 0;
3305 fw.data = bce_CP_b06FwData;
3306
3307 fw.sbss_addr = bce_CP_b06FwSbssAddr;
3308 fw.sbss_len = bce_CP_b06FwSbssLen;
3309 fw.sbss_index = 0;
3310 fw.sbss = bce_CP_b06FwSbss;
3311
3312 fw.bss_addr = bce_CP_b06FwBssAddr;
3313 fw.bss_len = bce_CP_b06FwBssLen;
3314 fw.bss_index = 0;
3315 fw.bss = bce_CP_b06FwBss;
3316
3317 fw.rodata_addr = bce_CP_b06FwRodataAddr;
3318 fw.rodata_len = bce_CP_b06FwRodataLen;
3319 fw.rodata_index = 0;
3320 fw.rodata = bce_CP_b06FwRodata;
3321
3322 DBPRINT(sc, BCE_INFO_RESET, "Loading CP firmware.\n");
3323 bce_load_cpu_fw(sc, &cpu_reg, &fw);
3048}
3049
3050
3051/****************************************************************************/
3052/* Initialize context memory. */
3053/* */
3054/* Clears the memory associated with each Context ID (CID). */
3055/* */
3056/* Returns: */
3057/* Nothing. */
3058/****************************************************************************/
3059static void
3324}
3325
3326
3327/****************************************************************************/
3328/* Initialize context memory. */
3329/* */
3330/* Clears the memory associated with each Context ID (CID). */
3331/* */
3332/* Returns: */
3333/* Nothing. */
3334/****************************************************************************/
3335static void
3060bce_init_context(struct bce_softc *sc)
3336bce_init_ctx(struct bce_softc *sc)
3061{
3337{
3062 u32 vcid;
3338 u32 vcid = 96;
3063
3339
3064 vcid = 96;
3065 while (vcid) {
3066 u32 vcid_addr, pcid_addr, offset;
3340 while (vcid) {
3341 u32 vcid_addr, pcid_addr, offset;
3342 int i;
3067
3068 vcid--;
3069
3070 vcid_addr = GET_CID_ADDR(vcid);
3071 pcid_addr = vcid_addr;
3072
3343
3344 vcid--;
3345
3346 vcid_addr = GET_CID_ADDR(vcid);
3347 pcid_addr = vcid_addr;
3348
3073 REG_WR(sc, BCE_CTX_VIRT_ADDR, 0x00);
3074 REG_WR(sc, BCE_CTX_PAGE_TBL, pcid_addr);
3349 for (i = 0; i < (CTX_SIZE / PHY_CTX_SIZE); i++) {
3350 vcid_addr += (i << PHY_CTX_SHIFT);
3351 pcid_addr += (i << PHY_CTX_SHIFT);
3075
3352
3076 /* Zero out the context. */
3077 for (offset = 0; offset < PHY_CTX_SIZE; offset += 4) {
3078 CTX_WR(sc, 0x00, offset, 0);
3079 }
3353 REG_WR(sc, BCE_CTX_VIRT_ADDR, vcid_addr);
3354 REG_WR(sc, BCE_CTX_PAGE_TBL, pcid_addr);
3080
3355
3081 REG_WR(sc, BCE_CTX_VIRT_ADDR, vcid_addr);
3082 REG_WR(sc, BCE_CTX_PAGE_TBL, pcid_addr);
3356 /* Zero out the context. */
3357 for (offset = 0; offset < PHY_CTX_SIZE; offset += 4)
3358 CTX_WR(sc, vcid_addr, offset, 0);
3359 }
3083 }
3084}
3085
3086
3087/****************************************************************************/
3088/* Fetch the permanent MAC address of the controller. */
3089/* */
3090/* Returns: */

--- 86 unchanged lines hidden (view full) ---

3177 /* Disable the transmit/receive blocks. */
3178 REG_WR(sc, BCE_MISC_ENABLE_CLR_BITS, 0x5ffffff);
3179 REG_RD(sc, BCE_MISC_ENABLE_CLR_BITS);
3180 DELAY(20);
3181
3182 bce_disable_intr(sc);
3183
3184 /* Free RX buffers. */
3360 }
3361}
3362
3363
3364/****************************************************************************/
3365/* Fetch the permanent MAC address of the controller. */
3366/* */
3367/* Returns: */

--- 86 unchanged lines hidden (view full) ---

3454 /* Disable the transmit/receive blocks. */
3455 REG_WR(sc, BCE_MISC_ENABLE_CLR_BITS, 0x5ffffff);
3456 REG_RD(sc, BCE_MISC_ENABLE_CLR_BITS);
3457 DELAY(20);
3458
3459 bce_disable_intr(sc);
3460
3461 /* Free RX buffers. */
3462 bce_free_pg_chain(sc);
3185 bce_free_rx_chain(sc);
3186
3187 /* Free TX buffers. */
3188 bce_free_tx_chain(sc);
3189
3190 /*
3191 * Isolate/power down the PHY, but leave the media selection
3192 * unchanged so that things will be put back to normal when

--- 155 unchanged lines hidden (view full) ---

3348
3349 /* Enable the RX_V2P and Context state machines before access. */
3350 REG_WR(sc, BCE_MISC_ENABLE_SET_BITS,
3351 BCE_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE |
3352 BCE_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE |
3353 BCE_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE);
3354
3355 /* Initialize context mapping and zero out the quick contexts. */
3463 bce_free_rx_chain(sc);
3464
3465 /* Free TX buffers. */
3466 bce_free_tx_chain(sc);
3467
3468 /*
3469 * Isolate/power down the PHY, but leave the media selection
3470 * unchanged so that things will be put back to normal when

--- 155 unchanged lines hidden (view full) ---

3626
3627 /* Enable the RX_V2P and Context state machines before access. */
3628 REG_WR(sc, BCE_MISC_ENABLE_SET_BITS,
3629 BCE_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE |
3630 BCE_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE |
3631 BCE_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE);
3632
3633 /* Initialize context mapping and zero out the quick contexts. */
3356 bce_init_context(sc);
3634 bce_init_ctx(sc);
3357
3358 /* Initialize the on-boards CPUs */
3359 bce_init_cpus(sc);
3360
3361 /* Prepare NVRAM for access. */
3362 if (bce_init_nvram(sc)) {
3363 rc = ENODEV;
3364 goto bce_chipinit_exit;

--- 125 unchanged lines hidden (view full) ---

3490bce_blockinit_exit:
3491 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
3492
3493 return (rc);
3494}
3495
3496
3497/****************************************************************************/
3635
3636 /* Initialize the on-boards CPUs */
3637 bce_init_cpus(sc);
3638
3639 /* Prepare NVRAM for access. */
3640 if (bce_init_nvram(sc)) {
3641 rc = ENODEV;
3642 goto bce_chipinit_exit;

--- 125 unchanged lines hidden (view full) ---

3768bce_blockinit_exit:
3769 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
3770
3771 return (rc);
3772}
3773
3774
3775/****************************************************************************/
3498/* Encapsulate an mbuf cluster into the rx_bd chain. */
3776/* Encapsulate an mbuf into the rx_bd chain. */
3499/* */
3777/* */
3500/* The NetXtreme II can support Jumbo frames by using multiple rx_bd's. */
3501/* This routine will map an mbuf cluster into 1 or more rx_bd's as */
3502/* necessary. */
3503/* */
3504/* Todo: Consider writing the hardware mailboxes here to make rx_bd's */
3505/* available to the hardware as soon as possible. */
3506/* */
3507/* Returns: */
3508/* 0 for success, positive value for failure. */
3509/****************************************************************************/
3510static int
3778/* Returns: */
3779/* 0 for success, positive value for failure. */
3780/****************************************************************************/
3781static int
3511bce_get_buf(struct bce_softc *sc, struct mbuf *m, u16 *prod, u16 *chain_prod,
3512 u32 *prod_bseq)
3782bce_get_rx_buf(struct bce_softc *sc, struct mbuf *m, u16 *prod,
3783 u16 *chain_prod, u32 *prod_bseq)
3513{
3514 bus_dmamap_t map;
3515 bus_dma_segment_t segs[BCE_MAX_SEGMENTS];
3516 struct mbuf *m_new = NULL;
3517 struct rx_bd *rxbd;
3784{
3785 bus_dmamap_t map;
3786 bus_dma_segment_t segs[BCE_MAX_SEGMENTS];
3787 struct mbuf *m_new = NULL;
3788 struct rx_bd *rxbd;
3518 int i, nsegs, error, rc = 0;
3789 int nsegs, error, rc = 0;
3519#ifdef BCE_DEBUG
3520 u16 debug_chain_prod = *chain_prod;
3521#endif
3522
3790#ifdef BCE_DEBUG
3791 u16 debug_chain_prod = *chain_prod;
3792#endif
3793
3523 DBPRINT(sc, (BCE_VERBOSE_RESET | BCE_VERBOSE_RECV), "Entering %s()\n",
3794 DBPRINT(sc, (BCE_VERBOSE_RECV | BCE_VERBOSE_LOAD), "Entering %s()\n",
3524 __FUNCTION__);
3525
3526 /* Make sure the inputs are valid. */
3527 DBRUNIF((*chain_prod > MAX_RX_BD),
3528 BCE_PRINTF("%s(%d): RX producer out of range: 0x%04X > 0x%04X\n",
3529 __FILE__, __LINE__, *chain_prod, (u16) MAX_RX_BD));
3530
3795 __FUNCTION__);
3796
3797 /* Make sure the inputs are valid. */
3798 DBRUNIF((*chain_prod > MAX_RX_BD),
3799 BCE_PRINTF("%s(%d): RX producer out of range: 0x%04X > 0x%04X\n",
3800 __FILE__, __LINE__, *chain_prod, (u16) MAX_RX_BD));
3801
3531 DBPRINT(sc, BCE_VERBOSE_RECV, "%s(enter): prod = 0x%04X, chain_prod = 0x%04X, "
3802 DBPRINT(sc, BCE_VERBOSE, "%s(enter): prod = 0x%04X, chain_prod = 0x%04X, "
3532 "prod_bseq = 0x%08X\n", __FUNCTION__, *prod, *chain_prod, *prod_bseq);
3533
3803 "prod_bseq = 0x%08X\n", __FUNCTION__, *prod, *chain_prod, *prod_bseq);
3804
3805 /* Update some debug statistic counters */
3806 DBRUNIF((sc->free_rx_bd < sc->rx_low_watermark),
3807 sc->rx_low_watermark = sc->free_rx_bd);
3808 DBRUNIF((sc->free_rx_bd == sc->max_rx_bd), sc->rx_empty_count++);
3809
3534 /* Check whether this is a new mbuf allocation. */
3535 if (m == NULL) {
3536
3537 /* Simulate an mbuf allocation failure. */
3538 DBRUNIF(DB_RANDOMTRUE(bce_debug_mbuf_allocation_failure),
3539 sc->mbuf_alloc_failed++;
3810 /* Check whether this is a new mbuf allocation. */
3811 if (m == NULL) {
3812
3813 /* Simulate an mbuf allocation failure. */
3814 DBRUNIF(DB_RANDOMTRUE(bce_debug_mbuf_allocation_failure),
3815 sc->mbuf_alloc_failed++;
3540 sc->mbuf_sim_alloc_failed++;
3816 sc->debug_mbuf_sim_alloc_failed++;
3541 rc = ENOBUFS;
3817 rc = ENOBUFS;
3542 goto bce_get_buf_exit);
3818 goto bce_get_rx_buf_exit);
3543
3544 /* This is a new mbuf allocation. */
3545 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
3546 if (m_new == NULL) {
3819
3820 /* This is a new mbuf allocation. */
3821 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
3822 if (m_new == NULL) {
3547
3548 DBPRINT(sc, BCE_WARN, "%s(%d): RX mbuf header allocation failed!\n",
3549 __FILE__, __LINE__);
3550
3551 sc->mbuf_alloc_failed++;
3823 sc->mbuf_alloc_failed++;
3552
3553 rc = ENOBUFS;
3824 rc = ENOBUFS;
3554 goto bce_get_buf_exit;
3825 goto bce_get_rx_buf_exit;
3555 }
3556
3826 }
3827
3557 DBRUNIF(1, sc->rx_mbuf_alloc++);
3558
3559 /* Simulate an mbuf cluster allocation failure. */
3560 DBRUNIF(DB_RANDOMTRUE(bce_debug_mbuf_allocation_failure),
3561 m_freem(m_new);
3562 sc->rx_mbuf_alloc--;
3563 sc->mbuf_alloc_failed++;
3564 sc->mbuf_sim_alloc_failed++;
3565 rc = ENOBUFS;
3566 goto bce_get_buf_exit);
3567
3568 /* Attach a cluster to the mbuf. */
3569 m_cljget(m_new, M_DONTWAIT, sc->mbuf_alloc_size);
3570 if (!(m_new->m_flags & M_EXT)) {
3571
3572 DBPRINT(sc, BCE_WARN, "%s(%d): RX mbuf chain allocation failed!\n",
3573 __FILE__, __LINE__);
3574
3575 m_freem(m_new);
3576 DBRUNIF(1, sc->rx_mbuf_alloc--);
3577
3578 sc->mbuf_alloc_failed++;
3579 rc = ENOBUFS;
3580 goto bce_get_buf_exit;
3581 }
3582
3583 /* Initialize the mbuf cluster. */
3584 m_new->m_len = m_new->m_pkthdr.len = sc->mbuf_alloc_size;
3828 DBRUN(sc->debug_rx_mbuf_alloc++);
3585 } else {
3586 /* Reuse an existing mbuf. */
3587 m_new = m;
3829 } else {
3830 /* Reuse an existing mbuf. */
3831 m_new = m;
3588 m_new->m_len = m_new->m_pkthdr.len = sc->mbuf_alloc_size;
3589 m_new->m_data = m_new->m_ext.ext_buf;
3590 }
3591
3832 }
3833
3834 M_ASSERTPKTHDR(m_new);
3835
3836 m_new->m_pkthdr.len = m_new->m_len = sc->rx_bd_mbuf_alloc_size;
3837
3838 /* ToDo: Consider calling m_fragment() to test error handling. */
3839
3592 /* Map the mbuf cluster into device memory. */
3593 map = sc->rx_mbuf_map[*chain_prod];
3594 error = bus_dmamap_load_mbuf_sg(sc->rx_mbuf_tag, map, m_new,
3595 segs, &nsegs, BUS_DMA_NOWAIT);
3596
3597 /* Handle any mapping errors. */
3598 if (error) {
3599 BCE_PRINTF("%s(%d): Error mapping mbuf into RX chain!\n",
3600 __FILE__, __LINE__);
3601
3602 m_freem(m_new);
3840 /* Map the mbuf cluster into device memory. */
3841 map = sc->rx_mbuf_map[*chain_prod];
3842 error = bus_dmamap_load_mbuf_sg(sc->rx_mbuf_tag, map, m_new,
3843 segs, &nsegs, BUS_DMA_NOWAIT);
3844
3845 /* Handle any mapping errors. */
3846 if (error) {
3847 BCE_PRINTF("%s(%d): Error mapping mbuf into RX chain!\n",
3848 __FILE__, __LINE__);
3849
3850 m_freem(m_new);
3603 DBRUNIF(1, sc->rx_mbuf_alloc--);
3851 DBRUN(sc->debug_rx_mbuf_alloc--);
3604
3605 rc = ENOBUFS;
3852
3853 rc = ENOBUFS;
3606 goto bce_get_buf_exit;
3854 goto bce_get_rx_buf_exit;
3607 }
3855 }
3856
3857 /* All mbufs must map to a single segment. */
3858 KASSERT(nsegs == 1, ("%s(): Too many segments returned (%d)!",
3859 __FUNCTION__, nsegs));
3608
3860
3609 /* Make sure there is room in the receive chain. */
3610 if (nsegs > sc->free_rx_bd) {
3611 bus_dmamap_unload(sc->rx_mbuf_tag, map);
3861 /* ToDo: Do we need bus_dmamap_sync(,,BUS_DMASYNC_PREWRITE) here? */
3612
3862
3613 m_freem(m_new);
3614 DBRUNIF(1, sc->rx_mbuf_alloc--);
3615
3616 rc = EFBIG;
3617 goto bce_get_buf_exit;
3618 }
3619
3620#ifdef BCE_DEBUG
3621 /* Track the distribution of buffer segments. */
3622 sc->rx_mbuf_segs[nsegs]++;
3623#endif
3624
3625 /* Update some debug statistic counters */
3626 DBRUNIF((sc->free_rx_bd < sc->rx_low_watermark),
3627 sc->rx_low_watermark = sc->free_rx_bd);
3628 DBRUNIF((sc->free_rx_bd == sc->max_rx_bd), sc->rx_empty_count++);
3629
3630 /* Setup the rx_bd for the first segment. */
3863 /* Setup the rx_bd for the segment. */
3631 rxbd = &sc->rx_bd_chain[RX_PAGE(*chain_prod)][RX_IDX(*chain_prod)];
3632
3633 rxbd->rx_bd_haddr_lo = htole32(BCE_ADDR_LO(segs[0].ds_addr));
3634 rxbd->rx_bd_haddr_hi = htole32(BCE_ADDR_HI(segs[0].ds_addr));
3635 rxbd->rx_bd_len = htole32(segs[0].ds_len);
3864 rxbd = &sc->rx_bd_chain[RX_PAGE(*chain_prod)][RX_IDX(*chain_prod)];
3865
3866 rxbd->rx_bd_haddr_lo = htole32(BCE_ADDR_LO(segs[0].ds_addr));
3867 rxbd->rx_bd_haddr_hi = htole32(BCE_ADDR_HI(segs[0].ds_addr));
3868 rxbd->rx_bd_len = htole32(segs[0].ds_len);
3636 rxbd->rx_bd_flags = htole32(RX_BD_FLAGS_START);
3869 rxbd->rx_bd_flags = htole32(RX_BD_FLAGS_START | RX_BD_FLAGS_END);
3637 *prod_bseq += segs[0].ds_len;
3638
3870 *prod_bseq += segs[0].ds_len;
3871
3639 for (i = 1; i < nsegs; i++) {
3872 /* Save the mbuf and update our counter. */
3873 sc->rx_mbuf_ptr[*chain_prod] = m_new;
3874 sc->free_rx_bd -= nsegs;
3640
3875
3641 *prod = NEXT_RX_BD(*prod);
3642 *chain_prod = RX_CHAIN_IDX(*prod);
3876 DBRUNMSG(BCE_EXCESSIVE, bce_dump_rx_mbuf_chain(sc, debug_chain_prod,
3877 nsegs));
3643
3878
3644 rxbd = &sc->rx_bd_chain[RX_PAGE(*chain_prod)][RX_IDX(*chain_prod)];
3879 DBPRINT(sc, BCE_VERBOSE, "%s(exit): prod = 0x%04X, chain_prod = 0x%04X, "
3880 "prod_bseq = 0x%08X\n", __FUNCTION__, *prod, *chain_prod, *prod_bseq);
3645
3881
3646 rxbd->rx_bd_haddr_lo = htole32(BCE_ADDR_LO(segs[i].ds_addr));
3647 rxbd->rx_bd_haddr_hi = htole32(BCE_ADDR_HI(segs[i].ds_addr));
3648 rxbd->rx_bd_len = htole32(segs[i].ds_len);
3649 rxbd->rx_bd_flags = 0;
3650 *prod_bseq += segs[i].ds_len;
3882bce_get_rx_buf_exit:
3883 DBPRINT(sc, (BCE_VERBOSE_RECV | BCE_VERBOSE_LOAD), "Exiting %s()\n",
3884 __FUNCTION__);
3885
3886 return(rc);
3887}
3888
3889
3890/****************************************************************************/
3891/* Encapsulate an mbuf cluster into the page chain. */
3892/* */
3893/* Returns: */
3894/* 0 for success, positive value for failure. */
3895/****************************************************************************/
3896static int
3897bce_get_pg_buf(struct bce_softc *sc, struct mbuf *m, u16 *prod,
3898 u16 *prod_idx)
3899{
3900 bus_dmamap_t map;
3901 bus_addr_t busaddr;
3902 struct mbuf *m_new = NULL;
3903 struct rx_bd *pgbd;
3904 int error, rc = 0;
3905#ifdef BCE_DEBUG
3906 u16 debug_prod_idx = *prod_idx;
3907#endif
3908
3909 DBPRINT(sc, (BCE_VERBOSE_RESET | BCE_VERBOSE_RECV), "Entering %s()\n",
3910 __FUNCTION__);
3911
3912 /* Make sure the inputs are valid. */
3913 DBRUNIF((*prod_idx > MAX_PG_BD),
3914 BCE_PRINTF("%s(%d): page producer out of range: 0x%04X > 0x%04X\n",
3915 __FILE__, __LINE__, *prod_idx, (u16) MAX_PG_BD));
3916
3917 DBPRINT(sc, BCE_VERBOSE_RECV, "%s(enter): prod = 0x%04X, "
3918 "chain_prod = 0x%04X\n", __FUNCTION__, *prod, *prod_idx);
3919
3920 /* Update counters if we've hit a new low or run out of pages. */
3921 DBRUNIF((sc->free_pg_bd < sc->pg_low_watermark),
3922 sc->pg_low_watermark = sc->free_pg_bd);
3923 DBRUNIF((sc->free_pg_bd == sc->max_pg_bd), sc->pg_empty_count++);
3924
3925 /* Check whether this is a new mbuf allocation. */
3926 if (m == NULL) {
3927
3928 /* Simulate an mbuf allocation failure. */
3929 DBRUNIF(DB_RANDOMTRUE(bce_debug_mbuf_allocation_failure),
3930 sc->mbuf_alloc_failed++;
3931 sc->debug_mbuf_sim_alloc_failed++;
3932 rc = ENOBUFS;
3933 goto bce_get_pg_buf_exit);
3934
3935 /* This is a new mbuf allocation. */
3936 m_new = m_getcl(M_DONTWAIT, MT_DATA, 0);
3937 if (m_new == NULL) {
3938 sc->mbuf_alloc_failed++;
3939 rc = ENOBUFS;
3940 goto bce_get_pg_buf_exit;
3941 }
3942
3943 DBRUN(sc->debug_pg_mbuf_alloc++);
3944 } else {
3945 /* Reuse an existing mbuf. */
3946 m_new = m;
3947 m_new->m_data = m_new->m_ext.ext_buf;
3651 }
3652
3948 }
3949
3653 rxbd->rx_bd_flags |= htole32(RX_BD_FLAGS_END);
3950 m_new->m_len = sc->pg_bd_mbuf_alloc_size;
3654
3951
3952 /* ToDo: Consider calling m_fragment() to test error handling. */
3953
3954 /* Map the mbuf cluster into device memory. */
3955 map = sc->pg_mbuf_map[*prod_idx];
3956 error = bus_dmamap_load(sc->pg_mbuf_tag, map, mtod(m_new, void *),
3957 sc->pg_bd_mbuf_alloc_size, bce_dma_map_addr, &busaddr, BUS_DMA_NOWAIT);
3958
3959 /* Handle any mapping errors. */
3960 if (error) {
3961 BCE_PRINTF("%s(%d): Error mapping mbuf into page chain!\n",
3962 __FILE__, __LINE__);
3963
3964 m_freem(m_new);
3965 DBRUN(sc->debug_pg_mbuf_alloc--);
3966
3967 rc = ENOBUFS;
3968 goto bce_get_pg_buf_exit;
3969 }
3970
3971 /* ToDo: Do we need bus_dmamap_sync(,,BUS_DMASYNC_PREWRITE) here? */
3972
3973 /*
3974 * The page chain uses the same rx_bd data structure
3975 * as the receive chain but doesn't require a byte sequence (bseq).
3976 */
3977 pgbd = &sc->pg_bd_chain[PG_PAGE(*prod_idx)][PG_IDX(*prod_idx)];
3978
3979 pgbd->rx_bd_haddr_lo = htole32(BCE_ADDR_LO(busaddr));
3980 pgbd->rx_bd_haddr_hi = htole32(BCE_ADDR_HI(busaddr));
3981 pgbd->rx_bd_len = htole32(sc->pg_bd_mbuf_alloc_size);
3982 pgbd->rx_bd_flags = htole32(RX_BD_FLAGS_START | RX_BD_FLAGS_END);
3983
3655 /* Save the mbuf and update our counter. */
3984 /* Save the mbuf and update our counter. */
3656 sc->rx_mbuf_ptr[*chain_prod] = m_new;
3657 sc->free_rx_bd -= nsegs;
3985 sc->pg_mbuf_ptr[*prod_idx] = m_new;
3986 sc->free_pg_bd--;
3658
3987
3659 DBRUN(BCE_VERBOSE_RECV, bce_dump_rx_mbuf_chain(sc, debug_chain_prod,
3660 nsegs));
3988 DBRUNMSG(BCE_VERBOSE_RECV, bce_dump_pg_mbuf_chain(sc, debug_prod_idx,
3989 1));
3661
3990
3662 DBPRINT(sc, BCE_VERBOSE_RECV, "%s(exit): prod = 0x%04X, chain_prod = 0x%04X, "
3663 "prod_bseq = 0x%08X\n", __FUNCTION__, *prod, *chain_prod, *prod_bseq);
3991 DBPRINT(sc, BCE_VERBOSE_RECV, "%s(exit): prod = 0x%04X, "
3992 "prod_idx = 0x%04X\n", __FUNCTION__, *prod, *prod_idx);
3664
3993
3665bce_get_buf_exit:
3994bce_get_pg_buf_exit:
3666 DBPRINT(sc, (BCE_VERBOSE_RESET | BCE_VERBOSE_RECV), "Exiting %s()\n",
3667 __FUNCTION__);
3668
3669 return(rc);
3670}
3671
3672
3673/****************************************************************************/

--- 12 unchanged lines hidden (view full) ---

3686 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
3687
3688 /* Set the initial TX producer/consumer indices. */
3689 sc->tx_prod = 0;
3690 sc->tx_cons = 0;
3691 sc->tx_prod_bseq = 0;
3692 sc->used_tx_bd = 0;
3693 sc->max_tx_bd = USABLE_TX_BD;
3995 DBPRINT(sc, (BCE_VERBOSE_RESET | BCE_VERBOSE_RECV), "Exiting %s()\n",
3996 __FUNCTION__);
3997
3998 return(rc);
3999}
4000
4001
4002/****************************************************************************/

--- 12 unchanged lines hidden (view full) ---

4015 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
4016
4017 /* Set the initial TX producer/consumer indices. */
4018 sc->tx_prod = 0;
4019 sc->tx_cons = 0;
4020 sc->tx_prod_bseq = 0;
4021 sc->used_tx_bd = 0;
4022 sc->max_tx_bd = USABLE_TX_BD;
3694 DBRUNIF(1, sc->tx_hi_watermark = USABLE_TX_BD);
3695 DBRUNIF(1, sc->tx_full_count = 0);
4023 DBRUN(sc->tx_hi_watermark = USABLE_TX_BD);
4024 DBRUN(sc->tx_full_count = 0);
3696
3697 /*
3698 * The NetXtreme II supports a linked-list structre called
3699 * a Buffer Descriptor Chain (or BD chain). A BD chain
3700 * consists of a series of 1 or more chain pages, each of which
3701 * consists of a fixed number of BD entries.
3702 * The last BD entry on each page is a pointer to the next page
3703 * in the chain, and the last pointer in the BD chain

--- 25 unchanged lines hidden (view full) ---

3729 CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_CMD_TYPE, val);
3730
3731 /* Point the hardware to the first page in the chain. */
3732 val = BCE_ADDR_HI(sc->tx_bd_chain_paddr[0]);
3733 CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_TBDR_BHADDR_HI, val);
3734 val = BCE_ADDR_LO(sc->tx_bd_chain_paddr[0]);
3735 CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_TBDR_BHADDR_LO, val);
3736
4025
4026 /*
4027 * The NetXtreme II supports a linked-list structre called
4028 * a Buffer Descriptor Chain (or BD chain). A BD chain
4029 * consists of a series of 1 or more chain pages, each of which
4030 * consists of a fixed number of BD entries.
4031 * The last BD entry on each page is a pointer to the next page
4032 * in the chain, and the last pointer in the BD chain

--- 25 unchanged lines hidden (view full) ---

4058 CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_CMD_TYPE, val);
4059
4060 /* Point the hardware to the first page in the chain. */
4061 val = BCE_ADDR_HI(sc->tx_bd_chain_paddr[0]);
4062 CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_TBDR_BHADDR_HI, val);
4063 val = BCE_ADDR_LO(sc->tx_bd_chain_paddr[0]);
4064 CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_TBDR_BHADDR_LO, val);
4065
3737 DBRUN(BCE_VERBOSE_SEND, bce_dump_tx_chain(sc, 0, TOTAL_TX_BD));
4066 DBRUNMSG(BCE_VERBOSE_SEND, bce_dump_tx_chain(sc, 0, TOTAL_TX_BD));
3738
3739 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
3740
3741 return(rc);
3742}
3743
3744
3745/****************************************************************************/

--- 12 unchanged lines hidden (view full) ---

3758 /* Unmap, unload, and free any mbufs still in the TX mbuf chain. */
3759 for (i = 0; i < TOTAL_TX_BD; i++) {
3760 if (sc->tx_mbuf_ptr[i] != NULL) {
3761 if (sc->tx_mbuf_map != NULL)
3762 bus_dmamap_sync(sc->tx_mbuf_tag, sc->tx_mbuf_map[i],
3763 BUS_DMASYNC_POSTWRITE);
3764 m_freem(sc->tx_mbuf_ptr[i]);
3765 sc->tx_mbuf_ptr[i] = NULL;
4067
4068 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
4069
4070 return(rc);
4071}
4072
4073
4074/****************************************************************************/

--- 12 unchanged lines hidden (view full) ---

4087 /* Unmap, unload, and free any mbufs still in the TX mbuf chain. */
4088 for (i = 0; i < TOTAL_TX_BD; i++) {
4089 if (sc->tx_mbuf_ptr[i] != NULL) {
4090 if (sc->tx_mbuf_map != NULL)
4091 bus_dmamap_sync(sc->tx_mbuf_tag, sc->tx_mbuf_map[i],
4092 BUS_DMASYNC_POSTWRITE);
4093 m_freem(sc->tx_mbuf_ptr[i]);
4094 sc->tx_mbuf_ptr[i] = NULL;
3766 DBRUNIF(1, sc->tx_mbuf_alloc--);
4095 DBRUN(sc->debug_tx_mbuf_alloc--);
3767 }
3768 }
3769
3770 /* Clear each TX chain page. */
3771 for (i = 0; i < TX_PAGES; i++)
3772 bzero((char *)sc->tx_bd_chain[i], BCE_TX_CHAIN_PAGE_SZ);
3773
3774 sc->used_tx_bd = 0;
3775
3776 /* Check if we lost any mbufs in the process. */
4096 }
4097 }
4098
4099 /* Clear each TX chain page. */
4100 for (i = 0; i < TX_PAGES; i++)
4101 bzero((char *)sc->tx_bd_chain[i], BCE_TX_CHAIN_PAGE_SZ);
4102
4103 sc->used_tx_bd = 0;
4104
4105 /* Check if we lost any mbufs in the process. */
3777 DBRUNIF((sc->tx_mbuf_alloc),
4106 DBRUNIF((sc->debug_tx_mbuf_alloc),
3778 BCE_PRINTF("%s(%d): Memory leak! Lost %d mbufs "
3779 "from tx chain!\n",
4107 BCE_PRINTF("%s(%d): Memory leak! Lost %d mbufs "
4108 "from tx chain!\n",
3780 __FILE__, __LINE__, sc->tx_mbuf_alloc));
4109 __FILE__, __LINE__, sc->debug_tx_mbuf_alloc));
3781
3782 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
3783}
3784
3785
3786/****************************************************************************/
4110
4111 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
4112}
4113
4114
4115/****************************************************************************/
3787/* Add mbufs to the RX chain until its full or an mbuf allocation error */
3788/* occurs. */
3789/* */
3790/* Returns: */
3791/* Nothing */
3792/****************************************************************************/
3793static void
3794bce_fill_rx_chain(struct bce_softc *sc)
3795{
3796 u16 prod, chain_prod;
3797 u32 prod_bseq;
3798#ifdef BCE_DEBUG
3799 int rx_mbuf_alloc_before, free_rx_bd_before;
3800#endif
3801
3802 DBPRINT(sc, BCE_EXCESSIVE_RECV, "Entering %s()\n", __FUNCTION__);
3803
3804 prod = sc->rx_prod;
3805 prod_bseq = sc->rx_prod_bseq;
3806
3807#ifdef BCE_DEBUG
3808 rx_mbuf_alloc_before = sc->rx_mbuf_alloc;
3809 free_rx_bd_before = sc->free_rx_bd;
3810#endif
3811
3812 /* Keep filling the RX chain until it's full. */
3813 while (sc->free_rx_bd > 0) {
3814 chain_prod = RX_CHAIN_IDX(prod);
3815 if (bce_get_buf(sc, NULL, &prod, &chain_prod, &prod_bseq)) {
3816 /* Bail out if we can't add an mbuf to the chain. */
3817 break;
3818 }
3819 prod = NEXT_RX_BD(prod);
3820 }
3821
3822#if 0
3823 DBRUNIF((sc->rx_mbuf_alloc - rx_mbuf_alloc_before),
3824 BCE_PRINTF("%s(): Installed %d mbufs in %d rx_bd entries.\n",
3825 __FUNCTION__, (sc->rx_mbuf_alloc - rx_mbuf_alloc_before),
3826 (free_rx_bd_before - sc->free_rx_bd)));
3827#endif
3828
3829 /* Save the RX chain producer index. */
3830 sc->rx_prod = prod;
3831 sc->rx_prod_bseq = prod_bseq;
3832
3833 /* Tell the chip about the waiting rx_bd's. */
3834 REG_WR16(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BDIDX, sc->rx_prod);
3835 REG_WR(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BSEQ, sc->rx_prod_bseq);
3836
3837 DBPRINT(sc, BCE_EXCESSIVE_RECV, "Exiting %s()\n", __FUNCTION__);
3838
3839}
3840
3841
3842/****************************************************************************/
3843/* Allocate memory and initialize the RX data structures. */
3844/* */
3845/* Returns: */
3846/* 0 for success, positive value for failure. */
3847/****************************************************************************/
3848static int
3849bce_init_rx_chain(struct bce_softc *sc)
3850{

--- 4 unchanged lines hidden (view full) ---

3855 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
3856
3857 /* Initialize the RX producer and consumer indices. */
3858 sc->rx_prod = 0;
3859 sc->rx_cons = 0;
3860 sc->rx_prod_bseq = 0;
3861 sc->free_rx_bd = USABLE_RX_BD;
3862 sc->max_rx_bd = USABLE_RX_BD;
4116/* Allocate memory and initialize the RX data structures. */
4117/* */
4118/* Returns: */
4119/* 0 for success, positive value for failure. */
4120/****************************************************************************/
4121static int
4122bce_init_rx_chain(struct bce_softc *sc)
4123{

--- 4 unchanged lines hidden (view full) ---

4128 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
4129
4130 /* Initialize the RX producer and consumer indices. */
4131 sc->rx_prod = 0;
4132 sc->rx_cons = 0;
4133 sc->rx_prod_bseq = 0;
4134 sc->free_rx_bd = USABLE_RX_BD;
4135 sc->max_rx_bd = USABLE_RX_BD;
3863 DBRUNIF(1, sc->rx_low_watermark = USABLE_RX_BD);
3864 DBRUNIF(1, sc->rx_empty_count = 0);
4136 DBRUN(sc->rx_low_watermark = sc->max_rx_bd);
4137 DBRUN(sc->rx_empty_count = 0);
3865
3866 /* Initialize the RX next pointer chain entries. */
3867 for (i = 0; i < RX_PAGES; i++) {
3868 int j;
3869
3870 rxbd = &sc->rx_bd_chain[i][USABLE_RX_BD_PER_PAGE];
3871
3872 /* Check if we've reached the last page. */

--- 14 unchanged lines hidden (view full) ---

3887 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_CTX_TYPE, val);
3888
3889 /* Point the hardware to the first page in the chain. */
3890 val = BCE_ADDR_HI(sc->rx_bd_chain_paddr[0]);
3891 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_NX_BDHADDR_HI, val);
3892 val = BCE_ADDR_LO(sc->rx_bd_chain_paddr[0]);
3893 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_NX_BDHADDR_LO, val);
3894
4138
4139 /* Initialize the RX next pointer chain entries. */
4140 for (i = 0; i < RX_PAGES; i++) {
4141 int j;
4142
4143 rxbd = &sc->rx_bd_chain[i][USABLE_RX_BD_PER_PAGE];
4144
4145 /* Check if we've reached the last page. */

--- 14 unchanged lines hidden (view full) ---

4160 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_CTX_TYPE, val);
4161
4162 /* Point the hardware to the first page in the chain. */
4163 val = BCE_ADDR_HI(sc->rx_bd_chain_paddr[0]);
4164 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_NX_BDHADDR_HI, val);
4165 val = BCE_ADDR_LO(sc->rx_bd_chain_paddr[0]);
4166 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_NX_BDHADDR_LO, val);
4167
3895
3896 /* Fill up the RX chain. */
3897 bce_fill_rx_chain(sc);
3898
4168 /* Fill up the RX chain. */
4169 bce_fill_rx_chain(sc);
4170
3899
3900 for (i = 0; i < RX_PAGES; i++) {
3901 bus_dmamap_sync(
3902 sc->rx_bd_chain_tag,
3903 sc->rx_bd_chain_map[i],
3904 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
3905 }
3906
4171 for (i = 0; i < RX_PAGES; i++) {
4172 bus_dmamap_sync(
4173 sc->rx_bd_chain_tag,
4174 sc->rx_bd_chain_map[i],
4175 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
4176 }
4177
3907 DBRUN(BCE_VERBOSE_RECV, bce_dump_rx_chain(sc, 0, TOTAL_RX_BD));
4178 DBRUNMSG(BCE_VERBOSE_RECV, bce_dump_rx_chain(sc, 0, TOTAL_RX_BD));
3908
3909 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
3910
3911 return(rc);
3912}
3913
3914
3915/****************************************************************************/
4179
4180 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
4181
4182 return(rc);
4183}
4184
4185
4186/****************************************************************************/
4187/* Add mbufs to the RX chain until its full or an mbuf allocation error */
4188/* occurs. */
4189/* */
4190/* Returns: */
4191/* Nothing */
4192/****************************************************************************/
4193static void
4194bce_fill_rx_chain(struct bce_softc *sc)
4195{
4196 u16 prod, prod_idx;
4197 u32 prod_bseq;
4198
4199 DBPRINT(sc, BCE_VERBOSE_RECV, "Entering %s()\n", __FUNCTION__);
4200
4201 prod = sc->rx_prod;
4202 prod_bseq = sc->rx_prod_bseq;
4203
4204 /* Keep filling the RX chain until it's full. */
4205 while (sc->free_rx_bd > 0) {
4206 prod_idx = RX_CHAIN_IDX(prod);
4207 if (bce_get_rx_buf(sc, NULL, &prod, &prod_idx, &prod_bseq)) {
4208 /* Bail out if we can't add an mbuf to the chain. */
4209 break;
4210 }
4211 prod = NEXT_RX_BD(prod);
4212 }
4213
4214 /* Save the RX chain producer index. */
4215 sc->rx_prod = prod;
4216 sc->rx_prod_bseq = prod_bseq;
4217
4218 DBRUNIF(((prod & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE),
4219 BCE_PRINTF("%s(): Invalid rx_prod value: 0x%04X\n",
4220 __FUNCTION__, sc->rx_prod));
4221
4222 /* Tell the chip about the waiting rx_bd's. */
4223 REG_WR16(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BDIDX, sc->rx_prod);
4224 REG_WR(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BSEQ, sc->rx_prod_bseq);
4225
4226 DBPRINT(sc, BCE_VERBOSE_RECV, "Exiting %s()\n", __FUNCTION__);
4227}
4228
4229
4230/****************************************************************************/
3916/* Free memory and clear the RX data structures. */
3917/* */
3918/* Returns: */
3919/* Nothing. */
3920/****************************************************************************/
3921static void
3922bce_free_rx_chain(struct bce_softc *sc)
3923{
3924 int i;
4231/* Free memory and clear the RX data structures. */
4232/* */
4233/* Returns: */
4234/* Nothing. */
4235/****************************************************************************/
4236static void
4237bce_free_rx_chain(struct bce_softc *sc)
4238{
4239 int i;
3925#ifdef BCE_DEBUG
3926 int rx_mbuf_alloc_before;
3927#endif
3928
3929 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
3930
4240
4241 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
4242
3931#ifdef BCE_DEBUG
3932 rx_mbuf_alloc_before = sc->rx_mbuf_alloc;
3933#endif
4243 /* Clear the jumbo page chain support. */
4244 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_PG_BUF_SIZE, 0);
3934
3935 /* Free any mbufs still in the RX mbuf chain. */
3936 for (i = 0; i < TOTAL_RX_BD; i++) {
3937 if (sc->rx_mbuf_ptr[i] != NULL) {
3938 if (sc->rx_mbuf_map[i] != NULL)
3939 bus_dmamap_sync(sc->rx_mbuf_tag, sc->rx_mbuf_map[i],
3940 BUS_DMASYNC_POSTREAD);
3941 m_freem(sc->rx_mbuf_ptr[i]);
3942 sc->rx_mbuf_ptr[i] = NULL;
4245
4246 /* Free any mbufs still in the RX mbuf chain. */
4247 for (i = 0; i < TOTAL_RX_BD; i++) {
4248 if (sc->rx_mbuf_ptr[i] != NULL) {
4249 if (sc->rx_mbuf_map[i] != NULL)
4250 bus_dmamap_sync(sc->rx_mbuf_tag, sc->rx_mbuf_map[i],
4251 BUS_DMASYNC_POSTREAD);
4252 m_freem(sc->rx_mbuf_ptr[i]);
4253 sc->rx_mbuf_ptr[i] = NULL;
3943 DBRUNIF(1, sc->rx_mbuf_alloc--);
4254 DBRUN(sc->debug_rx_mbuf_alloc--);
3944 }
3945 }
3946
4255 }
4256 }
4257
3947 DBRUNIF((rx_mbuf_alloc_before - sc->rx_mbuf_alloc),
3948 BCE_PRINTF("%s(): Released %d mbufs.\n",
3949 __FUNCTION__, (rx_mbuf_alloc_before - sc->rx_mbuf_alloc)));
3950
3951 /* Clear each RX chain page. */
3952 for (i = 0; i < RX_PAGES; i++)
3953 bzero((char *)sc->rx_bd_chain[i], BCE_RX_CHAIN_PAGE_SZ);
3954
3955 sc->free_rx_bd = sc->max_rx_bd;
3956
3957 /* Check if we lost any mbufs in the process. */
4258 /* Clear each RX chain page. */
4259 for (i = 0; i < RX_PAGES; i++)
4260 bzero((char *)sc->rx_bd_chain[i], BCE_RX_CHAIN_PAGE_SZ);
4261
4262 sc->free_rx_bd = sc->max_rx_bd;
4263
4264 /* Check if we lost any mbufs in the process. */
3958 DBRUNIF((sc->rx_mbuf_alloc),
3959 BCE_PRINTF("%s(%d): Memory leak! Lost %d mbufs from rx chain!\n",
3960 __FILE__, __LINE__, sc->rx_mbuf_alloc));
4265 DBRUNIF((sc->debug_rx_mbuf_alloc),
4266 BCE_PRINTF("%s(): Memory leak! Lost %d mbufs from rx chain!\n",
4267 __FUNCTION__, sc->debug_rx_mbuf_alloc));
3961
3962 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
3963}
3964
3965
3966/****************************************************************************/
4268
4269 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
4270}
4271
4272
4273/****************************************************************************/
4274/* Allocate memory and initialize the page data structures. */
4275/* Assumes that bce_init_rx_chain() has not already been called. */
4276/* */
4277/* Returns: */
4278/* 0 for success, positive value for failure. */
4279/****************************************************************************/
4280static int
4281bce_init_pg_chain(struct bce_softc *sc)
4282{
4283 struct rx_bd *pgbd;
4284 int i, rc = 0;
4285 u32 val;
4286
4287 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
4288
4289 /* Initialize the page producer and consumer indices. */
4290 sc->pg_prod = 0;
4291 sc->pg_cons = 0;
4292 sc->free_pg_bd = USABLE_PG_BD;
4293 sc->max_pg_bd = USABLE_PG_BD;
4294 DBRUN(sc->pg_low_watermark = sc->max_pg_bd);
4295 DBRUN(sc->pg_empty_count = 0);
4296
4297 /* Initialize the page next pointer chain entries. */
4298 for (i = 0; i < PG_PAGES; i++) {
4299 int j;
4300
4301 pgbd = &sc->pg_bd_chain[i][USABLE_PG_BD_PER_PAGE];
4302
4303 /* Check if we've reached the last page. */
4304 if (i == (PG_PAGES - 1))
4305 j = 0;
4306 else
4307 j = i + 1;
4308
4309 /* Setup the chain page pointers. */
4310 pgbd->rx_bd_haddr_hi = htole32(BCE_ADDR_HI(sc->pg_bd_chain_paddr[j]));
4311 pgbd->rx_bd_haddr_lo = htole32(BCE_ADDR_LO(sc->pg_bd_chain_paddr[j]));
4312 }
4313
4314 /* Point the hardware to the first page in the page chain. */
4315 val = BCE_ADDR_HI(sc->pg_bd_chain_paddr[0]);
4316 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_NX_PG_BDHADDR_HI, val);
4317 val = BCE_ADDR_LO(sc->pg_bd_chain_paddr[0]);
4318 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_NX_PG_BDHADDR_LO, val);
4319
4320 /* Configure the rx_bd and page chain mbuf cluster size. */
4321 val = (sc->rx_bd_mbuf_alloc_size << 16) | sc->pg_bd_mbuf_alloc_size;
4322 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_PG_BUF_SIZE, val);
4323
4324 /* Configure the context reserved for jumbo support. */
4325 CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RBDC_KEY,
4326 BCE_L2CTX_RBDC_JUMBO_KEY);
4327
4328 /* Fill up the page chain. */
4329 bce_fill_pg_chain(sc);
4330
4331 for (i = 0; i < PG_PAGES; i++) {
4332 bus_dmamap_sync(
4333 sc->pg_bd_chain_tag,
4334 sc->pg_bd_chain_map[i],
4335 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
4336 }
4337
4338 DBRUNMSG(BCE_VERBOSE_RECV, bce_dump_pg_chain(sc, 0, TOTAL_PG_BD));
4339 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
4340
4341 return(rc);
4342}
4343
4344/****************************************************************************/
4345/* Add mbufs to the page chain until its full or an mbuf allocation error */
4346/* occurs. */
4347/* */
4348/* Returns: */
4349/* Nothing */
4350/****************************************************************************/
4351static void
4352bce_fill_pg_chain(struct bce_softc *sc)
4353{
4354 u16 prod, prod_idx;
4355
4356 DBPRINT(sc, BCE_EXCESSIVE_RECV, "Entering %s()\n", __FUNCTION__);
4357
4358 prod = sc->pg_prod;
4359
4360 /* Keep filling the page chain until it's full. */
4361 while (sc->free_pg_bd > 0) {
4362 prod_idx = PG_CHAIN_IDX(prod);
4363 if (bce_get_pg_buf(sc, NULL, &prod, &prod_idx)) {
4364 /* Bail out if we can't add an mbuf to the chain. */
4365 break;
4366 }
4367 prod = NEXT_PG_BD(prod);
4368 }
4369
4370 /* Save the page chain producer index. */
4371 sc->pg_prod = prod;
4372
4373 DBRUNIF(((prod & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE),
4374 BCE_PRINTF("%s(): Invalid pg_prod value: 0x%04X\n",
4375 __FUNCTION__, sc->pg_prod));
4376
4377 /* Tell the chip about the new rx_bd's in the page chain. */
4378 REG_WR16(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_PG_BDIDX, sc->pg_prod);
4379
4380 DBPRINT(sc, BCE_EXCESSIVE_RECV, "Exiting %s()\n", __FUNCTION__);
4381}
4382
4383
4384/****************************************************************************/
4385/* Free memory and clear the RX data structures. */
4386/* */
4387/* Returns: */
4388/* Nothing. */
4389/****************************************************************************/
4390static void
4391bce_free_pg_chain(struct bce_softc *sc)
4392{
4393 int i;
4394
4395 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
4396
4397 /* Free any mbufs still in the mbuf page chain. */
4398 for (i = 0; i < TOTAL_PG_BD; i++) {
4399 if (sc->pg_mbuf_ptr[i] != NULL) {
4400 if (sc->pg_mbuf_map[i] != NULL)
4401 bus_dmamap_sync(sc->pg_mbuf_tag, sc->pg_mbuf_map[i],
4402 BUS_DMASYNC_POSTREAD);
4403 m_freem(sc->pg_mbuf_ptr[i]);
4404 sc->pg_mbuf_ptr[i] = NULL;
4405 DBRUN(sc->debug_pg_mbuf_alloc--);
4406 }
4407 }
4408
4409 /* Clear each page chain pages. */
4410 for (i = 0; i < PG_PAGES; i++)
4411 bzero((char *)sc->pg_bd_chain[i], BCE_PG_CHAIN_PAGE_SZ);
4412
4413 sc->free_pg_bd = sc->max_pg_bd;
4414
4415 /* Check if we lost any mbufs in the process. */
4416 DBRUNIF((sc->debug_pg_mbuf_alloc),
4417 BCE_PRINTF("%s(): Memory leak! Lost %d mbufs from page chain!\n",
4418 __FUNCTION__, sc->debug_pg_mbuf_alloc));
4419
4420 DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
4421}
4422
4423
4424/****************************************************************************/
3967/* Set media options. */
3968/* */
3969/* Returns: */
3970/* 0 for success, positive value for failure. */
3971/****************************************************************************/
3972static int
3973bce_ifmedia_upd(struct ifnet *ifp)
3974{

--- 80 unchanged lines hidden (view full) ---

4055 new_link_state = sc->status_block->status_attn_bits &
4056 STATUS_ATTN_BITS_LINK_STATE;
4057 old_link_state = sc->status_block->status_attn_bits_ack &
4058 STATUS_ATTN_BITS_LINK_STATE;
4059
4060 /* Handle any changes if the link state has changed. */
4061 if (new_link_state != old_link_state) {
4062
4425/* Set media options. */
4426/* */
4427/* Returns: */
4428/* 0 for success, positive value for failure. */
4429/****************************************************************************/
4430static int
4431bce_ifmedia_upd(struct ifnet *ifp)
4432{

--- 80 unchanged lines hidden (view full) ---

4513 new_link_state = sc->status_block->status_attn_bits &
4514 STATUS_ATTN_BITS_LINK_STATE;
4515 old_link_state = sc->status_block->status_attn_bits_ack &
4516 STATUS_ATTN_BITS_LINK_STATE;
4517
4518 /* Handle any changes if the link state has changed. */
4519 if (new_link_state != old_link_state) {
4520
4063 DBRUN(BCE_VERBOSE_INTR, bce_dump_status_block(sc));
4521 DBRUNMSG(BCE_VERBOSE_INTR, bce_dump_status_block(sc));
4064
4065 sc->bce_link = 0;
4066 callout_stop(&sc->bce_tick_callout);
4067 bce_tick(sc);
4068
4069 /* Update the status_attn_bits_ack field in the status block. */
4070 if (new_link_state) {
4071 REG_WR(sc, BCE_PCICFG_STATUS_BIT_SET_CMD,

--- 9 unchanged lines hidden (view full) ---

4081 }
4082
4083 /* Acknowledge the link change interrupt. */
4084 REG_WR(sc, BCE_EMAC_STATUS, BCE_EMAC_STATUS_LINK_CHANGE);
4085}
4086
4087
4088/****************************************************************************/
4522
4523 sc->bce_link = 0;
4524 callout_stop(&sc->bce_tick_callout);
4525 bce_tick(sc);
4526
4527 /* Update the status_attn_bits_ack field in the status block. */
4528 if (new_link_state) {
4529 REG_WR(sc, BCE_PCICFG_STATUS_BIT_SET_CMD,

--- 9 unchanged lines hidden (view full) ---

4539 }
4540
4541 /* Acknowledge the link change interrupt. */
4542 REG_WR(sc, BCE_EMAC_STATUS, BCE_EMAC_STATUS_LINK_CHANGE);
4543}
4544
4545
4546/****************************************************************************/
4547/* Reads the receive consumer value from the status block (skipping over */
4548/* chain page pointer if necessary). */
4549/* */
4550/* Returns: */
4551/* hw_cons */
4552/****************************************************************************/
4553static inline u16
4554bce_get_hw_rx_cons(struct bce_softc *sc)
4555{
4556 u16 hw_cons = sc->status_block->status_rx_quick_consumer_index0;
4557
4558 if ((hw_cons & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE)
4559 hw_cons++;
4560
4561 return hw_cons;
4562}
4563
4564/****************************************************************************/
4089/* Handles received frame interrupt events. */
4090/* */
4091/* Returns: */
4092/* Nothing. */
4093/****************************************************************************/
4094static void
4095bce_rx_intr(struct bce_softc *sc)
4096{
4565/* Handles received frame interrupt events. */
4566/* */
4567/* Returns: */
4568/* Nothing. */
4569/****************************************************************************/
4570static void
4571bce_rx_intr(struct bce_softc *sc)
4572{
4097 struct status_block *sblk = sc->status_block;
4098 struct ifnet *ifp = sc->bce_ifp;
4573 struct ifnet *ifp = sc->bce_ifp;
4099 u16 hw_cons, sw_cons, sw_chain_cons, sw_prod, sw_chain_prod;
4100 u32 sw_prod_bseq;
4101 struct l2_fhdr *l2fhdr;
4574 struct l2_fhdr *l2fhdr;
4575 unsigned int pages, pkt_len, rem_len;
4576 u16 sw_rx_cons, sw_rx_cons_idx, sw_pg_cons, sw_pg_cons_idx, hw_rx_cons;
4577 u32 status;
4102
4578
4103 DBRUNIF(1, sc->rx_interrupts++);
4579#ifdef BCE_DEBUG
4580 u32 rx_intr_start, rx_intr_end;
4581 rx_intr_start = REG_RD(sc, BCE_TIMER_25MHZ_FREE_RUN);
4582 sc->rx_interrupts++;
4583#endif
4104
4105 /* Prepare the RX chain pages to be accessed by the host CPU. */
4106 for (int i = 0; i < RX_PAGES; i++)
4107 bus_dmamap_sync(sc->rx_bd_chain_tag,
4108 sc->rx_bd_chain_map[i], BUS_DMASYNC_POSTWRITE);
4109
4584
4585 /* Prepare the RX chain pages to be accessed by the host CPU. */
4586 for (int i = 0; i < RX_PAGES; i++)
4587 bus_dmamap_sync(sc->rx_bd_chain_tag,
4588 sc->rx_bd_chain_map[i], BUS_DMASYNC_POSTWRITE);
4589
4590 /* Prepare the page chain pages to be accessed by the host CPU. */
4591 for (int i = 0; i < PG_PAGES; i++)
4592 bus_dmamap_sync(sc->pg_bd_chain_tag,
4593 sc->pg_bd_chain_map[i], BUS_DMASYNC_POSTWRITE);
4594
4110 /* Get the hardware's view of the RX consumer index. */
4595 /* Get the hardware's view of the RX consumer index. */
4111 hw_cons = sc->hw_rx_cons = sblk->status_rx_quick_consumer_index0;
4112 if ((hw_cons & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE)
4113 hw_cons++;
4596 hw_rx_cons = sc->hw_rx_cons = bce_get_hw_rx_cons(sc);
4114
4597
4115 /* Get working copies of the driver's view of the RX indices. */
4116 sw_cons = sc->rx_cons;
4117 sw_prod = sc->rx_prod;
4118 sw_prod_bseq = sc->rx_prod_bseq;
4598 /* Get working copies of the driver's view of the consumer indices. */
4599 sw_rx_cons = sc->rx_cons;
4600 sw_pg_cons = sc->pg_cons;
4119
4601
4120 DBPRINT(sc, BCE_INFO_RECV, "%s(enter): sw_prod = 0x%04X, "
4121 "sw_cons = 0x%04X, sw_prod_bseq = 0x%08X\n",
4122 __FUNCTION__, sw_prod, sw_cons, sw_prod_bseq);
4123
4124 /* Prevent speculative reads from getting ahead of the status block. */
4125 bus_space_barrier(sc->bce_btag, sc->bce_bhandle, 0, 0,
4126 BUS_SPACE_BARRIER_READ);
4127
4128 /* Update some debug statistics counters */
4129 DBRUNIF((sc->free_rx_bd < sc->rx_low_watermark),
4130 sc->rx_low_watermark = sc->free_rx_bd);
4602 /* Update some debug statistics counters */
4603 DBRUNIF((sc->free_rx_bd < sc->rx_low_watermark),
4604 sc->rx_low_watermark = sc->free_rx_bd);
4131 DBRUNIF((sc->free_rx_bd == USABLE_RX_BD), sc->rx_empty_count++);
4605 DBRUNIF((sc->free_rx_bd == sc->max_rx_bd), sc->rx_empty_count++);
4132
4133 /* Scan through the receive chain as long as there is work to do */
4606
4607 /* Scan through the receive chain as long as there is work to do */
4134 while (sw_cons != hw_cons) {
4135 struct mbuf *m;
4136 struct rx_bd *rxbd;
4137 unsigned int len;
4138 u32 status;
4608 /* ToDo: Consider setting a limit on the number of packets processed. */
4609 while (sw_rx_cons != hw_rx_cons) {
4610 struct mbuf *m0;
4139
4611
4140 /* Clear the mbuf pointer. */
4141 m = NULL;
4142
4143 /* Convert the producer/consumer indices to an actual rx_bd index. */
4612 /* Convert the producer/consumer indices to an actual rx_bd index. */
4144 sw_chain_cons = RX_CHAIN_IDX(sw_cons);
4145 sw_chain_prod = RX_CHAIN_IDX(sw_prod);
4613 sw_rx_cons_idx = RX_CHAIN_IDX(sw_rx_cons);
4146
4614
4147 /* Get the used rx_bd. */
4148 rxbd = &sc->rx_bd_chain[RX_PAGE(sw_chain_cons)][RX_IDX(sw_chain_cons)];
4149 sc->free_rx_bd++;
4150
4151 DBRUN(BCE_VERBOSE_RECV,
4152 BCE_PRINTF("%s(): ", __FUNCTION__);
4153 bce_dump_rxbd(sc, sw_chain_cons, rxbd));
4154
4155#ifdef DEVICE_POLLING
4156 if (ifp->if_capenable & IFCAP_POLLING) {
4157 if (sc->bce_rxcycles <= 0)
4158 break;
4159 sc->bce_rxcycles--;
4160 }
4161#endif
4162
4615#ifdef DEVICE_POLLING
4616 if (ifp->if_capenable & IFCAP_POLLING) {
4617 if (sc->bce_rxcycles <= 0)
4618 break;
4619 sc->bce_rxcycles--;
4620 }
4621#endif
4622
4163 /* The mbuf is stored with the last rx_bd entry of a packet. */
4164 if (sc->rx_mbuf_ptr[sw_chain_cons] != NULL) {
4623 /* Unmap the mbuf from DMA space. */
4624 bus_dmamap_sync(sc->rx_mbuf_tag,
4625 sc->rx_mbuf_map[sw_rx_cons_idx],
4626 BUS_DMASYNC_POSTREAD);
4627 bus_dmamap_unload(sc->rx_mbuf_tag,
4628 sc->rx_mbuf_map[sw_rx_cons_idx]);
4165
4629
4166 /* Validate that this is the last rx_bd. */
4167 DBRUNIF((!(rxbd->rx_bd_flags & RX_BD_FLAGS_END)),
4168 BCE_PRINTF("%s(%d): Unexpected mbuf found in rx_bd[0x%04X]!\n",
4169 __FILE__, __LINE__, sw_chain_cons);
4170 bce_breakpoint(sc));
4630 /* Remove the mbuf from the RX chain. */
4631 m0 = sc->rx_mbuf_ptr[sw_rx_cons_idx];
4632 sc->rx_mbuf_ptr[sw_rx_cons_idx] = NULL;
4633 DBRUN(sc->debug_rx_mbuf_alloc--);
4634 sc->free_rx_bd++;
4635
4636 /*
4637 * Frames received on the NetXteme II are prepended
4638 * with an l2_fhdr structure which provides status
4639 * information about the received frame (including
4640 * VLAN tags and checksum info). The frames are also
4641 * automatically adjusted to align the IP header
4642 * (i.e. two null bytes are inserted before the
4643 * Ethernet header). As a result the data DMA'd by
4644 * the controller into the mbuf is as follows:
4645 * +---------+-----+---------------------+-----+
4646 * | l2_fhdr | pad | packet data | FCS |
4647 * +---------+-----+---------------------+-----+
4648 * The l2_fhdr needs to be checked and skipped and
4649 * the FCS needs to be stripped before sending the
4650 * packet up the stack.
4651 */
4652 l2fhdr = mtod(m0, struct l2_fhdr *);
4171
4653
4172 /*
4173 * ToDo: If the received packet is small enough
4174 * to fit into a single, non-M_EXT mbuf,
4175 * allocate a new mbuf here, copy the data to
4176 * that mbuf, and recycle the mapped jumbo frame.
4177 */
4654 /* Get the packet data + FCS length and the status. */
4655 pkt_len = l2fhdr->l2_fhdr_pkt_len;
4656 status = l2fhdr->l2_fhdr_status;
4178
4657
4179 /* Unmap the mbuf from DMA space. */
4180 bus_dmamap_sync(sc->rx_mbuf_tag,
4181 sc->rx_mbuf_map[sw_chain_cons],
4182 BUS_DMASYNC_POSTREAD);
4183 bus_dmamap_unload(sc->rx_mbuf_tag,
4184 sc->rx_mbuf_map[sw_chain_cons]);
4658 /*
4659 * Skip over the l2_fhdr and pad, resulting in the
4660 * following data in the mbuf:
4661 * +---------------------+-----+
4662 * | packet data | FCS |
4663 * +---------------------+-----+
4664 */
4665 m_adj(m0, sizeof(struct l2_fhdr) + ETHER_ALIGN);
4185
4666
4186 /* Remove the mbuf from the RX chain. */
4187 m = sc->rx_mbuf_ptr[sw_chain_cons];
4188 sc->rx_mbuf_ptr[sw_chain_cons] = NULL;
4189
4667 /*
4668 * Check whether the received frame fits in a single
4669 * mbuf or not (i.e. packet data + FCS <=
4670 * sc->rx_bd_mbuf_alloc_size bytes).
4671 */
4672 if (pkt_len > m0->m_len) {
4190 /*
4673 /*
4191 * Frames received on the NetXteme II are prepended
4192 * with an l2_fhdr structure which provides status
4193 * information about the received frame (including
4194 * VLAN tags and checksum info). The frames are also
4195 * automatically adjusted to align the IP header
4196 * (i.e. two null bytes are inserted before the
4197 * Ethernet header).
4674 * The received frame is larger than a single mbuf.
4675 * If the frame was a TCP frame then only the TCP
4676 * header is placed in the mbuf, the remaining
4677 * payload (including FCS) is placed in the page
4678 * chain, the SPLIT flag is set, and the header
4679 * length is placed in the IP checksum field.
4680 * If the frame is not a TCP frame then the mbuf
4681 * is filled and the remaining bytes are placed
4682 * in the page chain.
4198 */
4683 */
4199 l2fhdr = mtod(m, struct l2_fhdr *);
4684 if (status & L2_FHDR_STATUS_SPLIT)
4685 m0->m_len = l2fhdr->l2_fhdr_ip_xsum;
4200
4686
4201 len = l2fhdr->l2_fhdr_pkt_len;
4202 status = l2fhdr->l2_fhdr_status;
4687 rem_len = pkt_len - m0->m_len;
4203
4688
4204 DBRUNIF(DB_RANDOMTRUE(bce_debug_l2fhdr_status_check),
4205 BCE_PRINTF("Simulating l2_fhdr status error.\n");
4206 status = status | L2_FHDR_ERRORS_PHY_DECODE);
4689 /* Calculate how many pages to pull off the page chain. */
4690 /* ToDo: The following assumes that mbuf clusters are 2KB. */
4691 pages = (rem_len + sc->pg_bd_mbuf_alloc_size) >> 11;
4207
4692
4208 /* Watch for unusual sized frames. */
4209 DBRUNIF(((len < BCE_MIN_MTU) || (len > BCE_MAX_JUMBO_ETHER_MTU_VLAN)),
4210 BCE_PRINTF("%s(%d): Unusual frame size found. "
4211 "Min(%d), Actual(%d), Max(%d)\n",
4212 __FILE__, __LINE__, (int) BCE_MIN_MTU,
4213 len, (int) BCE_MAX_JUMBO_ETHER_MTU_VLAN);
4214 bce_dump_mbuf(sc, m);
4215 bce_breakpoint(sc));
4693 /* Pull mbufs off the page chain for the remaining data. */
4694 while (rem_len > 0) {
4695 struct mbuf *m_pg;
4696
4697 sw_pg_cons_idx = PG_CHAIN_IDX(sw_pg_cons);
4216
4698
4217 len -= ETHER_CRC_LEN;
4699 /* Remove the mbuf from the page chain. */
4700 m_pg = sc->pg_mbuf_ptr[sw_pg_cons_idx];
4701 sc->pg_mbuf_ptr[sw_pg_cons_idx] = NULL;
4702 DBRUN(sc->debug_pg_mbuf_alloc--);
4703 sc->free_pg_bd++;
4218
4704
4219 /* Check the received frame for errors. */
4220 if (status & (L2_FHDR_ERRORS_BAD_CRC |
4221 L2_FHDR_ERRORS_PHY_DECODE | L2_FHDR_ERRORS_ALIGNMENT |
4222 L2_FHDR_ERRORS_TOO_SHORT | L2_FHDR_ERRORS_GIANT_FRAME)) {
4705 /* Unmap the page chain mbuf from DMA space. */
4706 bus_dmamap_sync(sc->pg_mbuf_tag,
4707 sc->pg_mbuf_map[sw_pg_cons_idx],
4708 BUS_DMASYNC_POSTREAD);
4709 bus_dmamap_unload(sc->pg_mbuf_tag,
4710 sc->pg_mbuf_map[sw_pg_cons_idx]);
4223
4711
4224 /* Log the error and release the mbuf. */
4225 ifp->if_ierrors++;
4226 DBRUNIF(1, sc->l2fhdr_status_errors++);
4227
4228 /* Todo: Reuse the mbuf to improve performance. */
4712 /* Adjust the mbuf length. */
4713 if (rem_len < m_pg->m_len) {
4714 /* The mbuf chain is complete. */
4715 m_pg->m_len = rem_len;
4716 rem_len = 0;
4717 } else {
4718 /* More packet data is waiting. */
4719 rem_len -= m_pg->m_len;
4720 }
4229
4721
4230 m_freem(m);
4231 m = NULL;
4232 goto bce_rx_int_next_rx;
4722 /* Concatenate the mbuf cluster to the mbuf. */
4723 m_cat(m0, m_pg);
4724
4725 sw_pg_cons = NEXT_PG_BD(sw_pg_cons);
4233 }
4234
4726 }
4727
4235 /* Skip over the l2_fhdr when passing the data up the stack. */
4236 m_adj(m, sizeof(struct l2_fhdr) + ETHER_ALIGN);
4728 /* Set the total packet length. */
4729 m0->m_pkthdr.len = pkt_len;
4237
4730
4238 /* Adjust the packet length to match the received data. */
4239 m->m_pkthdr.len = m->m_len = len;
4731 } else {
4732 /*
4733 * The received packet is small and fits in a
4734 * single mbuf (i.e. the l2_fhdr + pad + packet +
4735 * FCS <= MHLEN). In other words, the packet is
4736 * 154 bytes or less in size.
4737 */
4240
4738
4241 /* Send the packet to the appropriate interface. */
4242 m->m_pkthdr.rcvif = ifp;
4739 /* Set the total packet length. */
4740 m0->m_pkthdr.len = m0->m_len = pkt_len;
4741 }
4243
4742
4244 DBRUN(BCE_VERBOSE_RECV,
4245 struct ether_header *eh;
4246 eh = mtod(m, struct ether_header *);
4247 BCE_PRINTF("%s(): to: %6D, from: %6D, type: 0x%04X\n",
4248 __FUNCTION__, eh->ether_dhost, ":",
4249 eh->ether_shost, ":", htons(eh->ether_type)));
4743 /* Remove the trailing Ethernet FCS. */
4744 m_adj(m0, -ETHER_CRC_LEN);
4250
4745
4251 /* Validate the checksum if offload enabled. */
4252 if (ifp->if_capenable & IFCAP_RXCSUM) {
4746 /* Check that the resulting mbuf chain is valid. */
4747 DBRUN(m_sanity(m0, FALSE));
4253
4748
4254 /* Check for an IP datagram. */
4255 if (status & L2_FHDR_STATUS_IP_DATAGRAM) {
4256 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
4749 DBRUNIF(DB_RANDOMTRUE(bce_debug_l2fhdr_status_check),
4750 BCE_PRINTF("Simulating l2_fhdr status error.\n");
4751 status = status | L2_FHDR_ERRORS_PHY_DECODE);
4257
4752
4258 /* Check if the IP checksum is valid. */
4259 if ((l2fhdr->l2_fhdr_ip_xsum ^ 0xffff) == 0)
4260 m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
4261 else
4262 DBPRINT(sc, BCE_WARN_SEND,
4263 "%s(): Invalid IP checksum = 0x%04X!\n",
4264 __FUNCTION__, l2fhdr->l2_fhdr_ip_xsum);
4265 }
4753 /* Check the received frame for errors. */
4754 if (status & (L2_FHDR_ERRORS_BAD_CRC |
4755 L2_FHDR_ERRORS_PHY_DECODE | L2_FHDR_ERRORS_ALIGNMENT |
4756 L2_FHDR_ERRORS_TOO_SHORT | L2_FHDR_ERRORS_GIANT_FRAME)) {
4266
4757
4267 /* Check for a valid TCP/UDP frame. */
4268 if (status & (L2_FHDR_STATUS_TCP_SEGMENT |
4269 L2_FHDR_STATUS_UDP_DATAGRAM)) {
4758 /* Log the error and release the mbuf. */
4759 ifp->if_ierrors++;
4760 DBRUN(sc->l2fhdr_status_errors++);
4761
4762 m_freem(m0);
4763 m0 = NULL;
4764 goto bce_rx_int_next_rx;
4765 }
4270
4766
4271 /* Check for a good TCP/UDP checksum. */
4272 if ((status & (L2_FHDR_ERRORS_TCP_XSUM |
4273 L2_FHDR_ERRORS_UDP_XSUM)) == 0) {
4274 m->m_pkthdr.csum_data =
4275 l2fhdr->l2_fhdr_tcp_udp_xsum;
4276 m->m_pkthdr.csum_flags |= (CSUM_DATA_VALID
4277 | CSUM_PSEUDO_HDR);
4278 } else
4279 DBPRINT(sc, BCE_WARN_SEND,
4280 "%s(): Invalid TCP/UDP checksum = 0x%04X!\n",
4281 __FUNCTION__, l2fhdr->l2_fhdr_tcp_udp_xsum);
4282 }
4283 }
4767 /* Send the packet to the appropriate interface. */
4768 m0->m_pkthdr.rcvif = ifp;
4284
4769
4770 /* Assume no hardware checksum. */
4771 m0->m_pkthdr.csum_flags = 0;
4285
4772
4286 /*
4287 * If we received a packet with a vlan tag,
4288 * attach that information to the packet.
4289 */
4290 if (status & L2_FHDR_STATUS_L2_VLAN_TAG) {
4291 DBPRINT(sc, BCE_VERBOSE_SEND, "%s(): VLAN tag = 0x%04X\n",
4292 __FUNCTION__, l2fhdr->l2_fhdr_vlan_tag);
4773 /* Validate the checksum if offload enabled. */
4774 if (ifp->if_capenable & IFCAP_RXCSUM) {
4775
4776 /* Check for an IP datagram. */
4777 if (!(status & L2_FHDR_STATUS_SPLIT) &&
4778 (status & L2_FHDR_STATUS_IP_DATAGRAM)) {
4779 m0->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
4780
4781 /* Check if the IP checksum is valid. */
4782 if ((l2fhdr->l2_fhdr_ip_xsum ^ 0xffff) == 0)
4783 m0->m_pkthdr.csum_flags |= CSUM_IP_VALID;
4784 }
4785
4786 /* Check for a valid TCP/UDP frame. */
4787 if (status & (L2_FHDR_STATUS_TCP_SEGMENT |
4788 L2_FHDR_STATUS_UDP_DATAGRAM)) {
4789
4790 /* Check for a good TCP/UDP checksum. */
4791 if ((status & (L2_FHDR_ERRORS_TCP_XSUM |
4792 L2_FHDR_ERRORS_UDP_XSUM)) == 0) {
4793 m0->m_pkthdr.csum_data =
4794 l2fhdr->l2_fhdr_tcp_udp_xsum;
4795 m0->m_pkthdr.csum_flags |= (CSUM_DATA_VALID
4796 | CSUM_PSEUDO_HDR);
4797 }
4798 }
4799 }
4800
4801 /*
4802 * If we received a packet with a vlan tag,
4803 * attach that information to the packet.
4804 */
4805 if (status & L2_FHDR_STATUS_L2_VLAN_TAG) {
4293#if __FreeBSD_version < 700000
4806#if __FreeBSD_version < 700000
4294 VLAN_INPUT_TAG(ifp, m, l2fhdr->l2_fhdr_vlan_tag, continue);
4807 VLAN_INPUT_TAG(ifp, m0, l2fhdr->l2_fhdr_vlan_tag, continue);
4295#else
4808#else
4296 m->m_pkthdr.ether_vtag = l2fhdr->l2_fhdr_vlan_tag;
4297 m->m_flags |= M_VLANTAG;
4809 m0->m_pkthdr.ether_vtag = l2fhdr->l2_fhdr_vlan_tag;
4810 m0->m_flags |= M_VLANTAG;
4298#endif
4811#endif
4299 }
4812 }
4300
4813
4301 /* Pass the mbuf off to the upper layers. */
4302 ifp->if_ipackets++;
4814 /* Pass the mbuf off to the upper layers. */
4815 ifp->if_ipackets++;
4303
4304bce_rx_int_next_rx:
4816
4817bce_rx_int_next_rx:
4305 sw_prod = NEXT_RX_BD(sw_prod);
4306 }
4818 sw_rx_cons = NEXT_RX_BD(sw_rx_cons);
4307
4819
4308 sw_cons = NEXT_RX_BD(sw_cons);
4309
4310 /* If we have a packet, pass it up the stack */
4820 /* If we have a packet, pass it up the stack */
4311 if (m) {
4821 if (m0) {
4312 /* Make sure we don't lose our place when we release the lock. */
4822 /* Make sure we don't lose our place when we release the lock. */
4313 sc->rx_cons = sw_cons;
4823 sc->rx_cons = sw_rx_cons;
4824 sc->pg_cons = sw_pg_cons;
4314
4825
4315 DBPRINT(sc, BCE_VERBOSE_RECV, "%s(): Passing received frame up.\n",
4316 __FUNCTION__);
4317 BCE_UNLOCK(sc);
4826 BCE_UNLOCK(sc);
4318 (*ifp->if_input)(ifp, m);
4319 DBRUNIF(1, sc->rx_mbuf_alloc--);
4827 (*ifp->if_input)(ifp, m0);
4320 BCE_LOCK(sc);
4321
4322 /* Recover our place. */
4828 BCE_LOCK(sc);
4829
4830 /* Recover our place. */
4323 sw_cons = sc->rx_cons;
4831 sw_rx_cons = sc->rx_cons;
4832 sw_pg_cons = sc->pg_cons;
4324 }
4325
4326 /* Refresh hw_cons to see if there's new work */
4833 }
4834
4835 /* Refresh hw_cons to see if there's new work */
4327 if (sw_cons == hw_cons) {
4328 hw_cons = sc->hw_rx_cons = sblk->status_rx_quick_consumer_index0;
4329 if ((hw_cons & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE)
4330 hw_cons++;
4331 }
4332
4333 /* Prevent speculative reads from getting ahead of the status block. */
4334 bus_space_barrier(sc->bce_btag, sc->bce_bhandle, 0, 0,
4335 BUS_SPACE_BARRIER_READ);
4836 if (sw_rx_cons == hw_rx_cons)
4837 hw_rx_cons = sc->hw_rx_cons = bce_get_hw_rx_cons(sc);
4336 }
4337
4838 }
4839
4338 /* No new packets to process. Refill the RX chain and exit. */
4339 sc->rx_cons = sw_cons;
4840 /* No new packets to process. Refill the RX and page chains and exit. */
4841 sc->pg_cons = sw_pg_cons;
4842 bce_fill_pg_chain(sc);
4843
4844 sc->rx_cons = sw_rx_cons;
4340 bce_fill_rx_chain(sc);
4341
4342 for (int i = 0; i < RX_PAGES; i++)
4343 bus_dmamap_sync(sc->rx_bd_chain_tag,
4344 sc->rx_bd_chain_map[i], BUS_DMASYNC_PREWRITE);
4345
4845 bce_fill_rx_chain(sc);
4846
4847 for (int i = 0; i < RX_PAGES; i++)
4848 bus_dmamap_sync(sc->rx_bd_chain_tag,
4849 sc->rx_bd_chain_map[i], BUS_DMASYNC_PREWRITE);
4850
4851 for (int i = 0; i < PG_PAGES; i++)
4852 bus_dmamap_sync(sc->pg_bd_chain_tag,
4853 sc->pg_bd_chain_map[i], BUS_DMASYNC_PREWRITE);
4854
4346 DBPRINT(sc, BCE_INFO_RECV, "%s(exit): rx_prod = 0x%04X, "
4347 "rx_cons = 0x%04X, rx_prod_bseq = 0x%08X\n",
4348 __FUNCTION__, sc->rx_prod, sc->rx_cons, sc->rx_prod_bseq);
4855 DBPRINT(sc, BCE_INFO_RECV, "%s(exit): rx_prod = 0x%04X, "
4856 "rx_cons = 0x%04X, rx_prod_bseq = 0x%08X\n",
4857 __FUNCTION__, sc->rx_prod, sc->rx_cons, sc->rx_prod_bseq);
4858
4859 DBRUN(rx_intr_end = REG_RD(sc, BCE_TIMER_25MHZ_FREE_RUN);
4860 sc->rx_intr_time += (u64) BCE_TIME_DELTA(rx_intr_start, rx_intr_end));
4349}
4350
4351
4352/****************************************************************************/
4353/* Handles transmit completion interrupt events. */
4354/* */
4355/* Returns: */
4356/* Nothing. */
4357/****************************************************************************/
4358static void
4359bce_tx_intr(struct bce_softc *sc)
4360{
4361 struct status_block *sblk = sc->status_block;
4362 struct ifnet *ifp = sc->bce_ifp;
4363 u16 hw_tx_cons, sw_tx_cons, sw_tx_chain_cons;
4364
4861}
4862
4863
4864/****************************************************************************/
4865/* Handles transmit completion interrupt events. */
4866/* */
4867/* Returns: */
4868/* Nothing. */
4869/****************************************************************************/
4870static void
4871bce_tx_intr(struct bce_softc *sc)
4872{
4873 struct status_block *sblk = sc->status_block;
4874 struct ifnet *ifp = sc->bce_ifp;
4875 u16 hw_tx_cons, sw_tx_cons, sw_tx_chain_cons;
4876
4877#ifdef BCE_DEBUG
4878 u32 tx_intr_start, tx_intr_end;
4879 tx_intr_start = REG_RD(sc, BCE_TIMER_25MHZ_FREE_RUN);
4880 sc->tx_interrupts++;
4881#endif
4882
4365 BCE_LOCK_ASSERT(sc);
4366
4883 BCE_LOCK_ASSERT(sc);
4884
4367 DBRUNIF(1, sc->tx_interrupts++);
4368
4369 /* Get the hardware's view of the TX consumer index. */
4370 hw_tx_cons = sc->hw_tx_cons = sblk->status_tx_quick_consumer_index0;
4371
4372 /* Skip to the next entry if this is a chain page pointer. */
4373 if ((hw_tx_cons & USABLE_TX_BD_PER_PAGE) == USABLE_TX_BD_PER_PAGE)
4374 hw_tx_cons++;
4375
4376 sw_tx_cons = sc->tx_cons;

--- 15 unchanged lines hidden (view full) ---

4392 __FUNCTION__, hw_tx_cons, sw_tx_cons, sw_tx_chain_cons);
4393
4394 DBRUNIF((sw_tx_chain_cons > MAX_TX_BD),
4395 BCE_PRINTF("%s(%d): TX chain consumer out of range! "
4396 " 0x%04X > 0x%04X\n", __FILE__, __LINE__, sw_tx_chain_cons,
4397 (int) MAX_TX_BD);
4398 bce_breakpoint(sc));
4399
4885 /* Get the hardware's view of the TX consumer index. */
4886 hw_tx_cons = sc->hw_tx_cons = sblk->status_tx_quick_consumer_index0;
4887
4888 /* Skip to the next entry if this is a chain page pointer. */
4889 if ((hw_tx_cons & USABLE_TX_BD_PER_PAGE) == USABLE_TX_BD_PER_PAGE)
4890 hw_tx_cons++;
4891
4892 sw_tx_cons = sc->tx_cons;

--- 15 unchanged lines hidden (view full) ---

4908 __FUNCTION__, hw_tx_cons, sw_tx_cons, sw_tx_chain_cons);
4909
4910 DBRUNIF((sw_tx_chain_cons > MAX_TX_BD),
4911 BCE_PRINTF("%s(%d): TX chain consumer out of range! "
4912 " 0x%04X > 0x%04X\n", __FILE__, __LINE__, sw_tx_chain_cons,
4913 (int) MAX_TX_BD);
4914 bce_breakpoint(sc));
4915
4400 DBRUNIF(1, txbd = &sc->tx_bd_chain[TX_PAGE(sw_tx_chain_cons)]
4916 DBRUN(txbd = &sc->tx_bd_chain[TX_PAGE(sw_tx_chain_cons)]
4401 [TX_IDX(sw_tx_chain_cons)]);
4402
4403 DBRUNIF((txbd == NULL),
4404 BCE_PRINTF("%s(%d): Unexpected NULL tx_bd[0x%04X]!\n",
4405 __FILE__, __LINE__, sw_tx_chain_cons);
4406 bce_breakpoint(sc));
4407
4917 [TX_IDX(sw_tx_chain_cons)]);
4918
4919 DBRUNIF((txbd == NULL),
4920 BCE_PRINTF("%s(%d): Unexpected NULL tx_bd[0x%04X]!\n",
4921 __FILE__, __LINE__, sw_tx_chain_cons);
4922 bce_breakpoint(sc));
4923
4408 DBRUN(BCE_INFO_SEND, BCE_PRINTF("%s(): ", __FUNCTION__);
4924 DBRUNMSG(BCE_INFO_SEND, BCE_PRINTF("%s(): ", __FUNCTION__);
4409 bce_dump_txbd(sc, sw_tx_chain_cons, txbd));
4410
4411 /*
4412 * Free the associated mbuf. Remember
4413 * that only the last tx_bd of a packet
4414 * has an mbuf pointer and DMA map.
4415 */
4416 if (sc->tx_mbuf_ptr[sw_tx_chain_cons] != NULL) {
4417
4418 /* Validate that this is the last tx_bd. */
4419 DBRUNIF((!(txbd->tx_bd_flags & TX_BD_FLAGS_END)),
4420 BCE_PRINTF("%s(%d): tx_bd END flag not set but "
4421 "txmbuf == NULL!\n", __FILE__, __LINE__);
4422 bce_breakpoint(sc));
4423
4925 bce_dump_txbd(sc, sw_tx_chain_cons, txbd));
4926
4927 /*
4928 * Free the associated mbuf. Remember
4929 * that only the last tx_bd of a packet
4930 * has an mbuf pointer and DMA map.
4931 */
4932 if (sc->tx_mbuf_ptr[sw_tx_chain_cons] != NULL) {
4933
4934 /* Validate that this is the last tx_bd. */
4935 DBRUNIF((!(txbd->tx_bd_flags & TX_BD_FLAGS_END)),
4936 BCE_PRINTF("%s(%d): tx_bd END flag not set but "
4937 "txmbuf == NULL!\n", __FILE__, __LINE__);
4938 bce_breakpoint(sc));
4939
4424 DBRUN(BCE_INFO_SEND,
4940 DBRUNMSG(BCE_INFO_SEND,
4425 BCE_PRINTF("%s(): Unloading map/freeing mbuf "
4426 "from tx_bd[0x%04X]\n", __FUNCTION__, sw_tx_chain_cons));
4427
4428 /* Unmap the mbuf. */
4429 bus_dmamap_unload(sc->tx_mbuf_tag,
4430 sc->tx_mbuf_map[sw_tx_chain_cons]);
4431
4432 /* Free the mbuf. */
4433 m_freem(sc->tx_mbuf_ptr[sw_tx_chain_cons]);
4434 sc->tx_mbuf_ptr[sw_tx_chain_cons] = NULL;
4941 BCE_PRINTF("%s(): Unloading map/freeing mbuf "
4942 "from tx_bd[0x%04X]\n", __FUNCTION__, sw_tx_chain_cons));
4943
4944 /* Unmap the mbuf. */
4945 bus_dmamap_unload(sc->tx_mbuf_tag,
4946 sc->tx_mbuf_map[sw_tx_chain_cons]);
4947
4948 /* Free the mbuf. */
4949 m_freem(sc->tx_mbuf_ptr[sw_tx_chain_cons]);
4950 sc->tx_mbuf_ptr[sw_tx_chain_cons] = NULL;
4435 DBRUNIF(1, sc->tx_mbuf_alloc--);
4951 DBRUN(sc->debug_tx_mbuf_alloc--);
4436
4437 ifp->if_opackets++;
4438 }
4439
4440 sc->used_tx_bd--;
4441 sw_tx_cons = NEXT_TX_BD(sw_tx_cons);
4442
4443 /* Refresh hw_cons to see if there's new work. */

--- 14 unchanged lines hidden (view full) ---

4458 DBRUNIF((ifp->if_drv_flags & IFF_DRV_OACTIVE),
4459 DBPRINT(sc, BCE_INFO_SEND,
4460 "%s(): Open TX chain! %d/%d (used/total)\n",
4461 __FUNCTION__, sc->used_tx_bd, sc->max_tx_bd));
4462 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
4463 }
4464
4465 sc->tx_cons = sw_tx_cons;
4952
4953 ifp->if_opackets++;
4954 }
4955
4956 sc->used_tx_bd--;
4957 sw_tx_cons = NEXT_TX_BD(sw_tx_cons);
4958
4959 /* Refresh hw_cons to see if there's new work. */

--- 14 unchanged lines hidden (view full) ---

4974 DBRUNIF((ifp->if_drv_flags & IFF_DRV_OACTIVE),
4975 DBPRINT(sc, BCE_INFO_SEND,
4976 "%s(): Open TX chain! %d/%d (used/total)\n",
4977 __FUNCTION__, sc->used_tx_bd, sc->max_tx_bd));
4978 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
4979 }
4980
4981 sc->tx_cons = sw_tx_cons;
4982 DBRUN(tx_intr_end = REG_RD(sc, BCE_TIMER_25MHZ_FREE_RUN);
4983 sc->tx_intr_time += (u64) BCE_TIME_DELTA(tx_intr_start, tx_intr_end));
4466}
4467
4468
4469/****************************************************************************/
4470/* Disables interrupt generation. */
4471/* */
4472/* Returns: */
4473/* Nothing. */

--- 35 unchanged lines hidden (view full) ---

4509/* */
4510/* Returns: */
4511/* Nothing. */
4512/****************************************************************************/
4513static void
4514bce_init_locked(struct bce_softc *sc)
4515{
4516 struct ifnet *ifp;
4984}
4985
4986
4987/****************************************************************************/
4988/* Disables interrupt generation. */
4989/* */
4990/* Returns: */
4991/* Nothing. */

--- 35 unchanged lines hidden (view full) ---

5027/* */
5028/* Returns: */
5029/* Nothing. */
5030/****************************************************************************/
5031static void
5032bce_init_locked(struct bce_softc *sc)
5033{
5034 struct ifnet *ifp;
4517 u32 ether_mtu;
5035 u32 ether_mtu = 0;
4518
4519 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
4520
4521 BCE_LOCK_ASSERT(sc);
4522
4523 ifp = sc->bce_ifp;
4524
4525 /* Check if the driver is still running and bail out if it is. */

--- 19 unchanged lines hidden (view full) ---

4545 __FILE__, __LINE__);
4546 goto bce_init_locked_exit;
4547 }
4548
4549 /* Load our MAC address. */
4550 bcopy(IF_LLADDR(sc->bce_ifp), sc->eaddr, ETHER_ADDR_LEN);
4551 bce_set_mac_addr(sc);
4552
5036
5037 DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
5038
5039 BCE_LOCK_ASSERT(sc);
5040
5041 ifp = sc->bce_ifp;
5042
5043 /* Check if the driver is still running and bail out if it is. */

--- 19 unchanged lines hidden (view full) ---

5063 __FILE__, __LINE__);
5064 goto bce_init_locked_exit;
5065 }
5066
5067 /* Load our MAC address. */
5068 bcopy(IF_LLADDR(sc->bce_ifp), sc->eaddr, ETHER_ADDR_LEN);
5069 bce_set_mac_addr(sc);
5070
4553 /* Calculate and program the Ethernet MTU size. */
4554 ether_mtu = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN + ifp->if_mtu +
4555 ETHER_CRC_LEN;
5071 /* Calculate and program the hardware Ethernet MTU size. */
5072 if (ifp->if_mtu <= sc->pg_bd_mbuf_alloc_size)
5073 /* Be generous on receive if we have room. */
5074 ether_mtu = sc->pg_bd_mbuf_alloc_size;
5075 else
5076 ether_mtu = ifp->if_mtu;
4556
5077
4557 DBPRINT(sc, BCE_INFO_MISC, "%s(): setting mtu = %d\n",__FUNCTION__, ether_mtu);
5078 ether_mtu += ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN + ETHER_CRC_LEN;
4558
5079
4559 /*
4560 * Program the mtu, enabling jumbo frame
4561 * support if necessary. Also set the mbuf
4562 * allocation count for RX frames.
4563 */
4564 if (ether_mtu > ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN) {
4565 REG_WR(sc, BCE_EMAC_RX_MTU_SIZE, min(ether_mtu, BCE_MAX_JUMBO_ETHER_MTU) |
5080 DBPRINT(sc, BCE_INFO_MISC, "%s(): setting h/w mtu = %d\n", __FUNCTION__,
5081 ether_mtu);
5082
5083 /* Program the mtu, enabling jumbo frame support if necessary. */
5084 if (ether_mtu > (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN))
5085 REG_WR(sc, BCE_EMAC_RX_MTU_SIZE,
5086 min(ether_mtu, BCE_MAX_JUMBO_ETHER_MTU) |
4566 BCE_EMAC_RX_MTU_SIZE_JUMBO_ENA);
5087 BCE_EMAC_RX_MTU_SIZE_JUMBO_ENA);
4567 sc->mbuf_alloc_size = MJUM9BYTES;
4568 } else {
5088 else
4569 REG_WR(sc, BCE_EMAC_RX_MTU_SIZE, ether_mtu);
5089 REG_WR(sc, BCE_EMAC_RX_MTU_SIZE, ether_mtu);
4570 sc->mbuf_alloc_size = MCLBYTES;
4571 }
4572
5090
4573 /* Calculate the RX Ethernet frame size for rx_bd's. */
4574 sc->max_frame_size = sizeof(struct l2_fhdr) + 2 + ether_mtu + 8;
5091 DBPRINT(sc, BCE_INFO_LOAD,
5092 "%s(): rx_bd_mbuf_alloc_size = %d, pg_bd_mbuf_alloc_size = %d\n",
5093 __FUNCTION__, sc->rx_bd_mbuf_alloc_size, sc->pg_bd_mbuf_alloc_size);
4575
5094
4576 DBPRINT(sc, BCE_INFO_RECV,
4577 "%s(): mclbytes = %d, mbuf_alloc_size = %d, "
4578 "max_frame_size = %d\n",
4579 __FUNCTION__, (int) MCLBYTES, sc->mbuf_alloc_size, sc->max_frame_size);
4580
4581 /* Program appropriate promiscuous/multicast filtering. */
4582 bce_set_rx_mode(sc);
4583
5095 /* Program appropriate promiscuous/multicast filtering. */
5096 bce_set_rx_mode(sc);
5097
5098 /* Init page buffer descriptor chain. */
5099 bce_init_pg_chain(sc);
5100
4584 /* Init RX buffer descriptor chain. */
4585 bce_init_rx_chain(sc);
5101 /* Init RX buffer descriptor chain. */
5102 bce_init_rx_chain(sc);
4586
5103
4587 /* Init TX buffer descriptor chain. */
4588 bce_init_tx_chain(sc);
4589
4590#ifdef DEVICE_POLLING
4591 /* Disable interrupts if we are polling. */
4592 if (ifp->if_capenable & IFCAP_POLLING) {
4593 bce_disable_intr(sc);
4594

--- 167 unchanged lines hidden (view full) ---

4762 __FUNCTION__, hdr_len, e_hlen, ip_hlen, tcp_hlen, ip_len);
4763
4764 /* Set the LSO flag in the TX BD */
4765 flags |= TX_BD_FLAGS_SW_LSO;
4766 /* Set the length of IP + TCP options (in 32 bit words) */
4767 flags |= (((ip_hlen + tcp_hlen - 40) >> 2) << 8);
4768
4769bce_tx_encap_skip_tso:
5104 /* Init TX buffer descriptor chain. */
5105 bce_init_tx_chain(sc);
5106
5107#ifdef DEVICE_POLLING
5108 /* Disable interrupts if we are polling. */
5109 if (ifp->if_capenable & IFCAP_POLLING) {
5110 bce_disable_intr(sc);
5111

--- 167 unchanged lines hidden (view full) ---

5279 __FUNCTION__, hdr_len, e_hlen, ip_hlen, tcp_hlen, ip_len);
5280
5281 /* Set the LSO flag in the TX BD */
5282 flags |= TX_BD_FLAGS_SW_LSO;
5283 /* Set the length of IP + TCP options (in 32 bit words) */
5284 flags |= (((ip_hlen + tcp_hlen - 40) >> 2) << 8);
5285
5286bce_tx_encap_skip_tso:
4770 DBRUNIF(1, sc->requested_tso_frames++);
5287 DBRUN(sc->requested_tso_frames++);
4771 }
4772 }
4773
4774 /* Transfer any VLAN tags to the bd. */
4775 if (m0->m_flags & M_VLANTAG) {
4776 flags |= TX_BD_FLAGS_VLAN_TAG;
4777 vlan_tag = m0->m_pkthdr.ether_vtag;
4778 }

--- 8 unchanged lines hidden (view full) ---

4787 segs, &nsegs, BUS_DMA_NOWAIT);
4788
4789 /* Check if the DMA mapping was successful */
4790 if (error == EFBIG) {
4791
4792 /* The mbuf is too fragmented for our DMA mapping. */
4793 DBPRINT(sc, BCE_WARN, "%s(): fragmented mbuf (%d pieces)\n",
4794 __FUNCTION__, nsegs);
5288 }
5289 }
5290
5291 /* Transfer any VLAN tags to the bd. */
5292 if (m0->m_flags & M_VLANTAG) {
5293 flags |= TX_BD_FLAGS_VLAN_TAG;
5294 vlan_tag = m0->m_pkthdr.ether_vtag;
5295 }

--- 8 unchanged lines hidden (view full) ---

5304 segs, &nsegs, BUS_DMA_NOWAIT);
5305
5306 /* Check if the DMA mapping was successful */
5307 if (error == EFBIG) {
5308
5309 /* The mbuf is too fragmented for our DMA mapping. */
5310 DBPRINT(sc, BCE_WARN, "%s(): fragmented mbuf (%d pieces)\n",
5311 __FUNCTION__, nsegs);
4795 DBRUNIF(1, bce_dump_mbuf(sc, m0););
5312 DBRUN(bce_dump_mbuf(sc, m0););
4796
4797 /* Try to defrag the mbuf. */
4798 m0 = m_defrag(*m_head, M_DONTWAIT);
4799 if (m0 == NULL) {
4800 /* Defrag was unsuccessful */
4801 m_freem(*m_head);
4802 *m_head = NULL;
4803 sc->mbuf_alloc_failed++;

--- 47 unchanged lines hidden (view full) ---

4851 DBPRINT(sc, BCE_INFO_SEND,
4852 "%s(): Start: prod = 0x%04X, chain_prod = %04X, "
4853 "prod_bseq = 0x%08X\n",
4854 __FUNCTION__, prod, chain_prod, prod_bseq);
4855
4856 /*
4857 * Cycle through each mbuf segment that makes up
4858 * the outgoing frame, gathering the mapping info
5313
5314 /* Try to defrag the mbuf. */
5315 m0 = m_defrag(*m_head, M_DONTWAIT);
5316 if (m0 == NULL) {
5317 /* Defrag was unsuccessful */
5318 m_freem(*m_head);
5319 *m_head = NULL;
5320 sc->mbuf_alloc_failed++;

--- 47 unchanged lines hidden (view full) ---

5368 DBPRINT(sc, BCE_INFO_SEND,
5369 "%s(): Start: prod = 0x%04X, chain_prod = %04X, "
5370 "prod_bseq = 0x%08X\n",
5371 __FUNCTION__, prod, chain_prod, prod_bseq);
5372
5373 /*
5374 * Cycle through each mbuf segment that makes up
5375 * the outgoing frame, gathering the mapping info
4859 * for that segment and creating a tx_bd to for
5376 * for that segment and creating a tx_bd for
4860 * the mbuf.
4861 */
4862 for (i = 0; i < nsegs ; i++) {
4863
4864 chain_prod = TX_CHAIN_IDX(prod);
4865 txbd= &sc->tx_bd_chain[TX_PAGE(chain_prod)][TX_IDX(chain_prod)];
4866
4867 txbd->tx_bd_haddr_lo = htole32(BCE_ADDR_LO(segs[i].ds_addr));

--- 5 unchanged lines hidden (view full) ---

4873 if (i == 0)
4874 txbd->tx_bd_flags |= htole16(TX_BD_FLAGS_START);
4875 prod = NEXT_TX_BD(prod);
4876 }
4877
4878 /* Set the END flag on the last TX buffer descriptor. */
4879 txbd->tx_bd_flags |= htole16(TX_BD_FLAGS_END);
4880
5377 * the mbuf.
5378 */
5379 for (i = 0; i < nsegs ; i++) {
5380
5381 chain_prod = TX_CHAIN_IDX(prod);
5382 txbd= &sc->tx_bd_chain[TX_PAGE(chain_prod)][TX_IDX(chain_prod)];
5383
5384 txbd->tx_bd_haddr_lo = htole32(BCE_ADDR_LO(segs[i].ds_addr));

--- 5 unchanged lines hidden (view full) ---

5390 if (i == 0)
5391 txbd->tx_bd_flags |= htole16(TX_BD_FLAGS_START);
5392 prod = NEXT_TX_BD(prod);
5393 }
5394
5395 /* Set the END flag on the last TX buffer descriptor. */
5396 txbd->tx_bd_flags |= htole16(TX_BD_FLAGS_END);
5397
4881 DBRUN(BCE_EXCESSIVE_SEND, bce_dump_tx_chain(sc, debug_prod, nsegs));
5398 DBRUNMSG(BCE_EXCESSIVE_SEND, bce_dump_tx_chain(sc, debug_prod, nsegs));
4882
4883 DBPRINT(sc, BCE_INFO_SEND,
4884 "%s(): End: prod = 0x%04X, chain_prod = %04X, "
4885 "prod_bseq = 0x%08X\n",
4886 __FUNCTION__, prod, chain_prod, prod_bseq);
4887
4888 /*
4889 * Ensure that the mbuf pointer for this transmission

--- 6 unchanged lines hidden (view full) ---

4896 */
4897 sc->tx_mbuf_ptr[chain_prod] = m0;
4898 sc->used_tx_bd += nsegs;
4899
4900 /* Update some debug statistic counters */
4901 DBRUNIF((sc->used_tx_bd > sc->tx_hi_watermark),
4902 sc->tx_hi_watermark = sc->used_tx_bd);
4903 DBRUNIF((sc->used_tx_bd == sc->max_tx_bd), sc->tx_full_count++);
5399
5400 DBPRINT(sc, BCE_INFO_SEND,
5401 "%s(): End: prod = 0x%04X, chain_prod = %04X, "
5402 "prod_bseq = 0x%08X\n",
5403 __FUNCTION__, prod, chain_prod, prod_bseq);
5404
5405 /*
5406 * Ensure that the mbuf pointer for this transmission

--- 6 unchanged lines hidden (view full) ---

5413 */
5414 sc->tx_mbuf_ptr[chain_prod] = m0;
5415 sc->used_tx_bd += nsegs;
5416
5417 /* Update some debug statistic counters */
5418 DBRUNIF((sc->used_tx_bd > sc->tx_hi_watermark),
5419 sc->tx_hi_watermark = sc->used_tx_bd);
5420 DBRUNIF((sc->used_tx_bd == sc->max_tx_bd), sc->tx_full_count++);
4904 DBRUNIF(1, sc->tx_mbuf_alloc++);
5421 DBRUNIF(sc->debug_tx_mbuf_alloc++);
4905
5422
4906 DBRUN(BCE_VERBOSE_SEND, bce_dump_tx_mbuf_chain(sc, chain_prod, nsegs));
5423 DBRUNMSG(BCE_EXCESSIVE_SEND, bce_dump_tx_mbuf_chain(sc, chain_prod, 1));
4907
4908 /* prod points to the next free tx_bd at this point. */
4909 sc->tx_prod = prod;
4910 sc->tx_prod_bseq = prod_bseq;
4911
4912 return(rc);
4913}
4914

--- 325 unchanged lines hidden (view full) ---

5240 * don't reset the hardware.
5241 */
5242 if (REG_RD(sc, BCE_EMAC_TX_STATUS) & BCE_EMAC_TX_STATUS_XOFFED)
5243 return;
5244
5245 BCE_PRINTF("%s(%d): Watchdog timeout occurred, resetting!\n",
5246 __FILE__, __LINE__);
5247
5424
5425 /* prod points to the next free tx_bd at this point. */
5426 sc->tx_prod = prod;
5427 sc->tx_prod_bseq = prod_bseq;
5428
5429 return(rc);
5430}
5431

--- 325 unchanged lines hidden (view full) ---

5757 * don't reset the hardware.
5758 */
5759 if (REG_RD(sc, BCE_EMAC_TX_STATUS) & BCE_EMAC_TX_STATUS_XOFFED)
5760 return;
5761
5762 BCE_PRINTF("%s(%d): Watchdog timeout occurred, resetting!\n",
5763 __FILE__, __LINE__);
5764
5248 DBRUN(BCE_VERBOSE_SEND,
5765 DBRUNMSG(BCE_VERBOSE_SEND,
5249 bce_dump_driver_state(sc);
5250 bce_dump_status_block(sc));
5251
5252 /* DBRUN(BCE_FATAL, bce_breakpoint(sc)); */
5253
5254 sc->bce_ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
5255
5256 bce_init_locked(sc);

--- 83 unchanged lines hidden (view full) ---

5340 u32 status_attn_bits;
5341
5342 sc = xsc;
5343 ifp = sc->bce_ifp;
5344
5345 DBPRINT(sc, BCE_EXCESSIVE, "Entering %s()\n", __FUNCTION__);
5346 BCE_LOCK(sc);
5347
5766 bce_dump_driver_state(sc);
5767 bce_dump_status_block(sc));
5768
5769 /* DBRUN(BCE_FATAL, bce_breakpoint(sc)); */
5770
5771 sc->bce_ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
5772
5773 bce_init_locked(sc);

--- 83 unchanged lines hidden (view full) ---

5857 u32 status_attn_bits;
5858
5859 sc = xsc;
5860 ifp = sc->bce_ifp;
5861
5862 DBPRINT(sc, BCE_EXCESSIVE, "Entering %s()\n", __FUNCTION__);
5863 BCE_LOCK(sc);
5864
5348 DBRUNIF(1, sc->interrupts_generated++);
5865 DBRUN(sc->interrupts_generated++);
5349
5350#ifdef DEVICE_POLLING
5351 if (ifp->if_capenable & IFCAP_POLLING) {
5352 DBPRINT(sc, BCE_INFO_MISC, "Polling enabled!\n");
5353 goto bce_intr_exit;
5354 }
5355#endif
5356

--- 29 unchanged lines hidden (view full) ---

5386 (sc->status_block->status_attn_bits_ack & STATUS_ATTN_BITS_LINK_STATE))
5387 bce_phy_intr(sc);
5388
5389 /* If any other attention is asserted then the chip is toast. */
5390 if (((status_attn_bits & ~STATUS_ATTN_BITS_LINK_STATE) !=
5391 (sc->status_block->status_attn_bits_ack &
5392 ~STATUS_ATTN_BITS_LINK_STATE))) {
5393
5866
5867#ifdef DEVICE_POLLING
5868 if (ifp->if_capenable & IFCAP_POLLING) {
5869 DBPRINT(sc, BCE_INFO_MISC, "Polling enabled!\n");
5870 goto bce_intr_exit;
5871 }
5872#endif
5873

--- 29 unchanged lines hidden (view full) ---

5903 (sc->status_block->status_attn_bits_ack & STATUS_ATTN_BITS_LINK_STATE))
5904 bce_phy_intr(sc);
5905
5906 /* If any other attention is asserted then the chip is toast. */
5907 if (((status_attn_bits & ~STATUS_ATTN_BITS_LINK_STATE) !=
5908 (sc->status_block->status_attn_bits_ack &
5909 ~STATUS_ATTN_BITS_LINK_STATE))) {
5910
5394 DBRUN(1, sc->unexpected_attentions++);
5911 DBRUN(sc->unexpected_attentions++);
5395
5396 BCE_PRINTF("%s(%d): Fatal attention detected: 0x%08X\n",
5397 __FILE__, __LINE__, sc->status_block->status_attn_bits);
5398
5912
5913 BCE_PRINTF("%s(%d): Fatal attention detected: 0x%08X\n",
5914 __FILE__, __LINE__, sc->status_block->status_attn_bits);
5915
5399 DBRUN(BCE_FATAL,
5916 DBRUNMSG(BCE_FATAL,
5400 if (bce_debug_unexpected_attention == 0)
5401 bce_breakpoint(sc));
5402
5403 bce_init_locked(sc);
5404 goto bce_intr_exit;
5405 }
5406
5407 /* Check for any completed RX frames. */

--- 389 unchanged lines hidden (view full) ---

5797 struct bce_softc *sc = xsc;
5798 struct mii_data *mii;
5799 struct ifnet *ifp;
5800
5801 ifp = sc->bce_ifp;
5802
5803 BCE_LOCK_ASSERT(sc);
5804
5917 if (bce_debug_unexpected_attention == 0)
5918 bce_breakpoint(sc));
5919
5920 bce_init_locked(sc);
5921 goto bce_intr_exit;
5922 }
5923
5924 /* Check for any completed RX frames. */

--- 389 unchanged lines hidden (view full) ---

6314 struct bce_softc *sc = xsc;
6315 struct mii_data *mii;
6316 struct ifnet *ifp;
6317
6318 ifp = sc->bce_ifp;
6319
6320 BCE_LOCK_ASSERT(sc);
6321
6322 /* Schedule the next tick. */
6323 callout_reset(&sc->bce_tick_callout, hz, bce_tick, sc);
6324
5805 /* Update the statistics from the hardware statistics block. */
5806 bce_stats_update(sc);
5807
6325 /* Update the statistics from the hardware statistics block. */
6326 bce_stats_update(sc);
6327
6328 /* Top off the receive and page chains. */
6329 bce_fill_pg_chain(sc);
6330 bce_fill_rx_chain(sc);
6331
5808 /* Check that chip hasn't hung. */
5809 bce_watchdog(sc);
5810
6332 /* Check that chip hasn't hung. */
6333 bce_watchdog(sc);
6334
5811 /* Schedule the next tick. */
5812 callout_reset(&sc->bce_tick_callout, hz, bce_tick, sc);
5813
5814 /* If link is up already up then we're done. */
5815 if (sc->bce_link)
5816 goto bce_tick_locked_exit;
5817
5818 mii = device_get_softc(sc->bce_miibus);
5819 mii_tick(mii);
5820
5821 /* Check if the link has come up. */

--- 115 unchanged lines hidden (view full) ---

5937 result = -1;
5938 error = sysctl_handle_int(oidp, &result, 0, req);
5939
5940 if (error || !req->newptr)
5941 return (error);
5942
5943 if (result == 1) {
5944 sc = (struct bce_softc *)arg1;
6335 /* If link is up already up then we're done. */
6336 if (sc->bce_link)
6337 goto bce_tick_locked_exit;
6338
6339 mii = device_get_softc(sc->bce_miibus);
6340 mii_tick(mii);
6341
6342 /* Check if the link has come up. */

--- 115 unchanged lines hidden (view full) ---

6458 result = -1;
6459 error = sysctl_handle_int(oidp, &result, 0, req);
6460
6461 if (error || !req->newptr)
6462 return (error);
6463
6464 if (result == 1) {
6465 sc = (struct bce_softc *)arg1;
5945 bce_dump_rx_chain(sc, 0, sc->max_rx_bd);
6466 bce_dump_rx_chain(sc, 0, TOTAL_RX_BD);
5946 }
5947
5948 return error;
5949}
5950
5951
5952/****************************************************************************/
5953/* Provides a sysctl interface to allow dumping the TX chain. */

--- 19 unchanged lines hidden (view full) ---

5973 bce_dump_tx_chain(sc, 0, USABLE_TX_BD);
5974 }
5975
5976 return error;
5977}
5978
5979
5980/****************************************************************************/
6467 }
6468
6469 return error;
6470}
6471
6472
6473/****************************************************************************/
6474/* Provides a sysctl interface to allow dumping the TX chain. */

--- 19 unchanged lines hidden (view full) ---

6494 bce_dump_tx_chain(sc, 0, USABLE_TX_BD);
6495 }
6496
6497 return error;
6498}
6499
6500
6501/****************************************************************************/
6502/* Provides a sysctl interface to allow dumping the page chain. */
6503/* */
6504/* Returns: */
6505/* 0 for success, positive value for failure. */
6506/****************************************************************************/
6507static int
6508bce_sysctl_dump_pg_chain(SYSCTL_HANDLER_ARGS)
6509{
6510 int error;
6511 int result;
6512 struct bce_softc *sc;
6513
6514 result = -1;
6515 error = sysctl_handle_int(oidp, &result, 0, req);
6516
6517 if (error || !req->newptr)
6518 return (error);
6519
6520 if (result == 1) {
6521 sc = (struct bce_softc *)arg1;
6522 bce_dump_pg_chain(sc, 0, TOTAL_PG_BD);
6523 }
6524
6525 return error;
6526}
6527
6528
6529/****************************************************************************/
5981/* Provides a sysctl interface to allow reading arbitrary registers in the */
5982/* device. DO NOT ENABLE ON PRODUCTION SYSTEMS! */
5983/* */
5984/* Returns: */
5985/* 0 for success, positive value for failure. */
5986/****************************************************************************/
5987static int
5988bce_sysctl_reg_read(SYSCTL_HANDLER_ARGS)

--- 122 unchanged lines hidden (view full) ---

6111 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6112 "l2fhdr_status_errors",
6113 CTLFLAG_RD, &sc->l2fhdr_status_errors,
6114 0, "l2_fhdr status errors");
6115
6116 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6117 "unexpected_attentions",
6118 CTLFLAG_RD, &sc->unexpected_attentions,
6530/* Provides a sysctl interface to allow reading arbitrary registers in the */
6531/* device. DO NOT ENABLE ON PRODUCTION SYSTEMS! */
6532/* */
6533/* Returns: */
6534/* 0 for success, positive value for failure. */
6535/****************************************************************************/
6536static int
6537bce_sysctl_reg_read(SYSCTL_HANDLER_ARGS)

--- 122 unchanged lines hidden (view full) ---

6660 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6661 "l2fhdr_status_errors",
6662 CTLFLAG_RD, &sc->l2fhdr_status_errors,
6663 0, "l2_fhdr status errors");
6664
6665 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6666 "unexpected_attentions",
6667 CTLFLAG_RD, &sc->unexpected_attentions,
6119 0, "unexpected attentions");
6668 0, "Unexpected attentions");
6120
6121 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6122 "lost_status_block_updates",
6123 CTLFLAG_RD, &sc->lost_status_block_updates,
6669
6670 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6671 "lost_status_block_updates",
6672 CTLFLAG_RD, &sc->lost_status_block_updates,
6124 0, "lost status block updates");
6673 0, "Lost status block updates");
6125
6126 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6674
6675 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6127 "mbuf_sim_alloc_failed",
6128 CTLFLAG_RD, &sc->mbuf_sim_alloc_failed,
6129 0, "mbuf cluster simulated allocation failures");
6676 "debug_mbuf_sim_alloc_failed",
6677 CTLFLAG_RD, &sc->debug_mbuf_sim_alloc_failed,
6678 0, "Simulated mbuf cluster allocation failures");
6130
6131 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6132 "requested_tso_frames",
6133 CTLFLAG_RD, &sc->requested_tso_frames,
6679
6680 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6681 "requested_tso_frames",
6682 CTLFLAG_RD, &sc->requested_tso_frames,
6134 0, "The number of TSO frames received");
6683 0, "Number of TSO frames received");
6135
6684
6136 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6137 "rx_mbuf_segs[1]",
6138 CTLFLAG_RD, &sc->rx_mbuf_segs[1],
6139 0, "mbuf cluster with 1 segment");
6685 SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
6686 "rx_interrupts",
6687 CTLFLAG_RD, &sc->rx_interrupts,
6688 0, "Number of RX interrupts");
6140
6689
6141 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6142 "rx_mbuf_segs[2]",
6143 CTLFLAG_RD, &sc->rx_mbuf_segs[2],
6144 0, "mbuf cluster with 2 segments");
6690 SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
6691 "tx_interrupts",
6692 CTLFLAG_RD, &sc->tx_interrupts,
6693 0, "Number of TX interrupts");
6145
6694
6146 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6147 "rx_mbuf_segs[3]",
6148 CTLFLAG_RD, &sc->rx_mbuf_segs[3],
6149 0, "mbuf cluster with 3 segments");
6695 SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
6696 "rx_intr_time",
6697 CTLFLAG_RD, &sc->rx_intr_time,
6698 "RX interrupt time");
6150
6699
6151 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6152 "rx_mbuf_segs[4]",
6153 CTLFLAG_RD, &sc->rx_mbuf_segs[4],
6154 0, "mbuf cluster with 4 segments");
6700 SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
6701 "tx_intr_time",
6702 CTLFLAG_RD, &sc->tx_intr_time,
6703 "TX interrupt time");
6155
6704
6156 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6157 "rx_mbuf_segs[5]",
6158 CTLFLAG_RD, &sc->rx_mbuf_segs[5],
6159 0, "mbuf cluster with 5 segments");
6160
6161 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6162 "rx_mbuf_segs[6]",
6163 CTLFLAG_RD, &sc->rx_mbuf_segs[6],
6164 0, "mbuf cluster with 6 segments");
6165
6166 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6167 "rx_mbuf_segs[7]",
6168 CTLFLAG_RD, &sc->rx_mbuf_segs[7],
6169 0, "mbuf cluster with 7 segments");
6170
6171 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6172 "rx_mbuf_segs[8]",
6173 CTLFLAG_RD, &sc->rx_mbuf_segs[8],
6174 0, "mbuf cluster with 8 segments");
6175
6176#endif
6177
6178 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6179 "mbuf_alloc_failed",
6180 CTLFLAG_RD, &sc->mbuf_alloc_failed,
6181 0, "mbuf cluster allocation failures");
6182
6183 SYSCTL_ADD_INT(ctx, children, OID_AUTO,

--- 298 unchanged lines hidden (view full) ---

6482 bce_sysctl_dump_rx_chain, "I", "Dump rx_bd chain");
6483
6484 SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
6485 "dump_tx_chain", CTLTYPE_INT | CTLFLAG_RW,
6486 (void *)sc, 0,
6487 bce_sysctl_dump_tx_chain, "I", "Dump tx_bd chain");
6488
6489 SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
6705#endif
6706
6707 SYSCTL_ADD_INT(ctx, children, OID_AUTO,
6708 "mbuf_alloc_failed",
6709 CTLFLAG_RD, &sc->mbuf_alloc_failed,
6710 0, "mbuf cluster allocation failures");
6711
6712 SYSCTL_ADD_INT(ctx, children, OID_AUTO,

--- 298 unchanged lines hidden (view full) ---

7011 bce_sysctl_dump_rx_chain, "I", "Dump rx_bd chain");
7012
7013 SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
7014 "dump_tx_chain", CTLTYPE_INT | CTLFLAG_RW,
7015 (void *)sc, 0,
7016 bce_sysctl_dump_tx_chain, "I", "Dump tx_bd chain");
7017
7018 SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
7019 "dump_pg_chain", CTLTYPE_INT | CTLFLAG_RW,
7020 (void *)sc, 0,
7021 bce_sysctl_dump_pg_chain, "I", "Dump page chain");
7022
7023 SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
6490 "breakpoint", CTLTYPE_INT | CTLFLAG_RW,
6491 (void *)sc, 0,
6492 bce_sysctl_breakpoint, "I", "Driver breakpoint");
6493
6494 SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
6495 "reg_read", CTLTYPE_INT | CTLFLAG_RW,
6496 (void *)sc, 0,
6497 bce_sysctl_reg_read, "I", "Register read");

--- 51 unchanged lines hidden (view full) ---

6549/* Prints out information about an mbuf. */
6550/* */
6551/* Returns: */
6552/* Nothing. */
6553/****************************************************************************/
6554static void
6555bce_dump_mbuf(struct bce_softc *sc, struct mbuf *m)
6556{
7024 "breakpoint", CTLTYPE_INT | CTLFLAG_RW,
7025 (void *)sc, 0,
7026 bce_sysctl_breakpoint, "I", "Driver breakpoint");
7027
7028 SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
7029 "reg_read", CTLTYPE_INT | CTLFLAG_RW,
7030 (void *)sc, 0,
7031 bce_sysctl_reg_read, "I", "Register read");

--- 51 unchanged lines hidden (view full) ---

7083/* Prints out information about an mbuf. */
7084/* */
7085/* Returns: */
7086/* Nothing. */
7087/****************************************************************************/
7088static void
7089bce_dump_mbuf(struct bce_softc *sc, struct mbuf *m)
7090{
6557 u32 val_hi, val_lo;
6558 struct mbuf *mp = m;
6559
6560 if (m == NULL) {
6561 BCE_PRINTF("mbuf: null pointer\n");
6562 return;
6563 }
6564
6565 while (mp) {
7091 struct mbuf *mp = m;
7092
7093 if (m == NULL) {
7094 BCE_PRINTF("mbuf: null pointer\n");
7095 return;
7096 }
7097
7098 while (mp) {
6566 val_hi = BCE_ADDR_HI(mp);
6567 val_lo = BCE_ADDR_LO(mp);
6568 BCE_PRINTF("mbuf: vaddr = 0x%08X:%08X, m_len = %d, m_flags = ( ",
6569 val_hi, val_lo, mp->m_len);
7099 BCE_PRINTF("mbuf: %p, m_len = %d, m_flags = 0x%b, m_data = %p\n",
7100 mp, mp->m_len, mp->m_flags,
7101 "\20\1M_EXT\2M_PKTHDR\3M_EOR\4M_RDONLY",
7102 mp->m_data);
6570
7103
6571 if (mp->m_flags & M_EXT)
6572 printf("M_EXT ");
6573 if (mp->m_flags & M_PKTHDR)
6574 printf("M_PKTHDR ");
6575 if (mp->m_flags & M_EOR)
6576 printf("M_EOR ");
6577 if (mp->m_flags & M_RDONLY)
6578 printf("M_RDONLY ");
6579
6580 val_hi = BCE_ADDR_HI(mp->m_data);
6581 val_lo = BCE_ADDR_LO(mp->m_data);
6582 printf(") m_data = 0x%08X:%08X\n",
6583 val_hi, val_lo);
6584
6585 if (mp->m_flags & M_PKTHDR) {
7104 if (mp->m_flags & M_PKTHDR) {
6586 BCE_PRINTF("- m_pkthdr: flags = ( ");
6587 if (mp->m_flags & M_BCAST)
6588 printf("M_BCAST ");
6589 if (mp->m_flags & M_MCAST)
6590 printf("M_MCAST ");
6591 if (mp->m_flags & M_FRAG)
6592 printf("M_FRAG ");
6593 if (mp->m_flags & M_FIRSTFRAG)
6594 printf("M_FIRSTFRAG ");
6595 if (mp->m_flags & M_LASTFRAG)
6596 printf("M_LASTFRAG ");
6597 if (mp->m_flags & M_VLANTAG)
6598 printf("M_VLANTAG ");
6599 if (mp->m_flags & M_PROMISC)
6600 printf("M_PROMISC ");
6601 printf(") csum_flags = ( ");
6602 if (mp->m_pkthdr.csum_flags & CSUM_IP)
6603 printf("CSUM_IP ");
6604 if (mp->m_pkthdr.csum_flags & CSUM_TCP)
6605 printf("CSUM_TCP ");
6606 if (mp->m_pkthdr.csum_flags & CSUM_UDP)
6607 printf("CSUM_UDP ");
6608 if (mp->m_pkthdr.csum_flags & CSUM_IP_FRAGS)
6609 printf("CSUM_IP_FRAGS ");
6610 if (mp->m_pkthdr.csum_flags & CSUM_FRAGMENT)
6611 printf("CSUM_FRAGMENT ");
6612 if (mp->m_pkthdr.csum_flags & CSUM_TSO)
6613 printf("CSUM_TSO ");
6614 if (mp->m_pkthdr.csum_flags & CSUM_IP_CHECKED)
6615 printf("CSUM_IP_CHECKED ");
6616 if (mp->m_pkthdr.csum_flags & CSUM_IP_VALID)
6617 printf("CSUM_IP_VALID ");
6618 if (mp->m_pkthdr.csum_flags & CSUM_DATA_VALID)
6619 printf("CSUM_DATA_VALID ");
6620 printf(")\n");
7105 BCE_PRINTF("- m_pkthdr: len = %d, flags = 0x%b, csum_flags = %b\n",
7106 mp->m_pkthdr.len, mp->m_flags,
7107 "\20\12M_BCAST\13M_MCAST\14M_FRAG\15M_FIRSTFRAG"
7108 "\16M_LASTFRAG\21M_VLANTAG\22M_PROMISC\23M_NOFREE",
7109 mp->m_pkthdr.csum_flags,
7110 "\20\1CSUM_IP\2CSUM_TCP\3CSUM_UDP\4CSUM_IP_FRAGS"
7111 "\5CSUM_FRAGMENT\6CSUM_TSO\11CSUM_IP_CHECKED"
7112 "\12CSUM_IP_VALID\13CSUM_DATA_VALID\14CSUM_PSEUDO_HDR");
6621 }
6622
6623 if (mp->m_flags & M_EXT) {
7113 }
7114
7115 if (mp->m_flags & M_EXT) {
6624 val_hi = BCE_ADDR_HI(mp->m_ext.ext_buf);
6625 val_lo = BCE_ADDR_LO(mp->m_ext.ext_buf);
6626 BCE_PRINTF("- m_ext: vaddr = 0x%08X:%08X, ext_size = %d, type = ",
6627 val_hi, val_lo, mp->m_ext.ext_size);
7116 BCE_PRINTF("- m_ext: %p, ext_size = %d, type = ",
7117 mp->m_ext.ext_buf, mp->m_ext.ext_size);
6628 switch (mp->m_ext.ext_type) {
6629 case EXT_CLUSTER: printf("EXT_CLUSTER\n"); break;
6630 case EXT_SFBUF: printf("EXT_SFBUF\n"); break;
6631 case EXT_JUMBO9: printf("EXT_JUMBO9\n"); break;
6632 case EXT_JUMBO16: printf("EXT_JUMBO16\n"); break;
6633 case EXT_PACKET: printf("EXT_PACKET\n"); break;
6634 case EXT_MBUF: printf("EXT_MBUF\n"); break;
6635 case EXT_NET_DRV: printf("EXT_NET_DRV\n"); break;

--- 11 unchanged lines hidden (view full) ---

6647
6648/****************************************************************************/
6649/* Prints out the mbufs in the TX mbuf chain. */
6650/* */
6651/* Returns: */
6652/* Nothing. */
6653/****************************************************************************/
6654static void
7118 switch (mp->m_ext.ext_type) {
7119 case EXT_CLUSTER: printf("EXT_CLUSTER\n"); break;
7120 case EXT_SFBUF: printf("EXT_SFBUF\n"); break;
7121 case EXT_JUMBO9: printf("EXT_JUMBO9\n"); break;
7122 case EXT_JUMBO16: printf("EXT_JUMBO16\n"); break;
7123 case EXT_PACKET: printf("EXT_PACKET\n"); break;
7124 case EXT_MBUF: printf("EXT_MBUF\n"); break;
7125 case EXT_NET_DRV: printf("EXT_NET_DRV\n"); break;

--- 11 unchanged lines hidden (view full) ---

7137
7138/****************************************************************************/
7139/* Prints out the mbufs in the TX mbuf chain. */
7140/* */
7141/* Returns: */
7142/* Nothing. */
7143/****************************************************************************/
7144static void
6655bce_dump_tx_mbuf_chain(struct bce_softc *sc, int chain_prod, int count)
7145bce_dump_tx_mbuf_chain(struct bce_softc *sc, u16 chain_prod, int count)
6656{
6657 struct mbuf *m;
6658
6659 BCE_PRINTF(
6660 "----------------------------"
6661 " tx mbuf data "
6662 "----------------------------\n");
6663
6664 for (int i = 0; i < count; i++) {
6665 m = sc->tx_mbuf_ptr[chain_prod];
7146{
7147 struct mbuf *m;
7148
7149 BCE_PRINTF(
7150 "----------------------------"
7151 " tx mbuf data "
7152 "----------------------------\n");
7153
7154 for (int i = 0; i < count; i++) {
7155 m = sc->tx_mbuf_ptr[chain_prod];
6666 BCE_PRINTF("txmbuf[%d]\n", chain_prod);
7156 BCE_PRINTF("txmbuf[0x%04X]\n", chain_prod);
6667 bce_dump_mbuf(sc, m);
6668 chain_prod = TX_CHAIN_IDX(NEXT_TX_BD(chain_prod));
6669 }
6670
6671 BCE_PRINTF(
6672 "----------------------------"
6673 "----------------"
6674 "----------------------------\n");
6675}
6676
6677
6678/****************************************************************************/
6679/* Prints out the mbufs in the RX mbuf chain. */
6680/* */
6681/* Returns: */
6682/* Nothing. */
6683/****************************************************************************/
6684static void
7157 bce_dump_mbuf(sc, m);
7158 chain_prod = TX_CHAIN_IDX(NEXT_TX_BD(chain_prod));
7159 }
7160
7161 BCE_PRINTF(
7162 "----------------------------"
7163 "----------------"
7164 "----------------------------\n");
7165}
7166
7167
7168/****************************************************************************/
7169/* Prints out the mbufs in the RX mbuf chain. */
7170/* */
7171/* Returns: */
7172/* Nothing. */
7173/****************************************************************************/
7174static void
6685bce_dump_rx_mbuf_chain(struct bce_softc *sc, int chain_prod, int count)
7175bce_dump_rx_mbuf_chain(struct bce_softc *sc, u16 chain_prod, int count)
6686{
6687 struct mbuf *m;
6688
6689 BCE_PRINTF(
6690 "----------------------------"
6691 " rx mbuf data "
6692 "----------------------------\n");
6693

--- 8 unchanged lines hidden (view full) ---

6702 BCE_PRINTF(
6703 "----------------------------"
6704 "----------------"
6705 "----------------------------\n");
6706}
6707
6708
6709/****************************************************************************/
7176{
7177 struct mbuf *m;
7178
7179 BCE_PRINTF(
7180 "----------------------------"
7181 " rx mbuf data "
7182 "----------------------------\n");
7183

--- 8 unchanged lines hidden (view full) ---

7192 BCE_PRINTF(
7193 "----------------------------"
7194 "----------------"
7195 "----------------------------\n");
7196}
7197
7198
7199/****************************************************************************/
7200/* Prints out the mbufs in the mbuf page chain. */
7201/* */
7202/* Returns: */
7203/* Nothing. */
7204/****************************************************************************/
7205static void
7206bce_dump_pg_mbuf_chain(struct bce_softc *sc, u16 chain_prod, int count)
7207{
7208 struct mbuf *m;
7209
7210 BCE_PRINTF(
7211 "----------------------------"
7212 " pg mbuf data "
7213 "----------------------------\n");
7214
7215 for (int i = 0; i < count; i++) {
7216 m = sc->pg_mbuf_ptr[chain_prod];
7217 BCE_PRINTF("pgmbuf[0x%04X]\n", chain_prod);
7218 bce_dump_mbuf(sc, m);
7219 chain_prod = PG_CHAIN_IDX(NEXT_PG_BD(chain_prod));
7220 }
7221
7222
7223 BCE_PRINTF(
7224 "----------------------------"
7225 "----------------"
7226 "----------------------------\n");
7227}
7228
7229
7230/****************************************************************************/
6710/* Prints out a tx_bd structure. */
6711/* */
6712/* Returns: */
6713/* Nothing. */
6714/****************************************************************************/
6715static void
6716bce_dump_txbd(struct bce_softc *sc, int idx, struct tx_bd *txbd)
6717{

--- 62 unchanged lines hidden (view full) ---

6780/****************************************************************************/
6781static void
6782bce_dump_rxbd(struct bce_softc *sc, int idx, struct rx_bd *rxbd)
6783{
6784 if (idx > MAX_RX_BD)
6785 /* Index out of range. */
6786 BCE_PRINTF("rx_bd[0x%04X]: Invalid rx_bd index!\n", idx);
6787 else if ((idx & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE)
7231/* Prints out a tx_bd structure. */
7232/* */
7233/* Returns: */
7234/* Nothing. */
7235/****************************************************************************/
7236static void
7237bce_dump_txbd(struct bce_softc *sc, int idx, struct tx_bd *txbd)
7238{

--- 62 unchanged lines hidden (view full) ---

7301/****************************************************************************/
7302static void
7303bce_dump_rxbd(struct bce_softc *sc, int idx, struct rx_bd *rxbd)
7304{
7305 if (idx > MAX_RX_BD)
7306 /* Index out of range. */
7307 BCE_PRINTF("rx_bd[0x%04X]: Invalid rx_bd index!\n", idx);
7308 else if ((idx & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE)
6788 /* TX Chain page pointer. */
7309 /* RX Chain page pointer. */
6789 BCE_PRINTF("rx_bd[0x%04X]: haddr = 0x%08X:%08X, chain page pointer\n",
6790 idx, rxbd->rx_bd_haddr_hi, rxbd->rx_bd_haddr_lo);
6791 else
7310 BCE_PRINTF("rx_bd[0x%04X]: haddr = 0x%08X:%08X, chain page pointer\n",
7311 idx, rxbd->rx_bd_haddr_hi, rxbd->rx_bd_haddr_lo);
7312 else
6792 /* Normal tx_bd entry. */
7313 /* Normal rx_bd entry. */
6793 BCE_PRINTF("rx_bd[0x%04X]: haddr = 0x%08X:%08X, nbytes = 0x%08X, "
6794 "flags = 0x%08X\n", idx,
6795 rxbd->rx_bd_haddr_hi, rxbd->rx_bd_haddr_lo,
6796 rxbd->rx_bd_len, rxbd->rx_bd_flags);
6797}
6798
6799
6800/****************************************************************************/
7314 BCE_PRINTF("rx_bd[0x%04X]: haddr = 0x%08X:%08X, nbytes = 0x%08X, "
7315 "flags = 0x%08X\n", idx,
7316 rxbd->rx_bd_haddr_hi, rxbd->rx_bd_haddr_lo,
7317 rxbd->rx_bd_len, rxbd->rx_bd_flags);
7318}
7319
7320
7321/****************************************************************************/
7322/* Prints out a rx_bd structure in the page chain. */
7323/* */
7324/* Returns: */
7325/* Nothing. */
7326/****************************************************************************/
7327static void
7328bce_dump_pgbd(struct bce_softc *sc, int idx, struct rx_bd *pgbd)
7329{
7330 if (idx > MAX_PG_BD)
7331 /* Index out of range. */
7332 BCE_PRINTF("pg_bd[0x%04X]: Invalid pg_bd index!\n", idx);
7333 else if ((idx & USABLE_PG_BD_PER_PAGE) == USABLE_PG_BD_PER_PAGE)
7334 /* Page Chain page pointer. */
7335 BCE_PRINTF("px_bd[0x%04X]: haddr = 0x%08X:%08X, chain page pointer\n",
7336 idx, pgbd->rx_bd_haddr_hi, pgbd->rx_bd_haddr_lo);
7337 else
7338 /* Normal rx_bd entry. */
7339 BCE_PRINTF("pg_bd[0x%04X]: haddr = 0x%08X:%08X, nbytes = 0x%08X, "
7340 "flags = 0x%08X\n", idx,
7341 pgbd->rx_bd_haddr_hi, pgbd->rx_bd_haddr_lo,
7342 pgbd->rx_bd_len, pgbd->rx_bd_flags);
7343}
7344
7345
7346/****************************************************************************/
6801/* Prints out a l2_fhdr structure. */
6802/* */
6803/* Returns: */
6804/* Nothing. */
6805/****************************************************************************/
6806static void
6807bce_dump_l2fhdr(struct bce_softc *sc, int idx, struct l2_fhdr *l2fhdr)
6808{
7347/* Prints out a l2_fhdr structure. */
7348/* */
7349/* Returns: */
7350/* Nothing. */
7351/****************************************************************************/
7352static void
7353bce_dump_l2fhdr(struct bce_softc *sc, int idx, struct l2_fhdr *l2fhdr)
7354{
6809 BCE_PRINTF("l2_fhdr[0x%04X]: status = 0x%08X, "
6810 "pkt_len = 0x%04X, vlan = 0x%04x, ip_xsum = 0x%04X, "
7355 BCE_PRINTF("l2_fhdr[0x%04X]: status = 0x%b, "
7356 "pkt_len = %d, vlan = 0x%04x, ip_xsum/hdr_len = 0x%04X, "
6811 "tcp_udp_xsum = 0x%04X\n", idx,
7357 "tcp_udp_xsum = 0x%04X\n", idx,
6812 l2fhdr->l2_fhdr_status, l2fhdr->l2_fhdr_pkt_len,
6813 l2fhdr->l2_fhdr_vlan_tag, l2fhdr->l2_fhdr_ip_xsum,
6814 l2fhdr->l2_fhdr_tcp_udp_xsum);
7358 l2fhdr->l2_fhdr_status, BCE_L2FHDR_PRINTFB,
7359 l2fhdr->l2_fhdr_pkt_len, l2fhdr->l2_fhdr_vlan_tag,
7360 l2fhdr->l2_fhdr_ip_xsum, l2fhdr->l2_fhdr_tcp_udp_xsum);
6815}
6816
6817
6818/****************************************************************************/
7361}
7362
7363
7364/****************************************************************************/
7365/* Prints out the L2 context memory. (Only useful for CID 0 to 15. ) */
7366/* */
7367/* Returns: */
7368/* Nothing. */
7369/****************************************************************************/
7370static void
7371bce_dump_ctx(struct bce_softc *sc, u16 cid)
7372{
7373 if (cid < TX_CID) {
7374 BCE_PRINTF(
7375 "----------------------------"
7376 " CTX Data "
7377 "----------------------------\n");
7378
7379 BCE_PRINTF(" 0x%04X - (CID) Context ID\n", cid);
7380 BCE_PRINTF(" 0x%08X - (L2CTX_HOST_BDIDX) host rx producer index\n",
7381 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_HOST_BDIDX));
7382 BCE_PRINTF(" 0x%08X - (L2CTX_HOST_BSEQ) host byte sequence\n",
7383 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_HOST_BSEQ));
7384 BCE_PRINTF(" 0x%08X - (L2CTX_NX_BSEQ) h/w byte sequence\n",
7385 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_NX_BSEQ));
7386 BCE_PRINTF(" 0x%08X - (L2CTX_NX_BDHADDR_HI) h/w buffer descriptor address\n",
7387 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_NX_BDHADDR_HI));
7388 BCE_PRINTF(" 0x%08X - (L2CTX_NX_BDHADDR_LO) h/w buffer descriptor address\n",
7389 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_NX_BDHADDR_LO));
7390 BCE_PRINTF(" 0x%08X - (L2CTX_NX_BDIDX) h/w rx consumer index\n",
7391 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_NX_BDIDX));
7392 BCE_PRINTF(" 0x%08X - (L2CTX_HOST_PG_BDIDX) host page producer index\n",
7393 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_HOST_PG_BDIDX));
7394 BCE_PRINTF(" 0x%08X - (L2CTX_PG_BUF_SIZE) host rx_bd/page buffer size\n",
7395 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_PG_BUF_SIZE));
7396 BCE_PRINTF(" 0x%08X - (L2CTX_NX_PG_BDHADDR_HI) h/w page chain address\n",
7397 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_NX_PG_BDHADDR_HI));
7398 BCE_PRINTF(" 0x%08X - (L2CTX_NX_PG_BDHADDR_LO) h/w page chain address\n",
7399 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_NX_PG_BDHADDR_LO));
7400 BCE_PRINTF(" 0x%08X - (L2CTX_NX_PG_BDIDX) h/w page consumer index\n",
7401 CTX_RD(sc, GET_CID_ADDR(cid), BCE_L2CTX_NX_PG_BDIDX));
7402
7403 BCE_PRINTF(
7404 "----------------------------"
7405 "----------------"
7406 "----------------------------\n");
7407 }
7408}
7409
7410
7411/****************************************************************************/
7412/* Prints out the FTQ data. */
7413/* */
7414/* Returns: */
7415/* Nothing. */
7416/****************************************************************************/
7417static void
7418bce_dump_ftqs(struct bce_softc *sc)
7419{
7420 u32 cmd, ctl, cur_depth, max_depth, valid_cnt;
7421
7422 BCE_PRINTF(
7423 "----------------------------"
7424 " FTQ Data "
7425 "----------------------------\n");
7426
7427 BCE_PRINTF(" FTQ Command Control Depth_Now Max_Depth Valid_Cnt\n");
7428 BCE_PRINTF(" ----- ---------- ---------- ---------- ---------- ----------\n");
7429
7430 /* Setup the generic statistic counters for the FTQ valid count. */
7431 REG_WR(sc, BCE_HC_STAT_GEN_SEL_0,
7432 ((BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PPQ_VALID_CNT << 24) |
7433 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPCQ_VALID_CNT << 16) |
7434 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPQ_VALID_CNT << 8) |
7435 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUPQ_VALID_CNT)));
7436 REG_WR(sc, BCE_HC_STAT_GEN_SEL_1,
7437 ((BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCHQ_VALID_CNT << 24) |
7438 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMAQ_VALID_CNT << 16) |
7439 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PTQ_VALID_CNT << 8) |
7440 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PMQ_VALID_CNT)));
7441 REG_WR(sc, BCE_HC_STAT_GEN_SEL_2,
7442 ((BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPATQ_VALID_CNT << 24) |
7443 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMAQ_VALID_CNT << 16) |
7444 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXPQ_VALID_CNT << 8) |
7445 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDRQ_VALID_CNT)));
7446 REG_WR(sc, BCE_HC_STAT_GEN_SEL_3,
7447 ((BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMQ_VALID_CNT << 24) |
7448 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMTQ_VALID_CNT << 16) |
7449 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMXQ_VALID_CNT << 8) |
7450 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TASQ_VALID_CNT)));
7451
7452 cmd = REG_RD(sc, 0x23f8); /* RLUP_FTQ_CMD */
7453 ctl = REG_RD(sc, 0x23fc); /* RLUP_FTQ_CTL */
7454 cur_depth = (ctl & 0xFFC00000) >> 22;
7455 max_depth = (ctl & 0x003FF000) >> 12;
7456 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT0);
7457 BCE_PRINTF(" RLUP 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7458 cmd, ctl, cur_depth, max_depth, valid_cnt);
7459
7460 cmd = REG_RD_IND(sc, 0xc53f8); /* RXP_FTQ_CMD */
7461 ctl = REG_RD_IND(sc, 0xc53fc); /* RXP_FTQ_CTL */
7462 cur_depth = (ctl & 0xFFC00000) >> 22;
7463 max_depth = (ctl & 0x003FF000) >> 12;
7464 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT1);
7465 BCE_PRINTF(" RXP 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7466 cmd, ctl, cur_depth, max_depth, valid_cnt);
7467
7468 cmd = REG_RD_IND(sc, 0xc53b8); /* RXP_CFTQ_CMD */
7469 ctl = REG_RD_IND(sc, 0xc53bc); /* RXP_CFTQ_CTL */
7470 cur_depth = (ctl & 0xFFC00000) >> 22;
7471 max_depth = (ctl & 0x003FF000) >> 12;
7472 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT2);
7473 BCE_PRINTF(" RXPC 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7474 cmd, ctl, cur_depth, max_depth, valid_cnt);
7475
7476 cmd = REG_RD(sc, 0x2b78); /* RV2P_PFTQ_CMD */
7477 ctl = REG_RD(sc, 0x2b7c); /* RV2P_PFTQ_CTL */
7478 cur_depth = (ctl & 0xFFC00000) >> 22;
7479 max_depth = (ctl & 0x003FF000) >> 12;
7480 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT3);
7481 BCE_PRINTF(" RV2PP 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7482 cmd, ctl, cur_depth, max_depth, valid_cnt);
7483
7484 cmd = REG_RD(sc, 0x2bf8); /* RV2P_MFTQ_CMD */
7485 ctl = REG_RD(sc, 0x2bfc); /* RV2P_MFTQ_CTL */
7486 cur_depth = (ctl & 0xFFC00000) >> 22;
7487 max_depth = (ctl & 0x003FF000) >> 12;
7488 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT4);
7489 BCE_PRINTF(" RV2PM 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7490 cmd, ctl, cur_depth, max_depth, valid_cnt);
7491
7492 cmd = REG_RD(sc, 0x2bb8); /* RV2P_TFTQ_CMD */
7493 ctl = REG_RD(sc, 0x2bbc); /* RV2P_TFTQ_CTL */
7494 cur_depth = (ctl & 0xFFC00000) >> 22;
7495 max_depth = (ctl & 0x003FF000) >> 12;
7496 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT5);
7497 BCE_PRINTF(" RV2PT 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7498 cmd, ctl, cur_depth, max_depth, valid_cnt);
7499
7500 cmd = REG_RD(sc, 0x2ff8); /* RDMA_FTQ_CMD */
7501 ctl = REG_RD(sc, 0x2ffc); /* RDMA_FTQ_CTL */
7502 cur_depth = (ctl & 0xFFC00000) >> 22;
7503 max_depth = (ctl & 0x003FF000) >> 12;
7504 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT6);
7505 BCE_PRINTF(" RDMA 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7506 cmd, ctl, cur_depth, max_depth, valid_cnt);
7507
7508 cmd = REG_RD(sc, 0x4ff8); /* TSCH_FTQ_CMD */
7509 ctl = REG_RD(sc, 0x4ffc); /* TSCH_FTQ_CTL */
7510 cur_depth = (ctl & 0xFFC00000) >> 22;
7511 max_depth = (ctl & 0x003FF000) >> 12;
7512 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT7);
7513 BCE_PRINTF(" TSCH 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7514 cmd, ctl, cur_depth, max_depth, valid_cnt);
7515
7516 cmd = REG_RD(sc, 0x53f8); /* TBDR_FTQ_CMD */
7517 ctl = REG_RD(sc, 0x53fc); /* TBDR_FTQ_CTL */
7518 cur_depth = (ctl & 0xFFC00000) >> 22;
7519 max_depth = (ctl & 0x003FF000) >> 12;
7520 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT8);
7521 BCE_PRINTF(" TBDR 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7522 cmd, ctl, cur_depth, max_depth, valid_cnt);
7523
7524 cmd = REG_RD_IND(sc, 0x453f8); /* TXP_FTQ_CMD */
7525 ctl = REG_RD_IND(sc, 0x453fc); /* TXP_FTQ_CTL */
7526 cur_depth = (ctl & 0xFFC00000) >> 22;
7527 max_depth = (ctl & 0x003FF000) >> 12;
7528 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT9);
7529 BCE_PRINTF(" TXP 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7530 cmd, ctl, cur_depth, max_depth, valid_cnt);
7531
7532 cmd = REG_RD(sc, 0x5ff8); /* TDMA_FTQ_CMD */
7533 ctl = REG_RD(sc, 0x5ffc); /* TDMA_FTQ_CTL */
7534 cur_depth = (ctl & 0xFFC00000) >> 22;
7535 max_depth = (ctl & 0x003FF000) >> 12;
7536 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT10);
7537 BCE_PRINTF(" TDMA 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7538 cmd, ctl, cur_depth, max_depth, valid_cnt);
7539
7540 cmd = REG_RD_IND(sc, 0x853f8); /* TPAT_FTQ_CMD */
7541 ctl = REG_RD_IND(sc, 0x853fc); /* TPAT_FTQ_CTL */
7542 cur_depth = (ctl & 0xFFC00000) >> 22;
7543 max_depth = (ctl & 0x003FF000) >> 12;
7544 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT11);
7545 BCE_PRINTF(" TPAT 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7546 cmd, ctl, cur_depth, max_depth, valid_cnt);
7547
7548 cmd = REG_RD_IND(sc, 0x1c03f8); /* TAS_FTQ_CMD */
7549 ctl = REG_RD_IND(sc, 0x1c03fc); /* TAS_FTQ_CTL */
7550 cur_depth = (ctl & 0xFFC00000) >> 22;
7551 max_depth = (ctl & 0x003FF000) >> 12;
7552 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT12);
7553 BCE_PRINTF(" TAS 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7554 cmd, ctl, cur_depth, max_depth, valid_cnt);
7555
7556 cmd = REG_RD_IND(sc, 0x105378); /* COM_COMXQ_FTQ_CMD */
7557 ctl = REG_RD_IND(sc, 0x10537c); /* COM_COMXQ_FTQ_CTL */
7558 cur_depth = (ctl & 0xFFC00000) >> 22;
7559 max_depth = (ctl & 0x003FF000) >> 12;
7560 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT13);
7561 BCE_PRINTF(" COMX 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7562 cmd, ctl, cur_depth, max_depth, valid_cnt);
7563
7564 cmd = REG_RD_IND(sc, 0x1053b8); /* COM_COMTQ_FTQ_CMD */
7565 ctl = REG_RD_IND(sc, 0x1053bc); /* COM_COMTQ_FTQ_CTL */
7566 cur_depth = (ctl & 0xFFC00000) >> 22;
7567 max_depth = (ctl & 0x003FF000) >> 12;
7568 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT14);
7569 BCE_PRINTF(" COMT 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7570 cmd, ctl, cur_depth, max_depth, valid_cnt);
7571
7572 cmd = REG_RD_IND(sc, 0x1053f8); /* COM_COMQ_FTQ_CMD */
7573 ctl = REG_RD_IND(sc, 0x1053fc); /* COM_COMQ_FTQ_CTL */
7574 cur_depth = (ctl & 0xFFC00000) >> 22;
7575 max_depth = (ctl & 0x003FF000) >> 12;
7576 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT15);
7577 BCE_PRINTF(" COMX 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7578 cmd, ctl, cur_depth, max_depth, valid_cnt);
7579
7580 /* Setup the generic statistic counters for the FTQ valid count. */
7581 REG_WR(sc, BCE_HC_STAT_GEN_SEL_0,
7582 ((BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSQ_VALID_CNT << 16) |
7583 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CPQ_VALID_CNT << 8) |
7584 (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MGMQ_VALID_CNT)));
7585
7586 cmd = REG_RD_IND(sc, 0x1453f8); /* MCP_MCPQ_FTQ_CMD */
7587 ctl = REG_RD_IND(sc, 0x1453fc); /* MCP_MCPQ_FTQ_CTL */
7588 cur_depth = (ctl & 0xFFC00000) >> 22;
7589 max_depth = (ctl & 0x003FF000) >> 12;
7590 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT0);
7591 BCE_PRINTF(" MCP 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7592 cmd, ctl, cur_depth, max_depth, valid_cnt);
7593
7594 cmd = REG_RD_IND(sc, 0x1853f8); /* CP_CPQ_FTQ_CMD */
7595 ctl = REG_RD_IND(sc, 0x1853fc); /* CP_CPQ_FTQ_CTL */
7596 cur_depth = (ctl & 0xFFC00000) >> 22;
7597 max_depth = (ctl & 0x003FF000) >> 12;
7598 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT1);
7599 BCE_PRINTF(" CP 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7600 cmd, ctl, cur_depth, max_depth, valid_cnt);
7601
7602 cmd = REG_RD(sc, 0x43f8); /* CSCH_CH_FTQ_CMD */
7603 ctl = REG_RD(sc, 0x43fc); /* CSCH_CH_FTQ_CTL */
7604 cur_depth = (ctl & 0xFFC00000) >> 22;
7605 max_depth = (ctl & 0x003FF000) >> 12;
7606 valid_cnt = REG_RD(sc, BCE_HC_STAT_GEN_STAT2);
7607 BCE_PRINTF(" CS 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",
7608 cmd, ctl, cur_depth, max_depth, valid_cnt);
7609
7610 BCE_PRINTF(
7611 "----------------------------"
7612 "----------------"
7613 "----------------------------\n");
7614}
7615
7616
7617/****************************************************************************/
6819/* Prints out the TX chain. */
6820/* */
6821/* Returns: */
6822/* Nothing. */
6823/****************************************************************************/
6824static void
7618/* Prints out the TX chain. */
7619/* */
7620/* Returns: */
7621/* Nothing. */
7622/****************************************************************************/
7623static void
6825bce_dump_tx_chain(struct bce_softc *sc, int tx_prod, int count)
7624bce_dump_tx_chain(struct bce_softc *sc, u16 tx_prod, int count)
6826{
6827 struct tx_bd *txbd;
6828
6829 /* First some info about the tx_bd chain structure. */
6830 BCE_PRINTF(
6831 "----------------------------"
6832 " tx_bd chain "
6833 "----------------------------\n");

--- 10 unchanged lines hidden (view full) ---

6844 "----------------------------"
6845 " tx_bd data "
6846 "----------------------------\n");
6847
6848 /* Now print out the tx_bd's themselves. */
6849 for (int i = 0; i < count; i++) {
6850 txbd = &sc->tx_bd_chain[TX_PAGE(tx_prod)][TX_IDX(tx_prod)];
6851 bce_dump_txbd(sc, tx_prod, txbd);
7625{
7626 struct tx_bd *txbd;
7627
7628 /* First some info about the tx_bd chain structure. */
7629 BCE_PRINTF(
7630 "----------------------------"
7631 " tx_bd chain "
7632 "----------------------------\n");

--- 10 unchanged lines hidden (view full) ---

7643 "----------------------------"
7644 " tx_bd data "
7645 "----------------------------\n");
7646
7647 /* Now print out the tx_bd's themselves. */
7648 for (int i = 0; i < count; i++) {
7649 txbd = &sc->tx_bd_chain[TX_PAGE(tx_prod)][TX_IDX(tx_prod)];
7650 bce_dump_txbd(sc, tx_prod, txbd);
6852 tx_prod = TX_CHAIN_IDX(NEXT_TX_BD(tx_prod));
7651 tx_prod = NEXT_TX_BD(tx_prod);
6853 }
6854
6855 BCE_PRINTF(
6856 "----------------------------"
6857 "----------------"
6858 "----------------------------\n");
6859}
6860
6861
6862/****************************************************************************/
6863/* Prints out the RX chain. */
6864/* */
6865/* Returns: */
6866/* Nothing. */
6867/****************************************************************************/
6868static void
7652 }
7653
7654 BCE_PRINTF(
7655 "----------------------------"
7656 "----------------"
7657 "----------------------------\n");
7658}
7659
7660
7661/****************************************************************************/
7662/* Prints out the RX chain. */
7663/* */
7664/* Returns: */
7665/* Nothing. */
7666/****************************************************************************/
7667static void
6869bce_dump_rx_chain(struct bce_softc *sc, int rx_prod, int count)
7668bce_dump_rx_chain(struct bce_softc *sc, u16 rx_prod, int count)
6870{
6871 struct rx_bd *rxbd;
6872
7669{
7670 struct rx_bd *rxbd;
7671
6873 /* First some info about the tx_bd chain structure. */
7672 /* First some info about the rx_bd chain structure. */
6874 BCE_PRINTF(
6875 "----------------------------"
6876 " rx_bd chain "
6877 "----------------------------\n");
6878
6879 BCE_PRINTF("page size = 0x%08X, rx chain pages = 0x%08X\n",
6880 (u32) BCM_PAGE_SIZE, (u32) RX_PAGES);
6881

--- 6 unchanged lines hidden (view full) ---

6888 "----------------------------"
6889 " rx_bd data "
6890 "----------------------------\n");
6891
6892 /* Now print out the rx_bd's themselves. */
6893 for (int i = 0; i < count; i++) {
6894 rxbd = &sc->rx_bd_chain[RX_PAGE(rx_prod)][RX_IDX(rx_prod)];
6895 bce_dump_rxbd(sc, rx_prod, rxbd);
7673 BCE_PRINTF(
7674 "----------------------------"
7675 " rx_bd chain "
7676 "----------------------------\n");
7677
7678 BCE_PRINTF("page size = 0x%08X, rx chain pages = 0x%08X\n",
7679 (u32) BCM_PAGE_SIZE, (u32) RX_PAGES);
7680

--- 6 unchanged lines hidden (view full) ---

7687 "----------------------------"
7688 " rx_bd data "
7689 "----------------------------\n");
7690
7691 /* Now print out the rx_bd's themselves. */
7692 for (int i = 0; i < count; i++) {
7693 rxbd = &sc->rx_bd_chain[RX_PAGE(rx_prod)][RX_IDX(rx_prod)];
7694 bce_dump_rxbd(sc, rx_prod, rxbd);
6896 rx_prod = RX_CHAIN_IDX(NEXT_RX_BD(rx_prod));
7695 rx_prod = RX_CHAIN_IDX(rx_prod + 1);
6897 }
6898
6899 BCE_PRINTF(
6900 "----------------------------"
6901 "----------------"
6902 "----------------------------\n");
6903}
6904
6905
6906/****************************************************************************/
7696 }
7697
7698 BCE_PRINTF(
7699 "----------------------------"
7700 "----------------"
7701 "----------------------------\n");
7702}
7703
7704
7705/****************************************************************************/
7706/* Prints out the page chain. */
7707/* */
7708/* Returns: */
7709/* Nothing. */
7710/****************************************************************************/
7711static void
7712bce_dump_pg_chain(struct bce_softc *sc, u16 pg_prod, int count)
7713{
7714 struct rx_bd *pgbd;
7715
7716 /* First some info about the page chain structure. */
7717 BCE_PRINTF(
7718 "----------------------------"
7719 " page chain "
7720 "----------------------------\n");
7721
7722 BCE_PRINTF("page size = 0x%08X, pg chain pages = 0x%08X\n",
7723 (u32) BCM_PAGE_SIZE, (u32) PG_PAGES);
7724
7725 BCE_PRINTF("rx_bd per page = 0x%08X, usable rx_bd per page = 0x%08X\n",
7726 (u32) TOTAL_PG_BD_PER_PAGE, (u32) USABLE_PG_BD_PER_PAGE);
7727
7728 BCE_PRINTF("total rx_bd = 0x%08X, max_pg_bd = 0x%08X\n",
7729 (u32) TOTAL_PG_BD, (u32) MAX_PG_BD);
7730
7731 BCE_PRINTF(
7732 "----------------------------"
7733 " page data "
7734 "----------------------------\n");
7735
7736 /* Now print out the rx_bd's themselves. */
7737 for (int i = 0; i < count; i++) {
7738 pgbd = &sc->pg_bd_chain[PG_PAGE(pg_prod)][PG_IDX(pg_prod)];
7739 bce_dump_pgbd(sc, pg_prod, pgbd);
7740 pg_prod = PG_CHAIN_IDX(pg_prod + 1);
7741 }
7742
7743 BCE_PRINTF(
7744 "----------------------------"
7745 "----------------"
7746 "----------------------------\n");
7747}
7748
7749
7750/****************************************************************************/
6907/* Prints out the status block from host memory. */
6908/* */
6909/* Returns: */
6910/* Nothing. */
6911/****************************************************************************/
6912static void
6913bce_dump_status_block(struct bce_softc *sc)
6914{

--- 417 unchanged lines hidden (view full) ---

7332 val_hi, val_lo);
7333
7334 val_hi = BCE_ADDR_HI(sc->rx_bd_chain);
7335 val_lo = BCE_ADDR_LO(sc->rx_bd_chain);
7336 BCE_PRINTF(
7337 "0x%08X:%08X - (sc->rx_bd_chain) rx_bd chain virtual address\n",
7338 val_hi, val_lo);
7339
7751/* Prints out the status block from host memory. */
7752/* */
7753/* Returns: */
7754/* Nothing. */
7755/****************************************************************************/
7756static void
7757bce_dump_status_block(struct bce_softc *sc)
7758{

--- 417 unchanged lines hidden (view full) ---

8176 val_hi, val_lo);
8177
8178 val_hi = BCE_ADDR_HI(sc->rx_bd_chain);
8179 val_lo = BCE_ADDR_LO(sc->rx_bd_chain);
8180 BCE_PRINTF(
8181 "0x%08X:%08X - (sc->rx_bd_chain) rx_bd chain virtual address\n",
8182 val_hi, val_lo);
8183
8184 val_hi = BCE_ADDR_HI(sc->pg_bd_chain);
8185 val_lo = BCE_ADDR_LO(sc->pg_bd_chain);
8186 BCE_PRINTF(
8187 "0x%08X:%08X - (sc->pg_bd_chain) page chain virtual address\n",
8188 val_hi, val_lo);
8189
7340 val_hi = BCE_ADDR_HI(sc->tx_mbuf_ptr);
7341 val_lo = BCE_ADDR_LO(sc->tx_mbuf_ptr);
7342 BCE_PRINTF(
7343 "0x%08X:%08X - (sc->tx_mbuf_ptr) tx mbuf chain virtual address\n",
7344 val_hi, val_lo);
7345
7346 val_hi = BCE_ADDR_HI(sc->rx_mbuf_ptr);
7347 val_lo = BCE_ADDR_LO(sc->rx_mbuf_ptr);
7348 BCE_PRINTF(
7349 "0x%08X:%08X - (sc->rx_mbuf_ptr) rx mbuf chain virtual address\n",
7350 val_hi, val_lo);
7351
8190 val_hi = BCE_ADDR_HI(sc->tx_mbuf_ptr);
8191 val_lo = BCE_ADDR_LO(sc->tx_mbuf_ptr);
8192 BCE_PRINTF(
8193 "0x%08X:%08X - (sc->tx_mbuf_ptr) tx mbuf chain virtual address\n",
8194 val_hi, val_lo);
8195
8196 val_hi = BCE_ADDR_HI(sc->rx_mbuf_ptr);
8197 val_lo = BCE_ADDR_LO(sc->rx_mbuf_ptr);
8198 BCE_PRINTF(
8199 "0x%08X:%08X - (sc->rx_mbuf_ptr) rx mbuf chain virtual address\n",
8200 val_hi, val_lo);
8201
8202 val_hi = BCE_ADDR_HI(sc->pg_mbuf_ptr);
8203 val_lo = BCE_ADDR_LO(sc->pg_mbuf_ptr);
8204 BCE_PRINTF(
8205 "0x%08X:%08X - (sc->pg_mbuf_ptr) page mbuf chain virtual address\n",
8206 val_hi, val_lo);
8207
7352 BCE_PRINTF(" 0x%08X - (sc->interrupts_generated) h/w intrs\n",
7353 sc->interrupts_generated);
7354
7355 BCE_PRINTF(" 0x%08X - (sc->rx_interrupts) rx interrupts handled\n",
7356 sc->rx_interrupts);
7357
7358 BCE_PRINTF(" 0x%08X - (sc->tx_interrupts) tx interrupts handled\n",
7359 sc->tx_interrupts);

--- 5 unchanged lines hidden (view full) ---

7365 sc->tx_prod, (u16) TX_CHAIN_IDX(sc->tx_prod));
7366
7367 BCE_PRINTF(" 0x%04X(0x%04X) - (sc->tx_cons) tx consumer index\n",
7368 sc->tx_cons, (u16) TX_CHAIN_IDX(sc->tx_cons));
7369
7370 BCE_PRINTF(" 0x%08X - (sc->tx_prod_bseq) tx producer bseq index\n",
7371 sc->tx_prod_bseq);
7372
8208 BCE_PRINTF(" 0x%08X - (sc->interrupts_generated) h/w intrs\n",
8209 sc->interrupts_generated);
8210
8211 BCE_PRINTF(" 0x%08X - (sc->rx_interrupts) rx interrupts handled\n",
8212 sc->rx_interrupts);
8213
8214 BCE_PRINTF(" 0x%08X - (sc->tx_interrupts) tx interrupts handled\n",
8215 sc->tx_interrupts);

--- 5 unchanged lines hidden (view full) ---

8221 sc->tx_prod, (u16) TX_CHAIN_IDX(sc->tx_prod));
8222
8223 BCE_PRINTF(" 0x%04X(0x%04X) - (sc->tx_cons) tx consumer index\n",
8224 sc->tx_cons, (u16) TX_CHAIN_IDX(sc->tx_cons));
8225
8226 BCE_PRINTF(" 0x%08X - (sc->tx_prod_bseq) tx producer bseq index\n",
8227 sc->tx_prod_bseq);
8228
7373 BCE_PRINTF(" 0x%08X - (sc->tx_mbuf_alloc) tx mbufs allocated\n",
7374 sc->tx_mbuf_alloc);
8229 BCE_PRINTF(" 0x%08X - (sc->debug_tx_mbuf_alloc) tx mbufs allocated\n",
8230 sc->debug_tx_mbuf_alloc);
7375
7376 BCE_PRINTF(" 0x%08X - (sc->used_tx_bd) used tx_bd's\n",
7377 sc->used_tx_bd);
7378
7379 BCE_PRINTF("0x%08X/%08X - (sc->tx_hi_watermark) tx hi watermark\n",
7380 sc->tx_hi_watermark, sc->max_tx_bd);
7381
7382 BCE_PRINTF(" 0x%04X(0x%04X) - (sc->rx_prod) rx producer index\n",
7383 sc->rx_prod, (u16) RX_CHAIN_IDX(sc->rx_prod));
7384
7385 BCE_PRINTF(" 0x%04X(0x%04X) - (sc->rx_cons) rx consumer index\n",
7386 sc->rx_cons, (u16) RX_CHAIN_IDX(sc->rx_cons));
7387
7388 BCE_PRINTF(" 0x%08X - (sc->rx_prod_bseq) rx producer bseq index\n",
7389 sc->rx_prod_bseq);
7390
8231
8232 BCE_PRINTF(" 0x%08X - (sc->used_tx_bd) used tx_bd's\n",
8233 sc->used_tx_bd);
8234
8235 BCE_PRINTF("0x%08X/%08X - (sc->tx_hi_watermark) tx hi watermark\n",
8236 sc->tx_hi_watermark, sc->max_tx_bd);
8237
8238 BCE_PRINTF(" 0x%04X(0x%04X) - (sc->rx_prod) rx producer index\n",
8239 sc->rx_prod, (u16) RX_CHAIN_IDX(sc->rx_prod));
8240
8241 BCE_PRINTF(" 0x%04X(0x%04X) - (sc->rx_cons) rx consumer index\n",
8242 sc->rx_cons, (u16) RX_CHAIN_IDX(sc->rx_cons));
8243
8244 BCE_PRINTF(" 0x%08X - (sc->rx_prod_bseq) rx producer bseq index\n",
8245 sc->rx_prod_bseq);
8246
7391 BCE_PRINTF(" 0x%08X - (sc->rx_mbuf_alloc) rx mbufs allocated\n",
7392 sc->rx_mbuf_alloc);
8247 BCE_PRINTF(" 0x%08X - (sc->debug_rx_mbuf_alloc) rx mbufs allocated\n",
8248 sc->debug_rx_mbuf_alloc);
7393
7394 BCE_PRINTF(" 0x%08X - (sc->free_rx_bd) free rx_bd's\n",
7395 sc->free_rx_bd);
7396
8249
8250 BCE_PRINTF(" 0x%08X - (sc->free_rx_bd) free rx_bd's\n",
8251 sc->free_rx_bd);
8252
7397 BCE_PRINTF("0x%08X/%08X - (sc->rx_low_watermark) rx low watermark\n",
7398 sc->rx_low_watermark, sc->max_rx_bd);
8253 BCE_PRINTF(" 0x%04X(0x%04X) - (sc->pg_prod) page producer index\n",
8254 sc->pg_prod, (u16) PG_CHAIN_IDX(sc->pg_prod));
7399
8255
8256 BCE_PRINTF(" 0x%04X(0x%04X) - (sc->pg_cons) page consumer index\n",
8257 sc->pg_cons, (u16) PG_CHAIN_IDX(sc->pg_cons));
8258
8259 BCE_PRINTF(" 0x%08X - (sc->debug_pg_mbuf_alloc) page mbufs allocated\n",
8260 sc->debug_pg_mbuf_alloc);
8261
8262 BCE_PRINTF(" 0x%08X - (sc->free_pg_bd) free page rx_bd's\n",
8263 sc->free_pg_bd);
8264
8265 BCE_PRINTF("0x%08X/%08X - (sc->pg_low_watermark) page low watermark\n",
8266 sc->pg_low_watermark, sc->max_pg_bd);
8267
7400 BCE_PRINTF(" 0x%08X - (sc->mbuf_alloc_failed) "
7401 "mbuf alloc failures\n",
7402 sc->mbuf_alloc_failed);
7403
8268 BCE_PRINTF(" 0x%08X - (sc->mbuf_alloc_failed) "
8269 "mbuf alloc failures\n",
8270 sc->mbuf_alloc_failed);
8271
7404 BCE_PRINTF(" 0x%08X - (sc->mbuf_sim_alloc_failed) "
8272 BCE_PRINTF(" 0x%08X - (sc->debug_mbuf_sim_alloc_failed) "
7405 "simulated mbuf alloc failures\n",
8273 "simulated mbuf alloc failures\n",
7406 sc->mbuf_sim_alloc_failed);
8274 sc->debug_mbuf_sim_alloc_failed);
7407
7408 BCE_PRINTF(
7409 "----------------------------"
7410 "----------------"
7411 "----------------------------\n");
7412}
7413
7414
7415/****************************************************************************/
7416/* Prints out the hardware state through a summary of important register, */
7417/* followed by a complete register dump. */
7418/* */
7419/* Returns: */
7420/* Nothing. */
7421/****************************************************************************/
7422static void
7423bce_dump_hw_state(struct bce_softc *sc)
7424{
8275
8276 BCE_PRINTF(
8277 "----------------------------"
8278 "----------------"
8279 "----------------------------\n");
8280}
8281
8282
8283/****************************************************************************/
8284/* Prints out the hardware state through a summary of important register, */
8285/* followed by a complete register dump. */
8286/* */
8287/* Returns: */
8288/* Nothing. */
8289/****************************************************************************/
8290static void
8291bce_dump_hw_state(struct bce_softc *sc)
8292{
7425 u32 val1;
8293 u32 val;
7426
7427 BCE_PRINTF(
7428 "----------------------------"
7429 " Hardware State "
7430 "----------------------------\n");
7431
7432 BCE_PRINTF("0x%08X - bootcode version\n", sc->bce_fw_ver);
7433
8294
8295 BCE_PRINTF(
8296 "----------------------------"
8297 " Hardware State "
8298 "----------------------------\n");
8299
8300 BCE_PRINTF("0x%08X - bootcode version\n", sc->bce_fw_ver);
8301
7434 val1 = REG_RD(sc, BCE_MISC_ENABLE_STATUS_BITS);
8302 val = REG_RD(sc, BCE_MISC_ENABLE_STATUS_BITS);
7435 BCE_PRINTF("0x%08X - (0x%06X) misc_enable_status_bits\n",
8303 BCE_PRINTF("0x%08X - (0x%06X) misc_enable_status_bits\n",
7436 val1, BCE_MISC_ENABLE_STATUS_BITS);
8304 val, BCE_MISC_ENABLE_STATUS_BITS);
7437
8305
7438 val1 = REG_RD(sc, BCE_DMA_STATUS);
7439 BCE_PRINTF("0x%08X - (0x%06X) dma_status\n", val1, BCE_DMA_STATUS);
8306 val = REG_RD(sc, BCE_DMA_STATUS);
8307 BCE_PRINTF("0x%08X - (0x%06X) dma_status\n", val, BCE_DMA_STATUS);
7440
8308
7441 val1 = REG_RD(sc, BCE_CTX_STATUS);
7442 BCE_PRINTF("0x%08X - (0x%06X) ctx_status\n", val1, BCE_CTX_STATUS);
8309 val = REG_RD(sc, BCE_CTX_STATUS);
8310 BCE_PRINTF("0x%08X - (0x%06X) ctx_status\n", val, BCE_CTX_STATUS);
7443
8311
7444 val1 = REG_RD(sc, BCE_EMAC_STATUS);
7445 BCE_PRINTF("0x%08X - (0x%06X) emac_status\n", val1, BCE_EMAC_STATUS);
8312 val = REG_RD(sc, BCE_EMAC_STATUS);
8313 BCE_PRINTF("0x%08X - (0x%06X) emac_status\n", val, BCE_EMAC_STATUS);
7446
8314
7447 val1 = REG_RD(sc, BCE_RPM_STATUS);
7448 BCE_PRINTF("0x%08X - (0x%06X) rpm_status\n", val1, BCE_RPM_STATUS);
8315 val = REG_RD(sc, BCE_RPM_STATUS);
8316 BCE_PRINTF("0x%08X - (0x%06X) rpm_status\n", val, BCE_RPM_STATUS);
7449
8317
7450 val1 = REG_RD(sc, BCE_TBDR_STATUS);
7451 BCE_PRINTF("0x%08X - (0x%06X) tbdr_status\n", val1, BCE_TBDR_STATUS);
8318 val = REG_RD(sc, 0x2004);
8319 BCE_PRINTF("0x%08X - (0x%06X) rlup_status\n", val, 0x2004);
7452
8320
7453 val1 = REG_RD(sc, BCE_TDMA_STATUS);
7454 BCE_PRINTF("0x%08X - (0x%06X) tdma_status\n", val1, BCE_TDMA_STATUS);
8321 val = REG_RD(sc, BCE_RV2P_STATUS);
8322 BCE_PRINTF("0x%08X - (0x%06X) rv2p_status\n", val, BCE_RV2P_STATUS);
7455
8323
7456 val1 = REG_RD(sc, BCE_HC_STATUS);
7457 BCE_PRINTF("0x%08X - (0x%06X) hc_status\n", val1, BCE_HC_STATUS);
8324 val = REG_RD(sc, 0x2c04);
8325 BCE_PRINTF("0x%08X - (0x%06X) rdma_status\n", val, 0x2c04);
7458
8326
7459 val1 = REG_RD_IND(sc, BCE_TXP_CPU_STATE);
7460 BCE_PRINTF("0x%08X - (0x%06X) txp_cpu_state\n", val1, BCE_TXP_CPU_STATE);
8327 val = REG_RD(sc, BCE_TBDR_STATUS);
8328 BCE_PRINTF("0x%08X - (0x%06X) tbdr_status\n", val, BCE_TBDR_STATUS);
7461
8329
7462 val1 = REG_RD_IND(sc, BCE_TPAT_CPU_STATE);
7463 BCE_PRINTF("0x%08X - (0x%06X) tpat_cpu_state\n", val1, BCE_TPAT_CPU_STATE);
8330 val = REG_RD(sc, BCE_TDMA_STATUS);
8331 BCE_PRINTF("0x%08X - (0x%06X) tdma_status\n", val, BCE_TDMA_STATUS);
7464
8332
7465 val1 = REG_RD_IND(sc, BCE_RXP_CPU_STATE);
7466 BCE_PRINTF("0x%08X - (0x%06X) rxp_cpu_state\n", val1, BCE_RXP_CPU_STATE);
8333 val = REG_RD(sc, BCE_HC_STATUS);
8334 BCE_PRINTF("0x%08X - (0x%06X) hc_status\n", val, BCE_HC_STATUS);
7467
8335
7468 val1 = REG_RD_IND(sc, BCE_COM_CPU_STATE);
7469 BCE_PRINTF("0x%08X - (0x%06X) com_cpu_state\n", val1, BCE_COM_CPU_STATE);
8336 val = REG_RD_IND(sc, BCE_TXP_CPU_STATE);
8337 BCE_PRINTF("0x%08X - (0x%06X) txp_cpu_state\n", val, BCE_TXP_CPU_STATE);
7470
8338
7471 val1 = REG_RD_IND(sc, BCE_MCP_CPU_STATE);
7472 BCE_PRINTF("0x%08X - (0x%06X) mcp_cpu_state\n", val1, BCE_MCP_CPU_STATE);
8339 val = REG_RD_IND(sc, BCE_TPAT_CPU_STATE);
8340 BCE_PRINTF("0x%08X - (0x%06X) tpat_cpu_state\n", val, BCE_TPAT_CPU_STATE);
7473
8341
7474 val1 = REG_RD_IND(sc, BCE_CP_CPU_STATE);
7475 BCE_PRINTF("0x%08X - (0x%06X) cp_cpu_state\n", val1, BCE_CP_CPU_STATE);
8342 val = REG_RD_IND(sc, BCE_RXP_CPU_STATE);
8343 BCE_PRINTF("0x%08X - (0x%06X) rxp_cpu_state\n", val, BCE_RXP_CPU_STATE);
7476
8344
8345 val = REG_RD_IND(sc, BCE_COM_CPU_STATE);
8346 BCE_PRINTF("0x%08X - (0x%06X) com_cpu_state\n", val, BCE_COM_CPU_STATE);
8347
8348 val = REG_RD_IND(sc, BCE_MCP_CPU_STATE);
8349 BCE_PRINTF("0x%08X - (0x%06X) mcp_cpu_state\n", val, BCE_MCP_CPU_STATE);
8350
8351 val = REG_RD_IND(sc, BCE_CP_CPU_STATE);
8352 BCE_PRINTF("0x%08X - (0x%06X) cp_cpu_state\n", val, BCE_CP_CPU_STATE);
8353
7477 BCE_PRINTF(
7478 "----------------------------"
7479 "----------------"
7480 "----------------------------\n");
7481
7482 BCE_PRINTF(
7483 "----------------------------"
7484 " Register Dump "
7485 "----------------------------\n");
7486
8354 BCE_PRINTF(
8355 "----------------------------"
8356 "----------------"
8357 "----------------------------\n");
8358
8359 BCE_PRINTF(
8360 "----------------------------"
8361 " Register Dump "
8362 "----------------------------\n");
8363
7487 for (int i = 0x400; i < 0x8000; i += 0x10)
8364 for (int i = 0x400; i < 0x8000; i += 0x10) {
7488 BCE_PRINTF("0x%04X: 0x%08X 0x%08X 0x%08X 0x%08X\n",
7489 i, REG_RD(sc, i), REG_RD(sc, i + 0x4),
7490 REG_RD(sc, i + 0x8), REG_RD(sc, i + 0xC));
8365 BCE_PRINTF("0x%04X: 0x%08X 0x%08X 0x%08X 0x%08X\n",
8366 i, REG_RD(sc, i), REG_RD(sc, i + 0x4),
8367 REG_RD(sc, i + 0x8), REG_RD(sc, i + 0xC));
8368 }
7491
7492 BCE_PRINTF(
7493 "----------------------------"
7494 "----------------"
7495 "----------------------------\n");
7496}
7497
7498

--- 168 unchanged lines hidden (view full) ---

7667
7668 BCE_PRINTF(
7669 "----------------------------"
7670 "----------------"
7671 "----------------------------\n");
7672}
7673
7674
8369
8370 BCE_PRINTF(
8371 "----------------------------"
8372 "----------------"
8373 "----------------------------\n");
8374}
8375
8376

--- 168 unchanged lines hidden (view full) ---

8545
8546 BCE_PRINTF(
8547 "----------------------------"
8548 "----------------"
8549 "----------------------------\n");
8550}
8551
8552
8553/* ToDo: Add CP and COM proccessor state dumps. */
8554
8555
7675/****************************************************************************/
7676/* Prints out the driver state and then enters the debugger. */
7677/* */
7678/* Returns: */
7679/* Nothing. */
7680/****************************************************************************/
7681static void
7682bce_breakpoint(struct bce_softc *sc)
7683{
7684
8556/****************************************************************************/
8557/* Prints out the driver state and then enters the debugger. */
8558/* */
8559/* Returns: */
8560/* Nothing. */
8561/****************************************************************************/
8562static void
8563bce_breakpoint(struct bce_softc *sc)
8564{
8565
7685 /* Unreachable code to shut the compiler up about unused functions. */
8566 /*
8567 * Unreachable code to silence compiler warnings
8568 * about unused functions.
8569 */
7686 if (0) {
7687 bce_freeze_controller(sc);
7688 bce_unfreeze_controller(sc);
7689 bce_dump_txbd(sc, 0, NULL);
7690 bce_dump_rxbd(sc, 0, NULL);
8570 if (0) {
8571 bce_freeze_controller(sc);
8572 bce_unfreeze_controller(sc);
8573 bce_dump_txbd(sc, 0, NULL);
8574 bce_dump_rxbd(sc, 0, NULL);
8575 bce_dump_pgbd(sc, 0, NULL);
7691 bce_dump_tx_mbuf_chain(sc, 0, USABLE_TX_BD);
8576 bce_dump_tx_mbuf_chain(sc, 0, USABLE_TX_BD);
7692 bce_dump_rx_mbuf_chain(sc, 0, sc->max_rx_bd);
8577 bce_dump_rx_mbuf_chain(sc, 0, USABLE_RX_BD);
8578 bce_dump_pg_mbuf_chain(sc, 0, USABLE_PG_BD);
7693 bce_dump_l2fhdr(sc, 0, NULL);
8579 bce_dump_l2fhdr(sc, 0, NULL);
8580 bce_dump_ctx(sc, RX_CID);
8581 bce_dump_ftqs(sc);
7694 bce_dump_tx_chain(sc, 0, USABLE_TX_BD);
8582 bce_dump_tx_chain(sc, 0, USABLE_TX_BD);
7695 bce_dump_rx_chain(sc, 0, sc->max_rx_bd);
8583 bce_dump_rx_chain(sc, 0, USABLE_RX_BD);
8584 bce_dump_pg_chain(sc, 0, USABLE_PG_BD);
7696 bce_dump_status_block(sc);
7697 bce_dump_stats_block(sc);
7698 bce_dump_driver_state(sc);
7699 bce_dump_hw_state(sc);
7700 bce_dump_bc_state(sc);
7701 bce_dump_txp_state(sc);
7702 bce_dump_rxp_state(sc);
7703 bce_dump_tpat_state(sc);
7704 }
7705
8585 bce_dump_status_block(sc);
8586 bce_dump_stats_block(sc);
8587 bce_dump_driver_state(sc);
8588 bce_dump_hw_state(sc);
8589 bce_dump_bc_state(sc);
8590 bce_dump_txp_state(sc);
8591 bce_dump_rxp_state(sc);
8592 bce_dump_tpat_state(sc);
8593 }
8594
7706/* bce_freeze_controller(sc); */
7707 bce_dump_driver_state(sc);
7708 bce_dump_status_block(sc);
8595 bce_dump_status_block(sc);
7709 bce_dump_tx_chain(sc, 0, TOTAL_TX_BD);
7710 bce_dump_hw_state(sc);
7711 bce_dump_txp_state(sc);
7712/* bce_unfreeze_controller(sc); */
8596 bce_dump_driver_state(sc);
7713
7714 /* Call the debugger. */
7715 breakpoint();
7716
7717 return;
7718}
7719#endif
7720
8597
8598 /* Call the debugger. */
8599 breakpoint();
8600
8601 return;
8602}
8603#endif
8604