1/*-
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer,
11 * without modification.
12 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
13 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
14 * redistribution must be conditioned upon including a substantially
15 * similar Disclaimer requirement for further binary redistribution.
16 *
17 * NO WARRANTY
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
21 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
23 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
26 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGES.
29 */
30
31#include <sys/cdefs.h>
|
32__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath_tx.c 240592 2012-09-17 03:17:42Z adrian $");
|
| 32__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath_tx.c 240639 2012-09-18 10:14:17Z adrian $"); |
33
34/*
35 * Driver for the Atheros Wireless LAN controller.
36 *
37 * This software is derived from work of Atsushi Onoe; his contribution
38 * is greatly appreciated.
39 */
40
41#include "opt_inet.h"
42#include "opt_ath.h"
43#include "opt_wlan.h"
44
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/sysctl.h>
48#include <sys/mbuf.h>
49#include <sys/malloc.h>
50#include <sys/lock.h>
51#include <sys/mutex.h>
52#include <sys/kernel.h>
53#include <sys/socket.h>
54#include <sys/sockio.h>
55#include <sys/errno.h>
56#include <sys/callout.h>
57#include <sys/bus.h>
58#include <sys/endian.h>
59#include <sys/kthread.h>
60#include <sys/taskqueue.h>
61#include <sys/priv.h>
62
63#include <machine/bus.h>
64
65#include <net/if.h>
66#include <net/if_dl.h>
67#include <net/if_media.h>
68#include <net/if_types.h>
69#include <net/if_arp.h>
70#include <net/ethernet.h>
71#include <net/if_llc.h>
72
73#include <net80211/ieee80211_var.h>
74#include <net80211/ieee80211_regdomain.h>
75#ifdef IEEE80211_SUPPORT_SUPERG
76#include <net80211/ieee80211_superg.h>
77#endif
78#ifdef IEEE80211_SUPPORT_TDMA
79#include <net80211/ieee80211_tdma.h>
80#endif
81#include <net80211/ieee80211_ht.h>
82
83#include <net/bpf.h>
84
85#ifdef INET
86#include <netinet/in.h>
87#include <netinet/if_ether.h>
88#endif
89
90#include <dev/ath/if_athvar.h>
91#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
92#include <dev/ath/ath_hal/ah_diagcodes.h>
93
94#include <dev/ath/if_ath_debug.h>
95
96#ifdef ATH_TX99_DIAG
97#include <dev/ath/ath_tx99/ath_tx99.h>
98#endif
99
100#include <dev/ath/if_ath_misc.h>
101#include <dev/ath/if_ath_tx.h>
102#include <dev/ath/if_ath_tx_ht.h>
103
104/*
105 * How many retries to perform in software
106 */
107#define SWMAX_RETRIES 10
108
109static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
110 int tid);
111static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
112 int tid);
113static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
114 struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
115static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
116 struct ieee80211_node *ni, struct mbuf *m0, int *tid);
|
117static struct ath_buf *
118ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
119 struct ath_tid *tid, struct ath_buf *bf); |
120
121/*
122 * Whether to use the 11n rate scenario functions or not
123 */
124static inline int
125ath_tx_is_11n(struct ath_softc *sc)
126{
127 return ((sc->sc_ah->ah_magic == 0x20065416) ||
128 (sc->sc_ah->ah_magic == 0x19741014));
129}
130
131/*
132 * Obtain the current TID from the given frame.
133 *
134 * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.)
135 * This has implications for which AC/priority the packet is placed
136 * in.
137 */
138static int
139ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
140{
141 const struct ieee80211_frame *wh;
142 int pri = M_WME_GETAC(m0);
143
144 wh = mtod(m0, const struct ieee80211_frame *);
145 if (! IEEE80211_QOS_HAS_SEQ(wh))
146 return IEEE80211_NONQOS_TID;
147 else
148 return WME_AC_TO_TID(pri);
149}
150
|
151static void
152ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
153{
154 struct ieee80211_frame *wh;
155
156 wh = mtod(bf->bf_m, struct ieee80211_frame *);
157 /* Only update/resync if needed */
158 if (bf->bf_state.bfs_isretried == 0) {
159 wh->i_fc[1] |= IEEE80211_FC1_RETRY;
160 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
161 BUS_DMASYNC_PREWRITE);
162 }
163 bf->bf_state.bfs_isretried = 1;
164 bf->bf_state.bfs_retries ++;
165}
166 |
167/*
168 * Determine what the correct AC queue for the given frame
169 * should be.
170 *
171 * This code assumes that the TIDs map consistently to
172 * the underlying hardware (or software) ath_txq.
173 * Since the sender may try to set an AC which is
174 * arbitrary, non-QoS TIDs may end up being put on
175 * completely different ACs. There's no way to put a
176 * TID into multiple ath_txq's for scheduling, so
177 * for now we override the AC/TXQ selection and set
178 * non-QOS TID frames into the BE queue.
179 *
180 * This may be completely incorrect - specifically,
181 * some management frames may end up out of order
182 * compared to the QoS traffic they're controlling.
183 * I'll look into this later.
184 */
185static int
186ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
187{
188 const struct ieee80211_frame *wh;
189 int pri = M_WME_GETAC(m0);
190 wh = mtod(m0, const struct ieee80211_frame *);
191 if (IEEE80211_QOS_HAS_SEQ(wh))
192 return pri;
193
194 return WME_AC_BE;
195}
196
197void
198ath_txfrag_cleanup(struct ath_softc *sc,
199 ath_bufhead *frags, struct ieee80211_node *ni)
200{
201 struct ath_buf *bf, *next;
202
203 ATH_TXBUF_LOCK_ASSERT(sc);
204
205 TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
206 /* NB: bf assumed clean */
207 TAILQ_REMOVE(frags, bf, bf_list);
208 ath_returnbuf_head(sc, bf);
209 ieee80211_node_decref(ni);
210 }
211}
212
213/*
214 * Setup xmit of a fragmented frame. Allocate a buffer
215 * for each frag and bump the node reference count to
216 * reflect the held reference to be setup by ath_tx_start.
217 */
218int
219ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
220 struct mbuf *m0, struct ieee80211_node *ni)
221{
222 struct mbuf *m;
223 struct ath_buf *bf;
224
225 ATH_TXBUF_LOCK(sc);
226 for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
227 /* XXX non-management? */
228 bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL);
229 if (bf == NULL) { /* out of buffers, cleanup */
230 device_printf(sc->sc_dev, "%s: no buffer?\n",
231 __func__);
232 ath_txfrag_cleanup(sc, frags, ni);
233 break;
234 }
235 ieee80211_node_incref(ni);
236 TAILQ_INSERT_TAIL(frags, bf, bf_list);
237 }
238 ATH_TXBUF_UNLOCK(sc);
239
240 return !TAILQ_EMPTY(frags);
241}
242
243/*
244 * Reclaim mbuf resources. For fragmented frames we
245 * need to claim each frag chained with m_nextpkt.
246 */
247void
248ath_freetx(struct mbuf *m)
249{
250 struct mbuf *next;
251
252 do {
253 next = m->m_nextpkt;
254 m->m_nextpkt = NULL;
255 m_freem(m);
256 } while ((m = next) != NULL);
257}
258
259static int
260ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
261{
262 struct mbuf *m;
263 int error;
264
265 /*
266 * Load the DMA map so any coalescing is done. This
267 * also calculates the number of descriptors we need.
268 */
269 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
270 bf->bf_segs, &bf->bf_nseg,
271 BUS_DMA_NOWAIT);
272 if (error == EFBIG) {
273 /* XXX packet requires too many descriptors */
274 bf->bf_nseg = ATH_TXDESC+1;
275 } else if (error != 0) {
276 sc->sc_stats.ast_tx_busdma++;
277 ath_freetx(m0);
278 return error;
279 }
280 /*
281 * Discard null packets and check for packets that
282 * require too many TX descriptors. We try to convert
283 * the latter to a cluster.
284 */
285 if (bf->bf_nseg > ATH_TXDESC) { /* too many desc's, linearize */
286 sc->sc_stats.ast_tx_linear++;
287 m = m_collapse(m0, M_DONTWAIT, ATH_TXDESC);
288 if (m == NULL) {
289 ath_freetx(m0);
290 sc->sc_stats.ast_tx_nombuf++;
291 return ENOMEM;
292 }
293 m0 = m;
294 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
295 bf->bf_segs, &bf->bf_nseg,
296 BUS_DMA_NOWAIT);
297 if (error != 0) {
298 sc->sc_stats.ast_tx_busdma++;
299 ath_freetx(m0);
300 return error;
301 }
302 KASSERT(bf->bf_nseg <= ATH_TXDESC,
303 ("too many segments after defrag; nseg %u", bf->bf_nseg));
304 } else if (bf->bf_nseg == 0) { /* null packet, discard */
305 sc->sc_stats.ast_tx_nodata++;
306 ath_freetx(m0);
307 return EIO;
308 }
309 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
310 __func__, m0, m0->m_pkthdr.len);
311 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
312 bf->bf_m = m0;
313
314 return 0;
315}
316
317/*
318 * Chain together segments+descriptors for a non-11n frame.
319 */
320static void
321ath_tx_chaindesclist(struct ath_softc *sc, struct ath_buf *bf)
322{
323 struct ath_hal *ah = sc->sc_ah;
324 char *ds, *ds0;
325 int i, bp, dsp;
326 HAL_DMA_ADDR bufAddrList[4];
327 uint32_t segLenList[4];
328 int numTxMaps = 1;
329 int isFirstDesc = 1;
330 int qnum;
331
332 /*
333 * XXX There's txdma and txdma_mgmt; the descriptor
334 * sizes must match.
335 */
336 struct ath_descdma *dd = &sc->sc_txdma;
337
338 /*
339 * Fillin the remainder of the descriptor info.
340 */
341
342 /*
343 * For now the HAL doesn't implement halNumTxMaps for non-EDMA
344 * (ie it's 0.) So just work around it.
345 *
346 * XXX TODO: populate halNumTxMaps for each HAL chip and
347 * then undo this hack.
348 */
349 if (sc->sc_ah->ah_magic == 0x19741014)
350 numTxMaps = 4;
351
352 /*
353 * For EDMA and later chips ensure the TX map is fully populated
354 * before advancing to the next descriptor.
355 */
356 ds0 = ds = (char *) bf->bf_desc;
357 bp = dsp = 0;
358 bzero(bufAddrList, sizeof(bufAddrList));
359 bzero(segLenList, sizeof(segLenList));
360 for (i = 0; i < bf->bf_nseg; i++) {
361 bufAddrList[bp] = bf->bf_segs[i].ds_addr;
362 segLenList[bp] = bf->bf_segs[i].ds_len;
363 bp++;
364
365 /*
366 * Go to the next segment if this isn't the last segment
367 * and there's space in the current TX map.
368 */
369 if ((i != bf->bf_nseg - 1) && (bp < numTxMaps))
370 continue;
371
372 /*
373 * Last segment or we're out of buffer pointers.
374 */
375 bp = 0;
376
377 if (i == bf->bf_nseg - 1)
378 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0);
379 else
380 ath_hal_settxdesclink(ah, (struct ath_desc *) ds,
381 bf->bf_daddr + dd->dd_descsize * (dsp + 1));
382
383 /*
384 * XXX this assumes that bfs_txq is the actual destination
385 * hardware queue at this point. It may not have been assigned,
386 * it may actually be pointing to the multicast software
387 * TXQ id. These must be fixed!
388 */
389 qnum = bf->bf_state.bfs_txq->axq_qnum;
390
391 ath_hal_filltxdesc(ah, (struct ath_desc *) ds
392 , bufAddrList
393 , segLenList
394 , bf->bf_descid /* XXX desc id */
395 , qnum
396 , isFirstDesc /* first segment */
397 , i == bf->bf_nseg - 1 /* last segment */
398 , (struct ath_desc *) ds0 /* first descriptor */
399 );
400
401 /* Make sure the 11n aggregate fields are cleared */
402 if (ath_tx_is_11n(sc))
403 ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds);
404
405 isFirstDesc = 0;
406#ifdef ATH_DEBUG
407 if (sc->sc_debug & ATH_DEBUG_XMIT)
408 ath_printtxbuf(sc, bf, qnum, 0, 0);
409#endif
410 bf->bf_lastds = (struct ath_desc *) ds;
411
412 /*
413 * Don't forget to skip to the next descriptor.
414 */
415 ds += sc->sc_tx_desclen;
416 dsp++;
417
418 /*
419 * .. and don't forget to blank these out!
420 */
421 bzero(bufAddrList, sizeof(bufAddrList));
422 bzero(segLenList, sizeof(segLenList));
423 }
424 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
425}
426
427/*
428 * Fill in the descriptor list for a aggregate subframe.
429 *
430 * The subframe is returned with the ds_link field in the last subframe
431 * pointing to 0.
432 */
433static void
434ath_tx_chaindesclist_subframe(struct ath_softc *sc, struct ath_buf *bf)
435{
436 struct ath_hal *ah = sc->sc_ah;
437 struct ath_desc *ds, *ds0;
438 int i;
439 HAL_DMA_ADDR bufAddrList[4];
440 uint32_t segLenList[4];
441
442 /*
443 * XXX There's txdma and txdma_mgmt; the descriptor
444 * sizes must match.
445 */
446 struct ath_descdma *dd = &sc->sc_txdma;
447
448 ds0 = ds = bf->bf_desc;
449
450 /*
451 * There's no need to call ath_hal_setupfirsttxdesc here;
452 * That's only going to occur for the first frame in an aggregate.
453 */
454 for (i = 0; i < bf->bf_nseg; i++, ds++) {
455 bzero(bufAddrList, sizeof(bufAddrList));
456 bzero(segLenList, sizeof(segLenList));
457 if (i == bf->bf_nseg - 1)
458 ath_hal_settxdesclink(ah, ds, 0);
459 else
460 ath_hal_settxdesclink(ah, ds,
461 bf->bf_daddr + dd->dd_descsize * (i + 1));
462
463 bufAddrList[0] = bf->bf_segs[i].ds_addr;
464 segLenList[0] = bf->bf_segs[i].ds_len;
465
466 /*
467 * This performs the setup for an aggregate frame.
468 * This includes enabling the aggregate flags if needed.
469 */
470 ath_hal_chaintxdesc(ah, ds,
471 bufAddrList,
472 segLenList,
473 bf->bf_state.bfs_pktlen,
474 bf->bf_state.bfs_hdrlen,
475 HAL_PKT_TYPE_AMPDU, /* forces aggregate bits to be set */
476 bf->bf_state.bfs_keyix,
477 0, /* cipher, calculated from keyix */
478 bf->bf_state.bfs_ndelim,
479 i == 0, /* first segment */
480 i == bf->bf_nseg - 1, /* last segment */
481 bf->bf_next == NULL /* last sub-frame in aggr */
482 );
483
484 DPRINTF(sc, ATH_DEBUG_XMIT,
485 "%s: %d: %08x %08x %08x %08x %08x %08x\n",
486 __func__, i, ds->ds_link, ds->ds_data,
487 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]);
488 bf->bf_lastds = ds;
489 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
490 BUS_DMASYNC_PREWRITE);
491 }
492}
493
494/*
495 * Set the rate control fields in the given descriptor based on
496 * the bf_state fields and node state.
497 *
498 * The bfs fields should already be set with the relevant rate
499 * control information, including whether MRR is to be enabled.
500 *
501 * Since the FreeBSD HAL currently sets up the first TX rate
502 * in ath_hal_setuptxdesc(), this will setup the MRR
503 * conditionally for the pre-11n chips, and call ath_buf_set_rate
504 * unconditionally for 11n chips. These require the 11n rate
505 * scenario to be set if MCS rates are enabled, so it's easier
506 * to just always call it. The caller can then only set rates 2, 3
507 * and 4 if multi-rate retry is needed.
508 */
509static void
510ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
511 struct ath_buf *bf)
512{
513 struct ath_rc_series *rc = bf->bf_state.bfs_rc;
514
515 /* If mrr is disabled, blank tries 1, 2, 3 */
516 if (! bf->bf_state.bfs_ismrr)
517 rc[1].tries = rc[2].tries = rc[3].tries = 0;
518
519 /*
520 * Always call - that way a retried descriptor will
521 * have the MRR fields overwritten.
522 *
523 * XXX TODO: see if this is really needed - setting up
524 * the first descriptor should set the MRR fields to 0
525 * for us anyway.
526 */
527 if (ath_tx_is_11n(sc)) {
528 ath_buf_set_rate(sc, ni, bf);
529 } else {
530 ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
531 , rc[1].ratecode, rc[1].tries
532 , rc[2].ratecode, rc[2].tries
533 , rc[3].ratecode, rc[3].tries
534 );
535 }
536}
537
538/*
539 * Setup segments+descriptors for an 11n aggregate.
540 * bf_first is the first buffer in the aggregate.
541 * The descriptor list must already been linked together using
542 * bf->bf_next.
543 */
544static void
545ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
546{
547 struct ath_buf *bf, *bf_prev = NULL;
548
549 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
550 __func__, bf_first->bf_state.bfs_nframes,
551 bf_first->bf_state.bfs_al);
552
553 /*
554 * Setup all descriptors of all subframes.
555 */
556 bf = bf_first;
557 while (bf != NULL) {
558 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
559 "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
560 __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
561 SEQNO(bf->bf_state.bfs_seqno));
562
563 /* Sub-frame setup */
564 ath_tx_chaindesclist_subframe(sc, bf);
565
566 /*
567 * Link the last descriptor of the previous frame
568 * to the beginning descriptor of this frame.
569 */
570 if (bf_prev != NULL)
571 ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds,
572 bf->bf_daddr);
573
574 /* Save a copy so we can link the next descriptor in */
575 bf_prev = bf;
576 bf = bf->bf_next;
577 }
578
579 /*
580 * Setup first descriptor of first frame.
581 * chaintxdesc() overwrites the descriptor entries;
582 * setupfirsttxdesc() merges in things.
583 * Otherwise various fields aren't set correctly (eg flags).
584 */
585 ath_hal_setupfirsttxdesc(sc->sc_ah,
586 bf_first->bf_desc,
587 bf_first->bf_state.bfs_al,
588 bf_first->bf_state.bfs_txflags | HAL_TXDESC_INTREQ,
589 bf_first->bf_state.bfs_txpower,
590 bf_first->bf_state.bfs_txrate0,
591 bf_first->bf_state.bfs_try0,
592 bf_first->bf_state.bfs_txantenna,
593 bf_first->bf_state.bfs_ctsrate,
594 bf_first->bf_state.bfs_ctsduration);
595
596 /*
597 * Set the first descriptor bf_lastds field to point to
598 * the last descriptor in the last subframe, that's where
599 * the status update will occur.
600 */
601 bf_first->bf_lastds = bf_prev->bf_lastds;
602
603 /*
604 * And bf_last in the first descriptor points to the end of
605 * the aggregate list.
606 */
607 bf_first->bf_last = bf_prev;
608
609 /*
610 * setup first desc with rate and aggr info
611 */
612 ath_tx_set_ratectrl(sc, bf_first->bf_node, bf_first);
613
614 /*
615 * Setup the last descriptor in the list.
616 *
617 * bf_first->bf_lastds already points to it; the rate
618 * control information needs to be squirreled away here
619 * as well ans clearing the moreaggr/paddelim fields.
620 */
621 ath_hal_setuplasttxdesc(sc->sc_ah, bf_first->bf_lastds,
622 bf_first->bf_desc);
623
624 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
625}
626
627/*
628 * Hand-off a frame to the multicast TX queue.
629 *
630 * This is a software TXQ which will be appended to the CAB queue
631 * during the beacon setup code.
632 *
633 * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID
634 * as part of the TX descriptor, bf_state.bfs_txq must be updated
635 * with the actual hardware txq, or all of this will fall apart.
636 *
637 * XXX It may not be a bad idea to just stuff the QCU ID into bf_state
638 * and retire bfs_txq; then make sure the CABQ QCU ID is populated
639 * correctly.
640 */
641static void
642ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
643 struct ath_buf *bf)
644{
645 ATH_TXQ_LOCK_ASSERT(txq);
646 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
647 ("%s: busy status 0x%x", __func__, bf->bf_flags));
648 if (txq->axq_link != NULL) {
649 struct ath_buf *last = ATH_TXQ_LAST(txq, axq_q_s);
650 struct ieee80211_frame *wh;
651
652 /* mark previous frame */
653 wh = mtod(last->bf_m, struct ieee80211_frame *);
654 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
655 bus_dmamap_sync(sc->sc_dmat, last->bf_dmamap,
656 BUS_DMASYNC_PREWRITE);
657
658 /* link descriptor */
659 *txq->axq_link = bf->bf_daddr;
660 }
661 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
662 ath_hal_gettxdesclinkptr(sc->sc_ah, bf->bf_lastds, &txq->axq_link);
663}
664
665/*
666 * Hand-off packet to a hardware queue.
667 */
668static void
669ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
670 struct ath_buf *bf)
671{
672 struct ath_hal *ah = sc->sc_ah;
673
674 /*
675 * Insert the frame on the outbound list and pass it on
676 * to the hardware. Multicast frames buffered for power
677 * save stations and transmit from the CAB queue are stored
678 * on a s/w only queue and loaded on to the CAB queue in
679 * the SWBA handler since frames only go out on DTIM and
680 * to avoid possible races.
681 */
682 ATH_TXQ_LOCK_ASSERT(txq);
683 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
684 ("%s: busy status 0x%x", __func__, bf->bf_flags));
685 KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
686 ("ath_tx_handoff_hw called for mcast queue"));
687
688#if 0
689 /*
690 * This causes a LOR. Find out where the PCU lock is being
691 * held whilst the TXQ lock is grabbed - that shouldn't
692 * be occuring.
693 */
694 ATH_PCU_LOCK(sc);
695 if (sc->sc_inreset_cnt) {
696 ATH_PCU_UNLOCK(sc);
697 DPRINTF(sc, ATH_DEBUG_RESET,
698 "%s: called with sc_in_reset != 0\n",
699 __func__);
700 DPRINTF(sc, ATH_DEBUG_XMIT,
701 "%s: queued: TXDP[%u] = %p (%p) depth %d\n",
702 __func__, txq->axq_qnum,
703 (caddr_t)bf->bf_daddr, bf->bf_desc,
704 txq->axq_depth);
705 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
706 if (bf->bf_state.bfs_aggr)
707 txq->axq_aggr_depth++;
708 /*
709 * There's no need to update axq_link; the hardware
710 * is in reset and once the reset is complete, any
711 * non-empty queues will simply have DMA restarted.
712 */
713 return;
714 }
715 ATH_PCU_UNLOCK(sc);
716#endif
717
718 /* For now, so not to generate whitespace diffs */
719 if (1) {
720#ifdef IEEE80211_SUPPORT_TDMA
721 int qbusy;
722
723 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
724 qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
725 if (txq->axq_link == NULL) {
726 /*
727 * Be careful writing the address to TXDP. If
728 * the tx q is enabled then this write will be
729 * ignored. Normally this is not an issue but
730 * when tdma is in use and the q is beacon gated
731 * this race can occur. If the q is busy then
732 * defer the work to later--either when another
733 * packet comes along or when we prepare a beacon
734 * frame at SWBA.
735 */
736 if (!qbusy) {
737 ath_hal_puttxbuf(ah, txq->axq_qnum,
738 bf->bf_daddr);
739 txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
740 DPRINTF(sc, ATH_DEBUG_XMIT,
741 "%s: TXDP[%u] = %p (%p) depth %d\n",
742 __func__, txq->axq_qnum,
743 (caddr_t)bf->bf_daddr, bf->bf_desc,
744 txq->axq_depth);
745 } else {
746 txq->axq_flags |= ATH_TXQ_PUTPENDING;
747 DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
748 "%s: Q%u busy, defer enable\n", __func__,
749 txq->axq_qnum);
750 }
751 } else {
752 *txq->axq_link = bf->bf_daddr;
753 DPRINTF(sc, ATH_DEBUG_XMIT,
754 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
755 txq->axq_qnum, txq->axq_link,
756 (caddr_t)bf->bf_daddr, bf->bf_desc,
757 txq->axq_depth);
758 if ((txq->axq_flags & ATH_TXQ_PUTPENDING) && !qbusy) {
759 /*
760 * The q was busy when we previously tried
761 * to write the address of the first buffer
762 * in the chain. Since it's not busy now
763 * handle this chore. We are certain the
764 * buffer at the front is the right one since
765 * axq_link is NULL only when the buffer list
766 * is/was empty.
767 */
768 ath_hal_puttxbuf(ah, txq->axq_qnum,
769 TAILQ_FIRST(&txq->axq_q)->bf_daddr);
770 txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
771 DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
772 "%s: Q%u restarted\n", __func__,
773 txq->axq_qnum);
774 }
775 }
776#else
777 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
778 if (txq->axq_link == NULL) {
779 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
780 DPRINTF(sc, ATH_DEBUG_XMIT,
781 "%s: TXDP[%u] = %p (%p) depth %d\n",
782 __func__, txq->axq_qnum,
783 (caddr_t)bf->bf_daddr, bf->bf_desc,
784 txq->axq_depth);
785 } else {
786 *txq->axq_link = bf->bf_daddr;
787 DPRINTF(sc, ATH_DEBUG_XMIT,
788 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
789 txq->axq_qnum, txq->axq_link,
790 (caddr_t)bf->bf_daddr, bf->bf_desc,
791 txq->axq_depth);
792 }
793#endif /* IEEE80211_SUPPORT_TDMA */
794 if (bf->bf_state.bfs_aggr)
795 txq->axq_aggr_depth++;
796 ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link);
797 ath_hal_txstart(ah, txq->axq_qnum);
798 }
799}
800
801/*
802 * Restart TX DMA for the given TXQ.
803 *
804 * This must be called whether the queue is empty or not.
805 */
806static void
807ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
808{
809 struct ath_hal *ah = sc->sc_ah;
810 struct ath_buf *bf, *bf_last;
811
812 ATH_TXQ_LOCK_ASSERT(txq);
813
814 /* This is always going to be cleared, empty or not */
815 txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
816
817 /* XXX make this ATH_TXQ_FIRST */
818 bf = TAILQ_FIRST(&txq->axq_q);
819 bf_last = ATH_TXQ_LAST(txq, axq_q_s);
820
821 if (bf == NULL)
822 return;
823
824 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
825 ath_hal_gettxdesclinkptr(ah, bf_last->bf_lastds, &txq->axq_link);
826 ath_hal_txstart(ah, txq->axq_qnum);
827}
828
829/*
830 * Hand off a packet to the hardware (or mcast queue.)
831 *
832 * The relevant hardware txq should be locked.
833 */
834static void
835ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
836 struct ath_buf *bf)
837{
838 ATH_TXQ_LOCK_ASSERT(txq);
839
840 if (txq->axq_qnum == ATH_TXQ_SWQ)
841 ath_tx_handoff_mcast(sc, txq, bf);
842 else
843 ath_tx_handoff_hw(sc, txq, bf);
844}
845
846static int
847ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
848 struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
849 int *keyix)
850{
851 DPRINTF(sc, ATH_DEBUG_XMIT,
852 "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n",
853 __func__,
854 *hdrlen,
855 *pktlen,
856 isfrag,
857 iswep,
858 m0);
859
860 if (iswep) {
861 const struct ieee80211_cipher *cip;
862 struct ieee80211_key *k;
863
864 /*
865 * Construct the 802.11 header+trailer for an encrypted
866 * frame. The only reason this can fail is because of an
867 * unknown or unsupported cipher/key type.
868 */
869 k = ieee80211_crypto_encap(ni, m0);
870 if (k == NULL) {
871 /*
872 * This can happen when the key is yanked after the
873 * frame was queued. Just discard the frame; the
874 * 802.11 layer counts failures and provides
875 * debugging/diagnostics.
876 */
877 return (0);
878 }
879 /*
880 * Adjust the packet + header lengths for the crypto
881 * additions and calculate the h/w key index. When
882 * a s/w mic is done the frame will have had any mic
883 * added to it prior to entry so m0->m_pkthdr.len will
884 * account for it. Otherwise we need to add it to the
885 * packet length.
886 */
887 cip = k->wk_cipher;
888 (*hdrlen) += cip->ic_header;
889 (*pktlen) += cip->ic_header + cip->ic_trailer;
890 /* NB: frags always have any TKIP MIC done in s/w */
891 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
892 (*pktlen) += cip->ic_miclen;
893 (*keyix) = k->wk_keyix;
894 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
895 /*
896 * Use station key cache slot, if assigned.
897 */
898 (*keyix) = ni->ni_ucastkey.wk_keyix;
899 if ((*keyix) == IEEE80211_KEYIX_NONE)
900 (*keyix) = HAL_TXKEYIX_INVALID;
901 } else
902 (*keyix) = HAL_TXKEYIX_INVALID;
903
904 return (1);
905}
906
907/*
908 * Calculate whether interoperability protection is required for
909 * this frame.
910 *
911 * This requires the rate control information be filled in,
912 * as the protection requirement depends upon the current
913 * operating mode / PHY.
914 */
915static void
916ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf)
917{
918 struct ieee80211_frame *wh;
919 uint8_t rix;
920 uint16_t flags;
921 int shortPreamble;
922 const HAL_RATE_TABLE *rt = sc->sc_currates;
923 struct ifnet *ifp = sc->sc_ifp;
924 struct ieee80211com *ic = ifp->if_l2com;
925
926 flags = bf->bf_state.bfs_txflags;
927 rix = bf->bf_state.bfs_rc[0].rix;
928 shortPreamble = bf->bf_state.bfs_shpream;
929 wh = mtod(bf->bf_m, struct ieee80211_frame *);
930
931 /*
932 * If 802.11g protection is enabled, determine whether
933 * to use RTS/CTS or just CTS. Note that this is only
934 * done for OFDM unicast frames.
935 */
936 if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
937 rt->info[rix].phy == IEEE80211_T_OFDM &&
938 (flags & HAL_TXDESC_NOACK) == 0) {
939 bf->bf_state.bfs_doprot = 1;
940 /* XXX fragments must use CCK rates w/ protection */
941 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
942 flags |= HAL_TXDESC_RTSENA;
943 } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
944 flags |= HAL_TXDESC_CTSENA;
945 }
946 /*
947 * For frags it would be desirable to use the
948 * highest CCK rate for RTS/CTS. But stations
949 * farther away may detect it at a lower CCK rate
950 * so use the configured protection rate instead
951 * (for now).
952 */
953 sc->sc_stats.ast_tx_protect++;
954 }
955
956 /*
957 * If 11n protection is enabled and it's a HT frame,
958 * enable RTS.
959 *
960 * XXX ic_htprotmode or ic_curhtprotmode?
961 * XXX should it_htprotmode only matter if ic_curhtprotmode
962 * XXX indicates it's not a HT pure environment?
963 */
964 if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
965 rt->info[rix].phy == IEEE80211_T_HT &&
966 (flags & HAL_TXDESC_NOACK) == 0) {
967 flags |= HAL_TXDESC_RTSENA;
968 sc->sc_stats.ast_tx_htprotect++;
969 }
970 bf->bf_state.bfs_txflags = flags;
971}
972
973/*
974 * Update the frame duration given the currently selected rate.
975 *
976 * This also updates the frame duration value, so it will require
977 * a DMA flush.
978 */
979static void
980ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf)
981{
982 struct ieee80211_frame *wh;
983 uint8_t rix;
984 uint16_t flags;
985 int shortPreamble;
986 struct ath_hal *ah = sc->sc_ah;
987 const HAL_RATE_TABLE *rt = sc->sc_currates;
988 int isfrag = bf->bf_m->m_flags & M_FRAG;
989
990 flags = bf->bf_state.bfs_txflags;
991 rix = bf->bf_state.bfs_rc[0].rix;
992 shortPreamble = bf->bf_state.bfs_shpream;
993 wh = mtod(bf->bf_m, struct ieee80211_frame *);
994
995 /*
996 * Calculate duration. This logically belongs in the 802.11
997 * layer but it lacks sufficient information to calculate it.
998 */
999 if ((flags & HAL_TXDESC_NOACK) == 0 &&
1000 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
1001 u_int16_t dur;
1002 if (shortPreamble)
1003 dur = rt->info[rix].spAckDuration;
1004 else
1005 dur = rt->info[rix].lpAckDuration;
1006 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
1007 dur += dur; /* additional SIFS+ACK */
1008 KASSERT(bf->bf_m->m_nextpkt != NULL, ("no fragment"));
1009 /*
1010 * Include the size of next fragment so NAV is
1011 * updated properly. The last fragment uses only
1012 * the ACK duration
1013 */
1014 dur += ath_hal_computetxtime(ah, rt,
1015 bf->bf_m->m_nextpkt->m_pkthdr.len,
1016 rix, shortPreamble);
1017 }
1018 if (isfrag) {
1019 /*
1020 * Force hardware to use computed duration for next
1021 * fragment by disabling multi-rate retry which updates
1022 * duration based on the multi-rate duration table.
1023 */
1024 bf->bf_state.bfs_ismrr = 0;
1025 bf->bf_state.bfs_try0 = ATH_TXMGTTRY;
1026 /* XXX update bfs_rc[0].try? */
1027 }
1028
1029 /* Update the duration field itself */
1030 *(u_int16_t *)wh->i_dur = htole16(dur);
1031 }
1032}
1033
1034static uint8_t
1035ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
1036 int cix, int shortPreamble)
1037{
1038 uint8_t ctsrate;
1039
1040 /*
1041 * CTS transmit rate is derived from the transmit rate
1042 * by looking in the h/w rate table. We must also factor
1043 * in whether or not a short preamble is to be used.
1044 */
1045 /* NB: cix is set above where RTS/CTS is enabled */
1046 KASSERT(cix != 0xff, ("cix not setup"));
1047 ctsrate = rt->info[cix].rateCode;
1048
1049 /* XXX this should only matter for legacy rates */
1050 if (shortPreamble)
1051 ctsrate |= rt->info[cix].shortPreamble;
1052
1053 return (ctsrate);
1054}
1055
1056/*
1057 * Calculate the RTS/CTS duration for legacy frames.
1058 */
1059static int
1060ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
1061 int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
1062 int flags)
1063{
1064 int ctsduration = 0;
1065
1066 /* This mustn't be called for HT modes */
1067 if (rt->info[cix].phy == IEEE80211_T_HT) {
1068 printf("%s: HT rate where it shouldn't be (0x%x)\n",
1069 __func__, rt->info[cix].rateCode);
1070 return (-1);
1071 }
1072
1073 /*
1074 * Compute the transmit duration based on the frame
1075 * size and the size of an ACK frame. We call into the
1076 * HAL to do the computation since it depends on the
1077 * characteristics of the actual PHY being used.
1078 *
1079 * NB: CTS is assumed the same size as an ACK so we can
1080 * use the precalculated ACK durations.
1081 */
1082 if (shortPreamble) {
1083 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
1084 ctsduration += rt->info[cix].spAckDuration;
1085 ctsduration += ath_hal_computetxtime(ah,
1086 rt, pktlen, rix, AH_TRUE);
1087 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
1088 ctsduration += rt->info[rix].spAckDuration;
1089 } else {
1090 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
1091 ctsduration += rt->info[cix].lpAckDuration;
1092 ctsduration += ath_hal_computetxtime(ah,
1093 rt, pktlen, rix, AH_FALSE);
1094 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
1095 ctsduration += rt->info[rix].lpAckDuration;
1096 }
1097
1098 return (ctsduration);
1099}
1100
1101/*
1102 * Update the given ath_buf with updated rts/cts setup and duration
1103 * values.
1104 *
1105 * To support rate lookups for each software retry, the rts/cts rate
1106 * and cts duration must be re-calculated.
1107 *
1108 * This function assumes the RTS/CTS flags have been set as needed;
1109 * mrr has been disabled; and the rate control lookup has been done.
1110 *
1111 * XXX TODO: MRR need only be disabled for the pre-11n NICs.
1112 * XXX The 11n NICs support per-rate RTS/CTS configuration.
1113 */
1114static void
1115ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
1116{
1117 uint16_t ctsduration = 0;
1118 uint8_t ctsrate = 0;
1119 uint8_t rix = bf->bf_state.bfs_rc[0].rix;
1120 uint8_t cix = 0;
1121 const HAL_RATE_TABLE *rt = sc->sc_currates;
1122
1123 /*
1124 * No RTS/CTS enabled? Don't bother.
1125 */
1126 if ((bf->bf_state.bfs_txflags &
1127 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
1128 /* XXX is this really needed? */
1129 bf->bf_state.bfs_ctsrate = 0;
1130 bf->bf_state.bfs_ctsduration = 0;
1131 return;
1132 }
1133
1134 /*
1135 * If protection is enabled, use the protection rix control
1136 * rate. Otherwise use the rate0 control rate.
1137 */
1138 if (bf->bf_state.bfs_doprot)
1139 rix = sc->sc_protrix;
1140 else
1141 rix = bf->bf_state.bfs_rc[0].rix;
1142
1143 /*
1144 * If the raw path has hard-coded ctsrate0 to something,
1145 * use it.
1146 */
1147 if (bf->bf_state.bfs_ctsrate0 != 0)
1148 cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
1149 else
1150 /* Control rate from above */
1151 cix = rt->info[rix].controlRate;
1152
1153 /* Calculate the rtscts rate for the given cix */
1154 ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
1155 bf->bf_state.bfs_shpream);
1156
1157 /* The 11n chipsets do ctsduration calculations for you */
1158 if (! ath_tx_is_11n(sc))
1159 ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
1160 bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
1161 rt, bf->bf_state.bfs_txflags);
1162
1163 /* Squirrel away in ath_buf */
1164 bf->bf_state.bfs_ctsrate = ctsrate;
1165 bf->bf_state.bfs_ctsduration = ctsduration;
1166
1167 /*
1168 * Must disable multi-rate retry when using RTS/CTS.
1169 */
1170 if (!sc->sc_mrrprot) {
1171 bf->bf_state.bfs_ismrr = 0;
1172 bf->bf_state.bfs_try0 =
1173 bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */
1174 }
1175}
1176
1177/*
1178 * Setup the descriptor chain for a normal or fast-frame
1179 * frame.
1180 *
1181 * XXX TODO: extend to include the destination hardware QCU ID.
1182 * Make sure that is correct. Make sure that when being added
1183 * to the mcastq, the CABQ QCUID is set or things will get a bit
1184 * odd.
1185 */
1186static void
1187ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
1188{
1189 struct ath_desc *ds = bf->bf_desc;
1190 struct ath_hal *ah = sc->sc_ah;
1191
1192 ath_hal_setuptxdesc(ah, ds
1193 , bf->bf_state.bfs_pktlen /* packet length */
1194 , bf->bf_state.bfs_hdrlen /* header length */
1195 , bf->bf_state.bfs_atype /* Atheros packet type */
1196 , bf->bf_state.bfs_txpower /* txpower */
1197 , bf->bf_state.bfs_txrate0
1198 , bf->bf_state.bfs_try0 /* series 0 rate/tries */
1199 , bf->bf_state.bfs_keyix /* key cache index */
1200 , bf->bf_state.bfs_txantenna /* antenna mode */
1201 , bf->bf_state.bfs_txflags /* flags */
1202 , bf->bf_state.bfs_ctsrate /* rts/cts rate */
1203 , bf->bf_state.bfs_ctsduration /* rts/cts duration */
1204 );
1205
1206 /*
1207 * This will be overriden when the descriptor chain is written.
1208 */
1209 bf->bf_lastds = ds;
1210 bf->bf_last = bf;
1211
1212 /* Set rate control and descriptor chain for this frame */
1213 ath_tx_set_ratectrl(sc, bf->bf_node, bf);
1214 ath_tx_chaindesclist(sc, bf);
1215}
1216
1217/*
1218 * Do a rate lookup.
1219 *
1220 * This performs a rate lookup for the given ath_buf only if it's required.
1221 * Non-data frames and raw frames don't require it.
1222 *
1223 * This populates the primary and MRR entries; MRR values are
1224 * then disabled later on if something requires it (eg RTS/CTS on
1225 * pre-11n chipsets.
1226 *
1227 * This needs to be done before the RTS/CTS fields are calculated
1228 * as they may depend upon the rate chosen.
1229 */
1230static void
1231ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf)
1232{
1233 uint8_t rate, rix;
1234 int try0;
1235
1236 if (! bf->bf_state.bfs_doratelookup)
1237 return;
1238
1239 /* Get rid of any previous state */
1240 bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1241
1242 ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
1243 ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
1244 bf->bf_state.bfs_pktlen, &rix, &try0, &rate);
1245
1246 /* In case MRR is disabled, make sure rc[0] is setup correctly */
1247 bf->bf_state.bfs_rc[0].rix = rix;
1248 bf->bf_state.bfs_rc[0].ratecode = rate;
1249 bf->bf_state.bfs_rc[0].tries = try0;
1250
1251 if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
1252 ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
1253 bf->bf_state.bfs_rc);
1254 ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
1255
1256 sc->sc_txrix = rix; /* for LED blinking */
1257 sc->sc_lastdatarix = rix; /* for fast frames */
1258 bf->bf_state.bfs_try0 = try0;
1259 bf->bf_state.bfs_txrate0 = rate;
1260}
1261
1262/*
1263 * Transmit the given frame to the hardware.
1264 *
1265 * The frame must already be setup; rate control must already have
1266 * been done.
1267 *
1268 * XXX since the TXQ lock is being held here (and I dislike holding
1269 * it for this long when not doing software aggregation), later on
1270 * break this function into "setup_normal" and "xmit_normal". The
1271 * lock only needs to be held for the ath_tx_handoff call.
1272 */
1273static void
1274ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
1275 struct ath_buf *bf)
1276{
1277
1278 ATH_TXQ_LOCK_ASSERT(txq);
1279
1280 /* Setup the descriptor before handoff */
1281 ath_tx_do_ratelookup(sc, bf);
1282 ath_tx_calc_duration(sc, bf);
1283 ath_tx_calc_protection(sc, bf);
1284 ath_tx_set_rtscts(sc, bf);
1285 ath_tx_rate_fill_rcflags(sc, bf);
1286 ath_tx_setds(sc, bf);
1287
1288 /* Hand off to hardware */
1289 ath_tx_handoff(sc, txq, bf);
1290}
1291
1292
1293
1294static int
1295ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1296 struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq)
1297{
1298 struct ieee80211vap *vap = ni->ni_vap;
1299 struct ath_hal *ah = sc->sc_ah;
1300 struct ifnet *ifp = sc->sc_ifp;
1301 struct ieee80211com *ic = ifp->if_l2com;
1302 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
1303 int error, iswep, ismcast, isfrag, ismrr;
1304 int keyix, hdrlen, pktlen, try0 = 0;
1305 u_int8_t rix = 0, txrate = 0;
1306 struct ath_desc *ds;
1307 struct ieee80211_frame *wh;
1308 u_int subtype, flags;
1309 HAL_PKT_TYPE atype;
1310 const HAL_RATE_TABLE *rt;
1311 HAL_BOOL shortPreamble;
1312 struct ath_node *an;
1313 u_int pri;
1314
1315 /*
1316 * To ensure that both sequence numbers and the CCMP PN handling
1317 * is "correct", make sure that the relevant TID queue is locked.
1318 * Otherwise the CCMP PN and seqno may appear out of order, causing
1319 * re-ordered frames to have out of order CCMP PN's, resulting
1320 * in many, many frame drops.
1321 */
1322 ATH_TXQ_LOCK_ASSERT(txq);
1323
1324 wh = mtod(m0, struct ieee80211_frame *);
1325 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
1326 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1327 isfrag = m0->m_flags & M_FRAG;
1328 hdrlen = ieee80211_anyhdrsize(wh);
1329 /*
1330 * Packet length must not include any
1331 * pad bytes; deduct them here.
1332 */
1333 pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1334
1335 /* Handle encryption twiddling if needed */
1336 if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1337 &pktlen, &keyix)) {
1338 ath_freetx(m0);
1339 return EIO;
1340 }
1341
1342 /* packet header may have moved, reset our local pointer */
1343 wh = mtod(m0, struct ieee80211_frame *);
1344
1345 pktlen += IEEE80211_CRC_LEN;
1346
1347 /*
1348 * Load the DMA map so any coalescing is done. This
1349 * also calculates the number of descriptors we need.
1350 */
1351 error = ath_tx_dmasetup(sc, bf, m0);
1352 if (error != 0)
1353 return error;
1354 bf->bf_node = ni; /* NB: held reference */
1355 m0 = bf->bf_m; /* NB: may have changed */
1356 wh = mtod(m0, struct ieee80211_frame *);
1357
1358 /* setup descriptors */
1359 ds = bf->bf_desc;
1360 rt = sc->sc_currates;
1361 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1362
1363 /*
1364 * NB: the 802.11 layer marks whether or not we should
1365 * use short preamble based on the current mode and
1366 * negotiated parameters.
1367 */
1368 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1369 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1370 shortPreamble = AH_TRUE;
1371 sc->sc_stats.ast_tx_shortpre++;
1372 } else {
1373 shortPreamble = AH_FALSE;
1374 }
1375
1376 an = ATH_NODE(ni);
1377 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
1378 ismrr = 0; /* default no multi-rate retry*/
1379 pri = M_WME_GETAC(m0); /* honor classification */
1380 /* XXX use txparams instead of fixed values */
1381 /*
1382 * Calculate Atheros packet type from IEEE80211 packet header,
1383 * setup for rate calculations, and select h/w transmit queue.
1384 */
1385 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1386 case IEEE80211_FC0_TYPE_MGT:
1387 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1388 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1389 atype = HAL_PKT_TYPE_BEACON;
1390 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1391 atype = HAL_PKT_TYPE_PROBE_RESP;
1392 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1393 atype = HAL_PKT_TYPE_ATIM;
1394 else
1395 atype = HAL_PKT_TYPE_NORMAL; /* XXX */
1396 rix = an->an_mgmtrix;
1397 txrate = rt->info[rix].rateCode;
1398 if (shortPreamble)
1399 txrate |= rt->info[rix].shortPreamble;
1400 try0 = ATH_TXMGTTRY;
1401 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
1402 break;
1403 case IEEE80211_FC0_TYPE_CTL:
1404 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */
1405 rix = an->an_mgmtrix;
1406 txrate = rt->info[rix].rateCode;
1407 if (shortPreamble)
1408 txrate |= rt->info[rix].shortPreamble;
1409 try0 = ATH_TXMGTTRY;
1410 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
1411 break;
1412 case IEEE80211_FC0_TYPE_DATA:
1413 atype = HAL_PKT_TYPE_NORMAL; /* default */
1414 /*
1415 * Data frames: multicast frames go out at a fixed rate,
1416 * EAPOL frames use the mgmt frame rate; otherwise consult
1417 * the rate control module for the rate to use.
1418 */
1419 if (ismcast) {
1420 rix = an->an_mcastrix;
1421 txrate = rt->info[rix].rateCode;
1422 if (shortPreamble)
1423 txrate |= rt->info[rix].shortPreamble;
1424 try0 = 1;
1425 } else if (m0->m_flags & M_EAPOL) {
1426 /* XXX? maybe always use long preamble? */
1427 rix = an->an_mgmtrix;
1428 txrate = rt->info[rix].rateCode;
1429 if (shortPreamble)
1430 txrate |= rt->info[rix].shortPreamble;
1431 try0 = ATH_TXMAXTRY; /* XXX?too many? */
1432 } else {
1433 /*
1434 * Do rate lookup on each TX, rather than using
1435 * the hard-coded TX information decided here.
1436 */
1437 ismrr = 1;
1438 bf->bf_state.bfs_doratelookup = 1;
1439 }
1440 if (cap->cap_wmeParams[pri].wmep_noackPolicy)
1441 flags |= HAL_TXDESC_NOACK;
1442 break;
1443 default:
1444 if_printf(ifp, "bogus frame type 0x%x (%s)\n",
1445 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1446 /* XXX statistic */
1447 ath_freetx(m0);
1448 return EIO;
1449 }
1450
1451 /*
1452 * There are two known scenarios where the frame AC doesn't match
1453 * what the destination TXQ is.
1454 *
1455 * + non-QoS frames (eg management?) that the net80211 stack has
1456 * assigned a higher AC to, but since it's a non-QoS TID, it's
1457 * being thrown into TID 16. TID 16 gets the AC_BE queue.
1458 * It's quite possible that management frames should just be
1459 * direct dispatched to hardware rather than go via the software
1460 * queue; that should be investigated in the future. There are
1461 * some specific scenarios where this doesn't make sense, mostly
1462 * surrounding ADDBA request/response - hence why that is special
1463 * cased.
1464 *
1465 * + Multicast frames going into the VAP mcast queue. That shows up
1466 * as "TXQ 11".
1467 *
1468 * This driver should eventually support separate TID and TXQ locking,
1469 * allowing for arbitrary AC frames to appear on arbitrary software
1470 * queues, being queued to the "correct" hardware queue when needed.
1471 */
1472#if 0
1473 if (txq != sc->sc_ac2q[pri]) {
1474 device_printf(sc->sc_dev,
1475 "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n",
1476 __func__,
1477 txq,
1478 txq->axq_qnum,
1479 pri,
1480 sc->sc_ac2q[pri],
1481 sc->sc_ac2q[pri]->axq_qnum);
1482 }
1483#endif
1484
1485 /*
1486 * Calculate miscellaneous flags.
1487 */
1488 if (ismcast) {
1489 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */
1490 } else if (pktlen > vap->iv_rtsthreshold &&
1491 (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1492 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */
1493 sc->sc_stats.ast_tx_rts++;
1494 }
1495 if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */
1496 sc->sc_stats.ast_tx_noack++;
1497#ifdef IEEE80211_SUPPORT_TDMA
1498 if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1499 DPRINTF(sc, ATH_DEBUG_TDMA,
1500 "%s: discard frame, ACK required w/ TDMA\n", __func__);
1501 sc->sc_stats.ast_tdma_ack++;
1502 ath_freetx(m0);
1503 return EIO;
1504 }
1505#endif
1506
1507 /*
1508 * Determine if a tx interrupt should be generated for
1509 * this descriptor. We take a tx interrupt to reap
1510 * descriptors when the h/w hits an EOL condition or
1511 * when the descriptor is specifically marked to generate
1512 * an interrupt. We periodically mark descriptors in this
1513 * way to insure timely replenishing of the supply needed
1514 * for sending frames. Defering interrupts reduces system
1515 * load and potentially allows more concurrent work to be
1516 * done but if done to aggressively can cause senders to
1517 * backup.
1518 *
1519 * NB: use >= to deal with sc_txintrperiod changing
1520 * dynamically through sysctl.
1521 */
1522 if (flags & HAL_TXDESC_INTREQ) {
1523 txq->axq_intrcnt = 0;
1524 } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1525 flags |= HAL_TXDESC_INTREQ;
1526 txq->axq_intrcnt = 0;
1527 }
1528
1529 /* This point forward is actual TX bits */
1530
1531 /*
1532 * At this point we are committed to sending the frame
1533 * and we don't need to look at m_nextpkt; clear it in
1534 * case this frame is part of frag chain.
1535 */
1536 m0->m_nextpkt = NULL;
1537
1538 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1539 ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1540 sc->sc_hwmap[rix].ieeerate, -1);
1541
1542 if (ieee80211_radiotap_active_vap(vap)) {
1543 u_int64_t tsf = ath_hal_gettsf64(ah);
1544
1545 sc->sc_tx_th.wt_tsf = htole64(tsf);
1546 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1547 if (iswep)
1548 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1549 if (isfrag)
1550 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1551 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1552 sc->sc_tx_th.wt_txpower = ni->ni_txpower;
1553 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1554
1555 ieee80211_radiotap_tx(vap, m0);
1556 }
1557
1558 /* Blank the legacy rate array */
1559 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1560
1561 /*
1562 * ath_buf_set_rate needs at least one rate/try to setup
1563 * the rate scenario.
1564 */
1565 bf->bf_state.bfs_rc[0].rix = rix;
1566 bf->bf_state.bfs_rc[0].tries = try0;
1567 bf->bf_state.bfs_rc[0].ratecode = txrate;
1568
1569 /* Store the decided rate index values away */
1570 bf->bf_state.bfs_pktlen = pktlen;
1571 bf->bf_state.bfs_hdrlen = hdrlen;
1572 bf->bf_state.bfs_atype = atype;
1573 bf->bf_state.bfs_txpower = ni->ni_txpower;
1574 bf->bf_state.bfs_txrate0 = txrate;
1575 bf->bf_state.bfs_try0 = try0;
1576 bf->bf_state.bfs_keyix = keyix;
1577 bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1578 bf->bf_state.bfs_txflags = flags;
1579 bf->bf_state.bfs_shpream = shortPreamble;
1580
1581 /* XXX this should be done in ath_tx_setrate() */
1582 bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */
1583 bf->bf_state.bfs_ctsrate = 0; /* calculated later */
1584 bf->bf_state.bfs_ctsduration = 0;
1585 bf->bf_state.bfs_ismrr = ismrr;
1586
1587 return 0;
1588}
1589
1590/*
1591 * Direct-dispatch the current frame to the hardware.
1592 *
1593 * This can be called by the net80211 code.
1594 *
1595 * XXX what about locking? Or, push the seqno assign into the
1596 * XXX aggregate scheduler so its serialised?
1597 */
1598int
1599ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1600 struct ath_buf *bf, struct mbuf *m0)
1601{
1602 struct ieee80211vap *vap = ni->ni_vap;
1603 struct ath_vap *avp = ATH_VAP(vap);
1604 int r = 0;
1605 u_int pri;
1606 int tid;
1607 struct ath_txq *txq;
1608 int ismcast;
1609 const struct ieee80211_frame *wh;
1610 int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1611 ieee80211_seq seqno;
1612 uint8_t type, subtype;
1613
1614 /*
1615 * Determine the target hardware queue.
1616 *
1617 * For multicast frames, the txq gets overridden appropriately
1618 * depending upon the state of PS.
1619 *
1620 * For any other frame, we do a TID/QoS lookup inside the frame
1621 * to see what the TID should be. If it's a non-QoS frame, the
1622 * AC and TID are overridden. The TID/TXQ code assumes the
1623 * TID is on a predictable hardware TXQ, so we don't support
1624 * having a node TID queued to multiple hardware TXQs.
1625 * This may change in the future but would require some locking
1626 * fudgery.
1627 */
1628 pri = ath_tx_getac(sc, m0);
1629 tid = ath_tx_gettid(sc, m0);
1630
1631 txq = sc->sc_ac2q[pri];
1632 wh = mtod(m0, struct ieee80211_frame *);
1633 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1634 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1635 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1636
1637 /*
1638 * Enforce how deep the multicast queue can grow.
1639 *
1640 * XXX duplicated in ath_raw_xmit().
1641 */
1642 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1643 ATH_TXQ_LOCK(sc->sc_cabq);
1644
1645 if (sc->sc_cabq->axq_depth > sc->sc_txq_mcastq_maxdepth) {
1646 sc->sc_stats.ast_tx_mcastq_overflow++;
1647 r = ENOBUFS;
1648 }
1649
1650 ATH_TXQ_UNLOCK(sc->sc_cabq);
1651
1652 if (r != 0) {
1653 m_freem(m0);
1654 return r;
1655 }
1656 }
1657
1658 /* A-MPDU TX */
1659 is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1660 is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
1661 is_ampdu = is_ampdu_tx | is_ampdu_pending;
1662
1663 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
1664 __func__, tid, pri, is_ampdu);
1665
1666 /* Set local packet state, used to queue packets to hardware */
1667 bf->bf_state.bfs_tid = tid;
1668 bf->bf_state.bfs_txq = txq;
1669 bf->bf_state.bfs_pri = pri;
1670
1671 /*
1672 * When servicing one or more stations in power-save mode
1673 * (or) if there is some mcast data waiting on the mcast
1674 * queue (to prevent out of order delivery) multicast frames
1675 * must be bufferd until after the beacon.
1676 *
1677 * TODO: we should lock the mcastq before we check the length.
1678 */
1679 if (ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) {
1680 txq = &avp->av_mcastq;
1681 /*
1682 * Mark the frame as eventually belonging on the CAB
1683 * queue, so the descriptor setup functions will
1684 * correctly initialise the descriptor 'qcuId' field.
1685 */
1686 bf->bf_state.bfs_txq = sc->sc_cabq;
1687 }
1688
1689 /* Do the generic frame setup */
1690 /* XXX should just bzero the bf_state? */
1691 bf->bf_state.bfs_dobaw = 0;
1692
1693 /*
1694 * Acquire the TXQ lock early, so both the encap and seqno
1695 * are allocated together.
1696 *
1697 * XXX should TXQ for CABQ traffic be the multicast queue,
1698 * or the TXQ the given PRI would allocate from? (eg for
1699 * sequence number allocation locking.)
1700 */
1701 ATH_TXQ_LOCK(txq);
1702
1703 /* A-MPDU TX? Manually set sequence number */
1704 /*
1705 * Don't do it whilst pending; the net80211 layer still
1706 * assigns them.
1707 */
1708 if (is_ampdu_tx) {
1709 /*
1710 * Always call; this function will
1711 * handle making sure that null data frames
1712 * don't get a sequence number from the current
1713 * TID and thus mess with the BAW.
1714 */
1715 seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
1716
1717 /*
1718 * Don't add QoS NULL frames to the BAW.
1719 */
1720 if (IEEE80211_QOS_HAS_SEQ(wh) &&
1721 subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) {
1722 bf->bf_state.bfs_dobaw = 1;
1723 }
1724 }
1725
1726 /*
1727 * If needed, the sequence number has been assigned.
1728 * Squirrel it away somewhere easy to get to.
1729 */
1730 bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
1731
1732 /* Is ampdu pending? fetch the seqno and print it out */
1733 if (is_ampdu_pending)
1734 DPRINTF(sc, ATH_DEBUG_SW_TX,
1735 "%s: tid %d: ampdu pending, seqno %d\n",
1736 __func__, tid, M_SEQNO_GET(m0));
1737
1738 /* This also sets up the DMA map */
1739 r = ath_tx_normal_setup(sc, ni, bf, m0, txq);
1740
1741 if (r != 0)
1742 goto done;
1743
1744 /* At this point m0 could have changed! */
1745 m0 = bf->bf_m;
1746
1747#if 1
1748 /*
1749 * If it's a multicast frame, do a direct-dispatch to the
1750 * destination hardware queue. Don't bother software
1751 * queuing it.
1752 */
1753 /*
1754 * If it's a BAR frame, do a direct dispatch to the
1755 * destination hardware queue. Don't bother software
1756 * queuing it, as the TID will now be paused.
1757 * Sending a BAR frame can occur from the net80211 txa timer
1758 * (ie, retries) or from the ath txtask (completion call.)
1759 * It queues directly to hardware because the TID is paused
1760 * at this point (and won't be unpaused until the BAR has
1761 * either been TXed successfully or max retries has been
1762 * reached.)
1763 */
1764 if (txq == &avp->av_mcastq) {
1765 DPRINTF(sc, ATH_DEBUG_SW_TX,
1766 "%s: bf=%p: mcastq: TX'ing\n", __func__, bf);
1767 ath_tx_xmit_normal(sc, txq, bf);
1768 } else if (type == IEEE80211_FC0_TYPE_CTL &&
1769 subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1770 DPRINTF(sc, ATH_DEBUG_SW_TX,
1771 "%s: BAR: TX'ing direct\n", __func__);
1772 ath_tx_xmit_normal(sc, txq, bf);
1773 } else {
1774 /* add to software queue */
1775 DPRINTF(sc, ATH_DEBUG_SW_TX,
1776 "%s: bf=%p: swq: TX'ing\n", __func__, bf);
1777 ath_tx_swq(sc, ni, txq, bf);
1778 }
1779#else
1780 /*
1781 * For now, since there's no software queue,
1782 * direct-dispatch to the hardware.
1783 */
1784 ath_tx_xmit_normal(sc, txq, bf);
1785#endif
1786done:
1787 ATH_TXQ_UNLOCK(txq);
1788
1789 return 0;
1790}
1791
1792static int
1793ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
1794 struct ath_buf *bf, struct mbuf *m0,
1795 const struct ieee80211_bpf_params *params)
1796{
1797 struct ifnet *ifp = sc->sc_ifp;
1798 struct ieee80211com *ic = ifp->if_l2com;
1799 struct ath_hal *ah = sc->sc_ah;
1800 struct ieee80211vap *vap = ni->ni_vap;
1801 int error, ismcast, ismrr;
1802 int keyix, hdrlen, pktlen, try0, txantenna;
1803 u_int8_t rix, txrate;
1804 struct ieee80211_frame *wh;
1805 u_int flags;
1806 HAL_PKT_TYPE atype;
1807 const HAL_RATE_TABLE *rt;
1808 struct ath_desc *ds;
1809 u_int pri;
1810 int o_tid = -1;
1811 int do_override;
1812
1813 wh = mtod(m0, struct ieee80211_frame *);
1814 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1815 hdrlen = ieee80211_anyhdrsize(wh);
1816 /*
1817 * Packet length must not include any
1818 * pad bytes; deduct them here.
1819 */
1820 /* XXX honor IEEE80211_BPF_DATAPAD */
1821 pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
1822
1823 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
1824 __func__, ismcast);
1825
1826 pri = params->ibp_pri & 3;
1827 /* Override pri if the frame isn't a QoS one */
1828 if (! IEEE80211_QOS_HAS_SEQ(wh))
1829 pri = ath_tx_getac(sc, m0);
1830
1831 /* XXX If it's an ADDBA, override the correct queue */
1832 do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
1833
1834 /* Map ADDBA to the correct priority */
1835 if (do_override) {
1836#if 0
1837 device_printf(sc->sc_dev,
1838 "%s: overriding tid %d pri %d -> %d\n",
1839 __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
1840#endif
1841 pri = TID_TO_WME_AC(o_tid);
1842 }
1843
1844 ATH_TXQ_LOCK(sc->sc_ac2q[pri]);
1845
1846 /* Handle encryption twiddling if needed */
1847 if (! ath_tx_tag_crypto(sc, ni,
1848 m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
1849 &hdrlen, &pktlen, &keyix)) {
1850 ath_freetx(m0);
1851 return EIO;
1852 }
1853 /* packet header may have moved, reset our local pointer */
1854 wh = mtod(m0, struct ieee80211_frame *);
1855
1856 /* Do the generic frame setup */
1857 /* XXX should just bzero the bf_state? */
1858 bf->bf_state.bfs_dobaw = 0;
1859
1860 error = ath_tx_dmasetup(sc, bf, m0);
1861 if (error != 0)
1862 return error;
1863 m0 = bf->bf_m; /* NB: may have changed */
1864 wh = mtod(m0, struct ieee80211_frame *);
1865 bf->bf_node = ni; /* NB: held reference */
1866
1867 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
1868 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
1869 if (params->ibp_flags & IEEE80211_BPF_RTS)
1870 flags |= HAL_TXDESC_RTSENA;
1871 else if (params->ibp_flags & IEEE80211_BPF_CTS) {
1872 /* XXX assume 11g/11n protection? */
1873 bf->bf_state.bfs_doprot = 1;
1874 flags |= HAL_TXDESC_CTSENA;
1875 }
1876 /* XXX leave ismcast to injector? */
1877 if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
1878 flags |= HAL_TXDESC_NOACK;
1879
1880 rt = sc->sc_currates;
1881 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1882 rix = ath_tx_findrix(sc, params->ibp_rate0);
1883 txrate = rt->info[rix].rateCode;
1884 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
1885 txrate |= rt->info[rix].shortPreamble;
1886 sc->sc_txrix = rix;
1887 try0 = params->ibp_try0;
1888 ismrr = (params->ibp_try1 != 0);
1889 txantenna = params->ibp_pri >> 2;
1890 if (txantenna == 0) /* XXX? */
1891 txantenna = sc->sc_txantenna;
1892
1893 /*
1894 * Since ctsrate is fixed, store it away for later
1895 * use when the descriptor fields are being set.
1896 */
1897 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
1898 bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
1899
1900 /*
1901 * NB: we mark all packets as type PSPOLL so the h/w won't
1902 * set the sequence number, duration, etc.
1903 */
1904 atype = HAL_PKT_TYPE_PSPOLL;
1905
1906 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1907 ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
1908 sc->sc_hwmap[rix].ieeerate, -1);
1909
1910 if (ieee80211_radiotap_active_vap(vap)) {
1911 u_int64_t tsf = ath_hal_gettsf64(ah);
1912
1913 sc->sc_tx_th.wt_tsf = htole64(tsf);
1914 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1915 if (wh->i_fc[1] & IEEE80211_FC1_WEP)
1916 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1917 if (m0->m_flags & M_FRAG)
1918 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1919 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1920 sc->sc_tx_th.wt_txpower = ni->ni_txpower;
1921 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1922
1923 ieee80211_radiotap_tx(vap, m0);
1924 }
1925
1926 /*
1927 * Formulate first tx descriptor with tx controls.
1928 */
1929 ds = bf->bf_desc;
1930 /* XXX check return value? */
1931
1932 /* Store the decided rate index values away */
1933 bf->bf_state.bfs_pktlen = pktlen;
1934 bf->bf_state.bfs_hdrlen = hdrlen;
1935 bf->bf_state.bfs_atype = atype;
1936 bf->bf_state.bfs_txpower = params->ibp_power;
1937 bf->bf_state.bfs_txrate0 = txrate;
1938 bf->bf_state.bfs_try0 = try0;
1939 bf->bf_state.bfs_keyix = keyix;
1940 bf->bf_state.bfs_txantenna = txantenna;
1941 bf->bf_state.bfs_txflags = flags;
1942 bf->bf_state.bfs_shpream =
1943 !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
1944
1945 /* Set local packet state, used to queue packets to hardware */
1946 bf->bf_state.bfs_tid = WME_AC_TO_TID(pri);
1947 bf->bf_state.bfs_txq = sc->sc_ac2q[pri];
1948 bf->bf_state.bfs_pri = pri;
1949
1950 /* XXX this should be done in ath_tx_setrate() */
1951 bf->bf_state.bfs_ctsrate = 0;
1952 bf->bf_state.bfs_ctsduration = 0;
1953 bf->bf_state.bfs_ismrr = ismrr;
1954
1955 /* Blank the legacy rate array */
1956 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1957
1958 bf->bf_state.bfs_rc[0].rix =
1959 ath_tx_findrix(sc, params->ibp_rate0);
1960 bf->bf_state.bfs_rc[0].tries = try0;
1961 bf->bf_state.bfs_rc[0].ratecode = txrate;
1962
1963 if (ismrr) {
1964 int rix;
1965
1966 rix = ath_tx_findrix(sc, params->ibp_rate1);
1967 bf->bf_state.bfs_rc[1].rix = rix;
1968 bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
1969
1970 rix = ath_tx_findrix(sc, params->ibp_rate2);
1971 bf->bf_state.bfs_rc[2].rix = rix;
1972 bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
1973
1974 rix = ath_tx_findrix(sc, params->ibp_rate3);
1975 bf->bf_state.bfs_rc[3].rix = rix;
1976 bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
1977 }
1978 /*
1979 * All the required rate control decisions have been made;
1980 * fill in the rc flags.
1981 */
1982 ath_tx_rate_fill_rcflags(sc, bf);
1983
1984 /* NB: no buffered multicast in power save support */
1985
1986 /*
1987 * If we're overiding the ADDBA destination, dump directly
1988 * into the hardware queue, right after any pending
1989 * frames to that node are.
1990 */
1991 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
1992 __func__, do_override);
1993
1994 if (do_override) {
1995 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
1996 } else {
1997 /* Queue to software queue */
1998 ath_tx_swq(sc, ni, sc->sc_ac2q[pri], bf);
1999 }
2000 ATH_TXQ_UNLOCK(sc->sc_ac2q[pri]);
2001
2002 return 0;
2003}
2004
2005/*
2006 * Send a raw frame.
2007 *
2008 * This can be called by net80211.
2009 */
2010int
2011ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2012 const struct ieee80211_bpf_params *params)
2013{
2014 struct ieee80211com *ic = ni->ni_ic;
2015 struct ifnet *ifp = ic->ic_ifp;
2016 struct ath_softc *sc = ifp->if_softc;
2017 struct ath_buf *bf;
2018 struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
2019 int error = 0;
2020
2021 ATH_PCU_LOCK(sc);
2022 if (sc->sc_inreset_cnt > 0) {
2023 device_printf(sc->sc_dev, "%s: sc_inreset_cnt > 0; bailing\n",
2024 __func__);
2025 error = EIO;
2026 ATH_PCU_UNLOCK(sc);
2027 goto bad0;
2028 }
2029 sc->sc_txstart_cnt++;
2030 ATH_PCU_UNLOCK(sc);
2031
2032 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) {
2033 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__,
2034 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ?
2035 "!running" : "invalid");
2036 m_freem(m);
2037 error = ENETDOWN;
2038 goto bad;
2039 }
2040
2041 /*
2042 * Enforce how deep the multicast queue can grow.
2043 *
2044 * XXX duplicated in ath_tx_start().
2045 */
2046 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2047 ATH_TXQ_LOCK(sc->sc_cabq);
2048
2049 if (sc->sc_cabq->axq_depth > sc->sc_txq_mcastq_maxdepth) {
2050 sc->sc_stats.ast_tx_mcastq_overflow++;
2051 error = ENOBUFS;
2052 }
2053
2054 ATH_TXQ_UNLOCK(sc->sc_cabq);
2055
2056 if (error != 0) {
2057 m_freem(m);
2058 goto bad;
2059 }
2060 }
2061
2062 /*
2063 * Grab a TX buffer and associated resources.
2064 */
2065 bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT);
2066 if (bf == NULL) {
2067 sc->sc_stats.ast_tx_nobuf++;
2068 m_freem(m);
2069 error = ENOBUFS;
2070 goto bad;
2071 }
2072
2073 if (params == NULL) {
2074 /*
2075 * Legacy path; interpret frame contents to decide
2076 * precisely how to send the frame.
2077 */
2078 if (ath_tx_start(sc, ni, bf, m)) {
2079 error = EIO; /* XXX */
2080 goto bad2;
2081 }
2082 } else {
2083 /*
2084 * Caller supplied explicit parameters to use in
2085 * sending the frame.
2086 */
2087 if (ath_tx_raw_start(sc, ni, bf, m, params)) {
2088 error = EIO; /* XXX */
2089 goto bad2;
2090 }
2091 }
2092 sc->sc_wd_timer = 5;
2093 ifp->if_opackets++;
2094 sc->sc_stats.ast_tx_raw++;
2095
2096 ATH_PCU_LOCK(sc);
2097 sc->sc_txstart_cnt--;
2098 ATH_PCU_UNLOCK(sc);
2099
2100 return 0;
2101bad2:
2102 ATH_TXBUF_LOCK(sc);
2103 ath_returnbuf_head(sc, bf);
2104 ATH_TXBUF_UNLOCK(sc);
2105bad:
2106 ATH_PCU_LOCK(sc);
2107 sc->sc_txstart_cnt--;
2108 ATH_PCU_UNLOCK(sc);
2109bad0:
2110 ifp->if_oerrors++;
2111 sc->sc_stats.ast_tx_raw_fail++;
2112 ieee80211_free_node(ni);
2113
2114 return error;
2115}
2116
2117/* Some helper functions */
2118
2119/*
2120 * ADDBA (and potentially others) need to be placed in the same
2121 * hardware queue as the TID/node it's relating to. This is so
2122 * it goes out after any pending non-aggregate frames to the
2123 * same node/TID.
2124 *
2125 * If this isn't done, the ADDBA can go out before the frames
2126 * queued in hardware. Even though these frames have a sequence
2127 * number -earlier- than the ADDBA can be transmitted (but
2128 * no frames whose sequence numbers are after the ADDBA should
2129 * be!) they'll arrive after the ADDBA - and the receiving end
2130 * will simply drop them as being out of the BAW.
2131 *
2132 * The frames can't be appended to the TID software queue - it'll
2133 * never be sent out. So these frames have to be directly
2134 * dispatched to the hardware, rather than queued in software.
2135 * So if this function returns true, the TXQ has to be
2136 * overridden and it has to be directly dispatched.
2137 *
2138 * It's a dirty hack, but someone's gotta do it.
2139 */
2140
2141/*
2142 * XXX doesn't belong here!
2143 */
2144static int
2145ieee80211_is_action(struct ieee80211_frame *wh)
2146{
2147 /* Type: Management frame? */
2148 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
2149 IEEE80211_FC0_TYPE_MGT)
2150 return 0;
2151
2152 /* Subtype: Action frame? */
2153 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) !=
2154 IEEE80211_FC0_SUBTYPE_ACTION)
2155 return 0;
2156
2157 return 1;
2158}
2159
2160#define MS(_v, _f) (((_v) & _f) >> _f##_S)
2161/*
2162 * Return an alternate TID for ADDBA request frames.
2163 *
2164 * Yes, this likely should be done in the net80211 layer.
2165 */
2166static int
2167ath_tx_action_frame_override_queue(struct ath_softc *sc,
2168 struct ieee80211_node *ni,
2169 struct mbuf *m0, int *tid)
2170{
2171 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
2172 struct ieee80211_action_ba_addbarequest *ia;
2173 uint8_t *frm;
2174 uint16_t baparamset;
2175
2176 /* Not action frame? Bail */
2177 if (! ieee80211_is_action(wh))
2178 return 0;
2179
2180 /* XXX Not needed for frames we send? */
2181#if 0
2182 /* Correct length? */
2183 if (! ieee80211_parse_action(ni, m))
2184 return 0;
2185#endif
2186
2187 /* Extract out action frame */
2188 frm = (u_int8_t *)&wh[1];
2189 ia = (struct ieee80211_action_ba_addbarequest *) frm;
2190
2191 /* Not ADDBA? Bail */
2192 if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
2193 return 0;
2194 if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
2195 return 0;
2196
2197 /* Extract TID, return it */
2198 baparamset = le16toh(ia->rq_baparamset);
2199 *tid = (int) MS(baparamset, IEEE80211_BAPS_TID);
2200
2201 return 1;
2202}
2203#undef MS
2204
2205/* Per-node software queue operations */
2206
2207/*
2208 * Add the current packet to the given BAW.
2209 * It is assumed that the current packet
2210 *
2211 * + fits inside the BAW;
2212 * + already has had a sequence number allocated.
2213 *
2214 * Since the BAW status may be modified by both the ath task and
2215 * the net80211/ifnet contexts, the TID must be locked.
2216 */
2217void
2218ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
2219 struct ath_tid *tid, struct ath_buf *bf)
2220{
2221 int index, cindex;
2222 struct ieee80211_tx_ampdu *tap;
2223
2224 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2225 ATH_TID_LOCK_ASSERT(sc, tid);
2226
2227 if (bf->bf_state.bfs_isretried)
2228 return;
2229
2230 tap = ath_tx_get_tx_tid(an, tid->tid);
2231
2232 if (! bf->bf_state.bfs_dobaw) {
2233 device_printf(sc->sc_dev,
2234 "%s: dobaw=0, seqno=%d, window %d:%d\n",
2235 __func__,
2236 SEQNO(bf->bf_state.bfs_seqno),
2237 tap->txa_start,
2238 tap->txa_wnd);
2239 }
2240
2241 if (bf->bf_state.bfs_addedbaw)
2242 device_printf(sc->sc_dev,
2243 "%s: re-added? tid=%d, seqno %d; window %d:%d; "
2244 "baw head=%d tail=%d\n",
2245 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2246 tap->txa_start, tap->txa_wnd, tid->baw_head,
2247 tid->baw_tail);
2248
2249 /*
2250 * Verify that the given sequence number is not outside of the
2251 * BAW. Complain loudly if that's the case.
2252 */
2253 if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2254 SEQNO(bf->bf_state.bfs_seqno))) {
2255 device_printf(sc->sc_dev,
2256 "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; "
2257 "baw head=%d tail=%d\n",
2258 __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2259 tap->txa_start, tap->txa_wnd, tid->baw_head,
2260 tid->baw_tail);
2261 }
2262
2263 /*
2264 * ni->ni_txseqs[] is the currently allocated seqno.
2265 * the txa state contains the current baw start.
2266 */
2267 index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
2268 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2269 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2270 "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
2271 "baw head=%d tail=%d\n",
2272 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2273 tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
2274 tid->baw_tail);
2275
2276
2277#if 0
2278 assert(tid->tx_buf[cindex] == NULL);
2279#endif
2280 if (tid->tx_buf[cindex] != NULL) {
2281 device_printf(sc->sc_dev,
2282 "%s: ba packet dup (index=%d, cindex=%d, "
2283 "head=%d, tail=%d)\n",
2284 __func__, index, cindex, tid->baw_head, tid->baw_tail);
2285 device_printf(sc->sc_dev,
2286 "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
2287 __func__,
2288 tid->tx_buf[cindex],
2289 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
2290 bf,
2291 SEQNO(bf->bf_state.bfs_seqno)
2292 );
2293 }
2294 tid->tx_buf[cindex] = bf;
2295
2296 if (index >= ((tid->baw_tail - tid->baw_head) &
2297 (ATH_TID_MAX_BUFS - 1))) {
2298 tid->baw_tail = cindex;
2299 INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
2300 }
2301}
2302
2303/*
2304 * Flip the BAW buffer entry over from the existing one to the new one.
2305 *
2306 * When software retransmitting a (sub-)frame, it is entirely possible that
2307 * the frame ath_buf is marked as BUSY and can't be immediately reused.
2308 * In that instance the buffer is cloned and the new buffer is used for
2309 * retransmit. We thus need to update the ath_buf slot in the BAW buf
2310 * tracking array to maintain consistency.
2311 */
2312static void
2313ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
2314 struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
2315{
2316 int index, cindex;
2317 struct ieee80211_tx_ampdu *tap;
2318 int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
2319
2320 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2321 ATH_TID_LOCK_ASSERT(sc, tid);
2322
2323 tap = ath_tx_get_tx_tid(an, tid->tid);
2324 index = ATH_BA_INDEX(tap->txa_start, seqno);
2325 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2326
2327 /*
2328 * Just warn for now; if it happens then we should find out
2329 * about it. It's highly likely the aggregation session will
2330 * soon hang.
2331 */
2332 if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
2333 device_printf(sc->sc_dev, "%s: retransmitted buffer"
2334 " has mismatching seqno's, BA session may hang.\n",
2335 __func__);
2336 device_printf(sc->sc_dev, "%s: old seqno=%d, new_seqno=%d\n",
2337 __func__,
2338 old_bf->bf_state.bfs_seqno,
2339 new_bf->bf_state.bfs_seqno);
2340 }
2341
2342 if (tid->tx_buf[cindex] != old_bf) {
2343 device_printf(sc->sc_dev, "%s: ath_buf pointer incorrect; "
2344 " has m BA session may hang.\n",
2345 __func__);
2346 device_printf(sc->sc_dev, "%s: old bf=%p, new bf=%p\n",
2347 __func__,
2348 old_bf, new_bf);
2349 }
2350
2351 tid->tx_buf[cindex] = new_bf;
2352}
2353
2354/*
2355 * seq_start - left edge of BAW
2356 * seq_next - current/next sequence number to allocate
2357 *
2358 * Since the BAW status may be modified by both the ath task and
2359 * the net80211/ifnet contexts, the TID must be locked.
2360 */
2361static void
2362ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2363 struct ath_tid *tid, const struct ath_buf *bf)
2364{
2365 int index, cindex;
2366 struct ieee80211_tx_ampdu *tap;
2367 int seqno = SEQNO(bf->bf_state.bfs_seqno);
2368
2369 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2370 ATH_TID_LOCK_ASSERT(sc, tid);
2371
2372 tap = ath_tx_get_tx_tid(an, tid->tid);
2373 index = ATH_BA_INDEX(tap->txa_start, seqno);
2374 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2375
2376 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2377 "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2378 "baw head=%d, tail=%d\n",
2379 __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2380 cindex, tid->baw_head, tid->baw_tail);
2381
2382 /*
2383 * If this occurs then we have a big problem - something else
2384 * has slid tap->txa_start along without updating the BAW
2385 * tracking start/end pointers. Thus the TX BAW state is now
2386 * completely busted.
2387 *
2388 * But for now, since I haven't yet fixed TDMA and buffer cloning,
2389 * it's quite possible that a cloned buffer is making its way
2390 * here and causing it to fire off. Disable TDMA for now.
2391 */
2392 if (tid->tx_buf[cindex] != bf) {
2393 device_printf(sc->sc_dev,
2394 "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
2395 __func__,
2396 bf, SEQNO(bf->bf_state.bfs_seqno),
2397 tid->tx_buf[cindex],
2398 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno));
2399 }
2400
2401 tid->tx_buf[cindex] = NULL;
2402
2403 while (tid->baw_head != tid->baw_tail &&
2404 !tid->tx_buf[tid->baw_head]) {
2405 INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2406 INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2407 }
2408 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2409 "%s: baw is now %d:%d, baw head=%d\n",
2410 __func__, tap->txa_start, tap->txa_wnd, tid->baw_head);
2411}
2412
2413/*
2414 * Mark the current node/TID as ready to TX.
2415 *
2416 * This is done to make it easy for the software scheduler to
2417 * find which nodes have data to send.
2418 *
2419 * The TXQ lock must be held.
2420 */
2421static void
2422ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2423{
2424 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2425
2426 ATH_TXQ_LOCK_ASSERT(txq);
2427
2428 if (tid->paused)
2429 return; /* paused, can't schedule yet */
2430
2431 if (tid->sched)
2432 return; /* already scheduled */
2433
2434 tid->sched = 1;
2435
2436 TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2437}
2438
2439/*
2440 * Mark the current node as no longer needing to be polled for
2441 * TX packets.
2442 *
2443 * The TXQ lock must be held.
2444 */
2445static void
2446ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2447{
2448 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2449
2450 ATH_TXQ_LOCK_ASSERT(txq);
2451
2452 if (tid->sched == 0)
2453 return;
2454
2455 tid->sched = 0;
2456 TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2457}
2458
2459/*
2460 * Assign a sequence number manually to the given frame.
2461 *
2462 * This should only be called for A-MPDU TX frames.
2463 */
2464static ieee80211_seq
2465ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2466 struct ath_buf *bf, struct mbuf *m0)
2467{
2468 struct ieee80211_frame *wh;
2469 int tid, pri;
2470 ieee80211_seq seqno;
2471 uint8_t subtype;
2472
2473 /* TID lookup */
2474 wh = mtod(m0, struct ieee80211_frame *);
2475 pri = M_WME_GETAC(m0); /* honor classification */
2476 tid = WME_AC_TO_TID(pri);
2477 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n",
2478 __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2479
2480 /* XXX Is it a control frame? Ignore */
2481
2482 /* Does the packet require a sequence number? */
2483 if (! IEEE80211_QOS_HAS_SEQ(wh))
2484 return -1;
2485
2486 ATH_TID_LOCK_ASSERT(sc, &(ATH_NODE(ni)->an_tid[tid]));
2487
2488 /*
2489 * Is it a QOS NULL Data frame? Give it a sequence number from
2490 * the default TID (IEEE80211_NONQOS_TID.)
2491 *
2492 * The RX path of everything I've looked at doesn't include the NULL
2493 * data frame sequence number in the aggregation state updates, so
2494 * assigning it a sequence number there will cause a BAW hole on the
2495 * RX side.
2496 */
2497 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2498 if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) {
2499 /* XXX no locking for this TID? This is a bit of a problem. */
2500 seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
2501 INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
2502 } else {
2503 /* Manually assign sequence number */
2504 seqno = ni->ni_txseqs[tid];
2505 INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
2506 }
2507 *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
2508 M_SEQNO_SET(m0, seqno);
2509
2510 /* Return so caller can do something with it if needed */
2511 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: -> seqno=%d\n", __func__, seqno);
2512 return seqno;
2513}
2514
2515/*
2516 * Attempt to direct dispatch an aggregate frame to hardware.
2517 * If the frame is out of BAW, queue.
2518 * Otherwise, schedule it as a single frame.
2519 */
2520static void
2521ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an,
2522 struct ath_txq *txq, struct ath_buf *bf)
2523{
2524 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
2525// struct ath_txq *txq = bf->bf_state.bfs_txq;
2526 struct ieee80211_tx_ampdu *tap;
2527
2528 if (txq != bf->bf_state.bfs_txq) {
2529 device_printf(sc->sc_dev, "%s: txq %d != bfs_txq %d!\n",
2530 __func__,
2531 txq->axq_qnum,
2532 bf->bf_state.bfs_txq->axq_qnum);
2533 }
2534
2535 ATH_TXQ_LOCK_ASSERT(txq);
2536 ATH_TID_LOCK_ASSERT(sc, tid);
2537
2538 tap = ath_tx_get_tx_tid(an, tid->tid);
2539
2540 /* paused? queue */
2541 if (tid->paused) {
2542 ATH_TXQ_INSERT_HEAD(tid, bf, bf_list);
2543 /* XXX don't sched - we're paused! */
2544 return;
2545 }
2546
2547 /* outside baw? queue */
2548 if (bf->bf_state.bfs_dobaw &&
2549 (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2550 SEQNO(bf->bf_state.bfs_seqno)))) {
2551 ATH_TXQ_INSERT_HEAD(tid, bf, bf_list);
2552 ath_tx_tid_sched(sc, tid);
2553 return;
2554 }
2555
2556 /*
2557 * This is a temporary check and should be removed once
2558 * all the relevant code paths have been fixed.
2559 *
2560 * During aggregate retries, it's possible that the head
2561 * frame will fail (which has the bfs_aggr and bfs_nframes
2562 * fields set for said aggregate) and will be retried as
2563 * a single frame. In this instance, the values should
2564 * be reset or the completion code will get upset with you.
2565 */
2566 if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) {
2567 device_printf(sc->sc_dev, "%s: bfs_aggr=%d, bfs_nframes=%d\n",
2568 __func__,
2569 bf->bf_state.bfs_aggr,
2570 bf->bf_state.bfs_nframes);
2571 bf->bf_state.bfs_aggr = 0;
2572 bf->bf_state.bfs_nframes = 1;
2573 }
2574
2575 /* Direct dispatch to hardware */
2576 ath_tx_do_ratelookup(sc, bf);
2577 ath_tx_calc_duration(sc, bf);
2578 ath_tx_calc_protection(sc, bf);
2579 ath_tx_set_rtscts(sc, bf);
2580 ath_tx_rate_fill_rcflags(sc, bf);
2581 ath_tx_setds(sc, bf);
2582
2583 /* Statistics */
2584 sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
2585
2586 /* Track per-TID hardware queue depth correctly */
2587 tid->hwq_depth++;
2588
2589 /* Add to BAW */
2590 if (bf->bf_state.bfs_dobaw) {
2591 ath_tx_addto_baw(sc, an, tid, bf);
2592 bf->bf_state.bfs_addedbaw = 1;
2593 }
2594
2595 /* Set completion handler, multi-frame aggregate or not */
2596 bf->bf_comp = ath_tx_aggr_comp;
2597
2598 /* Hand off to hardware */
2599 ath_tx_handoff(sc, txq, bf);
2600}
2601
2602/*
2603 * Attempt to send the packet.
2604 * If the queue isn't busy, direct-dispatch.
2605 * If the queue is busy enough, queue the given packet on the
2606 * relevant software queue.
2607 */
2608void
2609ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_txq *txq,
2610 struct ath_buf *bf)
2611{
2612 struct ath_node *an = ATH_NODE(ni);
2613 struct ieee80211_frame *wh;
2614 struct ath_tid *atid;
2615 int pri, tid;
2616 struct mbuf *m0 = bf->bf_m;
2617
2618 ATH_TXQ_LOCK_ASSERT(txq);
2619
2620 /* Fetch the TID - non-QoS frames get assigned to TID 16 */
2621 wh = mtod(m0, struct ieee80211_frame *);
2622 pri = ath_tx_getac(sc, m0);
2623 tid = ath_tx_gettid(sc, m0);
2624 atid = &an->an_tid[tid];
2625
2626 ATH_TID_LOCK_ASSERT(sc, atid);
2627
2628 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
2629 __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2630
2631 /* Set local packet state, used to queue packets to hardware */
2632 /* XXX potentially duplicate info, re-check */
2633 /* XXX remember, txq must be the hardware queue, not the av_mcastq */
2634 bf->bf_state.bfs_tid = tid;
2635 bf->bf_state.bfs_txq = txq;
2636 bf->bf_state.bfs_pri = pri;
2637
2638 /*
2639 * If the hardware queue isn't busy, queue it directly.
2640 * If the hardware queue is busy, queue it.
2641 * If the TID is paused or the traffic it outside BAW, software
2642 * queue it.
2643 */
2644 if (atid->paused) {
2645 /* TID is paused, queue */
2646 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
2647 ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2648 } else if (ath_tx_ampdu_pending(sc, an, tid)) {
2649 /* AMPDU pending; queue */
2650 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
2651 ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2652 /* XXX sched? */
2653 } else if (ath_tx_ampdu_running(sc, an, tid)) {
2654 /* AMPDU running, attempt direct dispatch if possible */
2655
2656 /*
2657 * Always queue the frame to the tail of the list.
2658 */
2659 ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2660
2661 /*
2662 * If the hardware queue isn't busy, direct dispatch
2663 * the head frame in the list. Don't schedule the
2664 * TID - let it build some more frames first?
2665 *
2666 * Otherwise, schedule the TID.
2667 */
2668 if (txq->axq_depth < sc->sc_hwq_limit) {
2669 bf = TAILQ_FIRST(&atid->axq_q);
2670 ATH_TXQ_REMOVE(atid, bf, bf_list);
2671
2672 /*
2673 * Ensure it's definitely treated as a non-AMPDU
2674 * frame - this information may have been left
2675 * over from a previous attempt.
2676 */
2677 bf->bf_state.bfs_aggr = 0;
2678 bf->bf_state.bfs_nframes = 1;
2679
2680 /* Queue to the hardware */
2681 ath_tx_xmit_aggr(sc, an, txq, bf);
2682 DPRINTF(sc, ATH_DEBUG_SW_TX,
2683 "%s: xmit_aggr\n",
2684 __func__);
2685 } else {
2686 DPRINTF(sc, ATH_DEBUG_SW_TX,
2687 "%s: ampdu; swq'ing\n",
2688 __func__);
2689 ath_tx_tid_sched(sc, atid);
2690 }
2691 } else if (txq->axq_depth < sc->sc_hwq_limit) {
2692 /* AMPDU not running, attempt direct dispatch */
2693 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
2694 ath_tx_xmit_normal(sc, txq, bf);
2695 } else {
2696 /* Busy; queue */
2697 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
2698 ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2699 ath_tx_tid_sched(sc, atid);
2700 }
2701}
2702
2703/*
2704 * Do the basic frame setup stuff that's required before the frame
2705 * is added to a software queue.
2706 *
2707 * All frames get mostly the same treatment and it's done once.
2708 * Retransmits fiddle with things like the rate control setup,
2709 * setting the retransmit bit in the packet; doing relevant DMA/bus
2710 * syncing and relinking it (back) into the hardware TX queue.
2711 *
2712 * Note that this may cause the mbuf to be reallocated, so
2713 * m0 may not be valid.
2714 */
2715
2716
2717/*
2718 * Configure the per-TID node state.
2719 *
2720 * This likely belongs in if_ath_node.c but I can't think of anywhere
2721 * else to put it just yet.
2722 *
2723 * This sets up the SLISTs and the mutex as appropriate.
2724 */
2725void
2726ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
2727{
2728 int i, j;
2729 struct ath_tid *atid;
2730
2731 for (i = 0; i < IEEE80211_TID_SIZE; i++) {
2732 atid = &an->an_tid[i];
|
2733
2734 /* XXX now with this bzer(), is the field 0'ing needed? */
2735 bzero(atid, sizeof(*atid));
2736 |
2737 TAILQ_INIT(&atid->axq_q);
|
| 2738 TAILQ_INIT(&atid->filtq.axq_q); |
2739 atid->tid = i;
2740 atid->an = an;
2741 for (j = 0; j < ATH_TID_MAX_BUFS; j++)
2742 atid->tx_buf[j] = NULL;
2743 atid->baw_head = atid->baw_tail = 0;
2744 atid->paused = 0;
2745 atid->sched = 0;
2746 atid->hwq_depth = 0;
2747 atid->cleanup_inprogress = 0;
|
| 2748 atid->clrdmask = 1; /* Always start by setting this bit */ |
2749 if (i == IEEE80211_NONQOS_TID)
2750 atid->ac = WME_AC_BE;
2751 else
2752 atid->ac = TID_TO_WME_AC(i);
2753 }
2754}
2755
2756/*
2757 * Pause the current TID. This stops packets from being transmitted
2758 * on it.
2759 *
2760 * Since this is also called from upper layers as well as the driver,
2761 * it will get the TID lock.
2762 */
2763static void
2764ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
2765{
2766
2767 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2768 tid->paused++;
2769 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: paused = %d\n",
2770 __func__, tid->paused);
2771}
2772
2773/*
2774 * Unpause the current TID, and schedule it if needed.
2775 */
2776static void
2777ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
2778{
2779 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2780
2781 tid->paused--;
2782
2783 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: unpaused = %d\n",
2784 __func__, tid->paused);
2785
2786 if (tid->paused || tid->axq_depth == 0) {
2787 return;
2788 }
2789
|
2790 /* XXX isfiltered shouldn't ever be 0 at this point */
2791 if (tid->isfiltered == 1) {
2792 device_printf(sc->sc_dev, "%s: filtered?!\n", __func__);
2793 return;
2794 }
2795 |
2796 ath_tx_tid_sched(sc, tid);
2797 /* Punt some frames to the hardware if needed */
2798 //ath_txq_sched(sc, sc->sc_ac2q[tid->ac]);
2799 taskqueue_enqueue(sc->sc_tq, &sc->sc_txqtask);
2800}
2801
2802/*
|
2803 * Add the given ath_buf to the TID filtered frame list.
2804 * This requires the TID be filtered.
2805 */
2806static void
2807ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid,
2808 struct ath_buf *bf)
2809{
2810
2811 ATH_TID_LOCK_ASSERT(sc, tid);
2812 if (! tid->isfiltered)
2813 device_printf(sc->sc_dev, "%s: not filtered?!\n", __func__);
2814
2815 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf);
2816
2817 /* Set the retry bit and bump the retry counter */
2818 ath_tx_set_retry(sc, bf);
2819 sc->sc_stats.ast_tx_swfiltered++;
2820
2821 ATH_TXQ_INSERT_TAIL(&tid->filtq, bf, bf_list);
2822}
2823
2824/*
2825 * Handle a completed filtered frame from the given TID.
2826 * This just enables/pauses the filtered frame state if required
2827 * and appends the filtered frame to the filtered queue.
2828 */
2829static void
2830ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid,
2831 struct ath_buf *bf)
2832{
2833
2834 ATH_TID_LOCK_ASSERT(sc, tid);
2835
2836 if (! tid->isfiltered) {
2837 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: filter transition\n",
2838 __func__);
2839 tid->isfiltered = 1;
2840 ath_tx_tid_pause(sc, tid);
2841 }
2842
2843 /* Add the frame to the filter queue */
2844 ath_tx_tid_filt_addbuf(sc, tid, bf);
2845}
2846
2847/*
2848 * Complete the filtered frame TX completion.
2849 *
2850 * If there are no more frames in the hardware queue, unpause/unfilter
2851 * the TID if applicable. Otherwise we will wait for a node PS transition
2852 * to unfilter.
2853 */
2854static void
2855ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid)
2856{
2857 struct ath_buf *bf;
2858
2859 ATH_TID_LOCK_ASSERT(sc, tid);
2860
2861 if (tid->hwq_depth != 0)
2862 return;
2863
2864 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: hwq=0, transition back\n",
2865 __func__);
2866 tid->isfiltered = 0;
2867 tid->clrdmask = 1;
2868
2869 /* XXX this is really quite inefficient */
2870 while ((bf = TAILQ_LAST(&tid->filtq.axq_q, ath_bufhead_s)) != NULL) {
2871 ATH_TXQ_REMOVE(&tid->filtq, bf, bf_list);
2872 ATH_TXQ_INSERT_HEAD(tid, bf, bf_list);
2873 }
2874
2875 ath_tx_tid_resume(sc, tid);
2876}
2877
2878/*
2879 * Called when a single (aggregate or otherwise) frame is completed.
2880 *
2881 * Returns 1 if the buffer could be added to the filtered list
2882 * (cloned or otherwise), 0 if the buffer couldn't be added to the
2883 * filtered list (failed clone; expired retry) and the caller should
2884 * free it and handle it like a failure (eg by sending a BAR.)
2885 */
2886static int
2887ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid,
2888 struct ath_buf *bf)
2889{
2890 struct ath_buf *nbf;
2891 int retval;
2892
2893 ATH_TID_LOCK_ASSERT(sc, tid);
2894
2895 /*
2896 * Don't allow a filtered frame to live forever.
2897 */
2898 if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
2899 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
2900 "%s: bf=%p, seqno=%d, exceeded retries\n",
2901 __func__,
2902 bf,
2903 bf->bf_state.bfs_seqno);
2904 return (0);
2905 }
2906
2907 /*
2908 * A busy buffer can't be added to the retry list.
2909 * It needs to be cloned.
2910 */
2911 if (bf->bf_flags & ATH_BUF_BUSY) {
2912 nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
2913 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
2914 "%s: busy buffer clone: %p -> %p\n",
2915 __func__, bf, nbf);
2916 } else {
2917 nbf = bf;
2918 }
2919
2920 if (nbf == NULL) {
2921 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
2922 "%s: busy buffer couldn't be cloned (%p)!\n",
2923 __func__, bf);
2924 retval = 1;
2925 } else {
2926 ath_tx_tid_filt_comp_buf(sc, tid, nbf);
2927 retval = 0;
2928 }
2929 ath_tx_tid_filt_comp_complete(sc, tid);
2930
2931 return (retval);
2932}
2933
2934static void
2935ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid,
2936 struct ath_buf *bf_first, ath_bufhead *bf_q)
2937{
2938 struct ath_buf *bf, *bf_next, *nbf;
2939
2940 ATH_TID_LOCK_ASSERT(sc, tid);
2941
2942 bf = bf_first;
2943 while (bf) {
2944 bf_next = bf->bf_next;
2945 bf->bf_next = NULL; /* Remove it from the aggr list */
2946
2947 /*
2948 * Don't allow a filtered frame to live forever.
2949 */
2950 if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
2951 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
2952 "%s: bf=%p, seqno=%d, exceeded retries\n",
2953 __func__,
2954 bf,
2955 bf->bf_state.bfs_seqno);
2956 TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
2957 goto next;
2958 }
2959
2960 if (bf->bf_flags & ATH_BUF_BUSY) {
2961 nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
2962 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
2963 "%s: busy buffer cloned: %p -> %p",
2964 __func__, bf, nbf);
2965 } else {
2966 nbf = bf;
2967 }
2968
2969 /*
2970 * If the buffer couldn't be cloned, add it to bf_q;
2971 * the caller will free the buffer(s) as required.
2972 */
2973 if (nbf == NULL) {
2974 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
2975 "%s: buffer couldn't be cloned! (%p)\n",
2976 __func__, bf);
2977 TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
2978 } else {
2979 ath_tx_tid_filt_comp_buf(sc, tid, nbf);
2980 }
2981next:
2982 bf = bf_next;
2983 }
2984
2985 ath_tx_tid_filt_comp_complete(sc, tid);
2986}
2987
2988/* |
2989 * Suspend the queue because we need to TX a BAR.
2990 */
2991static void
2992ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
2993{
2994 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2995
2996 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
2997 "%s: tid=%p, bar_wait=%d, bar_tx=%d, called\n",
2998 __func__,
2999 tid,
3000 tid->bar_wait,
3001 tid->bar_tx);
3002
3003 /* We shouldn't be called when bar_tx is 1 */
3004 if (tid->bar_tx) {
3005 device_printf(sc->sc_dev, "%s: bar_tx is 1?!\n",
3006 __func__);
3007 }
3008
3009 /* If we've already been called, just be patient. */
3010 if (tid->bar_wait)
3011 return;
3012
3013 /* Wait! */
3014 tid->bar_wait = 1;
3015
3016 /* Only one pause, no matter how many frames fail */
3017 ath_tx_tid_pause(sc, tid);
3018}
3019
3020/*
3021 * We've finished with BAR handling - either we succeeded or
3022 * failed. Either way, unsuspend TX.
3023 */
3024static void
3025ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
3026{
3027 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
3028
3029 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3030 "%s: tid=%p, called\n",
3031 __func__,
3032 tid);
3033
3034 if (tid->bar_tx == 0 || tid->bar_wait == 0) {
3035 device_printf(sc->sc_dev, "%s: bar_tx=%d, bar_wait=%d: ?\n",
3036 __func__, tid->bar_tx, tid->bar_wait);
3037 }
3038
3039 tid->bar_tx = tid->bar_wait = 0;
3040 ath_tx_tid_resume(sc, tid);
3041}
3042
3043/*
3044 * Return whether we're ready to TX a BAR frame.
3045 *
3046 * Requires the TID lock be held.
3047 */
3048static int
3049ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
3050{
3051
3052 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
3053
3054 if (tid->bar_wait == 0 || tid->hwq_depth > 0)
3055 return (0);
3056
3057 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, "%s: tid=%p (%d), bar ready\n",
3058 __func__, tid, tid->tid);
3059
3060 return (1);
3061}
3062
3063/*
3064 * Check whether the current TID is ready to have a BAR
3065 * TXed and if so, do the TX.
3066 *
3067 * Since the TID/TXQ lock can't be held during a call to
3068 * ieee80211_send_bar(), we have to do the dirty thing of unlocking it,
3069 * sending the BAR and locking it again.
3070 *
3071 * Eventually, the code to send the BAR should be broken out
3072 * from this routine so the lock doesn't have to be reacquired
3073 * just to be immediately dropped by the caller.
3074 */
3075static void
3076ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
3077{
3078 struct ieee80211_tx_ampdu *tap;
3079
3080 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
3081
3082 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3083 "%s: tid=%p, called\n",
3084 __func__,
3085 tid);
3086
3087 tap = ath_tx_get_tx_tid(tid->an, tid->tid);
3088
3089 /*
3090 * This is an error condition!
3091 */
3092 if (tid->bar_wait == 0 || tid->bar_tx == 1) {
3093 device_printf(sc->sc_dev,
3094 "%s: tid=%p, bar_tx=%d, bar_wait=%d: ?\n",
3095 __func__,
3096 tid,
3097 tid->bar_tx,
3098 tid->bar_wait);
3099 return;
3100 }
3101
3102 /* Don't do anything if we still have pending frames */
3103 if (tid->hwq_depth > 0) {
3104 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3105 "%s: tid=%p, hwq_depth=%d, waiting\n",
3106 __func__,
3107 tid,
3108 tid->hwq_depth);
3109 return;
3110 }
3111
3112 /* We're now about to TX */
3113 tid->bar_tx = 1;
3114
3115 /*
3116 * Calculate new BAW left edge, now that all frames have either
3117 * succeeded or failed.
3118 *
3119 * XXX verify this is _actually_ the valid value to begin at!
3120 */
3121 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3122 "%s: tid=%p, new BAW left edge=%d\n",
3123 __func__,
3124 tid,
3125 tap->txa_start);
3126
3127 /* Try sending the BAR frame */
3128 /* We can't hold the lock here! */
3129
3130 ATH_TXQ_UNLOCK(sc->sc_ac2q[tid->ac]);
3131 if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) {
3132 /* Success? Now we wait for notification that it's done */
3133 ATH_TXQ_LOCK(sc->sc_ac2q[tid->ac]);
3134 return;
3135 }
3136
3137 /* Failure? For now, warn loudly and continue */
3138 ATH_TXQ_LOCK(sc->sc_ac2q[tid->ac]);
3139 device_printf(sc->sc_dev, "%s: tid=%p, failed to TX BAR, continue!\n",
3140 __func__, tid);
3141 ath_tx_tid_bar_unsuspend(sc, tid);
3142}
3143
|
3144static void
3145ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an,
3146 struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf)
3147{ |
3148
|
3149 ATH_TID_LOCK_ASSERT(sc, tid);
3150
3151 /*
3152 * If the current TID is running AMPDU, update
3153 * the BAW.
3154 */
3155 if (ath_tx_ampdu_running(sc, an, tid->tid) &&
3156 bf->bf_state.bfs_dobaw) {
3157 /*
3158 * Only remove the frame from the BAW if it's
3159 * been transmitted at least once; this means
3160 * the frame was in the BAW to begin with.
3161 */
3162 if (bf->bf_state.bfs_retries > 0) {
3163 ath_tx_update_baw(sc, an, tid, bf);
3164 bf->bf_state.bfs_dobaw = 0;
3165 }
3166 /*
3167 * This has become a non-fatal error now
3168 */
3169 if (! bf->bf_state.bfs_addedbaw)
3170 device_printf(sc->sc_dev,
3171 "%s: wasn't added: seqno %d\n",
3172 __func__, SEQNO(bf->bf_state.bfs_seqno));
3173 }
3174 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
3175}
3176
3177static void
3178ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an,
3179 struct ath_tid *tid, struct ath_buf *bf)
3180{
3181 struct ieee80211_node *ni = &an->an_node;
3182 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
3183 struct ieee80211_tx_ampdu *tap;
3184
3185 tap = ath_tx_get_tx_tid(an, tid->tid);
3186
3187 device_printf(sc->sc_dev,
3188 "%s: node %p: bf=%p: addbaw=%d, dobaw=%d, "
3189 "seqno=%d, retry=%d\n",
3190 __func__, ni, bf,
3191 bf->bf_state.bfs_addedbaw,
3192 bf->bf_state.bfs_dobaw,
3193 SEQNO(bf->bf_state.bfs_seqno),
3194 bf->bf_state.bfs_retries);
3195 device_printf(sc->sc_dev,
3196 "%s: node %p: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, isfiltered=%d\n",
3197 __func__, ni, bf,
3198 tid->axq_depth,
3199 tid->hwq_depth,
3200 tid->bar_wait,
3201 tid->isfiltered);
3202 device_printf(sc->sc_dev,
3203 "%s: node %p: tid %d: txq_depth=%d, "
3204 "txq_aggr_depth=%d, sched=%d, paused=%d, "
3205 "hwq_depth=%d, incomp=%d, baw_head=%d, "
3206 "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
3207 __func__, ni, tid->tid, txq->axq_depth,
3208 txq->axq_aggr_depth, tid->sched, tid->paused,
3209 tid->hwq_depth, tid->incomp, tid->baw_head,
3210 tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
3211 ni->ni_txseqs[tid->tid]);
3212
3213 /* XXX Dump the frame, see what it is? */
3214 ieee80211_dump_pkt(ni->ni_ic,
3215 mtod(bf->bf_m, const uint8_t *),
3216 bf->bf_m->m_len, 0, -1);
3217}
3218 |
3219/*
3220 * Free any packets currently pending in the software TX queue.
3221 *
3222 * This will be called when a node is being deleted.
3223 *
3224 * It can also be called on an active node during an interface
3225 * reset or state transition.
3226 *
3227 * (From Linux/reference):
3228 *
3229 * TODO: For frame(s) that are in the retry state, we will reuse the
3230 * sequence number(s) without setting the retry bit. The
3231 * alternative is to give up on these and BAR the receiver's window
3232 * forward.
3233 */
3234static void
3235ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
3236 struct ath_tid *tid, ath_bufhead *bf_cq)
3237{
3238 struct ath_buf *bf;
3239 struct ieee80211_tx_ampdu *tap;
3240 struct ieee80211_node *ni = &an->an_node;
|
2950 int t = 0;
2951 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
|
| 3241 int t; |
3242
3243 tap = ath_tx_get_tx_tid(an, tid->tid);
3244
|
2955 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
|
| 3245 ATH_TID_LOCK_ASSERT(sc, tid); |
3246
3247 /* Walk the queue, free frames */
|
| 3248 t = 0; |
3249 for (;;) {
3250 bf = TAILQ_FIRST(&tid->axq_q);
3251 if (bf == NULL) {
3252 break;
3253 }
3254
3255 if (t == 0) {
|
2965 device_printf(sc->sc_dev,
2966 "%s: node %p: bf=%p: addbaw=%d, dobaw=%d, "
2967 "seqno=%d, retry=%d\n",
2968 __func__, ni, bf,
2969 bf->bf_state.bfs_addedbaw,
2970 bf->bf_state.bfs_dobaw,
2971 SEQNO(bf->bf_state.bfs_seqno),
2972 bf->bf_state.bfs_retries);
2973 device_printf(sc->sc_dev,
2974 "%s: node %p: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d\n",
2975 __func__, ni, bf,
2976 tid->axq_depth,
2977 tid->hwq_depth,
2978 tid->bar_wait);
2979 device_printf(sc->sc_dev,
2980 "%s: node %p: tid %d: txq_depth=%d, "
2981 "txq_aggr_depth=%d, sched=%d, paused=%d, "
2982 "hwq_depth=%d, incomp=%d, baw_head=%d, "
2983 "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
2984 __func__, ni, tid->tid, txq->axq_depth,
2985 txq->axq_aggr_depth, tid->sched, tid->paused,
2986 tid->hwq_depth, tid->incomp, tid->baw_head,
2987 tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
2988 ni->ni_txseqs[tid->tid]);
2989
2990 /* XXX Dump the frame, see what it is? */
2991 ieee80211_dump_pkt(ni->ni_ic,
2992 mtod(bf->bf_m, const uint8_t *),
2993 bf->bf_m->m_len, 0, -1);
2994
|
| 3256 ath_tx_tid_drain_print(sc, an, tid, bf); |
3257 t = 1;
3258 }
3259
|
3260 ATH_TXQ_REMOVE(tid, bf, bf_list);
3261 ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3262 } |
3263
|
2999 /*
3000 * If the current TID is running AMPDU, update
3001 * the BAW.
3002 */
3003 if (ath_tx_ampdu_running(sc, an, tid->tid) &&
3004 bf->bf_state.bfs_dobaw) {
3005 /*
3006 * Only remove the frame from the BAW if it's
3007 * been transmitted at least once; this means
3008 * the frame was in the BAW to begin with.
3009 */
3010 if (bf->bf_state.bfs_retries > 0) {
3011 ath_tx_update_baw(sc, an, tid, bf);
3012 bf->bf_state.bfs_dobaw = 0;
3013 }
3014 /*
3015 * This has become a non-fatal error now
3016 */
3017 if (! bf->bf_state.bfs_addedbaw)
3018 device_printf(sc->sc_dev,
3019 "%s: wasn't added: seqno %d\n",
3020 __func__, SEQNO(bf->bf_state.bfs_seqno));
|
3264 /* And now, drain the filtered frame queue */
3265 t = 0;
3266 for (;;) {
3267 bf = TAILQ_FIRST(&tid->filtq.axq_q);
3268 if (bf == NULL)
3269 break;
3270
3271 if (t == 0) {
3272 ath_tx_tid_drain_print(sc, an, tid, bf);
3273 t = 1; |
3274 }
|
3022 ATH_TXQ_REMOVE(tid, bf, bf_list);
3023 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
|
3275
3276 ATH_TXQ_REMOVE(&tid->filtq, bf, bf_list);
3277 ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); |
3278 }
3279
3280 /*
3281 * Now that it's completed, grab the TID lock and update
3282 * the sequence number and BAW window.
3283 * Because sequence numbers have been assigned to frames
3284 * that haven't been sent yet, it's entirely possible
3285 * we'll be called with some pending frames that have not
3286 * been transmitted.
3287 *
3288 * The cleaner solution is to do the sequence number allocation
3289 * when the packet is first transmitted - and thus the "retries"
3290 * check above would be enough to update the BAW/seqno.
3291 */
3292
3293 /* But don't do it for non-QoS TIDs */
3294 if (tap) {
3295#if 0
3296 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3297 "%s: node %p: TID %d: sliding BAW left edge to %d\n",
3298 __func__, an, tid->tid, tap->txa_start);
3299#endif
3300 ni->ni_txseqs[tid->tid] = tap->txa_start;
3301 tid->baw_tail = tid->baw_head;
3302 }
3303}
3304
3305/*
3306 * Flush all software queued packets for the given node.
3307 *
3308 * This occurs when a completion handler frees the last buffer
3309 * for a node, and the node is thus freed. This causes the node
3310 * to be cleaned up, which ends up calling ath_tx_node_flush.
3311 */
3312void
3313ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
3314{
3315 int tid;
3316 ath_bufhead bf_cq;
3317 struct ath_buf *bf;
3318
3319 TAILQ_INIT(&bf_cq);
3320
3321 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
3322 struct ath_tid *atid = &an->an_tid[tid];
3323 struct ath_txq *txq = sc->sc_ac2q[atid->ac];
3324
3325 /* Remove this tid from the list of active tids */
3326 ATH_TXQ_LOCK(txq);
3327 ath_tx_tid_unsched(sc, atid);
3328
3329 /* Free packets */
3330 ath_tx_tid_drain(sc, an, atid, &bf_cq);
3331 ATH_TXQ_UNLOCK(txq);
3332 }
3333
3334 /* Handle completed frames */
3335 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3336 TAILQ_REMOVE(&bf_cq, bf, bf_list);
3337 ath_tx_default_comp(sc, bf, 0);
3338 }
3339}
3340
3341/*
3342 * Drain all the software TXQs currently with traffic queued.
3343 */
3344void
3345ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
3346{
3347 struct ath_tid *tid;
3348 ath_bufhead bf_cq;
3349 struct ath_buf *bf;
3350
3351 TAILQ_INIT(&bf_cq);
3352 ATH_TXQ_LOCK(txq);
3353
3354 /*
3355 * Iterate over all active tids for the given txq,
3356 * flushing and unsched'ing them
3357 */
3358 while (! TAILQ_EMPTY(&txq->axq_tidq)) {
3359 tid = TAILQ_FIRST(&txq->axq_tidq);
3360 ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
3361 ath_tx_tid_unsched(sc, tid);
3362 }
3363
3364 ATH_TXQ_UNLOCK(txq);
3365
3366 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3367 TAILQ_REMOVE(&bf_cq, bf, bf_list);
3368 ath_tx_default_comp(sc, bf, 0);
3369 }
3370}
3371
3372/*
3373 * Handle completion of non-aggregate session frames.
3374 */
3375void
3376ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
3377{
3378 struct ieee80211_node *ni = bf->bf_node;
3379 struct ath_node *an = ATH_NODE(ni);
3380 int tid = bf->bf_state.bfs_tid;
3381 struct ath_tid *atid = &an->an_tid[tid];
3382 struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
3383
3384 /* The TID state is protected behind the TXQ lock */
3385 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3386
3387 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
3388 __func__, bf, fail, atid->hwq_depth - 1);
3389
3390 atid->hwq_depth--;
|
3391
3392 if (atid->isfiltered)
3393 device_printf(sc->sc_dev, "%s: isfiltered=1, normal_comp?\n",
3394 __func__);
3395 |
3396 if (atid->hwq_depth < 0)
3397 device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
3398 __func__, atid->hwq_depth);
|
3399
3400 /*
3401 * If the queue is filtered, potentially mark it as complete
3402 * and reschedule it as needed.
3403 *
3404 * This is required as there may be a subsequent TX descriptor
3405 * for this end-node that has CLRDMASK set, so it's quite possible
3406 * that a filtered frame will be followed by a non-filtered
3407 * (complete or otherwise) frame.
3408 *
3409 * XXX should we do this before we complete the frame?
3410 */
3411 if (atid->isfiltered)
3412 ath_tx_tid_filt_comp_complete(sc, atid);
3413 |
3414 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3415
3416 /*
3417 * punt to rate control if we're not being cleaned up
3418 * during a hw queue drain and the frame wanted an ACK.
3419 */
3420 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
3421 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
3422 ts, bf->bf_state.bfs_pktlen,
3423 1, (ts->ts_status == 0) ? 0 : 1);
3424
3425 ath_tx_default_comp(sc, bf, fail);
3426}
3427
3428/*
3429 * Handle cleanup of aggregate session packets that aren't
3430 * an A-MPDU.
3431 *
3432 * There's no need to update the BAW here - the session is being
3433 * torn down.
3434 */
3435static void
3436ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
3437{
3438 struct ieee80211_node *ni = bf->bf_node;
3439 struct ath_node *an = ATH_NODE(ni);
3440 int tid = bf->bf_state.bfs_tid;
3441 struct ath_tid *atid = &an->an_tid[tid];
3442
3443 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
3444 __func__, tid, atid->incomp);
3445
3446 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3447 atid->incomp--;
3448 if (atid->incomp == 0) {
3449 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3450 "%s: TID %d: cleaned up! resume!\n",
3451 __func__, tid);
3452 atid->cleanup_inprogress = 0;
3453 ath_tx_tid_resume(sc, atid);
3454 }
3455 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3456
3457 ath_tx_default_comp(sc, bf, 0);
3458}
3459
3460/*
3461 * Performs transmit side cleanup when TID changes from aggregated to
3462 * unaggregated.
3463 *
3464 * - Discard all retry frames from the s/w queue.
3465 * - Fix the tx completion function for all buffers in s/w queue.
3466 * - Count the number of unacked frames, and let transmit completion
3467 * handle it later.
3468 *
3469 * The caller is responsible for pausing the TID.
3470 */
3471static void
3472ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid)
3473{
3474 struct ath_tid *atid = &an->an_tid[tid];
3475 struct ieee80211_tx_ampdu *tap;
3476 struct ath_buf *bf, *bf_next;
3477 ath_bufhead bf_cq;
3478
3479 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
3480 "%s: TID %d: called\n", __func__, tid);
3481
3482 TAILQ_INIT(&bf_cq);
3483 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3484
3485 /*
|
3486 * Move the filtered frames to the TX queue, before
3487 * we run off and discard/process things.
3488 */
3489 /* XXX this is really quite inefficient */
3490 while ((bf = TAILQ_LAST(&atid->filtq.axq_q, ath_bufhead_s)) != NULL) {
3491 ATH_TXQ_REMOVE(&atid->filtq, bf, bf_list);
3492 ATH_TXQ_INSERT_HEAD(atid, bf, bf_list);
3493 }
3494
3495 /* |
3496 * Update the frames in the software TX queue:
3497 *
3498 * + Discard retry frames in the queue
3499 * + Fix the completion function to be non-aggregate
3500 */
3501 bf = TAILQ_FIRST(&atid->axq_q);
3502 while (bf) {
3503 if (bf->bf_state.bfs_isretried) {
3504 bf_next = TAILQ_NEXT(bf, bf_list);
3505 TAILQ_REMOVE(&atid->axq_q, bf, bf_list);
3506 atid->axq_depth--;
3507 if (bf->bf_state.bfs_dobaw) {
3508 ath_tx_update_baw(sc, an, atid, bf);
3509 if (! bf->bf_state.bfs_addedbaw)
3510 device_printf(sc->sc_dev,
3511 "%s: wasn't added: seqno %d\n",
3512 __func__,
3513 SEQNO(bf->bf_state.bfs_seqno));
3514 }
3515 bf->bf_state.bfs_dobaw = 0;
3516 /*
3517 * Call the default completion handler with "fail" just
3518 * so upper levels are suitably notified about this.
3519 */
3520 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
3521 bf = bf_next;
3522 continue;
3523 }
3524 /* Give these the default completion handler */
3525 bf->bf_comp = ath_tx_normal_comp;
3526 bf = TAILQ_NEXT(bf, bf_list);
3527 }
3528
3529 /* The caller is required to pause the TID */
3530#if 0
3531 /* Pause the TID */
3532 ath_tx_tid_pause(sc, atid);
3533#endif
3534
3535 /*
3536 * Calculate what hardware-queued frames exist based
3537 * on the current BAW size. Ie, what frames have been
3538 * added to the TX hardware queue for this TID but
3539 * not yet ACKed.
3540 */
3541 tap = ath_tx_get_tx_tid(an, tid);
3542 /* Need the lock - fiddling with BAW */
3543 while (atid->baw_head != atid->baw_tail) {
3544 if (atid->tx_buf[atid->baw_head]) {
3545 atid->incomp++;
3546 atid->cleanup_inprogress = 1;
3547 atid->tx_buf[atid->baw_head] = NULL;
3548 }
3549 INCR(atid->baw_head, ATH_TID_MAX_BUFS);
3550 INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
3551 }
3552
3553 /*
3554 * If cleanup is required, defer TID scheduling
3555 * until all the HW queued packets have been
3556 * sent.
3557 */
3558 if (! atid->cleanup_inprogress)
3559 ath_tx_tid_resume(sc, atid);
3560
3561 if (atid->cleanup_inprogress)
3562 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3563 "%s: TID %d: cleanup needed: %d packets\n",
3564 __func__, tid, atid->incomp);
3565 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3566
3567 /* Handle completing frames and fail them */
3568 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3569 TAILQ_REMOVE(&bf_cq, bf, bf_list);
3570 ath_tx_default_comp(sc, bf, 1);
3571 }
3572}
3573
|
3290static void
3291ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
3292{
3293 struct ieee80211_frame *wh;
3294
3295 wh = mtod(bf->bf_m, struct ieee80211_frame *);
3296 /* Only update/resync if needed */
3297 if (bf->bf_state.bfs_isretried == 0) {
3298 wh->i_fc[1] |= IEEE80211_FC1_RETRY;
3299 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
3300 BUS_DMASYNC_PREWRITE);
3301 }
3302 sc->sc_stats.ast_tx_swretries++;
3303 bf->bf_state.bfs_isretried = 1;
3304 bf->bf_state.bfs_retries ++;
3305}
3306
|
3574static struct ath_buf *
3575ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
3576 struct ath_tid *tid, struct ath_buf *bf)
3577{
3578 struct ath_buf *nbf;
3579 int error;
3580
3581 nbf = ath_buf_clone(sc, bf);
3582
3583#if 0
3584 device_printf(sc->sc_dev, "%s: ATH_BUF_BUSY; cloning\n",
3585 __func__);
3586#endif
3587
3588 if (nbf == NULL) {
3589 /* Failed to clone */
3590 device_printf(sc->sc_dev,
3591 "%s: failed to clone a busy buffer\n",
3592 __func__);
3593 return NULL;
3594 }
3595
3596 /* Setup the dma for the new buffer */
3597 error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
3598 if (error != 0) {
3599 device_printf(sc->sc_dev,
3600 "%s: failed to setup dma for clone\n",
3601 __func__);
3602 /*
3603 * Put this at the head of the list, not tail;
3604 * that way it doesn't interfere with the
3605 * busy buffer logic (which uses the tail of
3606 * the list.)
3607 */
3608 ATH_TXBUF_LOCK(sc);
3609 ath_returnbuf_head(sc, nbf);
3610 ATH_TXBUF_UNLOCK(sc);
3611 return NULL;
3612 }
3613
3614 /* Update BAW if required, before we free the original buf */
3615 if (bf->bf_state.bfs_dobaw)
3616 ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
3617
3618 /* Free current buffer; return the older buffer */
3619 bf->bf_m = NULL;
3620 bf->bf_node = NULL;
3621 ath_freebuf(sc, bf);
|
| 3622 |
3623 return nbf;
3624}
3625
3626/*
3627 * Handle retrying an unaggregate frame in an aggregate
3628 * session.
3629 *
3630 * If too many retries occur, pause the TID, wait for
3631 * any further retransmits (as there's no reason why
3632 * non-aggregate frames in an aggregate session are
3633 * transmitted in-order; they just have to be in-BAW)
3634 * and then queue a BAR.
3635 */
3636static void
3637ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
3638{
3639 struct ieee80211_node *ni = bf->bf_node;
3640 struct ath_node *an = ATH_NODE(ni);
3641 int tid = bf->bf_state.bfs_tid;
3642 struct ath_tid *atid = &an->an_tid[tid];
3643 struct ieee80211_tx_ampdu *tap;
3644
3645 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3646
3647 tap = ath_tx_get_tx_tid(an, tid);
3648
3649 /*
3650 * If the buffer is marked as busy, we can't directly
3651 * reuse it. Instead, try to clone the buffer.
3652 * If the clone is successful, recycle the old buffer.
3653 * If the clone is unsuccessful, set bfs_retries to max
3654 * to force the next bit of code to free the buffer
3655 * for us.
3656 */
3657 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
3658 (bf->bf_flags & ATH_BUF_BUSY)) {
3659 struct ath_buf *nbf;
3660 nbf = ath_tx_retry_clone(sc, an, atid, bf);
3661 if (nbf)
3662 /* bf has been freed at this point */
3663 bf = nbf;
3664 else
3665 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
3666 }
3667
3668 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
3669 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
3670 "%s: exceeded retries; seqno %d\n",
3671 __func__, SEQNO(bf->bf_state.bfs_seqno));
3672 sc->sc_stats.ast_tx_swretrymax++;
3673
3674 /* Update BAW anyway */
3675 if (bf->bf_state.bfs_dobaw) {
3676 ath_tx_update_baw(sc, an, atid, bf);
3677 if (! bf->bf_state.bfs_addedbaw)
3678 device_printf(sc->sc_dev,
3679 "%s: wasn't added: seqno %d\n",
3680 __func__, SEQNO(bf->bf_state.bfs_seqno));
3681 }
3682 bf->bf_state.bfs_dobaw = 0;
3683
3684 /* Suspend the TX queue and get ready to send the BAR */
3685 ath_tx_tid_bar_suspend(sc, atid);
3686
3687 /* Send the BAR if there are no other frames waiting */
3688 if (ath_tx_tid_bar_tx_ready(sc, atid))
3689 ath_tx_tid_bar_tx(sc, atid);
3690
3691 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3692
3693 /* Free buffer, bf is free after this call */
3694 ath_tx_default_comp(sc, bf, 0);
3695 return;
3696 }
3697
3698 /*
3699 * This increments the retry counter as well as
3700 * sets the retry flag in the ath_buf and packet
3701 * body.
3702 */
3703 ath_tx_set_retry(sc, bf);
|
| 3704 sc->sc_stats.ast_tx_swretries++; |
3705
3706 /*
3707 * Insert this at the head of the queue, so it's
3708 * retried before any current/subsequent frames.
3709 */
3710 ATH_TXQ_INSERT_HEAD(atid, bf, bf_list);
3711 ath_tx_tid_sched(sc, atid);
3712 /* Send the BAR if there are no other frames waiting */
3713 if (ath_tx_tid_bar_tx_ready(sc, atid))
3714 ath_tx_tid_bar_tx(sc, atid);
3715
3716 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3717}
3718
3719/*
3720 * Common code for aggregate excessive retry/subframe retry.
3721 * If retrying, queues buffers to bf_q. If not, frees the
3722 * buffers.
3723 *
3724 * XXX should unify this with ath_tx_aggr_retry_unaggr()
3725 */
3726static int
3727ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
3728 ath_bufhead *bf_q)
3729{
3730 struct ieee80211_node *ni = bf->bf_node;
3731 struct ath_node *an = ATH_NODE(ni);
3732 int tid = bf->bf_state.bfs_tid;
3733 struct ath_tid *atid = &an->an_tid[tid];
3734
3735 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[atid->ac]);
3736
3737 /* XXX clr11naggr should be done for all subframes */
3738 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
3739 ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
|
| 3740 |
3741 /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
3742
3743 /*
3744 * If the buffer is marked as busy, we can't directly
3745 * reuse it. Instead, try to clone the buffer.
3746 * If the clone is successful, recycle the old buffer.
3747 * If the clone is unsuccessful, set bfs_retries to max
3748 * to force the next bit of code to free the buffer
3749 * for us.
3750 */
3751 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
3752 (bf->bf_flags & ATH_BUF_BUSY)) {
3753 struct ath_buf *nbf;
3754 nbf = ath_tx_retry_clone(sc, an, atid, bf);
3755 if (nbf)
3756 /* bf has been freed at this point */
3757 bf = nbf;
3758 else
3759 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
3760 }
3761
3762 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
3763 sc->sc_stats.ast_tx_swretrymax++;
3764 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
3765 "%s: max retries: seqno %d\n",
3766 __func__, SEQNO(bf->bf_state.bfs_seqno));
3767 ath_tx_update_baw(sc, an, atid, bf);
3768 if (! bf->bf_state.bfs_addedbaw)
3769 device_printf(sc->sc_dev,
3770 "%s: wasn't added: seqno %d\n",
3771 __func__, SEQNO(bf->bf_state.bfs_seqno));
3772 bf->bf_state.bfs_dobaw = 0;
3773 return 1;
3774 }
3775
3776 ath_tx_set_retry(sc, bf);
|
| 3777 sc->sc_stats.ast_tx_swretries++; |
3778 bf->bf_next = NULL; /* Just to make sure */
3779
3780 /* Clear the aggregate state */
3781 bf->bf_state.bfs_aggr = 0;
3782 bf->bf_state.bfs_ndelim = 0; /* ??? needed? */
3783 bf->bf_state.bfs_nframes = 1;
3784
3785 TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3786 return 0;
3787}
3788
3789/*
3790 * error pkt completion for an aggregate destination
3791 */
3792static void
3793ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
3794 struct ath_tid *tid)
3795{
3796 struct ieee80211_node *ni = bf_first->bf_node;
3797 struct ath_node *an = ATH_NODE(ni);
3798 struct ath_buf *bf_next, *bf;
3799 ath_bufhead bf_q;
3800 int drops = 0;
3801 struct ieee80211_tx_ampdu *tap;
3802 ath_bufhead bf_cq;
3803
3804 TAILQ_INIT(&bf_q);
3805 TAILQ_INIT(&bf_cq);
3806
3807 /*
3808 * Update rate control - all frames have failed.
3809 *
3810 * XXX use the length in the first frame in the series;
3811 * XXX just so things are consistent for now.
3812 */
3813 ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
3814 &bf_first->bf_status.ds_txstat,
3815 bf_first->bf_state.bfs_pktlen,
3816 bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
3817
3818 ATH_TXQ_LOCK(sc->sc_ac2q[tid->ac]);
3819 tap = ath_tx_get_tx_tid(an, tid->tid);
3820 sc->sc_stats.ast_tx_aggr_failall++;
3821
3822 /* Retry all subframes */
3823 bf = bf_first;
3824 while (bf) {
3825 bf_next = bf->bf_next;
3826 bf->bf_next = NULL; /* Remove it from the aggr list */
3827 sc->sc_stats.ast_tx_aggr_fail++;
3828 if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
3829 drops++;
3830 bf->bf_next = NULL;
3831 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
3832 }
3833 bf = bf_next;
3834 }
3835
3836 /* Prepend all frames to the beginning of the queue */
3837 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
3838 TAILQ_REMOVE(&bf_q, bf, bf_list);
3839 ATH_TXQ_INSERT_HEAD(tid, bf, bf_list);
3840 }
3841
3842 /*
3843 * Schedule the TID to be re-tried.
3844 */
3845 ath_tx_tid_sched(sc, tid);
3846
3847 /*
3848 * send bar if we dropped any frames
3849 *
3850 * Keep the txq lock held for now, as we need to ensure
3851 * that ni_txseqs[] is consistent (as it's being updated
3852 * in the ifnet TX context or raw TX context.)
3853 */
3854 if (drops) {
3855 /* Suspend the TX queue and get ready to send the BAR */
3856 ath_tx_tid_bar_suspend(sc, tid);
3857 }
3858
3859 /*
3860 * Send BAR if required
3861 */
3862 if (ath_tx_tid_bar_tx_ready(sc, tid))
3863 ath_tx_tid_bar_tx(sc, tid);
|
| 3864 |
3865 ATH_TXQ_UNLOCK(sc->sc_ac2q[tid->ac]);
3866
3867 /* Complete frames which errored out */
3868 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3869 TAILQ_REMOVE(&bf_cq, bf, bf_list);
3870 ath_tx_default_comp(sc, bf, 0);
3871 }
3872}
3873
3874/*
3875 * Handle clean-up of packets from an aggregate list.
3876 *
3877 * There's no need to update the BAW here - the session is being
3878 * torn down.
3879 */
3880static void
3881ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
3882{
3883 struct ath_buf *bf, *bf_next;
3884 struct ieee80211_node *ni = bf_first->bf_node;
3885 struct ath_node *an = ATH_NODE(ni);
3886 int tid = bf_first->bf_state.bfs_tid;
3887 struct ath_tid *atid = &an->an_tid[tid];
3888
3889 bf = bf_first;
3890
3891 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3892
3893 /* update incomp */
3894 while (bf) {
3895 atid->incomp--;
3896 bf = bf->bf_next;
3897 }
3898
3899 if (atid->incomp == 0) {
3900 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3901 "%s: TID %d: cleaned up! resume!\n",
3902 __func__, tid);
3903 atid->cleanup_inprogress = 0;
3904 ath_tx_tid_resume(sc, atid);
3905 }
3906
3907 /* Send BAR if required */
|
| 3908 /* XXX why would we send a BAR when transitioning to non-aggregation? */ |
3909 if (ath_tx_tid_bar_tx_ready(sc, atid))
3910 ath_tx_tid_bar_tx(sc, atid);
|
| 3911 |
3912 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3913
3914 /* Handle frame completion */
3915 while (bf) {
3916 bf_next = bf->bf_next;
3917 ath_tx_default_comp(sc, bf, 1);
3918 bf = bf_next;
3919 }
3920}
3921
3922/*
3923 * Handle completion of an set of aggregate frames.
3924 *
3925 * XXX for now, simply complete each sub-frame.
3926 *
3927 * Note: the completion handler is the last descriptor in the aggregate,
3928 * not the last descriptor in the first frame.
3929 */
3930static void
3931ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
3932 int fail)
3933{
3934 //struct ath_desc *ds = bf->bf_lastds;
3935 struct ieee80211_node *ni = bf_first->bf_node;
3936 struct ath_node *an = ATH_NODE(ni);
3937 int tid = bf_first->bf_state.bfs_tid;
3938 struct ath_tid *atid = &an->an_tid[tid];
3939 struct ath_tx_status ts;
3940 struct ieee80211_tx_ampdu *tap;
3941 ath_bufhead bf_q;
3942 ath_bufhead bf_cq;
3943 int seq_st, tx_ok;
3944 int hasba, isaggr;
3945 uint32_t ba[2];
3946 struct ath_buf *bf, *bf_next;
3947 int ba_index;
3948 int drops = 0;
3949 int nframes = 0, nbad = 0, nf;
3950 int pktlen;
3951 /* XXX there's too much on the stack? */
3952 struct ath_rc_series rc[ATH_RC_NUM];
3953 int txseq;
3954
3955 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
3956 __func__, atid->hwq_depth);
3957
|
3958 TAILQ_INIT(&bf_q);
3959 TAILQ_INIT(&bf_cq);
3960 |
3961 /* The TID state is kept behind the TXQ lock */
3962 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3963
3964 atid->hwq_depth--;
3965 if (atid->hwq_depth < 0)
3966 device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
3967 __func__, atid->hwq_depth);
3968
3969 /*
|
3970 * If the TID is filtered, handle completing the filter
3971 * transition before potentially kicking it to the cleanup
3972 * function.
3973 */
3974 if (atid->isfiltered)
3975 ath_tx_tid_filt_comp_complete(sc, atid);
3976
3977 /* |
3978 * Punt cleanup to the relevant function, not our problem now
3979 */
3980 if (atid->cleanup_inprogress) {
|
3981 if (atid->isfiltered)
3982 device_printf(sc->sc_dev,
3983 "%s: isfiltered=1, normal_comp?\n",
3984 __func__); |
3985 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3986 ath_tx_comp_cleanup_aggr(sc, bf_first);
3987 return;
3988 }
3989
3990 /*
|
3991 * If the frame is filtered, transition to filtered frame
3992 * mode and add this to the filtered frame list.
3993 *
3994 * XXX TODO: figure out how this interoperates with
3995 * BAR, pause and cleanup states.
3996 */
3997 if ((ts.ts_status & HAL_TXERR_FILT) ||
3998 (ts.ts_status != 0 && atid->isfiltered)) {
3999 if (fail != 0)
4000 device_printf(sc->sc_dev,
4001 "%s: isfiltered=1, fail=%d\n", __func__, fail);
4002 ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq);
4003
4004 /* Remove from BAW */
4005 TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) {
4006 if (bf->bf_state.bfs_addedbaw)
4007 drops++;
4008 if (bf->bf_state.bfs_dobaw) {
4009 ath_tx_update_baw(sc, an, atid, bf);
4010 if (! bf->bf_state.bfs_addedbaw)
4011 device_printf(sc->sc_dev,
4012 "%s: wasn't added: seqno %d\n",
4013 __func__,
4014 SEQNO(bf->bf_state.bfs_seqno));
4015 }
4016 bf->bf_state.bfs_dobaw = 0;
4017 }
4018 /*
4019 * If any intermediate frames in the BAW were dropped when
4020 * handling filtering things, send a BAR.
4021 */
4022 if (drops)
4023 ath_tx_tid_bar_suspend(sc, atid);
4024
4025 /*
4026 * Finish up by sending a BAR if required and freeing
4027 * the frames outside of the TX lock.
4028 */
4029 goto finish_send_bar;
4030 }
4031
4032 /* |
4033 * Take a copy; this may be needed -after- bf_first
4034 * has been completed and freed.
4035 */
4036 ts = bf_first->bf_status.ds_txstat;
4037 /*
4038 * XXX for now, use the first frame in the aggregate for
4039 * XXX rate control completion; it's at least consistent.
4040 */
4041 pktlen = bf_first->bf_state.bfs_pktlen;
4042
4043 /*
4044 * Handle errors first!
4045 *
4046 * Here, handle _any_ error as a "exceeded retries" error.
4047 * Later on (when filtered frames are to be specially handled)
4048 * it'll have to be expanded.
4049 */
4050#if 0
4051 if (ts.ts_status & HAL_TXERR_XRETRY) {
4052#endif
4053 if (ts.ts_status != 0) {
4054 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4055 ath_tx_comp_aggr_error(sc, bf_first, atid);
4056 return;
4057 }
4058
|
3728 TAILQ_INIT(&bf_q);
3729 TAILQ_INIT(&bf_cq);
|
4059 tap = ath_tx_get_tx_tid(an, tid);
4060
4061 /*
4062 * extract starting sequence and block-ack bitmap
4063 */
4064 /* XXX endian-ness of seq_st, ba? */
4065 seq_st = ts.ts_seqnum;
4066 hasba = !! (ts.ts_flags & HAL_TX_BA);
4067 tx_ok = (ts.ts_status == 0);
4068 isaggr = bf_first->bf_state.bfs_aggr;
4069 ba[0] = ts.ts_ba_low;
4070 ba[1] = ts.ts_ba_high;
4071
4072 /*
4073 * Copy the TX completion status and the rate control
4074 * series from the first descriptor, as it may be freed
4075 * before the rate control code can get its grubby fingers
4076 * into things.
4077 */
4078 memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
4079
4080 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4081 "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
4082 "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
4083 __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
4084 isaggr, seq_st, hasba, ba[0], ba[1]);
4085
4086 /* Occasionally, the MAC sends a tx status for the wrong TID. */
4087 if (tid != ts.ts_tid) {
4088 device_printf(sc->sc_dev, "%s: tid %d != hw tid %d\n",
4089 __func__, tid, ts.ts_tid);
4090 tx_ok = 0;
4091 }
4092
4093 /* AR5416 BA bug; this requires an interface reset */
4094 if (isaggr && tx_ok && (! hasba)) {
4095 device_printf(sc->sc_dev,
4096 "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
4097 "seq_st=%d\n",
4098 __func__, hasba, tx_ok, isaggr, seq_st);
4099 /* XXX TODO: schedule an interface reset */
4100#ifdef ATH_DEBUG
4101 ath_printtxbuf(sc, bf_first,
4102 sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0);
4103#endif
4104 }
4105
4106 /*
4107 * Walk the list of frames, figure out which ones were correctly
4108 * sent and which weren't.
4109 */
4110 bf = bf_first;
4111 nf = bf_first->bf_state.bfs_nframes;
4112
4113 /* bf_first is going to be invalid once this list is walked */
4114 bf_first = NULL;
4115
4116 /*
4117 * Walk the list of completed frames and determine
4118 * which need to be completed and which need to be
4119 * retransmitted.
4120 *
4121 * For completed frames, the completion functions need
4122 * to be called at the end of this function as the last
4123 * node reference may free the node.
4124 *
4125 * Finally, since the TXQ lock can't be held during the
4126 * completion callback (to avoid lock recursion),
4127 * the completion calls have to be done outside of the
4128 * lock.
4129 */
4130 while (bf) {
4131 nframes++;
4132 ba_index = ATH_BA_INDEX(seq_st,
4133 SEQNO(bf->bf_state.bfs_seqno));
4134 bf_next = bf->bf_next;
4135 bf->bf_next = NULL; /* Remove it from the aggr list */
4136
4137 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4138 "%s: checking bf=%p seqno=%d; ack=%d\n",
4139 __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
4140 ATH_BA_ISSET(ba, ba_index));
4141
4142 if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
4143 sc->sc_stats.ast_tx_aggr_ok++;
4144 ath_tx_update_baw(sc, an, atid, bf);
4145 bf->bf_state.bfs_dobaw = 0;
4146 if (! bf->bf_state.bfs_addedbaw)
4147 device_printf(sc->sc_dev,
4148 "%s: wasn't added: seqno %d\n",
4149 __func__, SEQNO(bf->bf_state.bfs_seqno));
4150 bf->bf_next = NULL;
4151 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4152 } else {
4153 sc->sc_stats.ast_tx_aggr_fail++;
4154 if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4155 drops++;
4156 bf->bf_next = NULL;
4157 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4158 }
4159 nbad++;
4160 }
4161 bf = bf_next;
4162 }
4163
4164 /*
4165 * Now that the BAW updates have been done, unlock
4166 *
4167 * txseq is grabbed before the lock is released so we
4168 * have a consistent view of what -was- in the BAW.
4169 * Anything after this point will not yet have been
4170 * TXed.
4171 */
4172 txseq = tap->txa_start;
4173 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4174
4175 if (nframes != nf)
4176 device_printf(sc->sc_dev,
4177 "%s: num frames seen=%d; bf nframes=%d\n",
4178 __func__, nframes, nf);
4179
4180 /*
4181 * Now we know how many frames were bad, call the rate
4182 * control code.
4183 */
4184 if (fail == 0)
4185 ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes,
4186 nbad);
4187
4188 /*
4189 * send bar if we dropped any frames
4190 */
4191 if (drops) {
4192 /* Suspend the TX queue and get ready to send the BAR */
4193 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4194 ath_tx_tid_bar_suspend(sc, atid);
4195 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4196 }
4197
4198 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4199 "%s: txa_start now %d\n", __func__, tap->txa_start);
4200
4201 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4202
4203 /* Prepend all frames to the beginning of the queue */
4204 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4205 TAILQ_REMOVE(&bf_q, bf, bf_list);
4206 ATH_TXQ_INSERT_HEAD(atid, bf, bf_list);
4207 }
4208
4209 /*
4210 * Reschedule to grab some further frames.
4211 */
4212 ath_tx_tid_sched(sc, atid);
4213
4214 /*
|
4215 * If the queue is filtered, re-schedule as required.
4216 *
4217 * This is required as there may be a subsequent TX descriptor
4218 * for this end-node that has CLRDMASK set, so it's quite possible
4219 * that a filtered frame will be followed by a non-filtered
4220 * (complete or otherwise) frame.
4221 *
4222 * XXX should we do this before we complete the frame?
4223 */
4224 if (atid->isfiltered)
4225 ath_tx_tid_filt_comp_complete(sc, atid);
4226
4227finish_send_bar:
4228
4229 /* |
4230 * Send BAR if required
4231 */
4232 if (ath_tx_tid_bar_tx_ready(sc, atid))
4233 ath_tx_tid_bar_tx(sc, atid);
4234
4235 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4236
4237 /* Do deferred completion */
4238 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4239 TAILQ_REMOVE(&bf_cq, bf, bf_list);
4240 ath_tx_default_comp(sc, bf, 0);
4241 }
4242}
4243
4244/*
4245 * Handle completion of unaggregated frames in an ADDBA
4246 * session.
4247 *
4248 * Fail is set to 1 if the entry is being freed via a call to
4249 * ath_tx_draintxq().
4250 */
4251static void
4252ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
4253{
4254 struct ieee80211_node *ni = bf->bf_node;
4255 struct ath_node *an = ATH_NODE(ni);
4256 int tid = bf->bf_state.bfs_tid;
4257 struct ath_tid *atid = &an->an_tid[tid];
4258 struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
|
| 4259 int drops = 0; |
4260
4261 /*
4262 * Update rate control status here, before we possibly
4263 * punt to retry or cleanup.
4264 *
4265 * Do it outside of the TXQ lock.
4266 */
4267 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4268 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4269 &bf->bf_status.ds_txstat,
4270 bf->bf_state.bfs_pktlen,
4271 1, (ts->ts_status == 0) ? 0 : 1);
4272
4273 /*
4274 * This is called early so atid->hwq_depth can be tracked.
4275 * This unfortunately means that it's released and regrabbed
4276 * during retry and cleanup. That's rather inefficient.
4277 */
4278 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4279
4280 if (tid == IEEE80211_NONQOS_TID)
4281 device_printf(sc->sc_dev, "%s: TID=16!\n", __func__);
4282
4283 DPRINTF(sc, ATH_DEBUG_SW_TX,
4284 "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
4285 __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
4286 SEQNO(bf->bf_state.bfs_seqno));
4287
4288 atid->hwq_depth--;
4289 if (atid->hwq_depth < 0)
4290 device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
4291 __func__, atid->hwq_depth);
4292
4293 /*
|
4294 * If the TID is filtered, handle completing the filter
4295 * transition before potentially kicking it to the cleanup
4296 * function.
4297 */
4298 if (atid->isfiltered)
4299 ath_tx_tid_filt_comp_complete(sc, atid);
4300
4301 /* |
4302 * If a cleanup is in progress, punt to comp_cleanup;
4303 * rather than handling it here. It's thus their
4304 * responsibility to clean up, call the completion
4305 * function in net80211, etc.
4306 */
4307 if (atid->cleanup_inprogress) {
|
4308 if (atid->isfiltered)
4309 device_printf(sc->sc_dev,
4310 "%s: isfiltered=1, normal_comp?\n",
4311 __func__); |
4312 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4313 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
4314 __func__);
4315 ath_tx_comp_cleanup_unaggr(sc, bf);
4316 return;
4317 }
4318
4319 /*
|
4320 * XXX TODO: how does cleanup, BAR and filtered frame handling
4321 * overlap?
4322 *
4323 * If the frame is filtered OR if it's any failure but
4324 * the TID is filtered, the frame must be added to the
4325 * filtered frame list.
4326 *
4327 * However - a busy buffer can't be added to the filtered
4328 * list as it will end up being recycled without having
4329 * been made available for the hardware.
4330 */
4331 if ((ts->ts_status & HAL_TXERR_FILT) ||
4332 (ts->ts_status != 0 && atid->isfiltered)) {
4333 int freeframe;
4334
4335 if (fail != 0)
4336 device_printf(sc->sc_dev,
4337 "%s: isfiltered=1, fail=%d\n",
4338 __func__,
4339 fail);
4340 freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf);
4341 if (freeframe) {
4342 /* Remove from BAW */
4343 if (bf->bf_state.bfs_addedbaw)
4344 drops++;
4345 if (bf->bf_state.bfs_dobaw) {
4346 ath_tx_update_baw(sc, an, atid, bf);
4347 if (! bf->bf_state.bfs_addedbaw)
4348 device_printf(sc->sc_dev,
4349 "%s: wasn't added: seqno %d\n",
4350 __func__, SEQNO(bf->bf_state.bfs_seqno));
4351 }
4352 bf->bf_state.bfs_dobaw = 0;
4353 }
4354
4355 /*
4356 * If the frame couldn't be filtered, treat it as a drop and
4357 * prepare to send a BAR.
4358 */
4359 if (freeframe && drops)
4360 ath_tx_tid_bar_suspend(sc, atid);
4361
4362 /*
4363 * Send BAR if required
4364 */
4365 if (ath_tx_tid_bar_tx_ready(sc, atid))
4366 ath_tx_tid_bar_tx(sc, atid);
4367
4368 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4369 /*
4370 * If freeframe is set, then the frame couldn't be
4371 * cloned and bf is still valid. Just complete/free it.
4372 */
4373 if (freeframe)
4374 ath_tx_default_comp(sc, bf, fail);
4375
4376
4377 return;
4378 }
4379 /* |
4380 * Don't bother with the retry check if all frames
4381 * are being failed (eg during queue deletion.)
4382 */
4383#if 0
4384 if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
4385#endif
4386 if (fail == 0 && ts->ts_status != 0) {
4387 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4388 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
4389 __func__);
4390 ath_tx_aggr_retry_unaggr(sc, bf);
4391 return;
4392 }
4393
4394 /* Success? Complete */
4395 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
4396 __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
4397 if (bf->bf_state.bfs_dobaw) {
4398 ath_tx_update_baw(sc, an, atid, bf);
4399 bf->bf_state.bfs_dobaw = 0;
4400 if (! bf->bf_state.bfs_addedbaw)
4401 device_printf(sc->sc_dev,
4402 "%s: wasn't added: seqno %d\n",
4403 __func__, SEQNO(bf->bf_state.bfs_seqno));
4404 }
4405
4406 /*
|
4407 * If the queue is filtered, re-schedule as required.
4408 *
4409 * This is required as there may be a subsequent TX descriptor
4410 * for this end-node that has CLRDMASK set, so it's quite possible
4411 * that a filtered frame will be followed by a non-filtered
4412 * (complete or otherwise) frame.
4413 *
4414 * XXX should we do this before we complete the frame?
4415 */
4416 if (atid->isfiltered)
4417 ath_tx_tid_filt_comp_complete(sc, atid);
4418
4419 /* |
4420 * Send BAR if required
4421 */
4422 if (ath_tx_tid_bar_tx_ready(sc, atid))
4423 ath_tx_tid_bar_tx(sc, atid);
4424
4425 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4426
4427 ath_tx_default_comp(sc, bf, fail);
4428 /* bf is freed at this point */
4429}
4430
4431void
4432ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
4433{
4434 if (bf->bf_state.bfs_aggr)
4435 ath_tx_aggr_comp_aggr(sc, bf, fail);
4436 else
4437 ath_tx_aggr_comp_unaggr(sc, bf, fail);
4438}
4439
4440/*
4441 * Schedule some packets from the given node/TID to the hardware.
4442 *
4443 * This is the aggregate version.
4444 */
4445void
4446ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
4447 struct ath_tid *tid)
4448{
4449 struct ath_buf *bf;
4450 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
4451 struct ieee80211_tx_ampdu *tap;
4452 ATH_AGGR_STATUS status;
4453 ath_bufhead bf_q;
4454
4455 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
4456 ATH_TXQ_LOCK_ASSERT(txq);
4457
4458 tap = ath_tx_get_tx_tid(an, tid->tid);
4459
4460 if (tid->tid == IEEE80211_NONQOS_TID)
4461 device_printf(sc->sc_dev, "%s: called for TID=NONQOS_TID?\n",
4462 __func__);
4463
4464 for (;;) {
4465 status = ATH_AGGR_DONE;
4466
4467 /*
4468 * If the upper layer has paused the TID, don't
4469 * queue any further packets.
4470 *
4471 * This can also occur from the completion task because
4472 * of packet loss; but as its serialised with this code,
4473 * it won't "appear" half way through queuing packets.
4474 */
4475 if (tid->paused)
4476 break;
4477
4478 bf = TAILQ_FIRST(&tid->axq_q);
4479 if (bf == NULL) {
4480 break;
4481 }
4482
4483 /*
4484 * If the packet doesn't fall within the BAW (eg a NULL
4485 * data frame), schedule it directly; continue.
4486 */
4487 if (! bf->bf_state.bfs_dobaw) {
4488 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4489 "%s: non-baw packet\n",
4490 __func__);
4491 ATH_TXQ_REMOVE(tid, bf, bf_list);
4492
4493 if (bf->bf_state.bfs_nframes > 1)
4494 device_printf(sc->sc_dev,
4495 "%s: aggr=%d, nframes=%d\n",
4496 __func__,
4497 bf->bf_state.bfs_aggr,
4498 bf->bf_state.bfs_nframes);
4499
4500 /*
4501 * This shouldn't happen - such frames shouldn't
4502 * ever have been queued as an aggregate in the
4503 * first place. However, make sure the fields
4504 * are correctly setup just to be totally sure.
4505 */
4506 bf->bf_state.bfs_aggr = 0;
4507 bf->bf_state.bfs_nframes = 1;
4508
4509 ath_tx_do_ratelookup(sc, bf);
4510 ath_tx_calc_duration(sc, bf);
4511 ath_tx_calc_protection(sc, bf);
4512 ath_tx_set_rtscts(sc, bf);
4513 ath_tx_rate_fill_rcflags(sc, bf);
4514 ath_tx_setds(sc, bf);
4515 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4516
4517 sc->sc_aggr_stats.aggr_nonbaw_pkt++;
4518
4519 /* Queue the packet; continue */
4520 goto queuepkt;
4521 }
4522
4523 TAILQ_INIT(&bf_q);
4524
4525 /*
4526 * Do a rate control lookup on the first frame in the
4527 * list. The rate control code needs that to occur
4528 * before it can determine whether to TX.
4529 * It's inaccurate because the rate control code doesn't
4530 * really "do" aggregate lookups, so it only considers
4531 * the size of the first frame.
4532 */
4533 ath_tx_do_ratelookup(sc, bf);
4534 bf->bf_state.bfs_rc[3].rix = 0;
4535 bf->bf_state.bfs_rc[3].tries = 0;
4536
4537 ath_tx_calc_duration(sc, bf);
4538 ath_tx_calc_protection(sc, bf);
4539
4540 ath_tx_set_rtscts(sc, bf);
4541 ath_tx_rate_fill_rcflags(sc, bf);
4542
4543 status = ath_tx_form_aggr(sc, an, tid, &bf_q);
4544
4545 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4546 "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
4547
4548 /*
4549 * No frames to be picked up - out of BAW
4550 */
4551 if (TAILQ_EMPTY(&bf_q))
4552 break;
4553
4554 /*
4555 * This assumes that the descriptor list in the ath_bufhead
4556 * are already linked together via bf_next pointers.
4557 */
4558 bf = TAILQ_FIRST(&bf_q);
4559
4560 if (status == ATH_AGGR_8K_LIMITED)
4561 sc->sc_aggr_stats.aggr_rts_aggr_limited++;
4562
4563 /*
4564 * If it's the only frame send as non-aggregate
4565 * assume that ath_tx_form_aggr() has checked
4566 * whether it's in the BAW and added it appropriately.
4567 */
4568 if (bf->bf_state.bfs_nframes == 1) {
4569 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4570 "%s: single-frame aggregate\n", __func__);
4571 bf->bf_state.bfs_aggr = 0;
4572 bf->bf_state.bfs_ndelim = 0;
4573 ath_tx_setds(sc, bf);
4574 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4575 if (status == ATH_AGGR_BAW_CLOSED)
4576 sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
4577 else
4578 sc->sc_aggr_stats.aggr_single_pkt++;
4579 } else {
4580 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4581 "%s: multi-frame aggregate: %d frames, "
4582 "length %d\n",
4583 __func__, bf->bf_state.bfs_nframes,
4584 bf->bf_state.bfs_al);
4585 bf->bf_state.bfs_aggr = 1;
4586 sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
4587 sc->sc_aggr_stats.aggr_aggr_pkt++;
4588
4589 /*
4590 * Calculate the duration/protection as required.
4591 */
4592 ath_tx_calc_duration(sc, bf);
4593 ath_tx_calc_protection(sc, bf);
4594
4595 /*
4596 * Update the rate and rtscts information based on the
4597 * rate decision made by the rate control code;
4598 * the first frame in the aggregate needs it.
4599 */
4600 ath_tx_set_rtscts(sc, bf);
4601
4602 /*
4603 * Setup the relevant descriptor fields
4604 * for aggregation. The first descriptor
4605 * already points to the rest in the chain.
4606 */
4607 ath_tx_setds_11n(sc, bf);
4608
4609 }
4610 queuepkt:
4611 //txq = bf->bf_state.bfs_txq;
4612
4613 /* Set completion handler, multi-frame aggregate or not */
4614 bf->bf_comp = ath_tx_aggr_comp;
4615
4616 if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
4617 device_printf(sc->sc_dev, "%s: TID=16?\n", __func__);
4618
4619 /* Punt to txq */
4620 ath_tx_handoff(sc, txq, bf);
4621
4622 /* Track outstanding buffer count to hardware */
4623 /* aggregates are "one" buffer */
4624 tid->hwq_depth++;
4625
4626 /*
4627 * Break out if ath_tx_form_aggr() indicated
4628 * there can't be any further progress (eg BAW is full.)
4629 * Checking for an empty txq is done above.
4630 *
4631 * XXX locking on txq here?
4632 */
4633 if (txq->axq_aggr_depth >= sc->sc_hwq_limit ||
4634 status == ATH_AGGR_BAW_CLOSED)
4635 break;
4636 }
4637}
4638
4639/*
4640 * Schedule some packets from the given node/TID to the hardware.
4641 */
4642void
4643ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
4644 struct ath_tid *tid)
4645{
4646 struct ath_buf *bf;
4647 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
4648
4649 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
4650 __func__, an, tid->tid);
4651
4652 ATH_TXQ_LOCK_ASSERT(txq);
4653
4654 /* Check - is AMPDU pending or running? then print out something */
4655 if (ath_tx_ampdu_pending(sc, an, tid->tid))
4656 device_printf(sc->sc_dev, "%s: tid=%d, ampdu pending?\n",
4657 __func__, tid->tid);
4658 if (ath_tx_ampdu_running(sc, an, tid->tid))
4659 device_printf(sc->sc_dev, "%s: tid=%d, ampdu running?\n",
4660 __func__, tid->tid);
4661
4662 for (;;) {
4663
4664 /*
4665 * If the upper layers have paused the TID, don't
4666 * queue any further packets.
4667 */
4668 if (tid->paused)
4669 break;
4670
4671 bf = TAILQ_FIRST(&tid->axq_q);
4672 if (bf == NULL) {
4673 break;
4674 }
4675
4676 ATH_TXQ_REMOVE(tid, bf, bf_list);
4677
4678 KASSERT(txq == bf->bf_state.bfs_txq, ("txqs not equal!\n"));
4679
4680 /* Sanity check! */
4681 if (tid->tid != bf->bf_state.bfs_tid) {
4682 device_printf(sc->sc_dev, "%s: bfs_tid %d !="
4683 " tid %d\n",
4684 __func__, bf->bf_state.bfs_tid, tid->tid);
4685 }
4686 /* Normal completion handler */
4687 bf->bf_comp = ath_tx_normal_comp;
4688
4689 /* Program descriptors + rate control */
4690 ath_tx_do_ratelookup(sc, bf);
4691 ath_tx_calc_duration(sc, bf);
4692 ath_tx_calc_protection(sc, bf);
4693 ath_tx_set_rtscts(sc, bf);
4694 ath_tx_rate_fill_rcflags(sc, bf);
4695 ath_tx_setds(sc, bf);
4696
4697 /* Track outstanding buffer count to hardware */
4698 /* aggregates are "one" buffer */
4699 tid->hwq_depth++;
4700
4701 /* Punt to hardware or software txq */
4702 ath_tx_handoff(sc, txq, bf);
4703 }
4704}
4705
4706/*
4707 * Schedule some packets to the given hardware queue.
4708 *
4709 * This function walks the list of TIDs (ie, ath_node TIDs
4710 * with queued traffic) and attempts to schedule traffic
4711 * from them.
4712 *
4713 * TID scheduling is implemented as a FIFO, with TIDs being
4714 * added to the end of the queue after some frames have been
4715 * scheduled.
4716 */
4717void
4718ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
4719{
4720 struct ath_tid *tid, *next, *last;
4721
4722 ATH_TXQ_LOCK_ASSERT(txq);
4723
4724 /*
4725 * Don't schedule if the hardware queue is busy.
4726 * This (hopefully) gives some more time to aggregate
4727 * some packets in the aggregation queue.
4728 */
4729 if (txq->axq_aggr_depth >= sc->sc_hwq_limit) {
4730 sc->sc_aggr_stats.aggr_sched_nopkt++;
4731 return;
4732 }
4733
4734 last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
4735
4736 TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
4737 /*
4738 * Suspend paused queues here; they'll be resumed
4739 * once the addba completes or times out.
4740 */
4741 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
4742 __func__, tid->tid, tid->paused);
4743 ath_tx_tid_unsched(sc, tid);
4744 if (tid->paused) {
4745 continue;
4746 }
4747 if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
4748 ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
4749 else
4750 ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
4751
4752 /* Not empty? Re-schedule */
4753 if (tid->axq_depth != 0)
4754 ath_tx_tid_sched(sc, tid);
4755
4756 /* Give the software queue time to aggregate more packets */
4757 if (txq->axq_aggr_depth >= sc->sc_hwq_limit) {
4758 break;
4759 }
4760
4761 /*
4762 * If this was the last entry on the original list, stop.
4763 * Otherwise nodes that have been rescheduled onto the end
4764 * of the TID FIFO list will just keep being rescheduled.
4765 */
4766 if (tid == last)
4767 break;
4768 }
4769}
4770
4771/*
4772 * TX addba handling
4773 */
4774
4775/*
4776 * Return net80211 TID struct pointer, or NULL for none
4777 */
4778struct ieee80211_tx_ampdu *
4779ath_tx_get_tx_tid(struct ath_node *an, int tid)
4780{
4781 struct ieee80211_node *ni = &an->an_node;
4782 struct ieee80211_tx_ampdu *tap;
4783
4784 if (tid == IEEE80211_NONQOS_TID)
4785 return NULL;
4786
4787 tap = &ni->ni_tx_ampdu[tid];
4788 return tap;
4789}
4790
4791/*
4792 * Is AMPDU-TX running?
4793 */
4794static int
4795ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
4796{
4797 struct ieee80211_tx_ampdu *tap;
4798
4799 if (tid == IEEE80211_NONQOS_TID)
4800 return 0;
4801
4802 tap = ath_tx_get_tx_tid(an, tid);
4803 if (tap == NULL)
4804 return 0; /* Not valid; default to not running */
4805
4806 return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
4807}
4808
4809/*
4810 * Is AMPDU-TX negotiation pending?
4811 */
4812static int
4813ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
4814{
4815 struct ieee80211_tx_ampdu *tap;
4816
4817 if (tid == IEEE80211_NONQOS_TID)
4818 return 0;
4819
4820 tap = ath_tx_get_tx_tid(an, tid);
4821 if (tap == NULL)
4822 return 0; /* Not valid; default to not pending */
4823
4824 return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
4825}
4826
4827/*
4828 * Is AMPDU-TX pending for the given TID?
4829 */
4830
4831
4832/*
4833 * Method to handle sending an ADDBA request.
4834 *
4835 * We tap this so the relevant flags can be set to pause the TID
4836 * whilst waiting for the response.
4837 *
4838 * XXX there's no timeout handler we can override?
4839 */
4840int
4841ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
4842 int dialogtoken, int baparamset, int batimeout)
4843{
4844 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
4845 int tid = tap->txa_tid;
4846 struct ath_node *an = ATH_NODE(ni);
4847 struct ath_tid *atid = &an->an_tid[tid];
4848
4849 /*
4850 * XXX danger Will Robinson!
4851 *
4852 * Although the taskqueue may be running and scheduling some more
4853 * packets, these should all be _before_ the addba sequence number.
4854 * However, net80211 will keep self-assigning sequence numbers
4855 * until addba has been negotiated.
4856 *
4857 * In the past, these packets would be "paused" (which still works
4858 * fine, as they're being scheduled to the driver in the same
4859 * serialised method which is calling the addba request routine)
4860 * and when the aggregation session begins, they'll be dequeued
4861 * as aggregate packets and added to the BAW. However, now there's
4862 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
4863 * packets. Thus they never get included in the BAW tracking and
4864 * this can cause the initial burst of packets after the addba
4865 * negotiation to "hang", as they quickly fall outside the BAW.
4866 *
4867 * The "eventual" solution should be to tag these packets with
4868 * dobaw. Although net80211 has given us a sequence number,
4869 * it'll be "after" the left edge of the BAW and thus it'll
4870 * fall within it.
4871 */
4872 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4873 /*
4874 * This is a bit annoying. Until net80211 HT code inherits some
4875 * (any) locking, we may have this called in parallel BUT only
4876 * one response/timeout will be called. Grr.
4877 */
4878 if (atid->addba_tx_pending == 0) {
4879 ath_tx_tid_pause(sc, atid);
4880 atid->addba_tx_pending = 1;
4881 }
4882 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4883
4884 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4885 "%s: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
4886 __func__, dialogtoken, baparamset, batimeout);
4887 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4888 "%s: txa_start=%d, ni_txseqs=%d\n",
4889 __func__, tap->txa_start, ni->ni_txseqs[tid]);
4890
4891 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
4892 batimeout);
4893}
4894
4895/*
4896 * Handle an ADDBA response.
4897 *
4898 * We unpause the queue so TX'ing can resume.
4899 *
4900 * Any packets TX'ed from this point should be "aggregate" (whether
4901 * aggregate or not) so the BAW is updated.
4902 *
4903 * Note! net80211 keeps self-assigning sequence numbers until
4904 * ampdu is negotiated. This means the initially-negotiated BAW left
4905 * edge won't match the ni->ni_txseq.
4906 *
4907 * So, being very dirty, the BAW left edge is "slid" here to match
4908 * ni->ni_txseq.
4909 *
4910 * What likely SHOULD happen is that all packets subsequent to the
4911 * addba request should be tagged as aggregate and queued as non-aggregate
4912 * frames; thus updating the BAW. For now though, I'll just slide the
4913 * window.
4914 */
4915int
4916ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
4917 int status, int code, int batimeout)
4918{
4919 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
4920 int tid = tap->txa_tid;
4921 struct ath_node *an = ATH_NODE(ni);
4922 struct ath_tid *atid = &an->an_tid[tid];
4923 int r;
4924
4925 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4926 "%s: called; status=%d, code=%d, batimeout=%d\n", __func__,
4927 status, code, batimeout);
4928
4929 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4930 "%s: txa_start=%d, ni_txseqs=%d\n",
4931 __func__, tap->txa_start, ni->ni_txseqs[tid]);
4932
4933 /*
4934 * Call this first, so the interface flags get updated
4935 * before the TID is unpaused. Otherwise a race condition
4936 * exists where the unpaused TID still doesn't yet have
4937 * IEEE80211_AGGR_RUNNING set.
4938 */
4939 r = sc->sc_addba_response(ni, tap, status, code, batimeout);
4940
4941 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4942 atid->addba_tx_pending = 0;
4943 /*
4944 * XXX dirty!
4945 * Slide the BAW left edge to wherever net80211 left it for us.
4946 * Read above for more information.
4947 */
4948 tap->txa_start = ni->ni_txseqs[tid];
4949 ath_tx_tid_resume(sc, atid);
4950 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4951 return r;
4952}
4953
4954
4955/*
4956 * Stop ADDBA on a queue.
4957 *
4958 * This can be called whilst BAR TX is currently active on the queue,
4959 * so make sure this is unblocked before continuing.
4960 */
4961void
4962ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
4963{
4964 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
4965 int tid = tap->txa_tid;
4966 struct ath_node *an = ATH_NODE(ni);
4967 struct ath_tid *atid = &an->an_tid[tid];
4968
4969 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: called\n", __func__);
4970
4971 /*
4972 * Pause TID traffic early, so there aren't any races
4973 * Unblock the pending BAR held traffic, if it's currently paused.
4974 */
4975 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4976 ath_tx_tid_pause(sc, atid);
4977 if (atid->bar_wait) {
4978 /*
4979 * bar_unsuspend() expects bar_tx == 1, as it should be
4980 * called from the TX completion path. This quietens
4981 * the warning. It's cleared for us anyway.
4982 */
4983 atid->bar_tx = 1;
4984 ath_tx_tid_bar_unsuspend(sc, atid);
4985 }
4986 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4987
4988 /* There's no need to hold the TXQ lock here */
4989 sc->sc_addba_stop(ni, tap);
4990
4991 /*
4992 * ath_tx_tid_cleanup will resume the TID if possible, otherwise
4993 * it'll set the cleanup flag, and it'll be unpaused once
4994 * things have been cleaned up.
4995 */
4996 ath_tx_tid_cleanup(sc, an, tid);
4997}
4998
4999/*
5000 * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
5001 * it simply tears down the aggregation session. Ew.
5002 *
5003 * It however will call ieee80211_ampdu_stop() which will call
5004 * ic->ic_addba_stop().
5005 *
5006 * XXX This uses a hard-coded max BAR count value; the whole
5007 * XXX BAR TX success or failure should be better handled!
5008 */
5009void
5010ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5011 int status)
5012{
5013 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
5014 int tid = tap->txa_tid;
5015 struct ath_node *an = ATH_NODE(ni);
5016 struct ath_tid *atid = &an->an_tid[tid];
5017 int attempts = tap->txa_attempts;
5018
5019 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
5020 "%s: called; tap=%p, atid=%p, txa_tid=%d, atid->tid=%d, status=%d, attempts=%d\n",
5021 __func__,
5022 tap,
5023 atid,
5024 tap->txa_tid,
5025 atid->tid,
5026 status,
5027 attempts);
5028
5029 /* Note: This may update the BAW details */
5030 sc->sc_bar_response(ni, tap, status);
5031
5032 /* Unpause the TID */
5033 /*
5034 * XXX if this is attempt=50, the TID will be downgraded
5035 * XXX to a non-aggregate session. So we must unpause the
5036 * XXX TID here or it'll never be done.
5037 */
5038 if (status == 0 || attempts == 50) {
5039 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
5040 ath_tx_tid_bar_unsuspend(sc, atid);
5041 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
5042 }
5043}
5044
5045/*
5046 * This is called whenever the pending ADDBA request times out.
5047 * Unpause and reschedule the TID.
5048 */
5049void
5050ath_addba_response_timeout(struct ieee80211_node *ni,
5051 struct ieee80211_tx_ampdu *tap)
5052{
5053 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
5054 int tid = tap->txa_tid;
5055 struct ath_node *an = ATH_NODE(ni);
5056 struct ath_tid *atid = &an->an_tid[tid];
5057
5058 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5059 "%s: called; resuming\n", __func__);
5060
5061 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
5062 atid->addba_tx_pending = 0;
5063 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
5064
5065 /* Note: This updates the aggregate state to (again) pending */
5066 sc->sc_addba_response_timeout(ni, tap);
5067
5068 /* Unpause the TID; which reschedules it */
5069 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
5070 ath_tx_tid_resume(sc, atid);
5071 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
5072}
5073
5074static int
5075ath_legacy_dma_txsetup(struct ath_softc *sc)
5076{
5077
5078 /* nothing new needed */
5079 return (0);
5080}
5081
5082static int
5083ath_legacy_dma_txteardown(struct ath_softc *sc)
5084{
5085
5086 /* nothing new needed */
5087 return (0);
5088}
5089
5090void
5091ath_xmit_setup_legacy(struct ath_softc *sc)
5092{
5093 /*
5094 * For now, just set the descriptor length to sizeof(ath_desc);
5095 * worry about extracting the real length out of the HAL later.
5096 */
5097 sc->sc_tx_desclen = sizeof(struct ath_desc);
5098 sc->sc_tx_statuslen = 0;
5099 sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */
5100
5101 sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup;
5102 sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown;
5103 sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func;
5104
5105 sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart;
5106 sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff;
5107
5108 sc->sc_tx.xmit_drain = ath_legacy_tx_drain;
5109}
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