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ar9280.c (219605) ar9280.c (224519)
1/*
2 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2008 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
1/*
2 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2008 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar9002/ar9280.c 219605 2011-03-13 13:00:45Z adrian $
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar9002/ar9280.c 224519 2011-07-30 13:45:12Z adrian $
18 */
19#include "opt_ah.h"
20
21/*
22 * NB: Merlin and later have a simpler RF backend.
23 */
24#include "ah.h"
25#include "ah_internal.h"

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71 */
72static HAL_BOOL
73ar9280SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
74{
75 uint16_t bMode, fracMode, aModeRefSel = 0;
76 uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
77 CHAN_CENTERS centers;
78 uint32_t refDivA = 24;
18 */
19#include "opt_ah.h"
20
21/*
22 * NB: Merlin and later have a simpler RF backend.
23 */
24#include "ah.h"
25#include "ah_internal.h"

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71 */
72static HAL_BOOL
73ar9280SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
74{
75 uint16_t bMode, fracMode, aModeRefSel = 0;
76 uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
77 CHAN_CENTERS centers;
78 uint32_t refDivA = 24;
79 uint8_t frac_n_5g;
79
80 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq);
81
82 ar5416GetChannelCenters(ah, chan, &centers);
83 freq = centers.synth_center;
84
85 reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL);
86 reg32 &= 0xc0000000;
87
80
81 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq);
82
83 ar5416GetChannelCenters(ah, chan, &centers);
84 freq = centers.synth_center;
85
86 reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL);
87 reg32 &= 0xc0000000;
88
89 if (ath_hal_eepromGet(ah, AR_EEP_FRAC_N_5G, &frac_n_5g) != HAL_OK)
90 frac_n_5g = 0;
91
88 if (freq < 4800) { /* 2 GHz, fractional mode */
89 uint32_t txctl;
90
91 bMode = 1;
92 fracMode = 1;
93 aModeRefSel = 0;
94 channelSel = (freq * 0x10000)/15;
95

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101 } else {
102 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
103 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
104 }
105 } else {
106 bMode = 0;
107 fracMode = 0;
108
92 if (freq < 4800) { /* 2 GHz, fractional mode */
93 uint32_t txctl;
94
95 bMode = 1;
96 fracMode = 1;
97 aModeRefSel = 0;
98 channelSel = (freq * 0x10000)/15;
99

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105 } else {
106 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
107 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
108 }
109 } else {
110 bMode = 0;
111 fracMode = 0;
112
109 if ((freq % 20) == 0) {
110 aModeRefSel = 3;
111 } else if ((freq % 10) == 0) {
112 aModeRefSel = 2;
113 } else {
113 switch (frac_n_5g) {
114 case 0:
115 if ((freq % 20) == 0) {
116 aModeRefSel = 3;
117 } else if ((freq % 10) == 0) {
118 aModeRefSel = 2;
119 }
120 if (aModeRefSel) break;
121 case 1:
122 default:
114 aModeRefSel = 0;
115 /* Enable 2G (fractional) mode for channels which are 5MHz spaced */
116 fracMode = 1;
117 refDivA = 1;
118 channelSel = (freq * 0x8000)/15;
119
120 /* RefDivA setting */
121 OS_A_REG_RMW_FIELD(ah, AR_AN_SYNTH9,
122 AR_AN_SYNTH9_REFDIVA, refDivA);
123 }
123 aModeRefSel = 0;
124 /* Enable 2G (fractional) mode for channels which are 5MHz spaced */
125 fracMode = 1;
126 refDivA = 1;
127 channelSel = (freq * 0x8000)/15;
128
129 /* RefDivA setting */
130 OS_A_REG_RMW_FIELD(ah, AR_AN_SYNTH9,
131 AR_AN_SYNTH9_REFDIVA, refDivA);
132 }
133
124 if (!fracMode) {
125 ndiv = (freq * (refDivA >> aModeRefSel))/60;
126 channelSel = ndiv & 0x1ff;
127 channelFrac = (ndiv & 0xfffffe00) * 2;
128 channelSel = (channelSel << 17) | channelFrac;
129 }
130 }
131

--- 245 unchanged lines hidden --- 		134 if (!fracMode) {
135 ndiv = (freq * (refDivA >> aModeRefSel))/60;
136 channelSel = ndiv & 0x1ff;
137 channelFrac = (ndiv & 0xfffffe00) * 2;
138 channelSel = (channelSel << 17) | channelFrac;
139 }
140 }
141

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