ah_eeprom_v4k.h (217812) | ah_eeprom_v4k.h (217814) |
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1/* 2 * Copyright (c) 2009 Rui Paulo <rpaulo@FreeBSD.org> 3 * Copyright (c) 2008 Sam Leffler, Errno Consulting 4 * Copyright (c) 2008 Atheros Communications, Inc. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 * | 1/* 2 * Copyright (c) 2009 Rui Paulo <rpaulo@FreeBSD.org> 3 * Copyright (c) 2008 Sam Leffler, Errno Consulting 4 * Copyright (c) 2008 Atheros Communications, Inc. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 * |
18 * $FreeBSD: head/sys/dev/ath/ath_hal/ah_eeprom_v4k.h 217812 2011-01-25 05:41:36Z adrian $ | 18 * $FreeBSD: head/sys/dev/ath/ath_hal/ah_eeprom_v4k.h 217814 2011-01-25 07:37:12Z adrian $ |
19 */ 20#ifndef _AH_EEPROM_V4K_H_ 21#define _AH_EEPROM_V4K_H_ 22 23#include "ah_eeprom.h" 24#include "ah_eeprom_v14.h" 25 | 19 */ 20#ifndef _AH_EEPROM_V4K_H_ 21#define _AH_EEPROM_V4K_H_ 22 23#include "ah_eeprom.h" 24#include "ah_eeprom_v14.h" 25 |
26#if _BYTE_ORDER == _BIG_ENDIAN 27#define __BIG_ENDIAN_BITFIELD 28#endif 29 |
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26#define AR9285_RDEXT_DEFAULT 0x1F 27 28#undef owl_eep_start_loc 29#ifdef __LINUX_ARM_ARCH__ /* AP71 */ 30#define owl_eep_start_loc 0 31#else 32#define owl_eep_start_loc 64 33#endif --- 31 unchanged lines hidden (view full) --- 65 uint16_t blueToothOptions; 66 uint16_t deviceCap; 67 uint32_t binBuildNumber; 68 uint8_t deviceType; 69 uint8_t txGainType; /* high power tx gain table support */ 70} __packed BASE_EEP4K_HEADER; // 32 B 71 72typedef struct ModalEepHeader4k { | 30#define AR9285_RDEXT_DEFAULT 0x1F 31 32#undef owl_eep_start_loc 33#ifdef __LINUX_ARM_ARCH__ /* AP71 */ 34#define owl_eep_start_loc 0 35#else 36#define owl_eep_start_loc 64 37#endif --- 31 unchanged lines hidden (view full) --- 69 uint16_t blueToothOptions; 70 uint16_t deviceCap; 71 uint32_t binBuildNumber; 72 uint8_t deviceType; 73 uint8_t txGainType; /* high power tx gain table support */ 74} __packed BASE_EEP4K_HEADER; // 32 B 75 76typedef struct ModalEepHeader4k { |
73 uint32_t antCtrlChain[AR5416_4K_MAX_CHAINS]; // 12 | 77 uint32_t antCtrlChain[AR5416_4K_MAX_CHAINS]; // 4 |
74 uint32_t antCtrlCommon; // 4 75 int8_t antennaGainCh[AR5416_4K_MAX_CHAINS]; // 1 76 uint8_t switchSettling; // 1 | 78 uint32_t antCtrlCommon; // 4 79 int8_t antennaGainCh[AR5416_4K_MAX_CHAINS]; // 1 80 uint8_t switchSettling; // 1 |
77 uint8_t txRxAttenCh[AR5416_4K_MAX_CHAINS]; // 1 | 81 uint8_t txRxAttenCh[AR5416_4K_MAX_CHAINS]; // 1 |
78 uint8_t rxTxMarginCh[AR5416_4K_MAX_CHAINS]; // 1 79 uint8_t adcDesiredSize; // 1 80 int8_t pgaDesiredSize; // 1 | 82 uint8_t rxTxMarginCh[AR5416_4K_MAX_CHAINS]; // 1 83 uint8_t adcDesiredSize; // 1 84 int8_t pgaDesiredSize; // 1 |
81 uint8_t xlnaGainCh[AR5416_4K_MAX_CHAINS]; // 1 | 85 uint8_t xlnaGainCh[AR5416_4K_MAX_CHAINS]; // 1 |
82 uint8_t txEndToXpaOff; // 1 83 uint8_t txEndToRxOn; // 1 84 uint8_t txFrameToXpaOn; // 1 85 uint8_t thresh62; // 1 86 uint8_t noiseFloorThreshCh[AR5416_4K_MAX_CHAINS]; // 1 87 uint8_t xpdGain; // 1 88 uint8_t xpd; // 1 89 int8_t iqCalICh[AR5416_4K_MAX_CHAINS]; // 1 90 int8_t iqCalQCh[AR5416_4K_MAX_CHAINS]; // 1 91 92 uint8_t pdGainOverlap; // 1 93 | 86 uint8_t txEndToXpaOff; // 1 87 uint8_t txEndToRxOn; // 1 88 uint8_t txFrameToXpaOn; // 1 89 uint8_t thresh62; // 1 90 uint8_t noiseFloorThreshCh[AR5416_4K_MAX_CHAINS]; // 1 91 uint8_t xpdGain; // 1 92 uint8_t xpd; // 1 93 int8_t iqCalICh[AR5416_4K_MAX_CHAINS]; // 1 94 int8_t iqCalQCh[AR5416_4K_MAX_CHAINS]; // 1 95 96 uint8_t pdGainOverlap; // 1 97 |
94#ifdef _BYTE_ORDER == _BIG_ENDIAN 95 uint8_t ob_1:4, ob_0:4; 96 uint8_t db1_1:4, db1_0:4; | 98#ifdef __BIG_ENDIAN_BITFIELD 99 uint8_t ob_1:4, ob_0:4; // 1 100 uint8_t db1_1:4, db1_0:4; // 1 |
97#else 98 uint8_t ob_0:4, ob_1:4; 99 uint8_t db1_0:4, db1_1:4; 100#endif 101 102 uint8_t xpaBiasLvl; // 1 103 uint8_t txFrameToDataStart; // 1 104 uint8_t txFrameToPaOn; // 1 105 uint8_t ht40PowerIncForPdadc; // 1 106 uint8_t bswAtten[AR5416_4K_MAX_CHAINS]; // 1 107 uint8_t bswMargin[AR5416_4K_MAX_CHAINS]; // 1 108 uint8_t swSettleHt40; // 1 109 uint8_t xatten2Db[AR5416_4K_MAX_CHAINS]; // 1 110 uint8_t xatten2Margin[AR5416_4K_MAX_CHAINS]; // 1 111 | 101#else 102 uint8_t ob_0:4, ob_1:4; 103 uint8_t db1_0:4, db1_1:4; 104#endif 105 106 uint8_t xpaBiasLvl; // 1 107 uint8_t txFrameToDataStart; // 1 108 uint8_t txFrameToPaOn; // 1 109 uint8_t ht40PowerIncForPdadc; // 1 110 uint8_t bswAtten[AR5416_4K_MAX_CHAINS]; // 1 111 uint8_t bswMargin[AR5416_4K_MAX_CHAINS]; // 1 112 uint8_t swSettleHt40; // 1 113 uint8_t xatten2Db[AR5416_4K_MAX_CHAINS]; // 1 114 uint8_t xatten2Margin[AR5416_4K_MAX_CHAINS]; // 1 115 |
112#ifdef _BYTE_ORDER == _BIG_ENDIAN 113 uint8_t db2_1:4, db2_0:4; // 1 | 116#ifdef __BIG_ENDIAN_BITFIELD 117 uint8_t db2_1:4, db2_0:4; // 1 |
114#else | 118#else |
115 uint8_t db2_0:4, db2_1:4; // 1 | 119 uint8_t db2_0:4, db2_1:4; // 1 |
116#endif 117 | 120#endif 121 |
118 uint8_t version; // 1 | 122 uint8_t version; // 1 |
119 | 123 |
120#ifdef _BYTE_ORDER == _BIG_ENDIAN 121 uint8_t ob_3:4, ob_2:4; 122 uint8_t antdiv_ctl1:4, ob_4:4; 123 uint8_t db1_3:4, db1_2:4; 124 uint8_t antdiv_ctl2:4, db1_4:4; 125 uint8_t db2_2:4, db2_3:4; 126 uint8_t reserved:4, db2_4:4; | 124#ifdef __BIG_ENDIAN_BITFIELD 125 uint8_t ob_3:4, ob_2:4; // 1 126 uint8_t antdiv_ctl1:4, ob_4:4; // 1 127 uint8_t db1_3:4, db1_2:4; // 1 128 uint8_t antdiv_ctl2:4, db1_4:4; // 1 129 uint8_t db2_2:4, db2_3:4; // 1 130 uint8_t reserved:4, db2_4:4; // 1 |
127#else | 131#else |
128 uint8_t ob_2:4, ob_3:4; 129 uint8_t ob_4:4, antdiv_ctl1:4; 130 uint8_t db1_2:4, db1_3:4; 131 uint8_t db1_4:4, antdiv_ctl2:4; 132 uint8_t db2_2:4, db2_3:4; 133 uint8_t db2_4:4, reserved:4; | 132 uint8_t ob_2:4, ob_3:4; 133 uint8_t ob_4:4, antdiv_ctl1:4; 134 uint8_t db1_2:4, db1_3:4; 135 uint8_t db1_4:4, antdiv_ctl2:4; 136 uint8_t db2_2:4, db2_3:4; 137 uint8_t db2_4:4, reserved:4; |
134#endif | 138#endif |
135 uint8_t futureModal[4]; | 139 uint8_t futureModal[4]; // 4 |
136 137 SPUR_CHAN spurChans[AR5416_EEPROM_MODAL_SPURS]; // 20 B | 140 141 SPUR_CHAN spurChans[AR5416_EEPROM_MODAL_SPURS]; // 20 B |
138} __packed MODAL_EEP4K_HEADER; // == ? B | 142} __packed MODAL_EEP4K_HEADER; // == 68 B |
139 140typedef struct CalCtlData4k { 141 CAL_CTL_EDGES ctlEdges[AR5416_4K_MAX_CHAINS][AR5416_4K_NUM_BAND_EDGES]; 142} __packed CAL_CTL_DATA_4K; 143 144typedef struct calDataPerFreq4k { 145 uint8_t pwrPdg[AR5416_4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; 146 uint8_t vpdPdg[AR5416_4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; --- 26 unchanged lines hidden --- | 143 144typedef struct CalCtlData4k { 145 CAL_CTL_EDGES ctlEdges[AR5416_4K_MAX_CHAINS][AR5416_4K_NUM_BAND_EDGES]; 146} __packed CAL_CTL_DATA_4K; 147 148typedef struct calDataPerFreq4k { 149 uint8_t pwrPdg[AR5416_4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; 150 uint8_t vpdPdg[AR5416_4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; --- 26 unchanged lines hidden --- |