| ah_osdep.h (195418) | ah_osdep.h (234450) |
|---|---|
| 1/*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * | 1/*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * |
| 29 * $FreeBSD: head/sys/dev/ath/ah_osdep.h 195418 2009-07-06 20:51:54Z sam $ | 29 * $FreeBSD: head/sys/dev/ath/ah_osdep.h 234450 2012-04-19 03:26:21Z adrian $ |
| 30 */ 31#ifndef _ATH_AH_OSDEP_H_ 32#define _ATH_AH_OSDEP_H_ 33/* 34 * Atheros Hardware Access Layer (HAL) OS Dependent Definitions. 35 */ 36#include <sys/cdefs.h> 37#include <sys/param.h> --- 54 unchanged lines hidden (view full) --- 92 */ 93#if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ) 94#define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val) 95#define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg) 96 97extern void ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val); 98extern u_int32_t ath_hal_reg_read(struct ath_hal *ah, u_int reg); 99#else | 30 */ 31#ifndef _ATH_AH_OSDEP_H_ 32#define _ATH_AH_OSDEP_H_ 33/* 34 * Atheros Hardware Access Layer (HAL) OS Dependent Definitions. 35 */ 36#include <sys/cdefs.h> 37#include <sys/param.h> --- 54 unchanged lines hidden (view full) --- 92 */ 93#if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ) 94#define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val) 95#define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg) 96 97extern void ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val); 98extern u_int32_t ath_hal_reg_read(struct ath_hal *ah, u_int reg); 99#else |
| 100/* 101 * The hardware registers are native little-endian byte order. 102 * Big-endian hosts are handled by enabling hardware byte-swap 103 * of register reads and writes at reset. But the PCI clock 104 * domain registers are not byte swapped! Thus, on big-endian 105 * platforms we have to explicitly byte-swap those registers. 106 * Most of this code is collapsed at compile time because the 107 * register values are constants. 108 */ 109#if _BYTE_ORDER == _BIG_ENDIAN 110#define OS_REG_WRITE(_ah, _reg, _val) do { \ 111 if (OS_REG_UNSWAPPED(_reg)) \ 112 bus_space_write_4((bus_space_tag_t)(_ah)->ah_st, \ 113 (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)); \ 114 else \ 115 bus_space_write_stream_4((bus_space_tag_t)(_ah)->ah_st, \ 116 (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)); \ 117} while (0) 118#define OS_REG_READ(_ah, _reg) \ 119 (OS_REG_UNSWAPPED(_reg) ? \ 120 bus_space_read_4((bus_space_tag_t)(_ah)->ah_st, \ 121 (bus_space_handle_t)(_ah)->ah_sh, (_reg)) : \ 122 bus_space_read_stream_4((bus_space_tag_t)(_ah)->ah_st, \ 123 (bus_space_handle_t)(_ah)->ah_sh, (_reg))) 124#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ | |
| 125#define OS_REG_WRITE(_ah, _reg, _val) \ 126 bus_space_write_4((bus_space_tag_t)(_ah)->ah_st, \ 127 (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)) 128#define OS_REG_READ(_ah, _reg) \ 129 bus_space_read_4((bus_space_tag_t)(_ah)->ah_st, \ 130 (bus_space_handle_t)(_ah)->ah_sh, (_reg)) | 100#define OS_REG_WRITE(_ah, _reg, _val) \ 101 bus_space_write_4((bus_space_tag_t)(_ah)->ah_st, \ 102 (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)) 103#define OS_REG_READ(_ah, _reg) \ 104 bus_space_read_4((bus_space_tag_t)(_ah)->ah_st, \ 105 (bus_space_handle_t)(_ah)->ah_sh, (_reg)) |
| 131#endif /* _BYTE_ORDER */ 132#endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */ | 106#endif |
| 133 134#ifdef AH_DEBUG_ALQ 135extern void OS_MARK(struct ath_hal *, u_int id, u_int32_t value); 136#else 137#define OS_MARK(_ah, _id, _v) 138#endif 139 140#endif /* _ATH_AH_OSDEP_H_ */ | 107 108#ifdef AH_DEBUG_ALQ 109extern void OS_MARK(struct ath_hal *, u_int id, u_int32_t value); 110#else 111#define OS_MARK(_ah, _id, _v) 112#endif 113 114#endif /* _ATH_AH_OSDEP_H_ */ |