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< * $FreeBSD: head/sys/dev/ath/ah_osdep.h 195418 2009-07-06 20:51:54Z sam $
---
> * $FreeBSD: head/sys/dev/ath/ah_osdep.h 234450 2012-04-19 03:26:21Z adrian $
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< /*
< * The hardware registers are native little-endian byte order.
< * Big-endian hosts are handled by enabling hardware byte-swap
< * of register reads and writes at reset. But the PCI clock
< * domain registers are not byte swapped! Thus, on big-endian
< * platforms we have to explicitly byte-swap those registers.
< * Most of this code is collapsed at compile time because the
< * register values are constants.
< */
< #if _BYTE_ORDER == _BIG_ENDIAN
< #define OS_REG_WRITE(_ah, _reg, _val) do { \
< if (OS_REG_UNSWAPPED(_reg)) \
< bus_space_write_4((bus_space_tag_t)(_ah)->ah_st, \
< (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)); \
< else \
< bus_space_write_stream_4((bus_space_tag_t)(_ah)->ah_st, \
< (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)); \
< } while (0)
< #define OS_REG_READ(_ah, _reg) \
< (OS_REG_UNSWAPPED(_reg) ? \
< bus_space_read_4((bus_space_tag_t)(_ah)->ah_st, \
< (bus_space_handle_t)(_ah)->ah_sh, (_reg)) : \
< bus_space_read_stream_4((bus_space_tag_t)(_ah)->ah_st, \
< (bus_space_handle_t)(_ah)->ah_sh, (_reg)))
< #else /* _BYTE_ORDER == _LITTLE_ENDIAN */
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< #endif /* _BYTE_ORDER */
< #endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */
---
> #endif