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< * $FreeBSD: head/sys/dev/ath/ah_osdep.h 191909 2009-05-08 00:23:00Z sam $
---
> * $FreeBSD: head/sys/dev/ath/ah_osdep.h 195418 2009-07-06 20:51:54Z sam $
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> * The hardware registers are native little-endian byte order.
> * Big-endian hosts are handled by enabling hardware byte-swap
> * of register reads and writes at reset. But the PCI clock
> * domain registers are not byte swapped! Thus, on big-endian
> * platforms we have to explicitly byte-swap those registers.
> * OS_REG_UNSWAPPED identifies the registers that need special handling.
> */
> #if _BYTE_ORDER == _BIG_ENDIAN
> #define OS_REG_UNSWAPPED(_reg) \
> (((_reg) >= 0x4000 && (_reg) < 0x5000) || \
> ((_reg) >= 0x7000 && (_reg) < 0x8000))
> #else /* _BYTE_ORDER == _LITTLE_ENDIAN */
> #define OS_REG_UNSWAPPED(_reg) (0)
> #endif /* _BYTE_ORDER */
>
> /*
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< * defined below. For public builds we inline expand only for
< * platforms where it is certain what the requirements are to
< * read/write registers--typically they are memory-mapped and
< * no explicit synchronization or memory invalidation operations
< * are required (e.g. i386).
---
> * defined below.
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< #define AH_LITTLE_ENDIAN 1234
< #define AH_BIG_ENDIAN 4321
<
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< #define OS_REG_UNSWAPPED(_reg) \
< (((_reg) >= 0x4000 && (_reg) < 0x5000) || \
< ((_reg) >= 0x7000 && (_reg) < 0x8000))
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< #define OS_REG_UNSWAPPED(_reg) (0)