1/*-
2 * Copyright (c) 1998 - 2003 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
| 1/*-
2 * Copyright (c) 1998 - 2003 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
|
28 * $FreeBSD: head/sys/dev/ata/ata-pci.c 111485 2003-02-25 14:46:30Z sos $
| 28 * $FreeBSD: head/sys/dev/ata/ata-pci.c 112791 2003-03-29 13:37:09Z sos $
|
29 */
30
31#include "opt_ata.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/kernel.h>
35#include <sys/module.h>
36#include <sys/bus.h>
37#include <sys/malloc.h>
38#include <machine/stdarg.h>
39#include <machine/resource.h>
40#include <machine/bus.h>
41#ifdef __alpha__
42#include <machine/md_var.h>
43#endif
44#include <sys/rman.h>
45#include <pci/pcivar.h>
46#include <pci/pcireg.h>
47#include <dev/ata/ata-all.h>
48#include <dev/ata/ata-pci.h>
49
50/* local vars */
51static MALLOC_DEFINE(M_ATAPCI, "ATA PCI", "ATA driver PCI");
52
53/* misc defines */
54#define IOMASK 0xfffffffc
55
56/* prototypes */
| 29 */
30
31#include "opt_ata.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/kernel.h>
35#include <sys/module.h>
36#include <sys/bus.h>
37#include <sys/malloc.h>
38#include <machine/stdarg.h>
39#include <machine/resource.h>
40#include <machine/bus.h>
41#ifdef __alpha__
42#include <machine/md_var.h>
43#endif
44#include <sys/rman.h>
45#include <pci/pcivar.h>
46#include <pci/pcireg.h>
47#include <dev/ata/ata-all.h>
48#include <dev/ata/ata-pci.h>
49
50/* local vars */
51static MALLOC_DEFINE(M_ATAPCI, "ATA PCI", "ATA driver PCI");
52
53/* misc defines */
54#define IOMASK 0xfffffffc
55
56/* prototypes */
|
57static int ata_pci_add_child(device_t, int);
| 57static int ata_pci_allocate(device_t, struct ata_channel *);
58static int ata_pci_dmainit(struct ata_channel *);
|
58static void ata_pci_locknoop(struct ata_channel *, int);
59
60static int
61ata_pci_probe(device_t dev)
62{
63 if (pci_get_class(dev) != PCIC_STORAGE)
64 return ENXIO;
65
66 switch (pci_get_vendor(dev)) {
67 case ATA_ACARD_ID:
68 return ata_acard_ident(dev);
69 case ATA_ACER_LABS_ID:
70 return ata_ali_ident(dev);
71 case ATA_AMD_ID:
72 return ata_amd_ident(dev);
73 case ATA_CYRIX_ID:
74 return ata_cyrix_ident(dev);
75 case ATA_CYPRESS_ID:
76 return ata_cypress_ident(dev);
77 case ATA_HIGHPOINT_ID:
78 return ata_highpoint_ident(dev);
79 case ATA_INTEL_ID:
80 return ata_intel_ident(dev);
81 case ATA_NVIDIA_ID:
82 return ata_nvidia_ident(dev);
83 case ATA_PROMISE_ID:
84 return ata_promise_ident(dev);
85 case ATA_SERVERWORKS_ID:
86 return ata_serverworks_ident(dev);
87 case ATA_SILICON_IMAGE_ID:
88 return ata_sii_ident(dev);
89 case ATA_SIS_ID:
90 return ata_sis_ident(dev);
91 case ATA_VIA_ID:
92 return ata_via_ident(dev);
93
94 case 0x16ca:
95 if (pci_get_devid(dev) == 0x000116ca) {
| 59static void ata_pci_locknoop(struct ata_channel *, int);
60
61static int
62ata_pci_probe(device_t dev)
63{
64 if (pci_get_class(dev) != PCIC_STORAGE)
65 return ENXIO;
66
67 switch (pci_get_vendor(dev)) {
68 case ATA_ACARD_ID:
69 return ata_acard_ident(dev);
70 case ATA_ACER_LABS_ID:
71 return ata_ali_ident(dev);
72 case ATA_AMD_ID:
73 return ata_amd_ident(dev);
74 case ATA_CYRIX_ID:
75 return ata_cyrix_ident(dev);
76 case ATA_CYPRESS_ID:
77 return ata_cypress_ident(dev);
78 case ATA_HIGHPOINT_ID:
79 return ata_highpoint_ident(dev);
80 case ATA_INTEL_ID:
81 return ata_intel_ident(dev);
82 case ATA_NVIDIA_ID:
83 return ata_nvidia_ident(dev);
84 case ATA_PROMISE_ID:
85 return ata_promise_ident(dev);
86 case ATA_SERVERWORKS_ID:
87 return ata_serverworks_ident(dev);
88 case ATA_SILICON_IMAGE_ID:
89 return ata_sii_ident(dev);
90 case ATA_SIS_ID:
91 return ata_sis_ident(dev);
92 case ATA_VIA_ID:
93 return ata_via_ident(dev);
94
95 case 0x16ca:
96 if (pci_get_devid(dev) == 0x000116ca) {
|
| 97 ata_generic_ident(dev);
|
96 device_set_desc(dev, "Cenatek Rocket Drive controller");
97 return 0;
98 }
99 return ENXIO;
100
101 case 0x1042:
102 if (pci_get_devid(dev)==0x10001042 || pci_get_devid(dev)==0x10011042) {
| 98 device_set_desc(dev, "Cenatek Rocket Drive controller");
99 return 0;
100 }
101 return ENXIO;
102
103 case 0x1042:
104 if (pci_get_devid(dev)==0x10001042 || pci_get_devid(dev)==0x10011042) {
|
| 105 ata_generic_ident(dev);
|
103 device_set_desc(dev,
104 "RZ 100? ATA controller !WARNING! buggy HW data loss possible");
105 return 0;
106 }
107 return ENXIO;
108
109 /* unknown chipset, try generic DMA if it seems possible */
110 default:
111 if (pci_get_class(dev) == PCIC_STORAGE &&
112 (pci_get_subclass(dev) == PCIS_STORAGE_IDE))
113 return ata_generic_ident(dev);
114 }
115 return ENXIO;
116}
117
118static int
119ata_pci_attach(device_t dev)
120{
| 106 device_set_desc(dev,
107 "RZ 100? ATA controller !WARNING! buggy HW data loss possible");
108 return 0;
109 }
110 return ENXIO;
111
112 /* unknown chipset, try generic DMA if it seems possible */
113 default:
114 if (pci_get_class(dev) == PCIC_STORAGE &&
115 (pci_get_subclass(dev) == PCIS_STORAGE_IDE))
116 return ata_generic_ident(dev);
117 }
118 return ENXIO;
119}
120
121static int
122ata_pci_attach(device_t dev)
123{
|
121 struct ata_pci_controller *controller = device_get_softc(dev);
| 124 struct ata_pci_controller *ctlr = device_get_softc(dev);
|
122 u_int8_t class, subclass;
123 u_int32_t type, cmd;
| 125 u_int8_t class, subclass;
126 u_int32_t type, cmd;
|
124 int rid;
| 127 int unit;
|
125
126 /* set up vendor-specific stuff */
127 type = pci_get_devid(dev);
128 class = pci_get_class(dev);
129 subclass = pci_get_subclass(dev);
130 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
131
132 if (!(cmd & PCIM_CMD_PORTEN)) {
133 device_printf(dev, "ATA channel disabled by BIOS\n");
134 return 0;
135 }
136
| 128
129 /* set up vendor-specific stuff */
130 type = pci_get_devid(dev);
131 class = pci_get_class(dev);
132 subclass = pci_get_subclass(dev);
133 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
134
135 if (!(cmd & PCIM_CMD_PORTEN)) {
136 device_printf(dev, "ATA channel disabled by BIOS\n");
137 return 0;
138 }
139
|
| 140 /* do chipset specific setups only needed once */
141 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK)
142 ctlr->channels = 2;
143 else
144 ctlr->channels = 1;
145 ctlr->allocate = ata_pci_allocate;
146 ctlr->dmainit = ata_pci_dmainit;
147 ctlr->locking = ata_pci_locknoop;
148 ctlr->chipinit(dev);
149
|
137#ifdef __sparc64__
138 if (!(cmd & PCIM_CMD_BUSMASTEREN)) {
139 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2);
140 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
141 }
142#endif
| 150#ifdef __sparc64__
151 if (!(cmd & PCIM_CMD_BUSMASTEREN)) {
152 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2);
153 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
154 }
155#endif
|
143 /* is busmastering supported ? */
144 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) ==
145 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) {
| 156 /* is busmastering supported and configured ? */
157 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) {
158 int rid = ATA_BMADDR_RID;
|
146
| 159
|
147 /* is there a valid port range to connect to ? */
148 rid = 0x20;
149 controller->r_bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
150 0, ~0, 1, RF_ACTIVE);
151 if (!controller->r_bmio)
152 device_printf(dev, "Busmastering DMA not configured\n");
| 160 if (!ctlr->r_mem) {
161 if (!(ctlr->r_bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
162 0, ~0, 1, RF_ACTIVE)))
163 device_printf(dev, "Busmastering DMA not configured\n");
164 }
|
153 }
154 else
155 device_printf(dev, "Busmastering DMA not supported\n");
156
| 165 }
166 else
167 device_printf(dev, "Busmastering DMA not supported\n");
168
|
157 /* do chipset specific setups only needed once */
158 controller->dmainit = ata_dmainit;
159 controller->locking = ata_pci_locknoop;
160 controller->chipinit(dev);
| 169 /* attach all channels on this controller */
170 for (unit = 0; unit < ctlr->channels; unit++)
171 device_add_child(dev, "ata", ATA_MASTERDEV(dev) ?
172 unit : devclass_find_free_unit(ata_devclass, 2));
|
161
| 173
|
162 if (controller->r_bmio) {
163 controller->bmaddr = rman_get_start(controller->r_bmio);
164 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
165 SYS_RES_IOPORT, rid, controller->r_bmio);
166 controller->r_bmio = NULL;
167 }
168
169 ata_pci_add_child(dev, 0);
170
171 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK)
172 ata_pci_add_child(dev, 1);
173
| |
174 return bus_generic_attach(dev);
175}
176
| 174 return bus_generic_attach(dev);
175}
176
|
177static int
178ata_pci_add_child(device_t dev, int unit)
179{
180 /* check if this is located at one of the std addresses */
181 if (ATA_MASTERDEV(dev)) {
182 if (!device_add_child(dev, "ata", unit))
183 return ENOMEM;
184 }
185 else {
186 if (!device_add_child(dev, "ata",
187 devclass_find_free_unit(ata_devclass, 2)))
188 return ENOMEM;
189 }
190 return 0;
191}
| |
192
193static int
194ata_pci_print_child(device_t dev, device_t child)
195{
196 struct ata_channel *ch = device_get_softc(child);
197 int retval = 0;
198
199 retval += bus_print_child_header(dev, child);
| 177
178static int
179ata_pci_print_child(device_t dev, device_t child)
180{
181 struct ata_channel *ch = device_get_softc(child);
182 int retval = 0;
183
184 retval += bus_print_child_header(dev, child);
|
200 retval += printf(": at 0x%lx", rman_get_start(ch->r_io));
| 185 retval += printf(": at 0x%lx", rman_get_start(ch->r_io[0].res));
|
201
202 if (ATA_MASTERDEV(dev))
203 retval += printf(" irq %d", 14 + ch->unit);
204
205 retval += bus_print_child_footer(dev, child);
206
207 return retval;
208}
209
210static struct resource *
211ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
212 u_long start, u_long end, u_long count, u_int flags)
213{
214 struct ata_pci_controller *controller = device_get_softc(dev);
215 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
216 struct resource *res = NULL;
217 int myrid;
218
219 if (type == SYS_RES_IOPORT) {
220 switch (*rid) {
221 case ATA_IOADDR_RID:
222 if (ATA_MASTERDEV(dev)) {
223 myrid = 0;
224 start = (unit ? ATA_SECONDARY : ATA_PRIMARY);
225 end = start + ATA_IOSIZE - 1;
226 count = ATA_IOSIZE;
227 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
228 SYS_RES_IOPORT, &myrid,
229 start, end, count, flags);
230 }
231 else {
232 myrid = 0x10 + 8 * unit;
233 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
234 SYS_RES_IOPORT, &myrid,
235 start, end, count, flags);
236 }
237 break;
238
239 case ATA_ALTADDR_RID:
240 if (ATA_MASTERDEV(dev)) {
241 myrid = 0;
242 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET;
243 end = start + ATA_ALTIOSIZE - 1;
244 count = ATA_ALTIOSIZE;
245 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
246 SYS_RES_IOPORT, &myrid,
247 start, end, count, flags);
248 }
249 else {
250 myrid = 0x14 + 8 * unit;
251 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
252 SYS_RES_IOPORT, &myrid,
253 start, end, count, flags);
254 if (res) {
255 start = rman_get_start(res) + 2;
256 end = start + ATA_ALTIOSIZE - 1;
257 count = ATA_ALTIOSIZE;
258 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
259 SYS_RES_IOPORT, myrid, res);
260 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
261 SYS_RES_IOPORT, &myrid,
262 start, end, count, flags);
263 }
264 }
265 break;
| 186
187 if (ATA_MASTERDEV(dev))
188 retval += printf(" irq %d", 14 + ch->unit);
189
190 retval += bus_print_child_footer(dev, child);
191
192 return retval;
193}
194
195static struct resource *
196ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
197 u_long start, u_long end, u_long count, u_int flags)
198{
199 struct ata_pci_controller *controller = device_get_softc(dev);
200 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
201 struct resource *res = NULL;
202 int myrid;
203
204 if (type == SYS_RES_IOPORT) {
205 switch (*rid) {
206 case ATA_IOADDR_RID:
207 if (ATA_MASTERDEV(dev)) {
208 myrid = 0;
209 start = (unit ? ATA_SECONDARY : ATA_PRIMARY);
210 end = start + ATA_IOSIZE - 1;
211 count = ATA_IOSIZE;
212 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
213 SYS_RES_IOPORT, &myrid,
214 start, end, count, flags);
215 }
216 else {
217 myrid = 0x10 + 8 * unit;
218 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
219 SYS_RES_IOPORT, &myrid,
220 start, end, count, flags);
221 }
222 break;
223
224 case ATA_ALTADDR_RID:
225 if (ATA_MASTERDEV(dev)) {
226 myrid = 0;
227 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET;
228 end = start + ATA_ALTIOSIZE - 1;
229 count = ATA_ALTIOSIZE;
230 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
231 SYS_RES_IOPORT, &myrid,
232 start, end, count, flags);
233 }
234 else {
235 myrid = 0x14 + 8 * unit;
236 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
237 SYS_RES_IOPORT, &myrid,
238 start, end, count, flags);
239 if (res) {
240 start = rman_get_start(res) + 2;
241 end = start + ATA_ALTIOSIZE - 1;
242 count = ATA_ALTIOSIZE;
243 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
244 SYS_RES_IOPORT, myrid, res);
245 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
246 SYS_RES_IOPORT, &myrid,
247 start, end, count, flags);
248 }
249 }
250 break;
|
266
267 case ATA_BMADDR_RID:
268 if (controller->bmaddr) {
269 myrid = 0x20;
270 start = (unit == 0 ?
271 controller->bmaddr : controller->bmaddr+ATA_BMIOSIZE);
272 end = start + ATA_BMIOSIZE - 1;
273 count = ATA_BMIOSIZE;
274 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
275 SYS_RES_IOPORT, &myrid,
276 start, end, count, flags);
277 }
| |
278 }
279 return res;
280 }
281
282 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
283 if (ATA_MASTERDEV(dev)) {
284#ifdef __alpha__
285 return alpha_platform_alloc_ide_intr(unit);
286#else
287 int irq = (unit == 0 ? 14 : 15);
288
289 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
290 SYS_RES_IRQ, rid, irq, irq, 1, flags);
291#endif
292 }
293 else {
294 return controller->r_irq;
295 }
296 }
297 return 0;
298}
299
300static int
301ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
302 struct resource *r)
303{
304 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
305
306 if (type == SYS_RES_IOPORT) {
307 switch (rid) {
308 case ATA_IOADDR_RID:
309 if (ATA_MASTERDEV(dev))
310 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
311 SYS_RES_IOPORT, 0x0, r);
312 else
313 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
314 SYS_RES_IOPORT, 0x10 + 8 * unit, r);
315 break;
316
317 case ATA_ALTADDR_RID:
318 if (ATA_MASTERDEV(dev))
319 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
320 SYS_RES_IOPORT, 0x0, r);
321 else
322 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
323 SYS_RES_IOPORT, 0x14 + 8 * unit, r);
324 break;
| 251 }
252 return res;
253 }
254
255 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
256 if (ATA_MASTERDEV(dev)) {
257#ifdef __alpha__
258 return alpha_platform_alloc_ide_intr(unit);
259#else
260 int irq = (unit == 0 ? 14 : 15);
261
262 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
263 SYS_RES_IRQ, rid, irq, irq, 1, flags);
264#endif
265 }
266 else {
267 return controller->r_irq;
268 }
269 }
270 return 0;
271}
272
273static int
274ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
275 struct resource *r)
276{
277 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
278
279 if (type == SYS_RES_IOPORT) {
280 switch (rid) {
281 case ATA_IOADDR_RID:
282 if (ATA_MASTERDEV(dev))
283 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
284 SYS_RES_IOPORT, 0x0, r);
285 else
286 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
287 SYS_RES_IOPORT, 0x10 + 8 * unit, r);
288 break;
289
290 case ATA_ALTADDR_RID:
291 if (ATA_MASTERDEV(dev))
292 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
293 SYS_RES_IOPORT, 0x0, r);
294 else
295 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
296 SYS_RES_IOPORT, 0x14 + 8 * unit, r);
297 break;
|
325
326 case ATA_BMADDR_RID:
327 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
328 SYS_RES_IOPORT, 0x20, r);
| |
329 default:
330 return ENOENT;
331 }
332 }
333 if (type == SYS_RES_IRQ) {
334 if (rid != ATA_IRQ_RID)
335 return ENOENT;
336
337 if (ATA_MASTERDEV(dev)) {
338#ifdef __alpha__
339 return alpha_platform_release_ide_intr(unit, r);
340#else
341 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
342 SYS_RES_IRQ, rid, r);
343#endif
344 }
345 else
346 return 0;
347 }
348 return EINVAL;
349}
350
351static int
352ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
353 int flags, driver_intr_t *function, void *argument,
354 void **cookiep)
355{
356 if (ATA_MASTERDEV(dev)) {
357#ifdef __alpha__
358 return alpha_platform_setup_ide_intr(child, irq, function, argument,
359 cookiep);
360#else
361 return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
362 flags, function, argument, cookiep);
363#endif
364 }
365 else {
366 struct ata_pci_controller *controller = device_get_softc(dev);
367 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
368
369 controller->interrupt[unit].function = function;
370 controller->interrupt[unit].argument = argument;
371 *cookiep = controller;
372 return 0;
373 }
374}
375
376static int
377ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
378 void *cookie)
379{
380 if (ATA_MASTERDEV(dev)) {
381#ifdef __alpha__
382 return alpha_platform_teardown_ide_intr(child, irq, cookie);
383#else
384 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
385#endif
386 }
387 else {
388 struct ata_pci_controller *controller = device_get_softc(dev);
389 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
390
391 controller->interrupt[unit].function = NULL;
392 controller->interrupt[unit].argument = NULL;
393 return 0;
394 }
395}
| 298 default:
299 return ENOENT;
300 }
301 }
302 if (type == SYS_RES_IRQ) {
303 if (rid != ATA_IRQ_RID)
304 return ENOENT;
305
306 if (ATA_MASTERDEV(dev)) {
307#ifdef __alpha__
308 return alpha_platform_release_ide_intr(unit, r);
309#else
310 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
311 SYS_RES_IRQ, rid, r);
312#endif
313 }
314 else
315 return 0;
316 }
317 return EINVAL;
318}
319
320static int
321ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
322 int flags, driver_intr_t *function, void *argument,
323 void **cookiep)
324{
325 if (ATA_MASTERDEV(dev)) {
326#ifdef __alpha__
327 return alpha_platform_setup_ide_intr(child, irq, function, argument,
328 cookiep);
329#else
330 return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
331 flags, function, argument, cookiep);
332#endif
333 }
334 else {
335 struct ata_pci_controller *controller = device_get_softc(dev);
336 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
337
338 controller->interrupt[unit].function = function;
339 controller->interrupt[unit].argument = argument;
340 *cookiep = controller;
341 return 0;
342 }
343}
344
345static int
346ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
347 void *cookie)
348{
349 if (ATA_MASTERDEV(dev)) {
350#ifdef __alpha__
351 return alpha_platform_teardown_ide_intr(child, irq, cookie);
352#else
353 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
354#endif
355 }
356 else {
357 struct ata_pci_controller *controller = device_get_softc(dev);
358 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
359
360 controller->interrupt[unit].function = NULL;
361 controller->interrupt[unit].argument = NULL;
362 return 0;
363 }
364}
|
| 365
366static int
367ata_pci_allocate(device_t dev, struct ata_channel *ch)
368{
369 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
370 struct resource *io = NULL, *altio = NULL;
371 int i, rid;
|
396
| 372
|
| 373 rid = ATA_IOADDR_RID;
374 io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
375 0, ~0, ATA_IOSIZE, RF_ACTIVE);
376 if (!io)
377 return ENXIO;
378
379 rid = ATA_ALTADDR_RID;
380 altio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
381 0, ~0, ATA_ALTIOSIZE, RF_ACTIVE);
382 if (!altio) {
383 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
384 return ENXIO;
385 }
386
387 for (i = ATA_DATA; i <= ATA_STATUS; i ++) {
388 ch->r_io[i].res = io;
389 ch->r_io[i].offset = i;
390 }
391 ch->r_io[ATA_ALTSTAT].res = altio;
392 ch->r_io[ATA_ALTSTAT].offset = 0;
393
394 if (ctlr->r_bmio) {
395 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
396 ch->r_io[i].res = ctlr->r_bmio;
397 ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE);
398 }
399
400 /* if simplex controller, only allow DMA on primary channel */
401 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_IDX_INB(ch, ATA_BMSTAT_PORT) &
402 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
403 if (ch->unit > 0 &&
404 (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX))
405 device_printf(dev, "simplex device, DMA on primary only\n");
406 else
407 ctlr->dmainit(ch);
408 }
409 return 0;
410}
411
412static int
413ata_pci_dmastart(struct ata_channel *ch, caddr_t data, int32_t count, int dir)
414{
415 int error;
416
417 if ((error = ata_dmastart(ch, data, count, dir)))
418 return error;
419
420 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->mdmatab);
421 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, dir ? ATA_BMCMD_WRITE_READ : 0);
422 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
423 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
424 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
425 ATA_IDX_INB(ch, ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
426 return 0;
427}
428
429static int
430ata_pci_dmastop(struct ata_channel *ch)
431{
432 int error;
433
434 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT);
435 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
436 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
437 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
438
439 ata_dmastop(ch);
440
441 return (error & ATA_BMSTAT_MASK);
442}
443
444static int
445ata_pci_dmastatus(struct ata_channel *ch)
446{
447 return ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
448}
449
450static int
451ata_pci_dmainit(struct ata_channel *ch)
452{
453 int error;
454
455 if ((error = ata_dmainit(ch)))
456 return error;
457
458 ch->dma->start = ata_pci_dmastart;
459 ch->dma->stop = ata_pci_dmastop;
460 ch->dma->status = ata_pci_dmastatus;
461 return 0;
462}
463
|
397static void
398ata_pci_locknoop(struct ata_channel *ch, int flags)
399{
400}
401
| 464static void
465ata_pci_locknoop(struct ata_channel *ch, int flags)
466{
467}
468
|
402
| |
403static device_method_t ata_pci_methods[] = {
404 /* device interface */
405 DEVMETHOD(device_probe, ata_pci_probe),
406 DEVMETHOD(device_attach, ata_pci_attach),
| 469static device_method_t ata_pci_methods[] = {
470 /* device interface */
471 DEVMETHOD(device_probe, ata_pci_probe),
472 DEVMETHOD(device_attach, ata_pci_attach),
|
| 473 DEVMETHOD(device_detach, ata_pci_attach),
|
407 DEVMETHOD(device_shutdown, bus_generic_shutdown),
408 DEVMETHOD(device_suspend, bus_generic_suspend),
409 DEVMETHOD(device_resume, bus_generic_resume),
410
411 /* bus methods */
412 DEVMETHOD(bus_print_child, ata_pci_print_child),
413 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
414 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
415 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
416 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
417 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
418 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
419 { 0, 0 }
420};
421
422static driver_t ata_pci_driver = {
423 "atapci",
424 ata_pci_methods,
425 sizeof(struct ata_pci_controller),
426};
427
428static devclass_t ata_pci_devclass;
429
430DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0);
431
432static int
433ata_pcisub_probe(device_t dev)
434{
435 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
436 struct ata_channel *ch = device_get_softc(dev);
437 device_t *children;
438 int count, error, i;
439
440 /* find channel number on this controller */
441 device_get_children(device_get_parent(dev), &children, &count);
442 for (i = 0; i < count; i++) {
443 if (children[i] == dev)
444 ch->unit = i;
445 }
446 free(children, M_TEMP);
447
| 474 DEVMETHOD(device_shutdown, bus_generic_shutdown),
475 DEVMETHOD(device_suspend, bus_generic_suspend),
476 DEVMETHOD(device_resume, bus_generic_resume),
477
478 /* bus methods */
479 DEVMETHOD(bus_print_child, ata_pci_print_child),
480 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
481 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
482 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
483 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
484 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
485 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
486 { 0, 0 }
487};
488
489static driver_t ata_pci_driver = {
490 "atapci",
491 ata_pci_methods,
492 sizeof(struct ata_pci_controller),
493};
494
495static devclass_t ata_pci_devclass;
496
497DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0);
498
499static int
500ata_pcisub_probe(device_t dev)
501{
502 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
503 struct ata_channel *ch = device_get_softc(dev);
504 device_t *children;
505 int count, error, i;
506
507 /* find channel number on this controller */
508 device_get_children(device_get_parent(dev), &children, &count);
509 for (i = 0; i < count; i++) {
510 if (children[i] == dev)
511 ch->unit = i;
512 }
513 free(children, M_TEMP);
514
|
| 515 if ((error = ctlr->allocate(dev, ch)))
516 return error;
517
|
448 ch->device[MASTER].setmode = ctlr->setmode;
449 ch->device[SLAVE].setmode = ctlr->setmode;
450 ch->locking = ctlr->locking;
| 518 ch->device[MASTER].setmode = ctlr->setmode;
519 ch->device[SLAVE].setmode = ctlr->setmode;
520 ch->locking = ctlr->locking;
|
451 ch->chiptype = pci_get_devid(device_get_parent(dev));
452
453 if (!(error = ata_probe(dev)) && ch->r_bmio) {
454 /* if simplex controller, only allow DMA on primary channel */
455 ATA_OUTB(ch->r_bmio, ATA_BMSTAT_PORT,
456 ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) &
457 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
458 if (ch->unit == 1 && ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) &
459 ATA_BMSTAT_DMA_SIMPLEX) {
460 ata_printf(ch, -1, "simplex device, DMA on primary only\n");
461 return error;
462 }
463 error = ctlr->dmainit(ch);
464 }
465 return error;
| 521 ch->chiptype = ctlr->chip->chipid;
522 return ata_probe(dev);
|
466}
467
468static device_method_t ata_pcisub_methods[] = {
469 /* device interface */
470 DEVMETHOD(device_probe, ata_pcisub_probe),
471 DEVMETHOD(device_attach, ata_attach),
472 DEVMETHOD(device_detach, ata_detach),
473 DEVMETHOD(device_resume, ata_resume),
474 { 0, 0 }
475};
476
477static driver_t ata_pcisub_driver = {
478 "ata",
479 ata_pcisub_methods,
480 sizeof(struct ata_channel),
481};
482
483DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0);
| 523}
524
525static device_method_t ata_pcisub_methods[] = {
526 /* device interface */
527 DEVMETHOD(device_probe, ata_pcisub_probe),
528 DEVMETHOD(device_attach, ata_attach),
529 DEVMETHOD(device_detach, ata_detach),
530 DEVMETHOD(device_resume, ata_resume),
531 { 0, 0 }
532};
533
534static driver_t ata_pcisub_driver = {
535 "ata",
536 ata_pcisub_methods,
537 sizeof(struct ata_channel),
538};
539
540DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0);
|