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ata-lowlevel.c (123421) ata-lowlevel.c (124403)
1/*-
1/*-
2 * Copyright (c) 1998 - 2003 S�ren Schmidt <sos@FreeBSD.org>
2 * Copyright (c) 1998 - 2004 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.

--- 11 unchanged lines hidden (view full) ---

22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.

--- 11 unchanged lines hidden (view full) ---

22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: head/sys/dev/ata/ata-lowlevel.c 123421 2003-12-10 23:06:24Z sos $");
30__FBSDID("$FreeBSD: head/sys/dev/ata/ata-lowlevel.c 124403 2004-01-11 22:08:34Z sos $");
31
32#include "opt_ata.h"
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/ata.h>
36#include <sys/kernel.h>
37#include <sys/conf.h>
38#include <sys/bus.h>
31
32#include "opt_ata.h"
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/ata.h>
36#include <sys/kernel.h>
37#include <sys/conf.h>
38#include <sys/bus.h>
39#include <sys/mutex.h>
39#include <sys/sema.h>
40#include <sys/taskqueue.h>
41#include <machine/bus.h>
42#include <sys/rman.h>
43#include <dev/ata/ata-all.h>
44
45/* prototypes */
46static int ata_transaction(struct ata_request *);
47static void ata_interrupt(void *);

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64 ch->hw.transaction = ata_transaction;
65 ch->hw.interrupt = ata_interrupt;
66}
67
68/* must be called with ATA channel locked */
69static int
70ata_transaction(struct ata_request *request)
71{
40#include <sys/taskqueue.h>
41#include <machine/bus.h>
42#include <sys/rman.h>
43#include <dev/ata/ata-all.h>
44
45/* prototypes */
46static int ata_transaction(struct ata_request *);
47static void ata_interrupt(void *);

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64 ch->hw.transaction = ata_transaction;
65 ch->hw.interrupt = ata_interrupt;
66}
67
68/* must be called with ATA channel locked */
69static int
70ata_transaction(struct ata_request *request)
71{
72 /* safety check, device might have been detached FIXME SOS */
73 if (!request->device->param) {
74 request->result = ENXIO;
75 return ATA_OP_FINISHED;
76 }
77
72 /* record the request as running */
73 request->device->channel->running = request;
74
78 /* record the request as running */
79 request->device->channel->running = request;
80
81 ATA_DEBUG_RQ(request, "transaction");
82
75 /* disable ATAPI DMA writes if HW doesn't support it */
76 if ((request->device->channel->flags & ATA_ATAPI_DMA_RO) &&
77 ((request->flags & (ATA_R_ATAPI | ATA_R_DMA | ATA_R_WRITE)) ==
78 (ATA_R_ATAPI | ATA_R_DMA | ATA_R_WRITE)))
79 request->flags &= ~ATA_R_DMA;
80
81 switch (request->flags & (ATA_R_ATAPI | ATA_R_DMA)) {
82
83 /* ATA PIO data transfer and control commands */
84 default:
85 {
83 /* disable ATAPI DMA writes if HW doesn't support it */
84 if ((request->device->channel->flags & ATA_ATAPI_DMA_RO) &&
85 ((request->flags & (ATA_R_ATAPI | ATA_R_DMA | ATA_R_WRITE)) ==
86 (ATA_R_ATAPI | ATA_R_DMA | ATA_R_WRITE)))
87 request->flags &= ~ATA_R_DMA;
88
89 switch (request->flags & (ATA_R_ATAPI | ATA_R_DMA)) {
90
91 /* ATA PIO data transfer and control commands */
92 default:
93 {
86 /* record command direction here as our request might be done later */
94 /* record command direction here as our request might be gone later */
87 int write = (request->flags & ATA_R_WRITE);
88
89 /* issue command */
90 if (ata_command(request->device, request->u.ata.command,
91 request->u.ata.lba, request->u.ata.count,
92 request->u.ata.feature)) {
93 ata_prtdev(request->device, "error issueing PIO command\n");
94 request->result = EIO;

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101 (ATA_S_READY | ATA_S_DSC | ATA_S_DRQ)) < 0) {
102 ata_prtdev(request->device,"timeout waiting for write DRQ");
103 request->result = EIO;
104 break;
105 }
106 ata_pio_write(request, request->transfersize);
107 }
108 }
95 int write = (request->flags & ATA_R_WRITE);
96
97 /* issue command */
98 if (ata_command(request->device, request->u.ata.command,
99 request->u.ata.lba, request->u.ata.count,
100 request->u.ata.feature)) {
101 ata_prtdev(request->device, "error issueing PIO command\n");
102 request->result = EIO;

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109 (ATA_S_READY | ATA_S_DSC | ATA_S_DRQ)) < 0) {
110 ata_prtdev(request->device,"timeout waiting for write DRQ");
111 request->result = EIO;
112 break;
113 }
114 ata_pio_write(request, request->transfersize);
115 }
116 }
117
109 /* return and wait for interrupt */
110 return ATA_OP_CONTINUES;
111
112 /* ATA DMA data transfer commands */
113 case ATA_R_DMA:
114 /* check sanity, setup SG list and DMA engine */
115 if (request->device->channel->dma->load(request->device,
116 request->data,

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131 }
132
133 /* start DMA engine */
134 if (request->device->channel->dma->start(request->device->channel)) {
135 ata_prtdev(request->device, "error starting DMA\n");
136 request->result = EIO;
137 break;
138 }
118 /* return and wait for interrupt */
119 return ATA_OP_CONTINUES;
120
121 /* ATA DMA data transfer commands */
122 case ATA_R_DMA:
123 /* check sanity, setup SG list and DMA engine */
124 if (request->device->channel->dma->load(request->device,
125 request->data,

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140 }
141
142 /* start DMA engine */
143 if (request->device->channel->dma->start(request->device->channel)) {
144 ata_prtdev(request->device, "error starting DMA\n");
145 request->result = EIO;
146 break;
147 }
148
139 /* return and wait for interrupt */
140 return ATA_OP_CONTINUES;
141
142 /* ATAPI PIO commands */
143 case ATA_R_ATAPI:
144 /* is this just a POLL DSC command ? */
145 if (request->u.atapi.ccb[0] == ATAPI_POLL_DSC) {
146 ATA_IDX_OUTB(request->device->channel, ATA_DRIVE,

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289 }
290 else {
291 if (bootverbose)
292 ata_printf(ch, -1, "spurious interrupt - channel busy\n");
293 }
294 return;
295 }
296
149 /* return and wait for interrupt */
150 return ATA_OP_CONTINUES;
151
152 /* ATAPI PIO commands */
153 case ATA_R_ATAPI:
154 /* is this just a POLL DSC command ? */
155 if (request->u.atapi.ccb[0] == ATAPI_POLL_DSC) {
156 ATA_IDX_OUTB(request->device->channel, ATA_DRIVE,

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299 }
300 else {
301 if (bootverbose)
302 ata_printf(ch, -1, "spurious interrupt - channel busy\n");
303 }
304 return;
305 }
306
307 ATA_DEBUG_RQ(request, "interrupt");
308
297 /* ignore interrupt if device is busy */
309 /* ignore interrupt if device is busy */
298 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
310 if (!(request->flags & ATA_R_TIMEOUT) &&
311 ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
299 DELAY(100);
300 if (!(ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_DRQ))
301 return;
302 }
303
312 DELAY(100);
313 if (!(ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_DRQ))
314 return;
315 }
316
317 ATA_DEBUG_RQ(request, "interrupt accepted");
318
304 /* clear interrupt and get status */
305 request->status = ATA_IDX_INB(ch, ATA_STATUS);
306
319 /* clear interrupt and get status */
320 request->status = ATA_IDX_INB(ch, ATA_STATUS);
321
322 request->flags |= ATA_R_INTR_SEEN;
323
307 switch (request->flags & (ATA_R_ATAPI | ATA_R_DMA | ATA_R_CONTROL)) {
308
309 /* ATA PIO data transfer and control commands */
310 default:
311
312 /* on control commands read back registers to the request struct */
313 if (request->flags & ATA_R_CONTROL) {
314 request->u.ata.count = ATA_IDX_INB(ch, ATA_COUNT);

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487
488 /* release SG list etc */
489 ch->dma->unload(ch);
490
491 /* done with HW */
492 break;
493 }
494
324 switch (request->flags & (ATA_R_ATAPI | ATA_R_DMA | ATA_R_CONTROL)) {
325
326 /* ATA PIO data transfer and control commands */
327 default:
328
329 /* on control commands read back registers to the request struct */
330 if (request->flags & ATA_R_CONTROL) {
331 request->u.ata.count = ATA_IDX_INB(ch, ATA_COUNT);

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504
505 /* release SG list etc */
506 ch->dma->unload(ch);
507
508 /* done with HW */
509 break;
510 }
511
512 /* if we timed out, we hold on to the channel, ata_reinit() will unlock */
513 if (request->flags & ATA_R_TIMEOUT) {
514 ata_finish(request);
515 return;
516 }
517
518 /* schedule completition for this request */
495 ata_finish(request);
496
497 /* unlock the ATA channel for new work */
498 ch->running = NULL;
499 ATA_UNLOCK_CH(ch);
500 ch->locking(ch, ATA_LF_UNLOCK);
501}
502

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524 /* in some setups we dont want to test for a slave */
525 if (!(ch->flags & ATA_NO_SLAVE)) {
526 if ((ostat1 & 0xf8) != 0xf8 && ostat1 != 0xa5) {
527 stat1 = ATA_S_BUSY;
528 mask |= 0x02;
529 }
530 }
531
519 ata_finish(request);
520
521 /* unlock the ATA channel for new work */
522 ch->running = NULL;
523 ATA_UNLOCK_CH(ch);
524 ch->locking(ch, ATA_LF_UNLOCK);
525}
526

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548 /* in some setups we dont want to test for a slave */
549 if (!(ch->flags & ATA_NO_SLAVE)) {
550 if ((ostat1 & 0xf8) != 0xf8 && ostat1 != 0xa5) {
551 stat1 = ATA_S_BUSY;
552 mask |= 0x02;
553 }
554 }
555
532 /* if nothing showed up no need to get any further */
556 /* if nothing showed up there is no need to get any further */
533 /* SOS is that too strong?, we just might loose devices here XXX */
534 ch->devices = 0;
535 if (!mask)
536 return;
537
538 if (bootverbose)
539 ata_printf(ch, -1, "reset tp1 mask=%02x ostat0=%02x ostat1=%02x\n",
540 mask, ostat0, ostat1);
541
557 /* SOS is that too strong?, we just might loose devices here XXX */
558 ch->devices = 0;
559 if (!mask)
560 return;
561
562 if (bootverbose)
563 ata_printf(ch, -1, "reset tp1 mask=%02x ostat0=%02x ostat1=%02x\n",
564 mask, ostat0, ostat1);
565
542 /* reset channel */
566 /* reset host end of channel (if supported) */
567 if (ch->reset)
568 ch->reset(ch);
569
570 /* reset (both) devices on this channel */
543 ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_MASTER);
544 DELAY(10);
545 ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_IDS | ATA_A_RESET);
546 DELAY(10000);
547 ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_IDS);
548 DELAY(100000);
549 ATA_IDX_INB(ch, ATA_ERROR);
550

--- 61 unchanged lines hidden (view full) ---

612 if (stat0 == 0xff && timeout > 20)
613 mask &= ~0x01;
614 if (stat1 == 0xff && timeout > 20)
615 mask &= ~0x02;
616 }
617 DELAY(100000);
618 }
619
571 ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_MASTER);
572 DELAY(10);
573 ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_IDS | ATA_A_RESET);
574 DELAY(10000);
575 ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_IDS);
576 DELAY(100000);
577 ATA_IDX_INB(ch, ATA_ERROR);
578

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640 if (stat0 == 0xff && timeout > 20)
641 mask &= ~0x01;
642 if (stat1 == 0xff && timeout > 20)
643 mask &= ~0x02;
644 }
645 DELAY(100000);
646 }
647
648 /* enable interrupt */
649 DELAY(10);
650 ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_4BIT);
651
620 if (stat0 & ATA_S_BUSY)
621 mask &= ~0x01;
622 if (stat1 & ATA_S_BUSY)
623 mask &= ~0x02;
624
625 if (bootverbose)
626 ata_printf(ch, -1,
627 "reset tp2 mask=%02x stat0=%02x stat1=%02x devices=0x%b\n",
628 mask, stat0, stat1, ch->devices,
629 "\20\4ATAPI_SLAVE\3ATAPI_MASTER\2ATA_SLAVE\1ATA_MASTER");
652 if (stat0 & ATA_S_BUSY)
653 mask &= ~0x01;
654 if (stat1 & ATA_S_BUSY)
655 mask &= ~0x02;
656
657 if (bootverbose)
658 ata_printf(ch, -1,
659 "reset tp2 mask=%02x stat0=%02x stat1=%02x devices=0x%b\n",
660 mask, stat0, stat1, ch->devices,
661 "\20\4ATAPI_SLAVE\3ATAPI_MASTER\2ATA_SLAVE\1ATA_MASTER");
630#if 0
631 if (!mask)
632 return;
633
634 if (mask & 0x01 && ostat0 != 0x00 &&
635 !(ch->devices & (ATA_ATA_MASTER | ATA_ATAPI_MASTER))) {
636 ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_MASTER);
637 DELAY(10);
638 ATA_IDX_OUTB(ch, ATA_ERROR, 0x58);
639 ATA_IDX_OUTB(ch, ATA_CYL_LSB, 0xa5);
640 err = ATA_IDX_INB(ch, ATA_ERROR);
641 lsb = ATA_IDX_INB(ch, ATA_CYL_LSB);
642 if (bootverbose)
643 ata_printf(ch, ATA_MASTER, "ATA err=0x%02x lsb=0x%02x\n", err, lsb);
644 if (err != 0x58 && lsb == 0xa5)
645 ch->devices |= ATA_ATA_MASTER;
646 }
647 if (mask & 0x02 && ostat1 != 0x00 &&
648 !(ch->devices & (ATA_ATA_SLAVE | ATA_ATAPI_SLAVE))) {
649 ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_SLAVE);
650 DELAY(10);
651 ATA_IDX_OUTB(ch, ATA_ERROR, 0x58);
652 ATA_IDX_OUTB(ch, ATA_CYL_LSB, 0xa5);
653 err = ATA_IDX_INB(ch, ATA_ERROR);
654 lsb = ATA_IDX_INB(ch, ATA_CYL_LSB);
655 if (bootverbose)
656 ata_printf(ch, ATA_SLAVE, "ATA err=0x%02x lsb=0x%02x\n", err, lsb);
657 if (err != 0x58 && lsb == 0xa5)
658 ch->devices |= ATA_ATA_SLAVE;
659 }
660
661 if (bootverbose)
662 ata_printf(ch, -1, "reset tp3 devices=0x%b\n", ch->devices,
663 "\20\4ATAPI_SLAVE\3ATAPI_MASTER\2ATA_SLAVE\1ATA_MASTER");
664#endif
665}
666
667static int
668ata_wait(struct ata_device *atadev, u_int8_t mask)
669{
670 u_int8_t status;
671 int timeout = 0;
672

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731 ATA_IDX_OUTB(atadev->channel, ATA_DRIVE, ATA_D_IBM | atadev->unit);
732
733 /* ready to issue command ? */
734 if (ata_wait(atadev, 0) < 0) {
735 ata_prtdev(atadev, "timeout sending command=%02x\n", command);
736 return -1;
737 }
738
662}
663
664static int
665ata_wait(struct ata_device *atadev, u_int8_t mask)
666{
667 u_int8_t status;
668 int timeout = 0;
669

--- 58 unchanged lines hidden (view full) ---

728 ATA_IDX_OUTB(atadev->channel, ATA_DRIVE, ATA_D_IBM | atadev->unit);
729
730 /* ready to issue command ? */
731 if (ata_wait(atadev, 0) < 0) {
732 ata_prtdev(atadev, "timeout sending command=%02x\n", command);
733 return -1;
734 }
735
739 /* enable interrupt */
740 ATA_IDX_OUTB(atadev->channel, ATA_ALTSTAT, ATA_A_4BIT);
741
742 /* only use 48bit addressing if needed (avoid bugs and overhead) */
743 if ((lba > 268435455 || count > 256) && atadev->param &&
744 atadev->param->support.command2 & ATA_SUPPORT_ADDRESS48) {
745
746 /* translate command into 48bit version */
747 switch (command) {
748 case ATA_READ:
749 command = ATA_READ48; break;

--- 103 unchanged lines hidden ---
736 /* only use 48bit addressing if needed (avoid bugs and overhead) */
737 if ((lba > 268435455 || count > 256) && atadev->param &&
738 atadev->param->support.command2 & ATA_SUPPORT_ADDRESS48) {
739
740 /* translate command into 48bit version */
741 switch (command) {
742 case ATA_READ:
743 command = ATA_READ48; break;

--- 103 unchanged lines hidden ---