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ata-dma.c (94426) ata-dma.c (94826)
1/*-
2 * Copyright (c) 1998,1999,2000,2001,2002 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999,2000,2001,2002 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 94426 2002-04-11 11:04:23Z sos $
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 94826 2002-04-16 08:30:51Z sos $
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/ata.h>
34#include <sys/bio.h>
35#include <sys/malloc.h>
36#include <sys/bus.h>

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497 word54 &= ~(0x000f000f << (devno << 2));
498 word54 |= (0x00000004 << (devno << 2));
499 pci_write_config(parent, 0x54, word54, 4);
500 atadev->mode = ATA_PIO0 + apiomode;
501 return;
502 }
503 break;
504
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/ata.h>
34#include <sys/bio.h>
35#include <sys/malloc.h>
36#include <sys/bus.h>

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497 word54 &= ~(0x000f000f << (devno << 2));
498 word54 |= (0x00000004 << (devno << 2));
499 pci_write_config(parent, 0x54, word54, 4);
500 atadev->mode = ATA_PIO0 + apiomode;
501 return;
502 }
503 break;
504
505 case 0x01bc10de: /* nVIDIA nForce */
505 case 0x74411022: /* AMD 768 */
506 case 0x74111022: /* AMD 766 */
506 case 0x74411022: /* AMD 768 */
507 case 0x74111022: /* AMD 766 */
507 if (udmamode >= 5) {
508 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
509 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
510 if (bootverbose)
511 ata_prtdev(atadev, "%s setting UDMA5 on AMD chip\n",
512 (error) ? "failed" : "success");
513 if (!error) {
514 pci_write_config(parent, 0x53 - devno, 0xc6, 1);
515 ata_dmacreate(atadev, apiomode, ATA_UDMA5);
516 return;
517 }
518 }
519 /* FALLTHROUGH */
520
521 case 0x74091022: /* AMD 756 */
508 case 0x74091022: /* AMD 756 */
522 if (udmamode >= 4) {
523 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
524 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
525 if (bootverbose)
526 ata_prtdev(atadev, "%s setting UDMA4 on AMD chip\n",
527 (error) ? "failed" : "success");
528 if (!error) {
529 pci_write_config(parent, 0x53 - devno, 0xc5, 1);
530 ata_dmacreate(atadev, apiomode, ATA_UDMA4);
531 return;
532 }
533 }
534 goto via_82c586;
535
536 case 0x05711106: /* VIA 82C571, 82C586, 82C596, 82C686 , 8231, 8233 */
537 {
509 case 0x05711106: /* VIA 82C571, 82C586, 82C596, 82C686 , 8231, 8233 */
510 {
538 int via_modes[4][7] = {
539 { 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00 }, /* ATA33 */
540 { 0x00, 0x00, 0xea, 0x00, 0xe8, 0x00, 0x00 }, /* ATA66 */
541 { 0x00, 0x00, 0xf4, 0x00, 0xf1, 0xf0, 0x00 }, /* ATA100 */
542 { 0x00, 0x00, 0xf6, 0x00, 0xf2, 0xf1, 0xf0 }}; /* ATA133 */
511 int via_modes[5][7] = {
512 { 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00 }, /* VIA ATA33 */
513 { 0x00, 0x00, 0xea, 0x00, 0xe8, 0x00, 0x00 }, /* VIA ATA66 */
514 { 0x00, 0x00, 0xf4, 0x00, 0xf1, 0xf0, 0x00 }, /* VIA ATA100 */
515 { 0x00, 0x00, 0xf6, 0x00, 0xf2, 0xf1, 0xf0 }, /* VIA ATA133 */
516 { 0x00, 0x00, 0xc0, 0x00, 0xc5, 0xc6, 0x00 }}; /* AMD/nVIDIA */
543 int *reg_val = NULL;
517 int *reg_val = NULL;
518 char *chip = "VIA";
544
545 if (ata_find_dev(parent, 0x31471106, 0)) { /* 8233a */
546 udmamode = imin(udmamode, 6);
547 reg_val = via_modes[3];
548 }
549 else if (ata_find_dev(parent, 0x06861106, 0x40) || /* 82C686b */
550 ata_find_dev(parent, 0x82311106, 0) || /* 8231 */
551 ata_find_dev(parent, 0x30741106, 0) || /* 8233 */

--- 7 unchanged lines hidden (view full) ---

559 reg_val = via_modes[1];
560 }
561 else if (ata_find_dev(parent, 0x06861106, 0)) { /* 82C686 */
562 udmamode = imin(udmamode, 2);
563 reg_val = via_modes[1];
564 }
565 else if (ata_find_dev(parent, 0x05961106, 0) || /* 82C596a */
566 ata_find_dev(parent, 0x05861106, 0x03)) { /* 82C586b */
519
520 if (ata_find_dev(parent, 0x31471106, 0)) { /* 8233a */
521 udmamode = imin(udmamode, 6);
522 reg_val = via_modes[3];
523 }
524 else if (ata_find_dev(parent, 0x06861106, 0x40) || /* 82C686b */
525 ata_find_dev(parent, 0x82311106, 0) || /* 8231 */
526 ata_find_dev(parent, 0x30741106, 0) || /* 8233 */

--- 7 unchanged lines hidden (view full) ---

534 reg_val = via_modes[1];
535 }
536 else if (ata_find_dev(parent, 0x06861106, 0)) { /* 82C686 */
537 udmamode = imin(udmamode, 2);
538 reg_val = via_modes[1];
539 }
540 else if (ata_find_dev(parent, 0x05961106, 0) || /* 82C596a */
541 ata_find_dev(parent, 0x05861106, 0x03)) { /* 82C586b */
567via_82c586:
568 udmamode = imin(udmamode, 2);
569 reg_val = via_modes[0];
570 }
542 udmamode = imin(udmamode, 2);
543 reg_val = via_modes[0];
544 }
571 else
545 else if (chiptype == 0x74411022 || /* AMD 768 */
546 chiptype == 0x74111022) { /* AMD 766 */
547 udmamode = imin(udmamode, 5);
548 reg_val = via_modes[4];
549 chip = "AMD";
550 }
551 else if (chiptype == 0x74091022) { /* AMD 756 */
552 udmamode = imin(udmamode, 4);
553 reg_val = via_modes[4];
554 chip = "AMD";
555 }
556 else if (chiptype == 0x01bc10de) { /* nVIDIA */
557 udmamode = imin(udmamode, 5);
558 reg_val = via_modes[4];
559 chip = "nVIDIA";
560 }
561 else
572 udmamode = 0;
562 udmamode = 0;
573
563
574 if (udmamode >= 6) {
575 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
576 ATA_UDMA6, ATA_C_F_SETXFER, ATA_WAIT_READY);
577 if (bootverbose)
564 if (udmamode >= 6) {
565 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
566 ATA_UDMA6, ATA_C_F_SETXFER, ATA_WAIT_READY);
567 if (bootverbose)
578 ata_prtdev(atadev, "%s setting UDMA6 on VIA chip\n",
579 (error) ? "failed" : "success");
568 ata_prtdev(atadev, "%s setting UDMA6 on %s chip\n",
569 (error) ? "failed" : "success", chip);
580 if (!error) {
581 pci_write_config(parent, 0x53 - devno, reg_val[6], 1);
582 ata_dmacreate(atadev, apiomode, ATA_UDMA6);
583 return;
584 }
585 }
586 if (udmamode >= 5) {
587 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
588 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
589 if (bootverbose)
570 if (!error) {
571 pci_write_config(parent, 0x53 - devno, reg_val[6], 1);
572 ata_dmacreate(atadev, apiomode, ATA_UDMA6);
573 return;
574 }
575 }
576 if (udmamode >= 5) {
577 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
578 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
579 if (bootverbose)
590 ata_prtdev(atadev, "%s setting UDMA5 on VIA chip\n",
591 (error) ? "failed" : "success");
580 ata_prtdev(atadev, "%s setting UDMA5 on %s chip\n",
581 (error) ? "failed" : "success", chip);
592 if (!error) {
593 pci_write_config(parent, 0x53 - devno, reg_val[5], 1);
594 ata_dmacreate(atadev, apiomode, ATA_UDMA5);
595 return;
596 }
597 }
598 if (udmamode >= 4) {
599 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
600 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
601 if (bootverbose)
582 if (!error) {
583 pci_write_config(parent, 0x53 - devno, reg_val[5], 1);
584 ata_dmacreate(atadev, apiomode, ATA_UDMA5);
585 return;
586 }
587 }
588 if (udmamode >= 4) {
589 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
590 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
591 if (bootverbose)
602 ata_prtdev(atadev, "%s setting UDMA4 on VIA chip\n",
603 (error) ? "failed" : "success");
592 ata_prtdev(atadev, "%s setting UDMA4 on %s chip\n",
593 (error) ? "failed" : "success", chip);
604 if (!error) {
605 pci_write_config(parent, 0x53 - devno, reg_val[4], 1);
606 ata_dmacreate(atadev, apiomode, ATA_UDMA4);
607 return;
608 }
609 }
610 if (udmamode >= 2) {
611 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
612 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
613 if (bootverbose)
594 if (!error) {
595 pci_write_config(parent, 0x53 - devno, reg_val[4], 1);
596 ata_dmacreate(atadev, apiomode, ATA_UDMA4);
597 return;
598 }
599 }
600 if (udmamode >= 2) {
601 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
602 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
603 if (bootverbose)
614 ata_prtdev(atadev, "%s setting UDMA2 on VIA chip\n",
615 (error) ? "failed" : "success");
604 ata_prtdev(atadev, "%s setting UDMA2 on %s chip\n",
605 (error) ? "failed" : "success", chip);
616 if (!error) {
617 pci_write_config(parent, 0x53 - devno, reg_val[2], 1);
618 ata_dmacreate(atadev, apiomode, ATA_UDMA2);
619 return;
620 }
621 }
606 if (!error) {
607 pci_write_config(parent, 0x53 - devno, reg_val[2], 1);
608 ata_dmacreate(atadev, apiomode, ATA_UDMA2);
609 return;
610 }
611 }
622
623 }
624 if (wdmamode >= 2 && apiomode >= 4) {
625 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
626 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
627 if (bootverbose)
628 ata_prtdev(atadev, "%s setting WDMA2 on %s chip\n",
629 (error) ? "failed" : "success",
630 (chiptype == 0x74091022) ? "AMD" : "VIA");
631 if (!error) {
632 pci_write_config(parent, 0x53 - devno, 0x0b, 1);
633 pci_write_config(parent, 0x4b - devno, 0x31, 1);
634 ata_dmacreate(atadev, apiomode, ATA_WDMA2);
635 return;
612 if (wdmamode >= 2 && apiomode >= 4) {
613 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
614 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
615 if (bootverbose)
616 ata_prtdev(atadev, "%s setting WDMA2 on %s chip\n",
617 (error) ? "failed" : "success", chip);
618 if (!error) {
619 pci_write_config(parent, 0x53 - devno, 0x0b, 1);
620 pci_write_config(parent, 0x4b - devno, 0x31, 1);
621 ata_dmacreate(atadev, apiomode, ATA_WDMA2);
622 return;
623 }
636 }
637 }
638 /* we could set PIO mode timings, but we assume the BIOS did that */
639 break;
640
641 case 0x55131039: /* SiS 5591 */
642 if (ata_find_dev(parent, 0x06301039, 0x30) || /* SiS 630 */
643 ata_find_dev(parent, 0x06331039, 0) || /* SiS 633 */

--- 907 unchanged lines hidden --- 		624 }
625 }
626 /* we could set PIO mode timings, but we assume the BIOS did that */
627 break;
628
629 case 0x55131039: /* SiS 5591 */
630 if (ata_find_dev(parent, 0x06301039, 0x30) || /* SiS 630 */
631 ata_find_dev(parent, 0x06331039, 0) || /* SiS 633 */

--- 907 unchanged lines hidden ---