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ata-dma.c (84419) ata-dma.c (84584)
1/*-
2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 84419 2001-10-03 11:36:25Z sos $
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 84584 2001-10-06 11:07:04Z sos $
29 */
30
31#include "pci.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/ata.h>
35#include <sys/bio.h>
36#include <sys/malloc.h>

--- 61 unchanged lines hidden (view full) ---

98 ata_printf(scp, device, "simplex device, DMA on primary only\n");
99 return;
100 }
101 }
102
103 /* DMA engine address alignment is usually 1 word (2 bytes) */
104 scp->alignment = 0x1;
105
29 */
30
31#include "pci.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/ata.h>
35#include <sys/bio.h>
36#include <sys/malloc.h>

--- 61 unchanged lines hidden (view full) ---

98 ata_printf(scp, device, "simplex device, DMA on primary only\n");
99 return;
100 }
101 }
102
103 /* DMA engine address alignment is usually 1 word (2 bytes) */
104 scp->alignment = 0x1;
105
106 if (udmamode > 2 && !ATA_PARAM(scp, device)->cblid) {
106 if (udmamode > 2 && !ATA_PARAM(scp, device)->hwres_cblid) {
107 ata_printf(scp, device,
108 "DMA limited to UDMA33, non-ATA66 compliant cable\n");
109 udmamode = 2;
110 }
111
112 switch (scp->chiptype) {
113
114 case 0x244a8086: /* Intel ICH2 mobile */
115 case 0x244b8086: /* Intel ICH2 */
116 if (udmamode >= 5) {
117 int32_t mask48, new48;
118 int16_t word54;
119
120 word54 = pci_read_config(parent, 0x54, 2);
121 if (word54 & (0x10 << devno)) {
107 ata_printf(scp, device,
108 "DMA limited to UDMA33, non-ATA66 compliant cable\n");
109 udmamode = 2;
110 }
111
112 switch (scp->chiptype) {
113
114 case 0x244a8086: /* Intel ICH2 mobile */
115 case 0x244b8086: /* Intel ICH2 */
116 if (udmamode >= 5) {
117 int32_t mask48, new48;
118 int16_t word54;
119
120 word54 = pci_read_config(parent, 0x54, 2);
121 if (word54 & (0x10 << devno)) {
122 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
122 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
123 ATA_UDMA5, ATA_C_F_SETXFER,ATA_WAIT_READY);
124 if (bootverbose)
125 ata_printf(scp, device,
126 "%s setting UDMA5 on Intel chip\n",
127 (error) ? "failed" : "success");
128 if (!error) {
129 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
130 new48 = (1 << devno) + (1 << (16 + (devno << 2)));

--- 13 unchanged lines hidden (view full) ---

144
145 case 0x24118086: /* Intel ICH */
146 if (udmamode >= 4) {
147 int32_t mask48, new48;
148 int16_t word54;
149
150 word54 = pci_read_config(parent, 0x54, 2);
151 if (word54 & (0x10 << devno)) {
123 ATA_UDMA5, ATA_C_F_SETXFER,ATA_WAIT_READY);
124 if (bootverbose)
125 ata_printf(scp, device,
126 "%s setting UDMA5 on Intel chip\n",
127 (error) ? "failed" : "success");
128 if (!error) {
129 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
130 new48 = (1 << devno) + (1 << (16 + (devno << 2)));

--- 13 unchanged lines hidden (view full) ---

144
145 case 0x24118086: /* Intel ICH */
146 if (udmamode >= 4) {
147 int32_t mask48, new48;
148 int16_t word54;
149
150 word54 = pci_read_config(parent, 0x54, 2);
151 if (word54 & (0x10 << devno)) {
152 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
152 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
153 ATA_UDMA4, ATA_C_F_SETXFER,ATA_WAIT_READY);
154 if (bootverbose)
155 ata_printf(scp, device,
156 "%s setting UDMA4 on Intel chip\n",
157 (error) ? "failed" : "success");
158 if (!error) {
159 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
160 new48 = (1 << devno) + (2 << (16 + (devno << 2)));

--- 12 unchanged lines hidden (view full) ---

173 /* FALLTHROUGH */
174
175 case 0x71118086: /* Intel PIIX4 */
176 case 0x71998086: /* Intel PIIX4e */
177 case 0x24218086: /* Intel ICH0 */
178 if (udmamode >= 2) {
179 int32_t mask48, new48;
180
153 ATA_UDMA4, ATA_C_F_SETXFER,ATA_WAIT_READY);
154 if (bootverbose)
155 ata_printf(scp, device,
156 "%s setting UDMA4 on Intel chip\n",
157 (error) ? "failed" : "success");
158 if (!error) {
159 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
160 new48 = (1 << devno) + (2 << (16 + (devno << 2)));

--- 12 unchanged lines hidden (view full) ---

173 /* FALLTHROUGH */
174
175 case 0x71118086: /* Intel PIIX4 */
176 case 0x71998086: /* Intel PIIX4e */
177 case 0x24218086: /* Intel ICH0 */
178 if (udmamode >= 2) {
179 int32_t mask48, new48;
180
181 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
181 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
182 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
183 if (bootverbose)
184 ata_printf(scp, device, "%s setting UDMA2 on Intel chip\n",
185 (error) ? "failed" : "success");
186 if (!error) {
187 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
188 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
189 pci_write_config(parent, 0x48,

--- 23 unchanged lines hidden (view full) ---

213 if (!(new40 & 0x40000000)) {
214 new44 &= ~0x000000f0;
215 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20);
216 }
217 new40 |= 0x40004000;
218 pci_write_config(parent, 0x40, new40, 4);
219 pci_write_config(parent, 0x44, new44, 4);
220 }
182 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
183 if (bootverbose)
184 ata_printf(scp, device, "%s setting UDMA2 on Intel chip\n",
185 (error) ? "failed" : "success");
186 if (!error) {
187 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
188 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
189 pci_write_config(parent, 0x48,

--- 23 unchanged lines hidden (view full) ---

213 if (!(new40 & 0x40000000)) {
214 new44 &= ~0x000000f0;
215 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20);
216 }
217 new40 |= 0x40004000;
218 pci_write_config(parent, 0x40, new40, 4);
219 pci_write_config(parent, 0x44, new44, 4);
220 }
221 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
221 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
222 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
223 if (bootverbose)
224 ata_printf(scp, device, "%s setting WDMA2 on Intel chip\n",
225 (error) ? "failed" : "success");
226 if (!error) {
227 if (device == ATA_MASTER) {
228 mask40 = 0x0000330f;
229 new40 = 0x00002307;

--- 32 unchanged lines hidden (view full) ---

262 word40 = pci_read_config(parent, 0x40, 4);
263 word40 >>= scp->channel * 16;
264
265 /* Check for timing config usable for DMA on controller */
266 if (!((word40 & 0x3300) == 0x2300 &&
267 ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1))
268 break;
269
222 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
223 if (bootverbose)
224 ata_printf(scp, device, "%s setting WDMA2 on Intel chip\n",
225 (error) ? "failed" : "success");
226 if (!error) {
227 if (device == ATA_MASTER) {
228 mask40 = 0x0000330f;
229 new40 = 0x00002307;

--- 32 unchanged lines hidden (view full) ---

262 word40 = pci_read_config(parent, 0x40, 4);
263 word40 >>= scp->channel * 16;
264
265 /* Check for timing config usable for DMA on controller */
266 if (!((word40 & 0x3300) == 0x2300 &&
267 ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1))
268 break;
269
270 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
270 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
271 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
272 if (bootverbose)
273 ata_printf(scp, device,
274 "%s setting WDMA2 on Intel chip\n",
275 (error) ? "failed" : "success");
276 if (!error) {
277 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
278 return;

--- 5 unchanged lines hidden (view full) ---

284 /* the older Aladdin doesn't support ATAPI DMA on both master & slave */
285 if (pci_get_revid(parent) < 0xC2 &&
286 scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) {
287 ata_printf(scp, device,
288 "Aladdin: two atapi devices on this channel, no DMA\n");
289 break;
290 }
291 if (udmamode >= 5 && pci_get_revid(parent) >= 0xC4) {
271 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
272 if (bootverbose)
273 ata_printf(scp, device,
274 "%s setting WDMA2 on Intel chip\n",
275 (error) ? "failed" : "success");
276 if (!error) {
277 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
278 return;

--- 5 unchanged lines hidden (view full) ---

284 /* the older Aladdin doesn't support ATAPI DMA on both master & slave */
285 if (pci_get_revid(parent) < 0xC2 &&
286 scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) {
287 ata_printf(scp, device,
288 "Aladdin: two atapi devices on this channel, no DMA\n");
289 break;
290 }
291 if (udmamode >= 5 && pci_get_revid(parent) >= 0xC4) {
292 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
292 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
293 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
294 if (bootverbose)
295 ata_printf(scp, device,
296 "%s setting UDMA5 on Acer chip\n",
297 (error) ? "failed" : "success");
298 if (!error) {
299 int32_t word54 = pci_read_config(parent, 0x54, 4);
300

--- 4 unchanged lines hidden (view full) ---

305 pci_write_config(parent, 0x54, word54, 4);
306 pci_write_config(parent, 0x53,
307 pci_read_config(parent, 0x53, 1) | 0x03, 1);
308 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
309 return;
310 }
311 }
312 if (udmamode >= 4 && pci_get_revid(parent) >= 0xC2) {
293 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
294 if (bootverbose)
295 ata_printf(scp, device,
296 "%s setting UDMA5 on Acer chip\n",
297 (error) ? "failed" : "success");
298 if (!error) {
299 int32_t word54 = pci_read_config(parent, 0x54, 4);
300

--- 4 unchanged lines hidden (view full) ---

305 pci_write_config(parent, 0x54, word54, 4);
306 pci_write_config(parent, 0x53,
307 pci_read_config(parent, 0x53, 1) | 0x03, 1);
308 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
309 return;
310 }
311 }
312 if (udmamode >= 4 && pci_get_revid(parent) >= 0xC2) {
313 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
313 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
314 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
315 if (bootverbose)
316 ata_printf(scp, device,
317 "%s setting UDMA4 on Acer chip\n",
318 (error) ? "failed" : "success");
319 if (!error) {
320 int32_t word54 = pci_read_config(parent, 0x54, 4);
321

--- 4 unchanged lines hidden (view full) ---

326 pci_write_config(parent, 0x54, word54, 4);
327 pci_write_config(parent, 0x53,
328 pci_read_config(parent, 0x53, 1) | 0x03, 1);
329 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
330 return;
331 }
332 }
333 if (udmamode >= 2 && pci_get_revid(parent) >= 0x20) {
314 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
315 if (bootverbose)
316 ata_printf(scp, device,
317 "%s setting UDMA4 on Acer chip\n",
318 (error) ? "failed" : "success");
319 if (!error) {
320 int32_t word54 = pci_read_config(parent, 0x54, 4);
321

--- 4 unchanged lines hidden (view full) ---

326 pci_write_config(parent, 0x54, word54, 4);
327 pci_write_config(parent, 0x53,
328 pci_read_config(parent, 0x53, 1) | 0x03, 1);
329 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
330 return;
331 }
332 }
333 if (udmamode >= 2 && pci_get_revid(parent) >= 0x20) {
334 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
334 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
335 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
336 if (bootverbose)
337 ata_printf(scp, device,
338 "%s setting UDMA2 on Acer chip\n",
339 (error) ? "failed" : "success");
340 if (!error) {
341 int32_t word54 = pci_read_config(parent, 0x54, 4);
342

--- 8 unchanged lines hidden (view full) ---

351 }
352 }
353
354 /* make sure eventual UDMA mode from the BIOS is disabled */
355 pci_write_config(parent, 0x56, pci_read_config(parent, 0x56, 2) &
356 ~(0x0008 << (devno << 2)), 2);
357
358 if (wdmamode >= 2 && apiomode >= 4) {
335 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
336 if (bootverbose)
337 ata_printf(scp, device,
338 "%s setting UDMA2 on Acer chip\n",
339 (error) ? "failed" : "success");
340 if (!error) {
341 int32_t word54 = pci_read_config(parent, 0x54, 4);
342

--- 8 unchanged lines hidden (view full) ---

351 }
352 }
353
354 /* make sure eventual UDMA mode from the BIOS is disabled */
355 pci_write_config(parent, 0x56, pci_read_config(parent, 0x56, 2) &
356 ~(0x0008 << (devno << 2)), 2);
357
358 if (wdmamode >= 2 && apiomode >= 4) {
359 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
359 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
360 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
361 if (bootverbose)
362 ata_printf(scp, device,
363 "%s setting WDMA2 on Acer chip\n",
364 (error) ? "failed" : "success");
365 if (!error) {
366 pci_write_config(parent, 0x53,
367 pci_read_config(parent, 0x53, 1) | 0x03, 1);

--- 4 unchanged lines hidden (view full) ---

372 }
373 pci_write_config(parent, 0x53,
374 (pci_read_config(parent, 0x53, 1) & ~0x01) | 0x02, 1);
375 /* we could set PIO mode timings, but we assume the BIOS did that */
376 break;
377
378 case 0x74111022: /* AMD 766 */
379 if (udmamode >= 5) {
360 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
361 if (bootverbose)
362 ata_printf(scp, device,
363 "%s setting WDMA2 on Acer chip\n",
364 (error) ? "failed" : "success");
365 if (!error) {
366 pci_write_config(parent, 0x53,
367 pci_read_config(parent, 0x53, 1) | 0x03, 1);

--- 4 unchanged lines hidden (view full) ---

372 }
373 pci_write_config(parent, 0x53,
374 (pci_read_config(parent, 0x53, 1) & ~0x01) | 0x02, 1);
375 /* we could set PIO mode timings, but we assume the BIOS did that */
376 break;
377
378 case 0x74111022: /* AMD 766 */
379 if (udmamode >= 5) {
380 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
380 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
381 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
382 if (bootverbose)
383 ata_printf(scp, device,
384 "%s setting UDMA5 on AMD chip\n",
385 (error) ? "failed" : "success");
386 if (!error) {
387 pci_write_config(parent, 0x53 - devno, 0xc6, 1);
388 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
389 return;
390 }
391 }
392 /* FALLTHROUGH */
393
394 case 0x74091022: /* AMD 756 */
395 if (udmamode >= 4) {
381 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
382 if (bootverbose)
383 ata_printf(scp, device,
384 "%s setting UDMA5 on AMD chip\n",
385 (error) ? "failed" : "success");
386 if (!error) {
387 pci_write_config(parent, 0x53 - devno, 0xc6, 1);
388 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
389 return;
390 }
391 }
392 /* FALLTHROUGH */
393
394 case 0x74091022: /* AMD 756 */
395 if (udmamode >= 4) {
396 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
396 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
397 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
398 if (bootverbose)
399 ata_printf(scp, device,
400 "%s setting UDMA4 on AMD chip\n",
401 (error) ? "failed" : "success");
402 if (!error) {
403 pci_write_config(parent, 0x53 - devno, 0xc5, 1);
404 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
405 return;
406 }
407 }
408 goto via_82c586;
409
410 case 0x05711106: /* VIA 82C571, 82C586, 82C596, 82C686 */
411 if (ata_find_dev(parent, 0x06861106, 0x40) ||
412 ata_find_dev(parent, 0x30741106, 0)) { /* 82C686b */
413 if (udmamode >= 5) {
397 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
398 if (bootverbose)
399 ata_printf(scp, device,
400 "%s setting UDMA4 on AMD chip\n",
401 (error) ? "failed" : "success");
402 if (!error) {
403 pci_write_config(parent, 0x53 - devno, 0xc5, 1);
404 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
405 return;
406 }
407 }
408 goto via_82c586;
409
410 case 0x05711106: /* VIA 82C571, 82C586, 82C596, 82C686 */
411 if (ata_find_dev(parent, 0x06861106, 0x40) ||
412 ata_find_dev(parent, 0x30741106, 0)) { /* 82C686b */
413 if (udmamode >= 5) {
414 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
414 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
415 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
416 if (bootverbose)
417 ata_printf(scp, device,
418 "%s setting UDMA5 on VIA chip\n",
419 (error) ? "failed" : "success");
420 if (!error) {
421 pci_write_config(parent, 0x53 - devno, 0xf0, 1);
422 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
423 return;
424 }
425 }
426 if (udmamode >= 4) {
415 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
416 if (bootverbose)
417 ata_printf(scp, device,
418 "%s setting UDMA5 on VIA chip\n",
419 (error) ? "failed" : "success");
420 if (!error) {
421 pci_write_config(parent, 0x53 - devno, 0xf0, 1);
422 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
423 return;
424 }
425 }
426 if (udmamode >= 4) {
427 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
427 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
428 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
429 if (bootverbose)
430 ata_printf(scp, device,
431 "%s setting UDMA4 on VIA chip\n",
432 (error) ? "failed" : "success");
433 if (!error) {
434 pci_write_config(parent, 0x53 - devno, 0xf1, 1);
435 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
436 return;
437 }
438 }
439 if (udmamode >= 2) {
428 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
429 if (bootverbose)
430 ata_printf(scp, device,
431 "%s setting UDMA4 on VIA chip\n",
432 (error) ? "failed" : "success");
433 if (!error) {
434 pci_write_config(parent, 0x53 - devno, 0xf1, 1);
435 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
436 return;
437 }
438 }
439 if (udmamode >= 2) {
440 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
440 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
441 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
442 if (bootverbose)
443 ata_printf(scp, device,
444 "%s setting UDMA2 on VIA chip\n",
445 (error) ? "failed" : "success");
446 if (!error) {
447 pci_write_config(parent, 0x53 - devno, 0xf4, 1);
448 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
449 return;
450 }
451 }
452 }
453 else if (ata_find_dev(parent, 0x06861106, 0) || /* 82C686a */
454 ata_find_dev(parent, 0x05961106, 0x12)) { /* 82C596b */
455 if (udmamode >= 4) {
441 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
442 if (bootverbose)
443 ata_printf(scp, device,
444 "%s setting UDMA2 on VIA chip\n",
445 (error) ? "failed" : "success");
446 if (!error) {
447 pci_write_config(parent, 0x53 - devno, 0xf4, 1);
448 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
449 return;
450 }
451 }
452 }
453 else if (ata_find_dev(parent, 0x06861106, 0) || /* 82C686a */
454 ata_find_dev(parent, 0x05961106, 0x12)) { /* 82C596b */
455 if (udmamode >= 4) {
456 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
456 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
457 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
458 if (bootverbose)
459 ata_printf(scp, device,
460 "%s setting UDMA4 on VIA chip\n",
461 (error) ? "failed" : "success");
462 if (!error) {
463 pci_write_config(parent, 0x53 - devno, 0xe8, 1);
464 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
465 return;
466 }
467 }
468 if (udmamode >= 2) {
457 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
458 if (bootverbose)
459 ata_printf(scp, device,
460 "%s setting UDMA4 on VIA chip\n",
461 (error) ? "failed" : "success");
462 if (!error) {
463 pci_write_config(parent, 0x53 - devno, 0xe8, 1);
464 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
465 return;
466 }
467 }
468 if (udmamode >= 2) {
469 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
469 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
470 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
471 if (bootverbose)
472 ata_printf(scp, device,
473 "%s setting UDMA2 on VIA chip\n",
474 (error) ? "failed" : "success");
475 if (!error) {
476 pci_write_config(parent, 0x53 - devno, 0xea, 1);
477 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
478 return;
479 }
480 }
481 }
482 else if (ata_find_dev(parent, 0x05961106, 0) || /* 82C596a */
483 ata_find_dev(parent, 0x05861106, 0x03)) { /* 82C586b */
484via_82c586:
485 if (udmamode >= 2) {
470 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
471 if (bootverbose)
472 ata_printf(scp, device,
473 "%s setting UDMA2 on VIA chip\n",
474 (error) ? "failed" : "success");
475 if (!error) {
476 pci_write_config(parent, 0x53 - devno, 0xea, 1);
477 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
478 return;
479 }
480 }
481 }
482 else if (ata_find_dev(parent, 0x05961106, 0) || /* 82C596a */
483 ata_find_dev(parent, 0x05861106, 0x03)) { /* 82C586b */
484via_82c586:
485 if (udmamode >= 2) {
486 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
486 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
487 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
488 if (bootverbose)
489 ata_printf(scp, device, "%s setting UDMA2 on %s chip\n",
490 (error) ? "failed" : "success",
491 ((scp->chiptype == 0x74091022) ||
492 (scp->chiptype == 0x74111022)) ? "AMD" : "VIA");
493 if (!error) {
494 pci_write_config(parent, 0x53 - devno, 0xc0, 1);
495 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
496 return;
497 }
498 }
499 }
500 if (wdmamode >= 2 && apiomode >= 4) {
487 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
488 if (bootverbose)
489 ata_printf(scp, device, "%s setting UDMA2 on %s chip\n",
490 (error) ? "failed" : "success",
491 ((scp->chiptype == 0x74091022) ||
492 (scp->chiptype == 0x74111022)) ? "AMD" : "VIA");
493 if (!error) {
494 pci_write_config(parent, 0x53 - devno, 0xc0, 1);
495 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
496 return;
497 }
498 }
499 }
500 if (wdmamode >= 2 && apiomode >= 4) {
501 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
501 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
502 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
503 if (bootverbose)
504 ata_printf(scp, device, "%s setting WDMA2 on %s chip\n",
505 (error) ? "failed" : "success",
506 (scp->chiptype == 0x74091022) ? "AMD" : "VIA");
507 if (!error) {
508 pci_write_config(parent, 0x53 - devno, 0x0b, 1);
509 pci_write_config(parent, 0x4b - devno, 0x31, 1);
510 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
511 return;
512 }
513 }
514 /* we could set PIO mode timings, but we assume the BIOS did that */
515 break;
516
517 case 0x55131039: /* SiS 5591 */
518 if (udmamode >= 2 && pci_get_revid(parent) > 0xc1) {
502 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
503 if (bootverbose)
504 ata_printf(scp, device, "%s setting WDMA2 on %s chip\n",
505 (error) ? "failed" : "success",
506 (scp->chiptype == 0x74091022) ? "AMD" : "VIA");
507 if (!error) {
508 pci_write_config(parent, 0x53 - devno, 0x0b, 1);
509 pci_write_config(parent, 0x4b - devno, 0x31, 1);
510 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
511 return;
512 }
513 }
514 /* we could set PIO mode timings, but we assume the BIOS did that */
515 break;
516
517 case 0x55131039: /* SiS 5591 */
518 if (udmamode >= 2 && pci_get_revid(parent) > 0xc1) {
519 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
519 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
520 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
521 if (bootverbose)
522 ata_printf(scp, device,
523 "%s setting UDMA2 on SiS chip\n",
524 (error) ? "failed" : "success");
525 if (!error) {
526 pci_write_config(parent, 0x40 + (devno << 1), 0xa301, 2);
527 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
528 return;
529 }
530 }
531 if (wdmamode >=2 && apiomode >= 4) {
520 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
521 if (bootverbose)
522 ata_printf(scp, device,
523 "%s setting UDMA2 on SiS chip\n",
524 (error) ? "failed" : "success");
525 if (!error) {
526 pci_write_config(parent, 0x40 + (devno << 1), 0xa301, 2);
527 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
528 return;
529 }
530 }
531 if (wdmamode >=2 && apiomode >= 4) {
532 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
532 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
533 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
534 if (bootverbose)
535 ata_printf(scp, device,
536 "%s setting WDMA2 on SiS chip\n",
537 (error) ? "failed" : "success");
538 if (!error) {
539 pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2);
540 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
541 return;
542 }
543 }
544 /* we could set PIO mode timings, but we assume the BIOS did that */
545 break;
546
547 case 0x06491095: /* CMD 649 ATA100 controller */
548 if (udmamode >= 5) {
549 u_int8_t umode;
550
533 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
534 if (bootverbose)
535 ata_printf(scp, device,
536 "%s setting WDMA2 on SiS chip\n",
537 (error) ? "failed" : "success");
538 if (!error) {
539 pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2);
540 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
541 return;
542 }
543 }
544 /* we could set PIO mode timings, but we assume the BIOS did that */
545 break;
546
547 case 0x06491095: /* CMD 649 ATA100 controller */
548 if (udmamode >= 5) {
549 u_int8_t umode;
550
551 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
551 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
552 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
553 if (bootverbose)
554 ata_printf(scp, device, "%s setting UDMA5 on CMD chip\n",
555 (error) ? "failed" : "success");
556 if (!error) {
557 umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1);
558 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
559 umode |= (device == ATA_MASTER ? 0x05 : 0x0a);
560 pci_write_config(parent, scp->channel ? 0x7b : 0x73, umode, 1);
561 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
562 return;
563 }
564 }
565 /* FALLTHROUGH */
566
567 case 0x06481095: /* CMD 648 ATA66 controller */
568 if (udmamode >= 4) {
569 u_int8_t umode;
570
552 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
553 if (bootverbose)
554 ata_printf(scp, device, "%s setting UDMA5 on CMD chip\n",
555 (error) ? "failed" : "success");
556 if (!error) {
557 umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1);
558 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
559 umode |= (device == ATA_MASTER ? 0x05 : 0x0a);
560 pci_write_config(parent, scp->channel ? 0x7b : 0x73, umode, 1);
561 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
562 return;
563 }
564 }
565 /* FALLTHROUGH */
566
567 case 0x06481095: /* CMD 648 ATA66 controller */
568 if (udmamode >= 4) {
569 u_int8_t umode;
570
571 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
571 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
572 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
573 if (bootverbose)
574 ata_printf(scp, device, "%s setting UDMA4 on CMD chip\n",
575 (error) ? "failed" : "success");
576 if (!error) {
577 umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1);
578 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
579 umode |= (device == ATA_MASTER ? 0x15 : 0x4a);
580 pci_write_config(parent, scp->channel ? 0x7b : 0x73, umode, 1);
581 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
582 return;
583 }
584 }
585 if (udmamode >= 2) {
586 u_int8_t umode;
587
572 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
573 if (bootverbose)
574 ata_printf(scp, device, "%s setting UDMA4 on CMD chip\n",
575 (error) ? "failed" : "success");
576 if (!error) {
577 umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1);
578 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
579 umode |= (device == ATA_MASTER ? 0x15 : 0x4a);
580 pci_write_config(parent, scp->channel ? 0x7b : 0x73, umode, 1);
581 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
582 return;
583 }
584 }
585 if (udmamode >= 2) {
586 u_int8_t umode;
587
588 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
588 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
589 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
590 if (bootverbose)
591 ata_printf(scp, device, "%s setting UDMA2 on CMD chip\n",
592 (error) ? "failed" : "success");
593 if (!error) {
594 umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1);
595 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
596 umode |= (device == ATA_MASTER ? 0x11 : 0x42);

--- 5 unchanged lines hidden (view full) ---

602 /* make sure eventual UDMA mode from the BIOS is disabled */
603 pci_write_config(parent, scp->channel ? 0x7b : 0x73,
604 pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1)&
605 ~(device == ATA_MASTER ? 0x35 : 0xca), 1);
606 /* FALLTHROUGH */
607
608 case 0x06461095: /* CMD 646 ATA controller */
609 if (wdmamode >= 2 && apiomode >= 4) {
589 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
590 if (bootverbose)
591 ata_printf(scp, device, "%s setting UDMA2 on CMD chip\n",
592 (error) ? "failed" : "success");
593 if (!error) {
594 umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1);
595 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
596 umode |= (device == ATA_MASTER ? 0x11 : 0x42);

--- 5 unchanged lines hidden (view full) ---

602 /* make sure eventual UDMA mode from the BIOS is disabled */
603 pci_write_config(parent, scp->channel ? 0x7b : 0x73,
604 pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1)&
605 ~(device == ATA_MASTER ? 0x35 : 0xca), 1);
606 /* FALLTHROUGH */
607
608 case 0x06461095: /* CMD 646 ATA controller */
609 if (wdmamode >= 2 && apiomode >= 4) {
610 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
610 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
611 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
612 if (bootverbose)
613 ata_printf(scp, device, "%s setting WDMA2 on CMD chip\n",
614 error ? "failed" : "success");
615 if (!error) {
616 int32_t offset = (devno < 3) ? (devno << 1) : 7;
617
618 pci_write_config(parent, 0x54 + offset, 0x3f, 1);
619 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
620 return;
621 }
622 }
623 /* we could set PIO mode timings, but we assume the BIOS did that */
624 break;
625
626 case 0xc6931080: /* Cypress 82c693 ATA controller */
627 if (wdmamode >= 2 && apiomode >= 4) {
611 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
612 if (bootverbose)
613 ata_printf(scp, device, "%s setting WDMA2 on CMD chip\n",
614 error ? "failed" : "success");
615 if (!error) {
616 int32_t offset = (devno < 3) ? (devno << 1) : 7;
617
618 pci_write_config(parent, 0x54 + offset, 0x3f, 1);
619 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
620 return;
621 }
622 }
623 /* we could set PIO mode timings, but we assume the BIOS did that */
624 break;
625
626 case 0xc6931080: /* Cypress 82c693 ATA controller */
627 if (wdmamode >= 2 && apiomode >= 4) {
628 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
628 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
629 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
630 if (bootverbose)
631 ata_printf(scp, device,
632 "%s setting WDMA2 on Cypress chip\n",
633 error ? "failed" : "success");
634 if (!error) {
635 pci_write_config(scp->dev, scp->channel ? 0x4e:0x4c, 0x2020, 2);
636 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
637 return;
638 }
639 }
640 /* we could set PIO mode timings, but we assume the BIOS did that */
641 break;
642
643 case 0x01021078: /* Cyrix 5530 ATA33 controller */
644 scp->alignment = 0xf; /* DMA engine requires 16 byte alignment */
645 if (udmamode >= 2) {
629 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
630 if (bootverbose)
631 ata_printf(scp, device,
632 "%s setting WDMA2 on Cypress chip\n",
633 error ? "failed" : "success");
634 if (!error) {
635 pci_write_config(scp->dev, scp->channel ? 0x4e:0x4c, 0x2020, 2);
636 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
637 return;
638 }
639 }
640 /* we could set PIO mode timings, but we assume the BIOS did that */
641 break;
642
643 case 0x01021078: /* Cyrix 5530 ATA33 controller */
644 scp->alignment = 0xf; /* DMA engine requires 16 byte alignment */
645 if (udmamode >= 2) {
646 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
646 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
647 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
648 if (bootverbose)
649 ata_printf(scp, device, "%s setting UDMA2 on Cyrix chip\n",
650 (error) ? "failed" : "success");
651 if (!error) {
652 cyrix_timing(scp, devno, ATA_UDMA2);
653 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
654 return;
655 }
656 }
657 if (wdmamode >= 2 && apiomode >= 4) {
647 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
648 if (bootverbose)
649 ata_printf(scp, device, "%s setting UDMA2 on Cyrix chip\n",
650 (error) ? "failed" : "success");
651 if (!error) {
652 cyrix_timing(scp, devno, ATA_UDMA2);
653 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
654 return;
655 }
656 }
657 if (wdmamode >= 2 && apiomode >= 4) {
658 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
658 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
659 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
660 if (bootverbose)
661 ata_printf(scp, device, "%s setting WDMA2 on Cyrix chip\n",
662 (error) ? "failed" : "success");
663 if (!error) {
664 cyrix_timing(scp, devno, ATA_WDMA2);
665 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
666 return;
667 }
668 }
659 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
660 if (bootverbose)
661 ata_printf(scp, device, "%s setting WDMA2 on Cyrix chip\n",
662 (error) ? "failed" : "success");
663 if (!error) {
664 cyrix_timing(scp, devno, ATA_WDMA2);
665 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
666 return;
667 }
668 }
669 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
670 ata_pio2mode(apiomode), ATA_C_F_SETXFER,
669 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
670 ATA_PIO0 + apiomode, ATA_C_F_SETXFER,
671 ATA_WAIT_READY);
672 if (bootverbose)
673 ata_printf(scp, device, "%s setting %s on Cyrix chip\n",
674 (error) ? "failed" : "success",
671 ATA_WAIT_READY);
672 if (bootverbose)
673 ata_printf(scp, device, "%s setting %s on Cyrix chip\n",
674 (error) ? "failed" : "success",
675 ata_mode2str(ata_pio2mode(apiomode)));
676 cyrix_timing(scp, devno, ata_pio2mode(apiomode));
677 scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
675 ata_mode2str(ATA_PIO0 + apiomode));
676 cyrix_timing(scp, devno, ATA_PIO0 + apiomode);
677 scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode;
678 return;
679
680 case 0x02111166: /* ServerWorks ROSB4 ATA33 controller */
681 if (udmamode >= 2) {
678 return;
679
680 case 0x02111166: /* ServerWorks ROSB4 ATA33 controller */
681 if (udmamode >= 2) {
682 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
682 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
683 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
684 if (bootverbose)
685 ata_printf(scp, device,
686 "%s setting UDMA2 on ServerWorks chip\n",
687 (error) ? "failed" : "success");
688 if (!error) {
689 u_int16_t reg56;
690

--- 4 unchanged lines hidden (view full) ---

695 reg56 &= ~(0xf << (devno * 4));
696 reg56 |= (0x2 << (devno * 4));
697 pci_write_config(parent, 0x56, reg56, 2);
698 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
699 return;
700 }
701 }
702 if (wdmamode >= 2 && apiomode >= 4) {
683 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
684 if (bootverbose)
685 ata_printf(scp, device,
686 "%s setting UDMA2 on ServerWorks chip\n",
687 (error) ? "failed" : "success");
688 if (!error) {
689 u_int16_t reg56;
690

--- 4 unchanged lines hidden (view full) ---

695 reg56 &= ~(0xf << (devno * 4));
696 reg56 |= (0x2 << (devno * 4));
697 pci_write_config(parent, 0x56, reg56, 2);
698 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
699 return;
700 }
701 }
702 if (wdmamode >= 2 && apiomode >= 4) {
703 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
703 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
704 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
705 if (bootverbose)
706 ata_printf(scp, device,
707 "%s setting WDMA2 on ServerWorks chip\n",
708 (error) ? "failed" : "success");
709 if (!error) {
710 int offset = (scp->channel * 2) + (device == ATA_MASTER);
711 int word44 = pci_read_config(parent, 0x44, 4);

--- 10 unchanged lines hidden (view full) ---

722 }
723 /* we could set PIO mode timings, but we assume the BIOS did that */
724 break;
725
726 case 0x4d68105a: /* Promise TX2 ATA100 controllers */
727 case 0x6268105a: /* Promise TX2v2 ATA100 controllers */
728 ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b);
729 if (udmamode >= 4 && !(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x04)) {
704 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
705 if (bootverbose)
706 ata_printf(scp, device,
707 "%s setting WDMA2 on ServerWorks chip\n",
708 (error) ? "failed" : "success");
709 if (!error) {
710 int offset = (scp->channel * 2) + (device == ATA_MASTER);
711 int word44 = pci_read_config(parent, 0x44, 4);

--- 10 unchanged lines hidden (view full) ---

722 }
723 /* we could set PIO mode timings, but we assume the BIOS did that */
724 break;
725
726 case 0x4d68105a: /* Promise TX2 ATA100 controllers */
727 case 0x6268105a: /* Promise TX2v2 ATA100 controllers */
728 ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b);
729 if (udmamode >= 4 && !(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x04)) {
730 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
730 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
731 ATA_UDMA + max(udmamode, 5), ATA_C_F_SETXFER,
732 ATA_WAIT_READY);
733 if (bootverbose)
734 ata_printf(scp, device, "%s setting %s on Promise chip\n",
735 (error) ? "failed" : "success",
736 ata_mode2str(ATA_UDMA + max(udmamode, 5)));
737 if (!error) {
738 scp->mode[ATA_DEV(device)] = ATA_UDMA + (max(udmamode, 5));
739 return;
740 }
741 }
742 if (udmamode >= 2) {
731 ATA_UDMA + max(udmamode, 5), ATA_C_F_SETXFER,
732 ATA_WAIT_READY);
733 if (bootverbose)
734 ata_printf(scp, device, "%s setting %s on Promise chip\n",
735 (error) ? "failed" : "success",
736 ata_mode2str(ATA_UDMA + max(udmamode, 5)));
737 if (!error) {
738 scp->mode[ATA_DEV(device)] = ATA_UDMA + (max(udmamode, 5));
739 return;
740 }
741 }
742 if (udmamode >= 2) {
743 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
743 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
744 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
745 if (bootverbose)
746 ata_printf(scp, device, "%s setting %s on Promise chip\n",
747 (error) ? "failed" : "success", "UDMA2");
748 if (!error) {
749 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
750 return;
751 }
752 }
753 if (wdmamode >= 2 && apiomode >= 4) {
744 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
745 if (bootverbose)
746 ata_printf(scp, device, "%s setting %s on Promise chip\n",
747 (error) ? "failed" : "success", "UDMA2");
748 if (!error) {
749 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
750 return;
751 }
752 }
753 if (wdmamode >= 2 && apiomode >= 4) {
754 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
754 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
755 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
756 if (bootverbose)
757 ata_printf(scp, device, "%s setting %s on Promise chip\n",
758 (error) ? "failed" : "success", "WDMA2");
759 if (!error) {
760 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
761 return;
762 }
763 }
764 break;
765
766 case 0x4d30105a: /* Promise Ultra/FastTrak 100 controllers */
767 case 0x0d30105a: /* Promise OEM ATA100 controllers */
768 if (!ATAPI_DEVICE(scp, device) && udmamode >= 5 &&
769 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
755 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
756 if (bootverbose)
757 ata_printf(scp, device, "%s setting %s on Promise chip\n",
758 (error) ? "failed" : "success", "WDMA2");
759 if (!error) {
760 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
761 return;
762 }
763 }
764 break;
765
766 case 0x4d30105a: /* Promise Ultra/FastTrak 100 controllers */
767 case 0x0d30105a: /* Promise OEM ATA100 controllers */
768 if (!ATAPI_DEVICE(scp, device) && udmamode >= 5 &&
769 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
770 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
770 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
771 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
772 if (bootverbose)
773 ata_printf(scp, device,
774 "%s setting UDMA5 on Promise chip\n",
775 (error) ? "failed" : "success");
776 if (!error) {
777 promise_timing(scp, devno, ATA_UDMA5);
778 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
779 return;
780 }
781 }
782 /* FALLTHROUGH */
783
784 case 0x4d38105a: /* Promise Ultra/FastTrak 66 controllers */
785 if (!ATAPI_DEVICE(scp, device) && udmamode >= 4 &&
786 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
771 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
772 if (bootverbose)
773 ata_printf(scp, device,
774 "%s setting UDMA5 on Promise chip\n",
775 (error) ? "failed" : "success");
776 if (!error) {
777 promise_timing(scp, devno, ATA_UDMA5);
778 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
779 return;
780 }
781 }
782 /* FALLTHROUGH */
783
784 case 0x4d38105a: /* Promise Ultra/FastTrak 66 controllers */
785 if (!ATAPI_DEVICE(scp, device) && udmamode >= 4 &&
786 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
787 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
787 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
788 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
789 if (bootverbose)
790 ata_printf(scp, device,
791 "%s setting UDMA4 on Promise chip\n",
792 (error) ? "failed" : "success");
793 if (!error) {
794 promise_timing(scp, devno, ATA_UDMA4);
795 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
796 return;
797 }
798 }
799 /* FALLTHROUGH */
800
801 case 0x4d33105a: /* Promise Ultra/FastTrak 33 controllers */
802 if (!ATAPI_DEVICE(scp, device) && udmamode >= 2) {
788 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
789 if (bootverbose)
790 ata_printf(scp, device,
791 "%s setting UDMA4 on Promise chip\n",
792 (error) ? "failed" : "success");
793 if (!error) {
794 promise_timing(scp, devno, ATA_UDMA4);
795 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
796 return;
797 }
798 }
799 /* FALLTHROUGH */
800
801 case 0x4d33105a: /* Promise Ultra/FastTrak 33 controllers */
802 if (!ATAPI_DEVICE(scp, device) && udmamode >= 2) {
803 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
803 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
804 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
805 if (bootverbose)
806 ata_printf(scp, device,
807 "%s setting UDMA2 on Promise chip\n",
808 (error) ? "failed" : "success");
809 if (!error) {
810 promise_timing(scp, devno, ATA_UDMA2);
811 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
812 return;
813 }
814 }
815 if (!ATAPI_DEVICE(scp, device) && wdmamode >= 2 && apiomode >= 4) {
804 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
805 if (bootverbose)
806 ata_printf(scp, device,
807 "%s setting UDMA2 on Promise chip\n",
808 (error) ? "failed" : "success");
809 if (!error) {
810 promise_timing(scp, devno, ATA_UDMA2);
811 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
812 return;
813 }
814 }
815 if (!ATAPI_DEVICE(scp, device) && wdmamode >= 2 && apiomode >= 4) {
816 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
816 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
817 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
818 if (bootverbose)
819 ata_printf(scp, device,
820 "%s setting WDMA2 on Promise chip\n",
821 (error) ? "failed" : "success");
822 if (!error) {
823 promise_timing(scp, devno, ATA_WDMA2);
824 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
825 return;
826 }
827 }
817 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
818 if (bootverbose)
819 ata_printf(scp, device,
820 "%s setting WDMA2 on Promise chip\n",
821 (error) ? "failed" : "success");
822 if (!error) {
823 promise_timing(scp, devno, ATA_WDMA2);
824 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
825 return;
826 }
827 }
828 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
829 ata_pio2mode(apiomode),
828 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
829 ATA_PIO0 + apiomode,
830 ATA_C_F_SETXFER, ATA_WAIT_READY);
831 if (bootverbose)
832 ata_printf(scp, device,
833 "%s setting PIO%d on Promise chip\n",
834 (error) ? "failed" : "success",
835 (apiomode >= 0) ? apiomode : 0);
830 ATA_C_F_SETXFER, ATA_WAIT_READY);
831 if (bootverbose)
832 ata_printf(scp, device,
833 "%s setting PIO%d on Promise chip\n",
834 (error) ? "failed" : "success",
835 (apiomode >= 0) ? apiomode : 0);
836 promise_timing(scp, devno, ata_pio2mode(apiomode));
837 scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
836 promise_timing(scp, devno, ATA_PIO0 + apiomode);
837 scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode;
838 return;
839
840 case 0x00041103: /* HighPoint HPT366/368/370 controllers */
841 if (!ATAPI_DEVICE(scp, device) &&
842 udmamode >=5 && pci_get_revid(parent) >= 0x03 &&
843 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
838 return;
839
840 case 0x00041103: /* HighPoint HPT366/368/370 controllers */
841 if (!ATAPI_DEVICE(scp, device) &&
842 udmamode >=5 && pci_get_revid(parent) >= 0x03 &&
843 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
844 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
844 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
845 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
846 if (bootverbose)
847 ata_printf(scp, device,
848 "%s setting UDMA5 on HighPoint chip\n",
849 (error) ? "failed" : "success");
850 if (!error) {
851 hpt_timing(scp, devno, ATA_UDMA5);
852 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
853 return;
854 }
855 }
856 if (!ATAPI_DEVICE(scp, device) && udmamode >=4 &&
857 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
845 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
846 if (bootverbose)
847 ata_printf(scp, device,
848 "%s setting UDMA5 on HighPoint chip\n",
849 (error) ? "failed" : "success");
850 if (!error) {
851 hpt_timing(scp, devno, ATA_UDMA5);
852 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
853 return;
854 }
855 }
856 if (!ATAPI_DEVICE(scp, device) && udmamode >=4 &&
857 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
858 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
858 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
859 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
860 if (bootverbose)
861 ata_printf(scp, device,
862 "%s setting UDMA4 on HighPoint chip\n",
863 (error) ? "failed" : "success");
864 if (!error) {
865 hpt_timing(scp, devno, ATA_UDMA4);
866 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
867 return;
868 }
869 }
870 if (!ATAPI_DEVICE(scp, device) && udmamode >= 2) {
859 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
860 if (bootverbose)
861 ata_printf(scp, device,
862 "%s setting UDMA4 on HighPoint chip\n",
863 (error) ? "failed" : "success");
864 if (!error) {
865 hpt_timing(scp, devno, ATA_UDMA4);
866 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
867 return;
868 }
869 }
870 if (!ATAPI_DEVICE(scp, device) && udmamode >= 2) {
871 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
871 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
872 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
873 if (bootverbose)
874 ata_printf(scp, device,
875 "%s setting UDMA2 on HighPoint chip\n",
876 (error) ? "failed" : "success");
877 if (!error) {
878 hpt_timing(scp, devno, ATA_UDMA2);
879 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
880 return;
881 }
882 }
883 if (!ATAPI_DEVICE(scp, device) && wdmamode >= 2 && apiomode >= 4) {
872 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
873 if (bootverbose)
874 ata_printf(scp, device,
875 "%s setting UDMA2 on HighPoint chip\n",
876 (error) ? "failed" : "success");
877 if (!error) {
878 hpt_timing(scp, devno, ATA_UDMA2);
879 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
880 return;
881 }
882 }
883 if (!ATAPI_DEVICE(scp, device) && wdmamode >= 2 && apiomode >= 4) {
884 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
884 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
885 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
886 if (bootverbose)
887 ata_printf(scp, device,
888 "%s setting WDMA2 on HighPoint chip\n",
889 (error) ? "failed" : "success");
890 if (!error) {
891 hpt_timing(scp, devno, ATA_WDMA2);
892 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
893 return;
894 }
895 }
885 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
886 if (bootverbose)
887 ata_printf(scp, device,
888 "%s setting WDMA2 on HighPoint chip\n",
889 (error) ? "failed" : "success");
890 if (!error) {
891 hpt_timing(scp, devno, ATA_WDMA2);
892 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
893 return;
894 }
895 }
896 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
897 ata_pio2mode(apiomode),
896 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
897 ATA_PIO0 + apiomode,
898 ATA_C_F_SETXFER, ATA_WAIT_READY);
899 if (bootverbose)
900 ata_printf(scp, device, "%s setting PIO%d on HighPoint chip\n",
901 (error) ? "failed" : "success",
902 (apiomode >= 0) ? apiomode : 0);
898 ATA_C_F_SETXFER, ATA_WAIT_READY);
899 if (bootverbose)
900 ata_printf(scp, device, "%s setting PIO%d on HighPoint chip\n",
901 (error) ? "failed" : "success",
902 (apiomode >= 0) ? apiomode : 0);
903 hpt_timing(scp, devno, ata_pio2mode(apiomode));
904 scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
903 hpt_timing(scp, devno, ATA_PIO0 + apiomode);
904 scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode;
905 return;
906
907 default: /* unknown controller chip */
908 /* better not try generic DMA on ATAPI devices it almost never works */
909 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
910 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
911 break;
912

--- 4 unchanged lines hidden (view full) ---

917 ((device==ATA_MASTER) ?
918 ATA_BMSTAT_DMA_MASTER : ATA_BMSTAT_DMA_SLAVE))) {
919 scp->mode[ATA_DEV(device)] = ATA_DMA;
920 return;
921 }
922
923 /* well, we have no support for this, but try anyways */
924 if ((wdmamode >= 2 && apiomode >= 4) && scp->r_bmio) {
905 return;
906
907 default: /* unknown controller chip */
908 /* better not try generic DMA on ATAPI devices it almost never works */
909 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
910 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
911 break;
912

--- 4 unchanged lines hidden (view full) ---

917 ((device==ATA_MASTER) ?
918 ATA_BMSTAT_DMA_MASTER : ATA_BMSTAT_DMA_SLAVE))) {
919 scp->mode[ATA_DEV(device)] = ATA_DMA;
920 return;
921 }
922
923 /* well, we have no support for this, but try anyways */
924 if ((wdmamode >= 2 && apiomode >= 4) && scp->r_bmio) {
925 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
925 error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
926 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
927 if (bootverbose)
928 ata_printf(scp, device,
929 "%s setting WDMA2 on generic chip\n",
930 (error) ? "failed" : "success");
931 if (!error) {
932 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
933 return;
934 }
935 }
936 }
926 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
927 if (bootverbose)
928 ata_printf(scp, device,
929 "%s setting WDMA2 on generic chip\n",
930 (error) ? "failed" : "success");
931 if (!error) {
932 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
933 return;
934 }
935 }
936 }
937 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
938 ata_pio2mode(apiomode), ATA_C_F_SETXFER,ATA_WAIT_READY);
937 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, ATA_PIO0 + apiomode,
938 ATA_C_F_SETXFER,ATA_WAIT_READY);
939 if (bootverbose)
940 ata_printf(scp, device, "%s setting PIO%d on generic chip\n",
941 (error) ? "failed" : "success", apiomode < 0 ? 0 : apiomode);
942 if (!error)
939 if (bootverbose)
940 ata_printf(scp, device, "%s setting PIO%d on generic chip\n",
941 (error) ? "failed" : "success", apiomode < 0 ? 0 : apiomode);
942 if (!error)
943 scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
943 scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode;
944 else {
945 if (bootverbose)
946 ata_printf(scp, device, "using PIO mode set by BIOS\n");
947 scp->mode[ATA_DEV(device)] = ATA_PIO;
948 }
949}
950
951int

--- 218 unchanged lines hidden --- 		944 else {
945 if (bootverbose)
946 ata_printf(scp, device, "using PIO mode set by BIOS\n");
947 scp->mode[ATA_DEV(device)] = ATA_PIO;
948 }
949}
950
951int

--- 218 unchanged lines hidden ---