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ata-dma.c (67057) ata-dma.c (67058)
1/*-
2 * Copyright (c) 1998,1999,2000 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999,2000 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 67057 2000-10-13 10:54:47Z sos $
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 67058 2000-10-13 11:21:27Z sos $
29 */
30
31#include "pci.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/bio.h>
35#include <sys/malloc.h>
36#include <sys/bus.h>

--- 36 unchanged lines hidden (view full) ---

73 return dmatab;
74}
75
76void
77ata_dmainit(struct ata_softc *scp, int device,
78 int apiomode, int wdmamode, int udmamode)
79{
80 device_t parent = device_get_parent(scp->dev);
29 */
30
31#include "pci.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/bio.h>
35#include <sys/malloc.h>
36#include <sys/bus.h>

--- 36 unchanged lines hidden (view full) ---

73 return dmatab;
74}
75
76void
77ata_dmainit(struct ata_softc *scp, int device,
78 int apiomode, int wdmamode, int udmamode)
79{
80 device_t parent = device_get_parent(scp->dev);
81 int devno = (scp->unit << 1) + ATA_DEV(device);
81 int devno = (scp->channel << 1) + ATA_DEV(device);
82 int error;
83
84 /* set our most pessimistic default mode */
85 scp->mode[ATA_DEV(device)] = ATA_PIO;
86
87 if (!scp->bmaddr)
88 return;
89
90 /* if simplex controller, only allow DMA on primary channel */
82 int error;
83
84 /* set our most pessimistic default mode */
85 scp->mode[ATA_DEV(device)] = ATA_PIO;
86
87 if (!scp->bmaddr)
88 return;
89
90 /* if simplex controller, only allow DMA on primary channel */
91 if (scp->unit == 1) {
91 if (scp->channel == 1) {
92 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) &
93 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
94 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) {
95 ata_printf(scp, device, "simplex device, DMA on primary only\n");
96 return;
97 }
98 }
99

--- 98 unchanged lines hidden (view full) ---

198 pci_read_config(parent, 0x48, 4) & ~(1 << devno), 4);
199 /* FALLTHROUGH */
200
201 case 0x70108086: /* Intel PIIX3 */
202 if (wdmamode >= 2 && apiomode >= 4) {
203 int32_t mask40, new40, mask44, new44;
204
205 /* if SITRE not set doit for both channels */
92 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) &
93 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
94 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) {
95 ata_printf(scp, device, "simplex device, DMA on primary only\n");
96 return;
97 }
98 }
99

--- 98 unchanged lines hidden (view full) ---

198 pci_read_config(parent, 0x48, 4) & ~(1 << devno), 4);
199 /* FALLTHROUGH */
200
201 case 0x70108086: /* Intel PIIX3 */
202 if (wdmamode >= 2 && apiomode >= 4) {
203 int32_t mask40, new40, mask44, new44;
204
205 /* if SITRE not set doit for both channels */
206 if (!((pci_read_config(parent, 0x40, 4)>>(scp->unit<<8))&0x4000)){
206 if (!((pci_read_config(parent,0x40,4)>>(scp->channel<<8))&0x4000)) {
207 new40 = pci_read_config(parent, 0x40, 4);
208 new44 = pci_read_config(parent, 0x44, 4);
209 if (!(new40 & 0x00004000)) {
210 new44 &= ~0x0000000f;
211 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8);
212 }
213 if (!(new40 & 0x40000000)) {
214 new44 &= ~0x000000f0;

--- 20 unchanged lines hidden (view full) ---

235 new44 = 0;
236 }
237 else {
238 mask40 = 0x000000f0;
239 new40 = 0x00000070;
240 mask44 = 0x0000000f;
241 new44 = 0x0000000b;
242 }
207 new40 = pci_read_config(parent, 0x40, 4);
208 new44 = pci_read_config(parent, 0x44, 4);
209 if (!(new40 & 0x00004000)) {
210 new44 &= ~0x0000000f;
211 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8);
212 }
213 if (!(new40 & 0x40000000)) {
214 new44 &= ~0x000000f0;

--- 20 unchanged lines hidden (view full) ---

235 new44 = 0;
236 }
237 else {
238 mask40 = 0x000000f0;
239 new40 = 0x00000070;
240 mask44 = 0x0000000f;
241 new44 = 0x0000000b;
242 }
243 if (scp->unit) {
243 if (scp->channel) {
244 mask40 <<= 16;
245 new40 <<= 16;
246 mask44 <<= 4;
247 new44 <<= 4;
248 }
249 pci_write_config(parent, 0x40,
250 (pci_read_config(parent, 0x40, 4) & ~mask40)|
251 new40, 4);

--- 7 unchanged lines hidden (view full) ---

259 /* we could set PIO mode timings, but we assume the BIOS did that */
260 break;
261
262 case 0x12308086: /* Intel PIIX */
263 if (wdmamode >= 2 && apiomode >= 4) {
264 int32_t word40;
265
266 word40 = pci_read_config(parent, 0x40, 4);
244 mask40 <<= 16;
245 new40 <<= 16;
246 mask44 <<= 4;
247 new44 <<= 4;
248 }
249 pci_write_config(parent, 0x40,
250 (pci_read_config(parent, 0x40, 4) & ~mask40)|
251 new40, 4);

--- 7 unchanged lines hidden (view full) ---

259 /* we could set PIO mode timings, but we assume the BIOS did that */
260 break;
261
262 case 0x12308086: /* Intel PIIX */
263 if (wdmamode >= 2 && apiomode >= 4) {
264 int32_t word40;
265
266 word40 = pci_read_config(parent, 0x40, 4);
267 word40 >>= scp->unit * 16;
267 word40 >>= scp->channel * 16;
268
269 /* Check for timing config usable for DMA on controller */
270 if (!((word40 & 0x3300) == 0x2300 &&
271 ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1))
272 break;
273
274 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
275 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);

--- 171 unchanged lines hidden (view full) ---

447 u_int8_t umode;
448
449 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
450 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
451 if (bootverbose)
452 ata_printf(scp, device, "%s setting UDMA5 on CMD chip\n",
453 (error) ? "failed" : "success");
454 if (!error) {
268
269 /* Check for timing config usable for DMA on controller */
270 if (!((word40 & 0x3300) == 0x2300 &&
271 ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1))
272 break;
273
274 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
275 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);

--- 171 unchanged lines hidden (view full) ---

447 u_int8_t umode;
448
449 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
450 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
451 if (bootverbose)
452 ata_printf(scp, device, "%s setting UDMA5 on CMD chip\n",
453 (error) ? "failed" : "success");
454 if (!error) {
455 umode = pci_read_config(parent, scp->unit ? 0x7b : 0x73, 1);
455 umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1);
456 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
457 umode |= (device == ATA_MASTER ? 0x05 : 0x0a);
456 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
457 umode |= (device == ATA_MASTER ? 0x05 : 0x0a);
458 pci_write_config(parent, scp->unit ? 0x7b : 0x73, umode, 1);
458 pci_write_config(parent, scp->channel ? 0x7b : 0x73, umode, 1);
459 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
460 return;
461 }
462 }
463 /* FALLTHROUGH */
464
465 case 0x06481095: /* CMD 648 ATA66 controller */
466 if (udmamode >= 4) {
467 u_int8_t umode;
468
469 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
470 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
471 if (bootverbose)
472 ata_printf(scp, device, "%s setting UDMA4 on CMD chip\n",
473 (error) ? "failed" : "success");
474 if (!error) {
459 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
460 return;
461 }
462 }
463 /* FALLTHROUGH */
464
465 case 0x06481095: /* CMD 648 ATA66 controller */
466 if (udmamode >= 4) {
467 u_int8_t umode;
468
469 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
470 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
471 if (bootverbose)
472 ata_printf(scp, device, "%s setting UDMA4 on CMD chip\n",
473 (error) ? "failed" : "success");
474 if (!error) {
475 umode = pci_read_config(parent, scp->unit ? 0x7b : 0x73, 1);
475 umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1);
476 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
477 umode |= (device == ATA_MASTER ? 0x15 : 0x4a);
476 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
477 umode |= (device == ATA_MASTER ? 0x15 : 0x4a);
478 pci_write_config(parent, scp->unit ? 0x7b : 0x73, umode, 1);
478 pci_write_config(parent, scp->channel ? 0x7b : 0x73, umode, 1);
479 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
480 return;
481 }
482 }
483 if (udmamode >= 2) {
484 u_int8_t umode;
485
486 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
487 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
488 if (bootverbose)
489 ata_printf(scp, device, "%s setting UDMA2 on CMD chip\n",
490 (error) ? "failed" : "success");
491 if (!error) {
479 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
480 return;
481 }
482 }
483 if (udmamode >= 2) {
484 u_int8_t umode;
485
486 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
487 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
488 if (bootverbose)
489 ata_printf(scp, device, "%s setting UDMA2 on CMD chip\n",
490 (error) ? "failed" : "success");
491 if (!error) {
492 umode = pci_read_config(parent, scp->unit ? 0x7b : 0x73, 1);
492 umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1);
493 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
494 umode |= (device == ATA_MASTER ? 0x11 : 0x42);
493 umode &= ~(device == ATA_MASTER ? 0x35 : 0xca);
494 umode |= (device == ATA_MASTER ? 0x11 : 0x42);
495 pci_write_config(parent, scp->unit ? 0x7b : 0x73, umode, 1);
495 pci_write_config(parent, scp->channel ? 0x7b : 0x73, umode, 1);
496 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
497 return;
498 }
499 }
500 /* make sure eventual UDMA mode from the BIOS is disabled */
496 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
497 return;
498 }
499 }
500 /* make sure eventual UDMA mode from the BIOS is disabled */
501 pci_write_config(parent, scp->unit ? 0x7b : 0x73,
502 pci_read_config(parent, scp->unit ? 0x7b : 0x73, 1) &
501 pci_write_config(parent, scp->channel ? 0x7b : 0x73,
502 pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1) &
503 ~(device == ATA_MASTER ? 0x35 : 0xca), 1);
504 /* FALLTHROUGH */
505
506 case 0x06461095: /* CMD 646 ATA controller */
507 if (wdmamode >= 2 && apiomode >= 4) {
508 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
509 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
510 if (bootverbose)

--- 14 unchanged lines hidden (view full) ---

525 if (wdmamode >= 2 && apiomode >= 4) {
526 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
527 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
528 if (bootverbose)
529 ata_printf(scp, device,
530 "%s setting WDMA2 on Cypress chip\n",
531 error ? "failed" : "success");
532 if (!error) {
503 ~(device == ATA_MASTER ? 0x35 : 0xca), 1);
504 /* FALLTHROUGH */
505
506 case 0x06461095: /* CMD 646 ATA controller */
507 if (wdmamode >= 2 && apiomode >= 4) {
508 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
509 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
510 if (bootverbose)

--- 14 unchanged lines hidden (view full) ---

525 if (wdmamode >= 2 && apiomode >= 4) {
526 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
527 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
528 if (bootverbose)
529 ata_printf(scp, device,
530 "%s setting WDMA2 on Cypress chip\n",
531 error ? "failed" : "success");
532 if (!error) {
533 pci_write_config(scp->dev, scp->unit ? 0x4e : 0x4c, 0x2020, 2);
533 pci_write_config(scp->dev, scp->channel ? 0x4e:0x4c, 0x2020, 2);
534 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
535 return;
536 }
537 }
538 /* we could set PIO mode timings, but we assume the BIOS did that */
539 break;
540
541 case 0x01021078: /* Cyrix 5530 ATA33 controller */

--- 58 unchanged lines hidden (view full) ---

600 if (wdmamode >= 2 && apiomode >= 4) {
601 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
602 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
603 if (bootverbose)
604 ata_printf(scp, device,
605 "%s setting WDMA2 on ServerWorks chip\n",
606 (error) ? "failed" : "success");
607 if (!error) {
534 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
535 return;
536 }
537 }
538 /* we could set PIO mode timings, but we assume the BIOS did that */
539 break;
540
541 case 0x01021078: /* Cyrix 5530 ATA33 controller */

--- 58 unchanged lines hidden (view full) ---

600 if (wdmamode >= 2 && apiomode >= 4) {
601 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
602 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
603 if (bootverbose)
604 ata_printf(scp, device,
605 "%s setting WDMA2 on ServerWorks chip\n",
606 (error) ? "failed" : "success");
607 if (!error) {
608 int offset = (scp->unit * 2) + (device == ATA_MASTER);
608 int offset = (scp->channel * 2) + (device == ATA_MASTER);
609 int word44 = pci_read_config(parent, 0x44, 4);
610
611 pci_write_config(parent, 0x54,
612 pci_read_config(parent, 0x54, 1) &
613 ~(0x01 << devno), 1);
614 word44 &= ~(0xff << (offset << 8));
615 word44 |= (0x20 << (offset << 8));
616 pci_write_config(parent, 0x44, 0x20, 4);

--- 10 unchanged lines hidden (view full) ---

627 case 0x0d30105a: /* Promise OEM ATA100 controllers */
628 /* the Promise can only do DMA on ATA disks not on ATAPI devices */
629 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
630 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
631 break;
632
633 if (udmamode >= 5 &&
634 (scp->chiptype == 0x4d30105a || scp->chiptype == 0x0d30105a) &&
609 int word44 = pci_read_config(parent, 0x44, 4);
610
611 pci_write_config(parent, 0x54,
612 pci_read_config(parent, 0x54, 1) &
613 ~(0x01 << devno), 1);
614 word44 &= ~(0xff << (offset << 8));
615 word44 |= (0x20 << (offset << 8));
616 pci_write_config(parent, 0x44, 0x20, 4);

--- 10 unchanged lines hidden (view full) ---

627 case 0x0d30105a: /* Promise OEM ATA100 controllers */
628 /* the Promise can only do DMA on ATA disks not on ATAPI devices */
629 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
630 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
631 break;
632
633 if (udmamode >= 5 &&
634 (scp->chiptype == 0x4d30105a || scp->chiptype == 0x0d30105a) &&
635 !(pci_read_config(parent, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) {
635 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
636 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
637 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
638 if (bootverbose)
639 ata_printf(scp, device,
640 "%s setting UDMA5 on Promise chip\n",
641 (error) ? "failed" : "success");
642 if (!error) {
643 promise_timing(scp, devno, ATA_UDMA5);
644 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
645 return;
646 }
647 }
648 if (udmamode >= 4 && (scp->chiptype == 0x4d38105a ||
649 scp->chiptype == 0x4d30105a || scp->chiptype == 0x0d30105a) &&
636 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
637 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
638 if (bootverbose)
639 ata_printf(scp, device,
640 "%s setting UDMA5 on Promise chip\n",
641 (error) ? "failed" : "success");
642 if (!error) {
643 promise_timing(scp, devno, ATA_UDMA5);
644 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
645 return;
646 }
647 }
648 if (udmamode >= 4 && (scp->chiptype == 0x4d38105a ||
649 scp->chiptype == 0x4d30105a || scp->chiptype == 0x0d30105a) &&
650 !(pci_read_config(parent, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) {
650 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
651 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
652 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
653 if (bootverbose)
654 ata_printf(scp, device,
655 "%s setting UDMA4 on Promise chip\n",
656 (error) ? "failed" : "success");
657 if (!error) {
658 promise_timing(scp, devno, ATA_UDMA4);

--- 41 unchanged lines hidden (view full) ---

700
701 case 0x00041103: /* HighPoint HPT366/368/370 controllers */
702 /* no ATAPI devices for now */
703 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
704 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
705 break;
706
707 if (udmamode >=5 && pci_get_revid(parent) >= 0x03 &&
651 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
652 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
653 if (bootverbose)
654 ata_printf(scp, device,
655 "%s setting UDMA4 on Promise chip\n",
656 (error) ? "failed" : "success");
657 if (!error) {
658 promise_timing(scp, devno, ATA_UDMA4);

--- 41 unchanged lines hidden (view full) ---

700
701 case 0x00041103: /* HighPoint HPT366/368/370 controllers */
702 /* no ATAPI devices for now */
703 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
704 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
705 break;
706
707 if (udmamode >=5 && pci_get_revid(parent) >= 0x03 &&
708 !(pci_read_config(parent, 0x5a, 1) & (scp->unit ? 0x01 : 0x02))) {
708 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
709 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
710 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
711 if (bootverbose)
712 ata_printf(scp, device,
713 "%s setting UDMA5 on HighPoint chip\n",
714 (error) ? "failed" : "success");
715 if (!error) {
716 hpt_timing(scp, devno, ATA_UDMA5);
717 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
718 return;
719 }
720 }
721 if (udmamode >=4 &&
709 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
710 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
711 if (bootverbose)
712 ata_printf(scp, device,
713 "%s setting UDMA5 on HighPoint chip\n",
714 (error) ? "failed" : "success");
715 if (!error) {
716 hpt_timing(scp, devno, ATA_UDMA5);
717 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
718 return;
719 }
720 }
721 if (udmamode >=4 &&
722 !(pci_read_config(parent, 0x5a, 1) & (scp->unit ? 0x01 : 0x02))) {
722 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
723 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
724 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
725 if (bootverbose)
726 ata_printf(scp, device,
727 "%s setting UDMA4 on HighPoint chip\n",
728 (error) ? "failed" : "success");
729 if (!error) {
730 hpt_timing(scp, devno, ATA_UDMA4);

--- 333 unchanged lines hidden --- 		723 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
724 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
725 if (bootverbose)
726 ata_printf(scp, device,
727 "%s setting UDMA4 on HighPoint chip\n",
728 (error) ? "failed" : "success");
729 if (!error) {
730 hpt_timing(scp, devno, ATA_UDMA4);

--- 333 unchanged lines hidden ---