1/*- 2 * Copyright (c) 1998,1999,2000 S�ren Schmidt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * |
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 64479 2000-08-10 07:34:49Z sos $ |
29 */ 30 31#include "pci.h" 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/bio.h> 35#include <sys/malloc.h> 36#include <sys/bus.h> --- 78 unchanged lines hidden (view full) --- 115 "%s setting up UDMA5 mode on ICH2 chip\n", 116 (error) ? "failed" : "success"); 117 if (!error) { 118 mask48 = (1 << devno) + (3 << (16 + (devno << 2))); 119 new48 = (1 << devno) + (1 << (16 + (devno << 2))); 120 pci_write_config(parent, 0x48, 121 (pci_read_config(parent, 0x48, 4) & 122 ~mask48) | new48, 4); |
123 pci_write_config(parent, 0x54, word54 | (0x1000<<devno), 2); |
124 scp->mode[ATA_DEV(device)] = ATA_UDMA5; 125 return; 126 } 127 } 128 } |
129 /* make sure eventual ATA100 mode from the BIOS is disabled */ 130 pci_write_config(parent, 0x54, 131 pci_read_config(parent, 0x54, 2) & ~(0x1000<<devno),2); |
132 /* FALLTHROUGH */ 133 134 case 0x24118086: /* Intel ICH */ 135 if (udmamode >= 4) { 136 int32_t mask48, new48; 137 int16_t word54; 138 139 word54 = pci_read_config(parent, 0x54, 2); --- 12 unchanged lines hidden (view full) --- 152 (pci_read_config(parent, 0x48, 4) & 153 ~mask48) | new48, 4); 154 pci_write_config(parent, 0x54, word54 | (1 << devno), 2); 155 scp->mode[ATA_DEV(device)] = ATA_UDMA4; 156 return; 157 } 158 } 159 } |
160 /* make sure eventual ATA66 mode from the BIOS is disabled */ 161 pci_write_config(parent, 0x54, 162 pci_read_config(parent, 0x54, 2) & ~(1 << devno), 2); |
163 /* FALLTHROUGH */ 164 165 case 0x71118086: /* Intel PIIX4 */ 166 case 0x71998086: /* Intel PIIX4e */ 167 case 0x24218086: /* Intel ICH0 */ 168 if (udmamode >= 2) { 169 int32_t mask48, new48; 170 --- 10 unchanged lines hidden (view full) --- 181 new48 = (1 << devno) + (2 << (16 + (devno << 2))); 182 pci_write_config(parent, 0x48, 183 (pci_read_config(parent, 0x48, 4) & 184 ~mask48) | new48, 4); 185 scp->mode[ATA_DEV(device)] = ATA_UDMA2; 186 return; 187 } 188 } |
189 /* make sure eventual ATA33 mode from the BIOS is disabled */ 190 pci_write_config(parent, 0x48, 191 pci_read_config(parent, 0x48, 4) & ~(1 << devno), 4); |
192 /* FALLTHROUGH */ 193 194 case 0x70108086: /* Intel PIIX3 */ 195 if (wdmamode >= 2 && apiomode >= 4) { 196 int32_t mask40, new40, mask44, new44; 197 198 /* if SITRE not set doit for both channels */ 199 if (!((pci_read_config(parent, 0x40, 4)>>(scp->unit<<8))&0x4000)){ --- 701 unchanged lines hidden --- |