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< * $FreeBSD: head/sys/dev/ata/ata-dma.c 56988 2000-02-04 10:20:22Z sos $
---
> * $FreeBSD: head/sys/dev/ata/ata-dma.c 57325 2000-02-18 20:57:33Z sos $
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< #include "apm.h"
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< #if NAPM > 0
< #include <machine/apm_bios.h>
< #endif
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> device_t parent = device_get_parent(scp->dev);
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< pci_write_config(scp->dev, 0x48,
< (pci_read_config(scp->dev, 0x48, 4) &
---
> pci_write_config(parent, 0x48,
> (pci_read_config(parent, 0x48, 4) &
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< if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){
< new40 = pci_read_config(scp->dev, 0x40, 4);
< new44 = pci_read_config(scp->dev, 0x44, 4);
---
> if (!((pci_read_config(parent, 0x40, 4)>>(scp->unit<<8))&0x4000)){
> new40 = pci_read_config(parent, 0x40, 4);
> new44 = pci_read_config(parent, 0x44, 4);
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< pci_write_config(scp->dev, 0x40, new40, 4);
< pci_write_config(scp->dev, 0x44, new44, 4);
---
> pci_write_config(parent, 0x40, new40, 4);
> pci_write_config(parent, 0x44, new44, 4);
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< pci_write_config(scp->dev, 0x40,
< (pci_read_config(scp->dev, 0x40, 4) & ~mask40)|
---
> pci_write_config(parent, 0x40,
> (pci_read_config(parent, 0x40, 4) & ~mask40)|
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< pci_write_config(scp->dev, 0x44,
< (pci_read_config(scp->dev, 0x44, 4) & ~mask44)|
---
> pci_write_config(parent, 0x44,
> (pci_read_config(parent, 0x44, 4) & ~mask44)|
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< word40 = pci_read_config(scp->dev, 0x40, 4);
---
> word40 = pci_read_config(parent, 0x40, 4);
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< int32_t word54 = pci_read_config(scp->dev, 0x54, 4);
---
> int32_t word54 = pci_read_config(parent, 0x54, 4);
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< pci_write_config(scp->dev, 0x54, word54, 4);
< pci_write_config(scp->dev, 0x53,
< pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
---
> pci_write_config(parent, 0x54, word54, 4);
> pci_write_config(parent, 0x53,
> pci_read_config(parent, 0x53, 1) | 0x03, 1);
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< pci_write_config(scp->dev, 0x53,
< pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
---
> pci_write_config(parent, 0x53,
> pci_read_config(parent, 0x53, 1) | 0x03, 1);
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< pci_write_config(scp->dev, 0x53 - devno, 0xe8, 1);
---
> pci_write_config(parent, 0x53 - devno, 0xe8, 1);
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< pci_write_config(scp->dev, 0x53 - devno, 0xea, 1);
---
> pci_write_config(parent, 0x53 - devno, 0xea, 1);
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< pci_write_config(scp->dev, 0x53 - devno, 0xc3, 1);
---
> pci_write_config(parent, 0x53 - devno, 0xc3, 1);
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< pci_write_config(scp->dev, 0x53 - devno, 0xc0, 1);
---
> pci_write_config(parent, 0x53 - devno, 0xc0, 1);
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< pci_write_config(scp->dev, 0x53 - devno, 0x82, 1);
< pci_write_config(scp->dev, 0x4b - devno, 0x31, 1);
---
> pci_write_config(parent, 0x53 - devno, 0x82, 1);
> pci_write_config(parent, 0x4b - devno, 0x31, 1);
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< pci_write_config(scp->dev, 0x40 + (devno << 1), 0xa301, 2);
---
> pci_write_config(parent, 0x40 + (devno << 1), 0xa301, 2);
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< pci_write_config(scp->dev, 0x40 + (devno << 1), 0x0301, 2);
---
> pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2);
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> case 0x06461095: /* CMD 646 ATA controller */
> if (wdmamode >= 2 && apiomode >= 4) {
> error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
> ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
> if (bootverbose)
> ata_printf(scp, device,
> "%s setting up WDMA2 mode on CMD646 chip\n",
> error ? "failed" : "success");
> if (!error) {
> int32_t offset = (devno < 3) ? (devno << 1) : 7;
>
> pci_write_config(parent, 0x54 + offset, 0x3f, 1);
> scp->mode[ATA_DEV(device)] = ATA_WDMA2;
> return;
> }
> }
> /* we could set PIO mode timings, but we assume the BIOS did that */
> break;
>
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< !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) {
---
> !(pci_read_config(parent, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) {
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< if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) {
---
> if (udmamode >=4 && !(pci_read_config(parent, 0x5a, 1) & 0x2)) {
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< pci_write_config(scp->dev, 0x60 + (devno << 2), timing, 4);
---
> pci_write_config(device_get_parent(scp->dev), 0x60 + (devno<<2), timing, 4);
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> device_t parent = device_get_parent(scp->dev);
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< switch (pci_read_config(scp->dev, 0x41 + (devno << 2), 1)) {
---
> switch (pci_read_config(parent, 0x41 + (devno << 2), 1)) {
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< pci_write_config(scp->dev, 0x40 + (devno << 2) , (timing & ~0x80000000), 4);
---
> pci_write_config(parent, 0x40 + (devno << 2) , (timing & ~0x80000000), 4);