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ata-dma.c (45116) ata-dma.c (45150)
1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $Id: ata-dma.c,v 1.1 1999/03/28 18:57:19 sos Exp $
28 * $Id: ata-dma.c,v 1.2 1999/03/29 14:24:42 sos Exp $
29 */
30
31#include "ata.h"
29 */
30
31#include "ata.h"
32#if NATA > 0
33#include "pci.h"
32#include "pci.h"
34#if NPCI > 0
33#if NATA > 0
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/buf.h>
39#include <sys/malloc.h>
40#include <vm/vm.h>
41#include <vm/pmap.h>
42#include <pci/pcivar.h>
43#include <pci/pcireg.h>
44#include <dev/ata/ata-all.h>
45
46/* misc defines */
47#define MIN(a,b) ((a)>(b)?(b):(a))
48
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/kernel.h>
37#include <sys/buf.h>
38#include <sys/malloc.h>
39#include <vm/vm.h>
40#include <vm/pmap.h>
41#include <pci/pcivar.h>
42#include <pci/pcireg.h>
43#include <dev/ata/ata-all.h>
44
45/* misc defines */
46#define MIN(a,b) ((a)>(b)?(b):(a))
47
48#if NPCI > 0
49
49int32_t
50ata_dmainit(struct ata_softc *scp, int32_t device,
51 int32_t apiomode, int32_t wdmamode, int32_t udmamode)
52{
53 int32_t type, devno, error;
54 void *dmatab;
55
56 if (!scp->bmaddr)
57 return -1;
58#ifdef ATA_DEBUGDMA
59 printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n",
60 scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr);
61#endif
62
63 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT)))
64 return -1;
65
66 if (((int)dmatab>>PAGE_SHIFT)^(((int)dmatab+PAGE_SIZE-1)>>PAGE_SHIFT)) {
67 printf("ata_dmainit: dmatab crosses page boundary, no DMA\n");
68 free(dmatab, M_DEVBUF);
69 return -1;
70 }
71 scp->dmatab[device ? 1 : 0] = dmatab;
72
73 type = pci_conf_read(scp->tag, PCI_ID_REG);
74
75 switch(type) {
76
77 case 0x71118086: /* Intel PIIX4 */
78 if (udmamode >= 2) {
79 int32_t mask48, new48;
80
81 printf("ata%d: %s: settting up UDMA2 mode on PIIX4 chip ",
82 scp->lun, (device) ? "slave" : "master");
83 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
84 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
85 if (error) {
86 printf("failed\n");
87 break;
88 }
89 printf("OK\n");
90 devno = (scp->unit << 1) + (device) ? 1 : 0;
91 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
92 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
93 pci_conf_write(scp->tag, 0x48,
94 (pci_conf_read(scp->tag, 0x48) & ~mask48) | new48);
95 return 0;
96 }
97 /* FALLTHROUGH */
98
99 case 0x70108086: /* Intel PIIX3 */
100 if (wdmamode >= 2 && apiomode >= 4) {
101 int32_t mask40, new40, mask44, new44;
102
103 /* if SITRE not set doit for both channels */
104 if (!((pci_conf_read(scp->tag, 0x40) >> (scp->unit<<8)) & 0x4000)) {
105 new40 = pci_conf_read(scp->tag, 0x40);
106 new44 = pci_conf_read(scp->tag, 0x44);
107 if (!(new40 & 0x00004000)) {
108 new44 &= ~0x0000000f;
109 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8);
110 }
111 if (!(new40 & 0x40000000)) {
112 new44 &= ~0x000000f0;
113 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20);
114 }
115 new40 |= 0x40004000;
116 pci_conf_write(scp->tag, 0x40, new40);
117 pci_conf_write(scp->tag, 0x44, new44);
118 }
119 printf("ata%d: %s: settting up WDMA2 mode on PIIX3/4 chip ",
120 scp->lun, (device) ? "slave" : "master");
121 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
122 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
123 if (error) {
124 printf("failed\n");
125 break;
126 }
127 printf("OK\n");
128 if (device == ATA_MASTER) {
129 mask40 = 0x0000330f;
130 new40 = 0x00002307;
131 mask44 = 0;
132 new44 = 0;
133 } else {
134 mask40 = 0x000000f0;
135 new40 = 0x00000070;
136 mask44 = 0x0000000f;
137 new44 = 0x0000000b;
138 }
139 if (scp->unit) {
140 mask40 <<= 16;
141 new40 <<= 16;
142 mask44 <<= 4;
143 new44 <<= 4;
144 }
145 pci_conf_write(scp->tag, 0x40,
146 (pci_conf_read(scp->tag, 0x40) & ~mask40) | new40);
147 pci_conf_write(scp->tag, 0x44,
148 (pci_conf_read(scp->tag, 0x44) & ~mask44) | new44);
149 return 0;
150 }
151 break;
152
153 case 0x12308086: /* Intel PIIX */
154 /* probably not worth the trouble */
155 break;
156
157 case 0x4d33105a: /* Promise Ultra/33 / FastTrack controllers */
158 devno = (scp->unit << 1) + (device) ? 1 : 0;
159 if (udmamode >=2) {
160 printf("ata%d: %s: settting up UDMA2 mode on Promise chip ",
161 scp->lun, (device) ? "slave" : "master");
162 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
163 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
164 if (error) {
165 printf("failed\n");
166 break;
167 }
168 printf("OK\n");
169 outb(scp->bmaddr + 0x1f, inb(scp->bmaddr + 0x1f) | 0x01);
170 pci_conf_write(scp->tag, 0x60 + (devno << 2), 0x004127f3);
171 return 0;
172 }
173 else if (wdmamode >= 2 && apiomode >= 4) {
174 printf("ata%d: %s: settting up WDMA2 mode on Promise chip ",
175 scp->lun, (device) ? "slave" : "master");
176 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
177 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
178 if (error) {
179 printf("failed\n");
180 break;
181 }
182 printf("OK\n");
183 outb(scp->bmaddr + 0x1f, inb(scp->bmaddr + 0x1f) | 0x01);
184 pci_conf_write(scp->tag, 0x60 + (devno << 2), 0x004367f3);
185 return 0;
186 }
187 else {
188 printf("ata%d: %s: settting up PIO mode on Promise chip OK\n",
189 scp->lun, (device) ? "slave" : "master");
190 pci_conf_write(scp->tag, 0x60 + (devno << 2), 0x004fe924);
191 }
192 break;
193
194 case 0x522910b9: /* AcerLabs Aladdin IV/V */
195 if (udmamode >=2) {
196 int32_t word54 = pci_conf_read(scp->tag, 0x54);
197
198 printf("ata%d: %s: settting up UDMA2 mode on Aladdin chip ",
199 scp->lun, (device) ? "slave" : "master");
200 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
201 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
202 if (error) {
203 printf("failed\n");
204 break;
205 }
206 printf("OK\n");
207 word54 |= 0x5555;
208 word54 |= (0x0000000A << (16 + (scp->unit << 3) + (device << 2)));
209 pci_conf_write(scp->tag, 0x54, word54);
210 return 0;
211
212 }
213 else if (wdmamode >= 2 && apiomode >= 4) {
214 printf("ata%d: %s: settting up WDMA2 mode on Aladdin chip ",
215 scp->lun, (device) ? "slave" : "master");
216 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
217 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
218 if (error) {
219 printf("failed\n");
220 break;
221 }
222 printf("OK\n");
223 return 0;
224 }
225 break;
226
227 default: /* well, we have no support for this, but try anyways */
228 if ((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) {
229 printf("ata%d: %s: settting up generic WDMA2 mode ",
230 scp->lun, (device) ? "slave" : "master");
231 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
232 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
233 if (error) {
234 printf("failed\n");
235 break;
236 }
237 printf("OK\n");
238 return 0;
239 }
240 }
241 free(dmatab, M_DEVBUF);
242 return -1;
243}
244
245int32_t
246ata_dmasetup(struct ata_softc *scp, int32_t device,
247 int8_t *data, int32_t count, int32_t flags)
248{
249 struct ata_dmaentry *dmatab;
250 u_int32_t dma_count, dma_base;
251 int32_t i = 0;
252
253#ifdef ATA_DEBUGDMA
254 printf("ata%d: dmasetup\n", scp->lun);
255#endif
256 if (((u_int32_t)data & 1) || (count & 1))
257 return -1;
258
259 if (!count) {
260 printf("ata%d: zero length DMA transfer attempt on %s\n",
261 scp->lun, (device ? "slave" : "master"));
262 return -1;
263 }
264
265 dmatab = scp->dmatab[device ? 1 : 0];
266 dma_base = vtophys(data);
267 dma_count = MIN(count, (PAGE_SIZE - ((u_int32_t)data & PAGE_MASK)));
268 data += dma_count;
269 count -= dma_count;
270
271 while (count) {
272 dmatab[i].base = dma_base;
273 dmatab[i].count = (dma_count & 0xffff);
274 i++;
275 if (i >= ATA_DMA_ENTRIES) {
276 printf("ata%d: too many segments in DMA table for %s\n",
277 scp->lun, (device ? "slave" : "master"));
278 return -1;
279 }
280 dma_base = vtophys(data);
281 dma_count = MIN(count, PAGE_SIZE);
282 data += MIN(count, PAGE_SIZE);
283 count -= MIN(count, PAGE_SIZE);
284 }
285#ifdef ATA_DEBUGDMA
286printf("ata_dmasetup: base=%08x count%08x\n",
287 dma_base, dma_count);
288#endif
289 dmatab[i].base = dma_base;
290 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT;
291
292 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab));
293#ifdef ATA_DEBUGDMA
294printf("dmatab=%08x %08x\n", vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT));
295#endif
296 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0);
297 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) |
298 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
299 return 0;
300}
301
302void
303ata_dmastart(struct ata_softc *scp, int32_t device)
304{
305#ifdef ATA_DEBUGDMA
306 printf("ata%d: dmastart\n", scp->lun);
307#endif
308 outb(scp->bmaddr + ATA_BMCMD_PORT,
309 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
310}
311
312int32_t
313ata_dmadone(struct ata_softc *scp, int32_t device)
314{
315#ifdef ATA_DEBUGDMA
316 printf("ata%d: dmadone\n", scp->lun);
317#endif
318 outb(scp->bmaddr + ATA_BMCMD_PORT,
319 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
320 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
321}
322
323int32_t
324ata_dmastatus(struct ata_softc *scp, int32_t device)
325{
326#ifdef ATA_DEBUGDMA
327 printf("ata%d: dmastatus\n", scp->lun);
328#endif
329 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
330}
331
332#else /* NPCI > 0 */
333
334int32_t
335ata_dmainit(struct ata_softc *scp, int32_t device,
336 int32_t piomode, int32_t wdmamode, int32_t udmamode)
337{
338 return -1;
339}
340
341int32_t
342ata_dmasetup(struct ata_softc *scp, int32_t device,
343 int8_t *data, int32_t count, int32_t flags)
344{
345 return -1;
346}
347
348void
349ata_dmastart(struct ata_softc *scp, int32_t device)
350{
351}
352
353int32_t
354ata_dmadone(struct ata_softc *scp, int32_t device)
355{
356 return -1;
357}
358
359int32_t
360ata_dmastatus(struct ata_softc *scp, int32_t device)
361{
362 return -1;
363}
364
365#endif /* NPCI > 0 */
366#endif /* NATA > 0 */
367
50int32_t
51ata_dmainit(struct ata_softc *scp, int32_t device,
52 int32_t apiomode, int32_t wdmamode, int32_t udmamode)
53{
54 int32_t type, devno, error;
55 void *dmatab;
56
57 if (!scp->bmaddr)
58 return -1;
59#ifdef ATA_DEBUGDMA
60 printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n",
61 scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr);
62#endif
63
64 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT)))
65 return -1;
66
67 if (((int)dmatab>>PAGE_SHIFT)^(((int)dmatab+PAGE_SIZE-1)>>PAGE_SHIFT)) {
68 printf("ata_dmainit: dmatab crosses page boundary, no DMA\n");
69 free(dmatab, M_DEVBUF);
70 return -1;
71 }
72 scp->dmatab[device ? 1 : 0] = dmatab;
73
74 type = pci_conf_read(scp->tag, PCI_ID_REG);
75
76 switch(type) {
77
78 case 0x71118086: /* Intel PIIX4 */
79 if (udmamode >= 2) {
80 int32_t mask48, new48;
81
82 printf("ata%d: %s: settting up UDMA2 mode on PIIX4 chip ",
83 scp->lun, (device) ? "slave" : "master");
84 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
85 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
86 if (error) {
87 printf("failed\n");
88 break;
89 }
90 printf("OK\n");
91 devno = (scp->unit << 1) + (device) ? 1 : 0;
92 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
93 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
94 pci_conf_write(scp->tag, 0x48,
95 (pci_conf_read(scp->tag, 0x48) & ~mask48) | new48);
96 return 0;
97 }
98 /* FALLTHROUGH */
99
100 case 0x70108086: /* Intel PIIX3 */
101 if (wdmamode >= 2 && apiomode >= 4) {
102 int32_t mask40, new40, mask44, new44;
103
104 /* if SITRE not set doit for both channels */
105 if (!((pci_conf_read(scp->tag, 0x40) >> (scp->unit<<8)) & 0x4000)) {
106 new40 = pci_conf_read(scp->tag, 0x40);
107 new44 = pci_conf_read(scp->tag, 0x44);
108 if (!(new40 & 0x00004000)) {
109 new44 &= ~0x0000000f;
110 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8);
111 }
112 if (!(new40 & 0x40000000)) {
113 new44 &= ~0x000000f0;
114 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20);
115 }
116 new40 |= 0x40004000;
117 pci_conf_write(scp->tag, 0x40, new40);
118 pci_conf_write(scp->tag, 0x44, new44);
119 }
120 printf("ata%d: %s: settting up WDMA2 mode on PIIX3/4 chip ",
121 scp->lun, (device) ? "slave" : "master");
122 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
123 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
124 if (error) {
125 printf("failed\n");
126 break;
127 }
128 printf("OK\n");
129 if (device == ATA_MASTER) {
130 mask40 = 0x0000330f;
131 new40 = 0x00002307;
132 mask44 = 0;
133 new44 = 0;
134 } else {
135 mask40 = 0x000000f0;
136 new40 = 0x00000070;
137 mask44 = 0x0000000f;
138 new44 = 0x0000000b;
139 }
140 if (scp->unit) {
141 mask40 <<= 16;
142 new40 <<= 16;
143 mask44 <<= 4;
144 new44 <<= 4;
145 }
146 pci_conf_write(scp->tag, 0x40,
147 (pci_conf_read(scp->tag, 0x40) & ~mask40) | new40);
148 pci_conf_write(scp->tag, 0x44,
149 (pci_conf_read(scp->tag, 0x44) & ~mask44) | new44);
150 return 0;
151 }
152 break;
153
154 case 0x12308086: /* Intel PIIX */
155 /* probably not worth the trouble */
156 break;
157
158 case 0x4d33105a: /* Promise Ultra/33 / FastTrack controllers */
159 devno = (scp->unit << 1) + (device) ? 1 : 0;
160 if (udmamode >=2) {
161 printf("ata%d: %s: settting up UDMA2 mode on Promise chip ",
162 scp->lun, (device) ? "slave" : "master");
163 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
164 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
165 if (error) {
166 printf("failed\n");
167 break;
168 }
169 printf("OK\n");
170 outb(scp->bmaddr + 0x1f, inb(scp->bmaddr + 0x1f) | 0x01);
171 pci_conf_write(scp->tag, 0x60 + (devno << 2), 0x004127f3);
172 return 0;
173 }
174 else if (wdmamode >= 2 && apiomode >= 4) {
175 printf("ata%d: %s: settting up WDMA2 mode on Promise chip ",
176 scp->lun, (device) ? "slave" : "master");
177 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
178 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
179 if (error) {
180 printf("failed\n");
181 break;
182 }
183 printf("OK\n");
184 outb(scp->bmaddr + 0x1f, inb(scp->bmaddr + 0x1f) | 0x01);
185 pci_conf_write(scp->tag, 0x60 + (devno << 2), 0x004367f3);
186 return 0;
187 }
188 else {
189 printf("ata%d: %s: settting up PIO mode on Promise chip OK\n",
190 scp->lun, (device) ? "slave" : "master");
191 pci_conf_write(scp->tag, 0x60 + (devno << 2), 0x004fe924);
192 }
193 break;
194
195 case 0x522910b9: /* AcerLabs Aladdin IV/V */
196 if (udmamode >=2) {
197 int32_t word54 = pci_conf_read(scp->tag, 0x54);
198
199 printf("ata%d: %s: settting up UDMA2 mode on Aladdin chip ",
200 scp->lun, (device) ? "slave" : "master");
201 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
202 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
203 if (error) {
204 printf("failed\n");
205 break;
206 }
207 printf("OK\n");
208 word54 |= 0x5555;
209 word54 |= (0x0000000A << (16 + (scp->unit << 3) + (device << 2)));
210 pci_conf_write(scp->tag, 0x54, word54);
211 return 0;
212
213 }
214 else if (wdmamode >= 2 && apiomode >= 4) {
215 printf("ata%d: %s: settting up WDMA2 mode on Aladdin chip ",
216 scp->lun, (device) ? "slave" : "master");
217 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
218 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
219 if (error) {
220 printf("failed\n");
221 break;
222 }
223 printf("OK\n");
224 return 0;
225 }
226 break;
227
228 default: /* well, we have no support for this, but try anyways */
229 if ((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) {
230 printf("ata%d: %s: settting up generic WDMA2 mode ",
231 scp->lun, (device) ? "slave" : "master");
232 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
233 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
234 if (error) {
235 printf("failed\n");
236 break;
237 }
238 printf("OK\n");
239 return 0;
240 }
241 }
242 free(dmatab, M_DEVBUF);
243 return -1;
244}
245
246int32_t
247ata_dmasetup(struct ata_softc *scp, int32_t device,
248 int8_t *data, int32_t count, int32_t flags)
249{
250 struct ata_dmaentry *dmatab;
251 u_int32_t dma_count, dma_base;
252 int32_t i = 0;
253
254#ifdef ATA_DEBUGDMA
255 printf("ata%d: dmasetup\n", scp->lun);
256#endif
257 if (((u_int32_t)data & 1) || (count & 1))
258 return -1;
259
260 if (!count) {
261 printf("ata%d: zero length DMA transfer attempt on %s\n",
262 scp->lun, (device ? "slave" : "master"));
263 return -1;
264 }
265
266 dmatab = scp->dmatab[device ? 1 : 0];
267 dma_base = vtophys(data);
268 dma_count = MIN(count, (PAGE_SIZE - ((u_int32_t)data & PAGE_MASK)));
269 data += dma_count;
270 count -= dma_count;
271
272 while (count) {
273 dmatab[i].base = dma_base;
274 dmatab[i].count = (dma_count & 0xffff);
275 i++;
276 if (i >= ATA_DMA_ENTRIES) {
277 printf("ata%d: too many segments in DMA table for %s\n",
278 scp->lun, (device ? "slave" : "master"));
279 return -1;
280 }
281 dma_base = vtophys(data);
282 dma_count = MIN(count, PAGE_SIZE);
283 data += MIN(count, PAGE_SIZE);
284 count -= MIN(count, PAGE_SIZE);
285 }
286#ifdef ATA_DEBUGDMA
287printf("ata_dmasetup: base=%08x count%08x\n",
288 dma_base, dma_count);
289#endif
290 dmatab[i].base = dma_base;
291 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT;
292
293 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab));
294#ifdef ATA_DEBUGDMA
295printf("dmatab=%08x %08x\n", vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT));
296#endif
297 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0);
298 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) |
299 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
300 return 0;
301}
302
303void
304ata_dmastart(struct ata_softc *scp, int32_t device)
305{
306#ifdef ATA_DEBUGDMA
307 printf("ata%d: dmastart\n", scp->lun);
308#endif
309 outb(scp->bmaddr + ATA_BMCMD_PORT,
310 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
311}
312
313int32_t
314ata_dmadone(struct ata_softc *scp, int32_t device)
315{
316#ifdef ATA_DEBUGDMA
317 printf("ata%d: dmadone\n", scp->lun);
318#endif
319 outb(scp->bmaddr + ATA_BMCMD_PORT,
320 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
321 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
322}
323
324int32_t
325ata_dmastatus(struct ata_softc *scp, int32_t device)
326{
327#ifdef ATA_DEBUGDMA
328 printf("ata%d: dmastatus\n", scp->lun);
329#endif
330 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
331}
332
333#else /* NPCI > 0 */
334
335int32_t
336ata_dmainit(struct ata_softc *scp, int32_t device,
337 int32_t piomode, int32_t wdmamode, int32_t udmamode)
338{
339 return -1;
340}
341
342int32_t
343ata_dmasetup(struct ata_softc *scp, int32_t device,
344 int8_t *data, int32_t count, int32_t flags)
345{
346 return -1;
347}
348
349void
350ata_dmastart(struct ata_softc *scp, int32_t device)
351{
352}
353
354int32_t
355ata_dmadone(struct ata_softc *scp, int32_t device)
356{
357 return -1;
358}
359
360int32_t
361ata_dmastatus(struct ata_softc *scp, int32_t device)
362{
363 return -1;
364}
365
366#endif /* NPCI > 0 */
367#endif /* NATA > 0 */
368