1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-all.c 54544 1999-12-13 10:19:39Z sos $
29 */
30
31#include "ata.h"
32#include "apm.h"
33#include "isa.h"
34#include "pci.h"
35#include "atadisk.h"
36#include "atapicd.h"

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191 return "Intel PIIX ATA controller";
192 case 0x70108086:
193 return "Intel PIIX3 ATA controller";
194 case 0x71118086:
195 return "Intel PIIX4 ATA controller";
196 case 0x522910b9:
197 return "AcerLabs Aladdin ATA controller";
198 case 0x05711106: /* 82c586 & 82c686 */
199 switch (pci_read_config(dev, 0x08, 1)) {
200 case 1:
201 return "VIA 82C586 ATA controller";
202 case 6:
203 return "VIA 82C686 ATA controller";
204 }
205 return "VIA Apollo ATA controller";
206 case 0x55131039:
207 return "SiS 5591 ATA controller";
208 case 0x4d33105a:
209 return "Promise Ultra/33 ATA controller";
210 case 0x4d38105a:
211 return "Promise Ultra/66 ATA controller";
212 case 0x00041103:

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271 if (pci_get_progif(dev) & PCIP_STORAGE_IDE_MASTERDEV) {
272 iobase_1 = IO_WD1;
273 altiobase_1 = iobase_1 + ATA_ALTPORT;
274 irq1 = 14;
275 }
276 else {
277 iobase_1 = pci_read_config(dev, 0x10, 4) & IOMASK;
278 altiobase_1 = pci_read_config(dev, 0x14, 4) & IOMASK;
279 bmaddr_1 = pci_read_config(dev, 0x20, 4) & IOMASK;
280 irq1 = pci_read_config(dev, PCI_INTERRUPT_REG, 4) & 0xff;
281 }
282
283 if (pci_get_progif(dev) & PCIP_STORAGE_IDE_MASTERDEV) {
284 iobase_2 = IO_WD2;
285 altiobase_2 = iobase_2 + ATA_ALTPORT;
286 irq2 = 15;
287 }
288 else {
289 iobase_2 = pci_read_config(dev, 0x18, 4) & IOMASK;
290 altiobase_2 = pci_read_config(dev, 0x1c, 4) & IOMASK;
291 bmaddr_2 = (pci_read_config(dev, 0x20, 4) & IOMASK) + ATA_BM_OFFSET1;
292 irq2 = pci_read_config(dev, PCI_INTERRUPT_REG, 4) & 0xff;
293 }
294
295 /* is this controller busmaster DMA capable ? */
296 if (pci_get_progif(dev) & PCIP_STORAGE_IDE_MASTERDEV) {
297 /* is busmastering support turned on ? */
298 if ((pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4) & 5) == 5) {
299 /* is there a valid port range to connect to ? */

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305 printf("ata-pci%d: Busmastering DMA not configured\n", unit);
306 }
307 else
308 printf("ata-pci%d: Busmastering DMA not enabled\n", unit);
309 }
310 else {
311 if (type == 0x4d33105a || type == 0x4d38105a || type == 0x00041103) {
312 /* Promise and HPT366 controllers support busmastering DMA */
313 printf("ata-pci%d: Busmastering DMA supported\n", unit);
314 }
315 else {
316 /* we dont know this controller, disable busmastering DMA */
317 bmaddr_1 = bmaddr_2 = 0;
318 printf("ata-pci%d: Busmastering DMA not supported\n", unit);
319 }
320 }
321
322 /* do extra chipset specific setups */
323 switch (type) {
324 case 0x522910b9:
325 /* on the Aladdin activate the ATAPI FIFO */

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943 blank = 1;
944 if (i == 0)
945 continue;
946 }
947 dst[j++] = src[i];
948 }
949 dst[j] = 0x00;
950}