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1/*-
2 * Copyright (c) 1999,2000 Michael Smith
3 * Copyright (c) 2000 BSDi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27/*-
28 * Copyright (c) 2002 Eric Moore
29 * Copyright (c) 2002 LSI Logic Corporation
30 * All rights reserved.
31 *
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
34 * are met:
35 * 1. Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in the
39 * documentation and/or other materials provided with the distribution.
40 * 3. The party using or redistributing the source code and binary forms
41 * agrees to the disclaimer below and the terms and conditions set forth
42 * herein.
43 *
44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
45 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
47 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
52 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
53 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
54 * SUCH DAMAGE.
55 */
56
57#include <sys/cdefs.h>
58__FBSDID("$FreeBSD: head/sys/dev/amr/amr_pci.c 140340 2005-01-16 07:34:26Z scottl $");
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/kernel.h>
63#include <sys/module.h>
64
65#include <dev/amr/amr_compat.h>
66#include <sys/bus.h>
67#include <sys/conf.h>
68
69#include <machine/bus_memio.h>
70#include <machine/bus_pio.h>
71#include <machine/bus.h>
72#include <machine/resource.h>
73#include <sys/rman.h>
74
75#include <dev/pci/pcireg.h>
76#include <dev/pci/pcivar.h>
77
78#include <dev/amr/amrio.h>
79#include <dev/amr/amrreg.h>
80#include <dev/amr/amrvar.h>
81
82static int amr_pci_probe(device_t dev);
83static int amr_pci_attach(device_t dev);
84static int amr_pci_detach(device_t dev);
85static int amr_pci_shutdown(device_t dev);
86static int amr_pci_suspend(device_t dev);
87static int amr_pci_resume(device_t dev);
88static void amr_pci_intr(void *arg);
89static void amr_pci_free(struct amr_softc *sc);
90static void amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error);
91static int amr_sglist_map(struct amr_softc *sc);
92static void amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error);
93static int amr_setup_mbox(struct amr_softc *sc);
94
95static device_method_t amr_methods[] = {
96 /* Device interface */
97 DEVMETHOD(device_probe, amr_pci_probe),
98 DEVMETHOD(device_attach, amr_pci_attach),
99 DEVMETHOD(device_detach, amr_pci_detach),
100 DEVMETHOD(device_shutdown, amr_pci_shutdown),
101 DEVMETHOD(device_suspend, amr_pci_suspend),
102 DEVMETHOD(device_resume, amr_pci_resume),
103
104 DEVMETHOD(bus_print_child, bus_generic_print_child),
105 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
106 { 0, 0 }
107};
108
109static driver_t amr_pci_driver = {
110 "amr",
111 amr_methods,
112 sizeof(struct amr_softc)
113};
114
115static devclass_t amr_devclass;
116DRIVER_MODULE(amr, pci, amr_pci_driver, amr_devclass, 0, 0);
117
118static struct
119{
120 int vendor;
121 int device;
122 int flag;
123#define PROBE_SIGNATURE (1<<0)
124} amr_device_ids[] = {
125 {0x101e, 0x9010, 0},
126 {0x101e, 0x9060, 0},
127 {0x8086, 0x1960, PROBE_SIGNATURE},/* generic i960RD, check for signature */
128 {0x101e, 0x1960, 0},
129 {0x1000, 0x1960, PROBE_SIGNATURE},
130 {0x1000, 0x0407, 0},
131 {0x1028, 0x000e, PROBE_SIGNATURE}, /* perc4/di i960 */
132 {0x1028, 0x000f, 0}, /* perc4/di Verde*/
133 {0x1028, 0x0013, 0}, /* perc4/di */
134 {0, 0, 0}
135};
136
137static int
138amr_pci_probe(device_t dev)
139{
140 int i, sig;
141
142 debug_called(1);
143
144 for (i = 0; amr_device_ids[i].vendor != 0; i++) {
145 if ((pci_get_vendor(dev) == amr_device_ids[i].vendor) &&
146 (pci_get_device(dev) == amr_device_ids[i].device)) {
147
148 /* do we need to test for a signature? */
149 if (amr_device_ids[i].flag & PROBE_SIGNATURE) {
150 sig = pci_read_config(dev, AMR_CFG_SIG, 2);
151 if ((sig != AMR_SIGNATURE_1) && (sig != AMR_SIGNATURE_2))
152 continue;
153 }
154 device_set_desc(dev, "LSILogic MegaRAID");
155 return(-10); /* allow room to be overridden */
156 }
157 }
158 return(ENXIO);
159}
160
161static int
162amr_pci_attach(device_t dev)
163{
164 struct amr_softc *sc;
165 int rid, rtype, error;
166 u_int32_t command;
167
168 debug_called(1);
169
170 /*
171 * Initialise softc.
172 */
173 sc = device_get_softc(dev);
174 bzero(sc, sizeof(*sc));
175 sc->amr_dev = dev;
176 mtx_init(&sc->amr_io_lock, "AMR IO Lock", NULL, MTX_DEF);
177
178 /* assume failure is 'not configured' */
179 error = ENXIO;
180
181 /*
182 * Determine board type.
183 */
184 command = pci_read_config(dev, PCIR_COMMAND, 1);
185 if ((pci_get_device(dev) == 0x1960) || (pci_get_device(dev) == 0x0407) ||
186 (pci_get_device(dev) == 0x000e) || (pci_get_device(dev) == 0x000f) ||
187 (pci_get_device(dev) == 0x0013)) {
188 /*
189 * Make sure we are going to be able to talk to this board.
190 */
191 if ((command & PCIM_CMD_MEMEN) == 0) {
192 device_printf(dev, "memory window not available\n");
193 goto out;
194 }
195 sc->amr_type |= AMR_TYPE_QUARTZ;
196
197 } else {
198 /*
199 * Make sure we are going to be able to talk to this board.
200 */
201 if ((command & PCIM_CMD_PORTEN) == 0) {
202 device_printf(dev, "I/O window not available\n");
203 goto out;
204 }
205 }
206
207 /* force the busmaster enable bit on */
208 if (!(command & PCIM_CMD_BUSMASTEREN)) {
209 device_printf(dev, "busmaster bit not set, enabling\n");
210 command |= PCIM_CMD_BUSMASTEREN;
211 pci_write_config(dev, PCIR_COMMAND, command, 2);
212 }
213
214 /*
215 * Allocate the PCI register window.
216 */
217 rid = PCIR_BAR(0);
218 rtype = AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT;
219 sc->amr_reg = bus_alloc_resource_any(dev, rtype, &rid, RF_ACTIVE);
220 if (sc->amr_reg == NULL) {
221 device_printf(sc->amr_dev, "can't allocate register window\n");
222 goto out;
223 }
224 sc->amr_btag = rman_get_bustag(sc->amr_reg);
225 sc->amr_bhandle = rman_get_bushandle(sc->amr_reg);
226
227 /*
228 * Allocate and connect our interrupt.
229 */
230 rid = 0;
231 sc->amr_irq = bus_alloc_resource_any(sc->amr_dev, SYS_RES_IRQ, &rid,
232 RF_SHAREABLE | RF_ACTIVE);
233 if (sc->amr_irq == NULL) {
234 device_printf(sc->amr_dev, "can't allocate interrupt\n");
235 goto out;
236 }
237 if (bus_setup_intr(sc->amr_dev, sc->amr_irq, INTR_TYPE_BIO | INTR_ENTROPY | INTR_MPSAFE, amr_pci_intr, sc, &sc->amr_intr)) {
238 device_printf(sc->amr_dev, "can't set up interrupt\n");
239 goto out;
240 }
241
242 debug(2, "interrupt attached");
243
244 /* assume failure is 'out of memory' */
245 error = ENOMEM;
246
247 /*
248 * Allocate the parent bus DMA tag appropriate for PCI.
249 */
250 if (bus_dma_tag_create(NULL, /* parent */
251 1, 0, /* alignment, boundary */
252 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
253 BUS_SPACE_MAXADDR, /* highaddr */
254 NULL, NULL, /* filter, filterarg */
255 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */
256 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
257 0, /* flags */
258 NULL, NULL, /* lockfunc, lockarg */
259 &sc->amr_parent_dmat)) {
260 device_printf(dev, "can't allocate parent DMA tag\n");
261 goto out;
262 }
263
264 /*
265 * Create DMA tag for mapping buffers into controller-addressable space.
266 */
267 if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
268 1, 0, /* alignment, boundary */
269 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
270 BUS_SPACE_MAXADDR, /* highaddr */
271 NULL, NULL, /* filter, filterarg */
272 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */
273 MAXBSIZE, /* maxsegsize */
274 BUS_DMA_ALLOCNOW, /* flags */
275 busdma_lock_mutex, &sc->amr_io_lock, /* lockfunc, lockarg */
276 &sc->amr_buffer_dmat)) {
277 device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n");
278 goto out;
279 }
280
281 debug(2, "dma tag done");
282
283 /*
284 * Allocate and set up mailbox in a bus-visible fashion.
285 */
286 if ((error = amr_setup_mbox(sc)) != 0)
287 goto out;
288
289 debug(2, "mailbox setup");
290
291 /*
292 * Build the scatter/gather buffers.
293 */
294 if (amr_sglist_map(sc))
295 goto out;
296
297 debug(2, "s/g list mapped");
298
299 /*
300 * Do bus-independant initialisation, bring controller online.
301 */
302 error = amr_attach(sc);
303
304out:
305 if (error)
306 amr_pci_free(sc);
307 return(error);
308}
309
310/********************************************************************************
311 * Disconnect from the controller completely, in preparation for unload.
312 */
313static int
314amr_pci_detach(device_t dev)
315{
316 struct amr_softc *sc = device_get_softc(dev);
317 int error;
318
319 debug_called(1);
320
321 if (sc->amr_state & AMR_STATE_OPEN)
322 return(EBUSY);
323
324 if ((error = amr_pci_shutdown(dev)))
325 return(error);
326
327 amr_pci_free(sc);
328
329 return(0);
330}
331
332/********************************************************************************
333 * Bring the controller down to a dormant state and detach all child devices.
334 *
335 * This function is called before detach, system shutdown, or before performing
336 * an operation which may add or delete system disks. (Call amr_startup to
337 * resume normal operation.)
338 *
339 * Note that we can assume that the bioq on the controller is empty, as we won't
340 * allow shutdown if any device is open.
341 */
342static int
343amr_pci_shutdown(device_t dev)
344{
345 struct amr_softc *sc = device_get_softc(dev);
346 int i,error,s;
347
348 debug_called(1);
349
350 /* mark ourselves as in-shutdown */
351 sc->amr_state |= AMR_STATE_SHUTDOWN;
352
353
354 /* flush controller */
355 device_printf(sc->amr_dev, "flushing cache...");
356 printf("%s\n", amr_flush(sc) ? "failed" : "done");
357
358 s = splbio();
359 error = 0;
360
361 /* delete all our child devices */
362 for(i = 0 ; i < AMR_MAXLD; i++) {
363 if( sc->amr_drive[i].al_disk != 0) {
364 if((error = device_delete_child(sc->amr_dev,sc->amr_drive[i].al_disk)) != 0)
365 goto shutdown_out;
366 sc->amr_drive[i].al_disk = 0;
367 }
368 }
369
370 /* XXX disable interrupts? */
371
372shutdown_out:
373 splx(s);
374 return(error);
375}
376
377/********************************************************************************
378 * Bring the controller to a quiescent state, ready for system suspend.
379 */
380static int
381amr_pci_suspend(device_t dev)
382{
383 struct amr_softc *sc = device_get_softc(dev);
384
385 debug_called(1);
386
387 sc->amr_state |= AMR_STATE_SUSPEND;
388
389 /* flush controller */
390 device_printf(sc->amr_dev, "flushing cache...");
391 printf("%s\n", amr_flush(sc) ? "failed" : "done");
392
393 /* XXX disable interrupts? */
394
395 return(0);
396}
397
398/********************************************************************************
399 * Bring the controller back to a state ready for operation.
400 */
401static int
402amr_pci_resume(device_t dev)
403{
404 struct amr_softc *sc = device_get_softc(dev);
405
406 debug_called(1);
407
408 sc->amr_state &= ~AMR_STATE_SUSPEND;
409
410 /* XXX enable interrupts? */
411
412 return(0);
413}
414
415/*******************************************************************************
416 * Take an interrupt, or be poked by other code to look for interrupt-worthy
417 * status.
418 */
419static void
420amr_pci_intr(void *arg)
421{
422 struct amr_softc *sc = (struct amr_softc *)arg;
423
424 debug_called(2);
425
426 /* collect finished commands, queue anything waiting */
427 mtx_lock(&sc->amr_io_lock);
428 amr_done(sc);
429 mtx_unlock(&sc->amr_io_lock);
430}
431
432/********************************************************************************
433 * Free all of the resources associated with (sc)
434 *
435 * Should not be called if the controller is active.
436 */
437static void
438amr_pci_free(struct amr_softc *sc)
439{
440 u_int8_t *p;
441
442 debug_called(1);
443
444 amr_free(sc);
445
446 /* destroy data-transfer DMA tag */
447 if (sc->amr_buffer_dmat)
448 bus_dma_tag_destroy(sc->amr_buffer_dmat);
449
450 /* free and destroy DMA memory and tag for s/g lists */
451 if (sc->amr_sgtable)
452 bus_dmamem_free(sc->amr_sg_dmat, sc->amr_sgtable, sc->amr_sg_dmamap);
453 if (sc->amr_sg_dmat)
454 bus_dma_tag_destroy(sc->amr_sg_dmat);
455
456 /* free and destroy DMA memory and tag for mailbox */
457 if (sc->amr_mailbox) {
458 p = (u_int8_t *)(uintptr_t)(volatile void *)sc->amr_mailbox;
459 bus_dmamem_free(sc->amr_mailbox_dmat, p - 16, sc->amr_mailbox_dmamap);
460 }
461 if (sc->amr_mailbox_dmat)
462 bus_dma_tag_destroy(sc->amr_mailbox_dmat);
463
464 /* disconnect the interrupt handler */
465 if (sc->amr_intr)
466 bus_teardown_intr(sc->amr_dev, sc->amr_irq, sc->amr_intr);
467 if (sc->amr_irq != NULL)
468 bus_release_resource(sc->amr_dev, SYS_RES_IRQ, 0, sc->amr_irq);
469
470 /* destroy the parent DMA tag */
471 if (sc->amr_parent_dmat)
472 bus_dma_tag_destroy(sc->amr_parent_dmat);
473
474 /* release the register window mapping */
475 if (sc->amr_reg != NULL)
476 bus_release_resource(sc->amr_dev,
477 AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT,
478 PCIR_BAR(0), sc->amr_reg);
479}
480
481/********************************************************************************
482 * Allocate and map the scatter/gather table in bus space.
483 */
484static void
485amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
486{
487 struct amr_softc *sc = (struct amr_softc *)arg;
488
489 debug_called(1);
490
491 /* save base of s/g table's address in bus space */
492 sc->amr_sgbusaddr = segs->ds_addr;
493}
494
495static int
496amr_sglist_map(struct amr_softc *sc)
497{
498 size_t segsize;
499 int error;
500
501 debug_called(1);
502
503 /*
504 * Create a single tag describing a region large enough to hold all of
505 * the s/g lists we will need.
506 *
507 * Note that we could probably use AMR_LIMITCMD here, but that may become tunable.
508 */
509 segsize = sizeof(struct amr_sgentry) * AMR_NSEG * AMR_MAXCMD;
510 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
511 1, 0, /* alignment, boundary */
512 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
513 BUS_SPACE_MAXADDR, /* highaddr */
514 NULL, NULL, /* filter, filterarg */
515 segsize, 1, /* maxsize, nsegments */
516 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
517 0, /* flags */
518 busdma_lock_mutex, /* lockfunc */
519 &Giant, /* lockarg */
520 &sc->amr_sg_dmat);
521 if (error != 0) {
522 device_printf(sc->amr_dev, "can't allocate scatter/gather DMA tag\n");
523 return(ENOMEM);
524 }
525
526 /*
527 * Allocate enough s/g maps for all commands and permanently map them into
528 * controller-visible space.
529 *
530 * XXX this assumes we can get enough space for all the s/g maps in one
531 * contiguous slab. We may need to switch to a more complex arrangement where
532 * we allocate in smaller chunks and keep a lookup table from slot to bus address.
533 *
534 * XXX HACK ALERT: at least some controllers don't like the s/g memory being
535 * allocated below 0x2000. We leak some memory if we get some
536 * below this mark and allocate again. We should be able to
537 * avoid this with the tag setup, but that does't seem to work.
538 */
539retry:
540 error = bus_dmamem_alloc(sc->amr_sg_dmat, (void **)&sc->amr_sgtable, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap);
541 if (error) {
542 device_printf(sc->amr_dev, "can't allocate s/g table\n");
543 return(ENOMEM);
544 }
545 bus_dmamap_load(sc->amr_sg_dmat, sc->amr_sg_dmamap, sc->amr_sgtable, segsize, amr_sglist_map_helper, sc, 0);
546 if (sc->amr_sgbusaddr < 0x2000) {
547 debug(1, "s/g table too low (0x%x), reallocating\n", sc->amr_sgbusaddr);
548 goto retry;
549 }
550 return(0);
551}
552
553/********************************************************************************
554 * Allocate and set up mailbox areas for the controller (sc)
555 *
556 * The basic mailbox structure should be 16-byte aligned. This means that the
557 * mailbox64 structure has 4 bytes hanging off the bottom.
558 */
559static void
560amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
561{
562 struct amr_softc *sc = (struct amr_softc *)arg;
563
564 debug_called(1);
565
566 /* save phsyical base of the basic mailbox structure */
567 sc->amr_mailboxphys = segs->ds_addr + 16;
568}
569
570static int
571amr_setup_mbox(struct amr_softc *sc)
572{
573 int error;
574 u_int8_t *p;
575
576 debug_called(1);
577
578 /*
579 * Create a single tag describing a region large enough to hold the entire
580 * mailbox.
581 */
582 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
583 16, 0, /* alignment, boundary */
584 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
585 BUS_SPACE_MAXADDR, /* highaddr */
586 NULL, NULL, /* filter, filterarg */
587 sizeof(struct amr_mailbox) + 16, 1, /* maxsize, nsegments */
588 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
589 0, /* flags */
590 busdma_lock_mutex, /* lockfunc */
591 &Giant, /* lockarg */
592 &sc->amr_mailbox_dmat);
593 if (error != 0) {
594 device_printf(sc->amr_dev, "can't allocate mailbox tag\n");
595 return(ENOMEM);
596 }
597
598 /*
599 * Allocate the mailbox structure and permanently map it into
600 * controller-visible space.
601 */
602 error = bus_dmamem_alloc(sc->amr_mailbox_dmat, (void **)&p, BUS_DMA_NOWAIT,
603 &sc->amr_mailbox_dmamap);
604 if (error) {
605 device_printf(sc->amr_dev, "can't allocate mailbox memory\n");
606 return(ENOMEM);
607 }
608 bus_dmamap_load(sc->amr_mailbox_dmat, sc->amr_mailbox_dmamap, p,
609 sizeof(struct amr_mailbox64), amr_setup_mbox_helper, sc, 0);
610 /*
611 * Conventional mailbox is inside the mailbox64 region.
612 */
613 bzero(p, sizeof(struct amr_mailbox64));
614 sc->amr_mailbox64 = (struct amr_mailbox64 *)(p + 12);
615 sc->amr_mailbox = (struct amr_mailbox *)(p + 16);
616
617 return(0);
618}