60 61/* 62 * Driver for the AMI MegaRaid family of controllers. 63 */ 64 65#include <sys/param.h> 66#include <sys/systm.h> 67#include <sys/malloc.h> 68#include <sys/kernel.h> 69 70#include <dev/amr/amr_compat.h> 71#include <sys/bus.h> 72#include <sys/conf.h> 73#include <sys/stat.h> 74 75#include <machine/bus_memio.h> 76#include <machine/bus_pio.h> 77#include <machine/bus.h> 78#include <machine/resource.h> 79#include <sys/rman.h> 80 81#include <dev/pci/pcireg.h> 82#include <dev/pci/pcivar.h> 83 84#include <dev/amr/amrio.h> 85#include <dev/amr/amrreg.h> 86#include <dev/amr/amrvar.h> 87#define AMR_DEFINE_TABLES 88#include <dev/amr/amr_tables.h> 89 90static d_open_t amr_open; 91static d_close_t amr_close; 92static d_ioctl_t amr_ioctl; 93 94static struct cdevsw amr_cdevsw = { 95 .d_version = D_VERSION, 96 .d_flags = D_NEEDGIANT, 97 .d_open = amr_open, 98 .d_close = amr_close, 99 .d_ioctl = amr_ioctl, 100 .d_name = "amr", 101}; 102 103/* 104 * Initialisation, bus interface. 105 */ 106static void amr_startup(void *arg); 107 108/* 109 * Command wrappers 110 */ 111static int amr_query_controller(struct amr_softc *sc); 112static void *amr_enquiry(struct amr_softc *sc, size_t bufsize, 113 u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual); 114static void amr_completeio(struct amr_command *ac); 115static int amr_support_ext_cdb(struct amr_softc *sc); 116 117/* 118 * Command buffer allocation. 119 */ 120static void amr_alloccmd_cluster(struct amr_softc *sc); 121static void amr_freecmd_cluster(struct amr_command_cluster *acc); 122 123/* 124 * Command processing. 125 */ 126static int amr_bio_command(struct amr_softc *sc, struct amr_command **acp); 127static int amr_wait_command(struct amr_command *ac) __unused; 128static int amr_getslot(struct amr_command *ac); 129static int amr_mapcmd(struct amr_command *ac); 130static void amr_unmapcmd(struct amr_command *ac); 131static int amr_start(struct amr_command *ac); 132static int amr_start1(struct amr_softc *sc, struct amr_command *ac); 133static void amr_complete(void *context, int pending); 134static void amr_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 135static void amr_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 136 137/* 138 * Status monitoring 139 */ 140static void amr_periodic(void *data); 141 142/* 143 * Interface-specific shims 144 */ 145static int amr_quartz_submit_command(struct amr_softc *sc); 146static int amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave); 147static int amr_quartz_poll_command(struct amr_command *ac); 148static int amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac); 149 150static int amr_std_submit_command(struct amr_softc *sc); 151static int amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave); 152static int amr_std_poll_command(struct amr_command *ac); 153static void amr_std_attach_mailbox(struct amr_softc *sc); 154 155#ifdef AMR_BOARD_INIT 156static int amr_quartz_init(struct amr_softc *sc); 157static int amr_std_init(struct amr_softc *sc); 158#endif 159 160/* 161 * Debugging 162 */ 163static void amr_describe_controller(struct amr_softc *sc); 164#ifdef AMR_DEBUG 165#if 0 166static void amr_printcommand(struct amr_command *ac); 167#endif 168#endif 169 170/******************************************************************************** 171 ******************************************************************************** 172 Inline Glue 173 ******************************************************************************** 174 ********************************************************************************/ 175 176/******************************************************************************** 177 ******************************************************************************** 178 Public Interfaces 179 ******************************************************************************** 180 ********************************************************************************/ 181 182/******************************************************************************** 183 * Initialise the controller and softc. 184 */ 185int 186amr_attach(struct amr_softc *sc) 187{ 188 189 debug_called(1); 190 191 /* 192 * Initialise per-controller queues. 193 */ 194 TAILQ_INIT(&sc->amr_completed); 195 TAILQ_INIT(&sc->amr_freecmds); 196 TAILQ_INIT(&sc->amr_cmd_clusters); 197 TAILQ_INIT(&sc->amr_ready); 198 bioq_init(&sc->amr_bioq); 199 200 debug(2, "queue init done"); 201 202 /* 203 * Configure for this controller type. 204 */ 205 if (AMR_IS_QUARTZ(sc)) { 206 sc->amr_submit_command = amr_quartz_submit_command; 207 sc->amr_get_work = amr_quartz_get_work; 208 sc->amr_poll_command = amr_quartz_poll_command; 209 sc->amr_poll_command1 = amr_quartz_poll_command1; 210 } else { 211 sc->amr_submit_command = amr_std_submit_command; 212 sc->amr_get_work = amr_std_get_work; 213 sc->amr_poll_command = amr_std_poll_command; 214 amr_std_attach_mailbox(sc);; 215 } 216 217#ifdef AMR_BOARD_INIT 218 if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc)))) 219 return(ENXIO); 220#endif 221 222 /* 223 * Quiz controller for features and limits. 224 */ 225 if (amr_query_controller(sc)) 226 return(ENXIO); 227 228 debug(2, "controller query complete"); 229 230 /* 231 * Attach our 'real' SCSI channels to CAM. 232 */ 233 if (amr_cam_attach(sc)) 234 return(ENXIO); 235 debug(2, "CAM attach done"); 236 237 /* 238 * Create the control device. 239 */ 240 sc->amr_dev_t = make_dev(&amr_cdevsw, device_get_unit(sc->amr_dev), UID_ROOT, GID_OPERATOR, 241 S_IRUSR | S_IWUSR, "amr%d", device_get_unit(sc->amr_dev)); 242 sc->amr_dev_t->si_drv1 = sc; 243 244 /* 245 * Schedule ourselves to bring the controller up once interrupts are 246 * available. 247 */ 248 bzero(&sc->amr_ich, sizeof(struct intr_config_hook)); 249 sc->amr_ich.ich_func = amr_startup; 250 sc->amr_ich.ich_arg = sc; 251 if (config_intrhook_establish(&sc->amr_ich) != 0) { 252 device_printf(sc->amr_dev, "can't establish configuration hook\n"); 253 return(ENOMEM); 254 } 255 256 /* 257 * Print a little information about the controller. 258 */ 259 amr_describe_controller(sc); 260 261 debug(2, "attach complete"); 262 return(0); 263} 264 265/******************************************************************************** 266 * Locate disk resources and attach children to them. 267 */ 268static void 269amr_startup(void *arg) 270{ 271 struct amr_softc *sc = (struct amr_softc *)arg; 272 struct amr_logdrive *dr; 273 int i, error; 274 275 debug_called(1); 276 277 /* pull ourselves off the intrhook chain */ 278 config_intrhook_disestablish(&sc->amr_ich); 279 280 /* get up-to-date drive information */ 281 if (amr_query_controller(sc)) { 282 device_printf(sc->amr_dev, "can't scan controller for drives\n"); 283 return; 284 } 285 286 /* iterate over available drives */ 287 for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) { 288 /* are we already attached to this drive? */ 289 if (dr->al_disk == 0) { 290 /* generate geometry information */ 291 if (dr->al_size > 0x200000) { /* extended translation? */ 292 dr->al_heads = 255; 293 dr->al_sectors = 63; 294 } else { 295 dr->al_heads = 64; 296 dr->al_sectors = 32; 297 } 298 dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors); 299 300 dr->al_disk = device_add_child(sc->amr_dev, NULL, -1); 301 if (dr->al_disk == 0) 302 device_printf(sc->amr_dev, "device_add_child failed\n"); 303 device_set_ivars(dr->al_disk, dr); 304 } 305 } 306 307 if ((error = bus_generic_attach(sc->amr_dev)) != 0) 308 device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error); 309 310 /* mark controller back up */ 311 sc->amr_state &= ~AMR_STATE_SHUTDOWN; 312 313 /* interrupts will be enabled before we do anything more */ 314 sc->amr_state |= AMR_STATE_INTEN; 315 316 /* 317 * Start the timeout routine. 318 */ 319/* sc->amr_timeout = timeout(amr_periodic, sc, hz);*/ 320 321 return; 322} 323 324/******************************************************************************* 325 * Free resources associated with a controller instance 326 */ 327void 328amr_free(struct amr_softc *sc) 329{ 330 struct amr_command_cluster *acc; 331 332 /* detach from CAM */ 333 amr_cam_detach(sc); 334 335 /* cancel status timeout */ 336 untimeout(amr_periodic, sc, sc->amr_timeout); 337 338 /* throw away any command buffers */ 339 while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) { 340 TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link); 341 amr_freecmd_cluster(acc); 342 } 343 344 /* destroy control device */ 345 if( sc->amr_dev_t != (struct cdev *)NULL) 346 destroy_dev(sc->amr_dev_t); 347 348 if (mtx_initialized(&sc->amr_io_lock)) 349 mtx_destroy(&sc->amr_io_lock); 350} 351 352/******************************************************************************* 353 * Receive a bio structure from a child device and queue it on a particular 354 * disk resource, then poke the disk resource to start as much work as it can. 355 */ 356int 357amr_submit_bio(struct amr_softc *sc, struct bio *bio) 358{ 359 debug_called(2); 360 361 mtx_lock(&sc->amr_io_lock); 362 amr_enqueue_bio(sc, bio); 363 amr_startio(sc); 364 mtx_unlock(&sc->amr_io_lock); 365 return(0); 366} 367 368/******************************************************************************** 369 * Accept an open operation on the control device. 370 */ 371static int 372amr_open(struct cdev *dev, int flags, int fmt, d_thread_t *td) 373{ 374 int unit = minor(dev); 375 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit); 376 377 debug_called(1); 378 379 sc->amr_state |= AMR_STATE_OPEN; 380 return(0); 381} 382 383/******************************************************************************** 384 * Accept the last close on the control device. 385 */ 386static int 387amr_close(struct cdev *dev, int flags, int fmt, d_thread_t *td) 388{ 389 int unit = minor(dev); 390 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit); 391 392 debug_called(1); 393 394 sc->amr_state &= ~AMR_STATE_OPEN; 395 return (0); 396} 397 398/******************************************************************************** 399 * Handle controller-specific control operations. 400 */ 401static int 402amr_ioctl(struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag, d_thread_t *td) 403{ 404 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 405 union { 406 void *_p; 407 struct amr_user_ioctl *au; 408#ifdef AMR_IO_COMMAND32 409 struct amr_user_ioctl32 *au32; 410#endif 411 int *result; 412 } arg; 413 struct amr_command *ac; 414 struct amr_mailbox_ioctl *mbi; 415 void *dp, *au_buffer; 416 unsigned long au_length; 417 unsigned char *au_cmd; 418 int *au_statusp, au_direction; 419 int error; 420 struct amr_passthrough *ap; /* 60 bytes */ 421 422 debug_called(1); 423 424 arg._p = (void *)addr; 425 426 switch(cmd) { 427 428 case AMR_IO_VERSION: 429 debug(1, "AMR_IO_VERSION"); 430 *arg.result = AMR_IO_VERSION_NUMBER; 431 return(0); 432 433#ifdef AMR_IO_COMMAND32 434 /* 435 * Accept ioctl-s from 32-bit binaries on non-32-bit 436 * platforms, such as AMD. LSI's MEGAMGR utility is 437 * the only example known today... -mi 438 */ 439 case AMR_IO_COMMAND32: 440 debug(1, "AMR_IO_COMMAND32 0x%x", arg.au32->au_cmd[0]); 441 au_cmd = arg.au32->au_cmd; 442 au_buffer = (void *)(u_int64_t)arg.au32->au_buffer; 443 au_length = arg.au32->au_length; 444 au_direction = arg.au32->au_direction; 445 au_statusp = &arg.au32->au_status; 446 break; 447#endif 448 449 case AMR_IO_COMMAND: 450 debug(1, "AMR_IO_COMMAND 0x%x", arg.au->au_cmd[0]); 451 au_cmd = arg.au->au_cmd; 452 au_buffer = (void *)arg.au->au_buffer; 453 au_length = arg.au->au_length; 454 au_direction = arg.au->au_direction; 455 au_statusp = &arg.au->au_status; 456 break; 457 458 default: 459 debug(1, "unknown ioctl 0x%lx", cmd); 460 return(ENOIOCTL); 461 } 462 463 error = 0; 464 dp = NULL; 465 ac = NULL; 466 ap = NULL; 467 468 /* Logical Drive not supported by the driver */ 469 if (au_cmd[0] == 0xa4 && au_cmd[1] == 0x1c) 470 return (ENOIOCTL); 471 472 /* handle inbound data buffer */ 473 if (au_length != 0 && au_cmd[0] != 0x06) {
|
573 return(error); 574} 575 576/******************************************************************************** 577 ******************************************************************************** 578 Status Monitoring 579 ******************************************************************************** 580 ********************************************************************************/ 581 582/******************************************************************************** 583 * Perform a periodic check of the controller status 584 */ 585static void 586amr_periodic(void *data) 587{ 588 struct amr_softc *sc = (struct amr_softc *)data; 589 590 debug_called(2); 591 592 /* XXX perform periodic status checks here */ 593 594 /* compensate for missed interrupts */ 595 amr_done(sc); 596 597 /* reschedule */ 598 sc->amr_timeout = timeout(amr_periodic, sc, hz); 599} 600 601/******************************************************************************** 602 ******************************************************************************** 603 Command Wrappers 604 ******************************************************************************** 605 ********************************************************************************/ 606 607/******************************************************************************** 608 * Interrogate the controller for the operational parameters we require. 609 */ 610static int 611amr_query_controller(struct amr_softc *sc) 612{ 613 struct amr_enquiry3 *aex; 614 struct amr_prodinfo *ap; 615 struct amr_enquiry *ae; 616 int ldrv; 617 618 mtx_lock(&sc->amr_io_lock); 619 620 /* 621 * If we haven't found the real limit yet, let us have a couple of commands in 622 * order to be able to probe. 623 */ 624 if (sc->amr_maxio == 0) 625 sc->amr_maxio = 2; 626 627 /* 628 * Greater than 10 byte cdb support 629 */ 630 sc->support_ext_cdb = amr_support_ext_cdb(sc); 631 632 if(sc->support_ext_cdb) { 633 debug(2,"supports extended CDBs."); 634 } 635 636 /* 637 * Try to issue an ENQUIRY3 command 638 */ 639 if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3, 640 AMR_CONFIG_ENQ3_SOLICITED_FULL)) != NULL) { 641 642 /* 643 * Fetch current state of logical drives. 644 */ 645 for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) { 646 sc->amr_drive[ldrv].al_size = aex->ae_drivesize[ldrv]; 647 sc->amr_drive[ldrv].al_state = aex->ae_drivestate[ldrv]; 648 sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv]; 649 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size, 650 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties); 651 } 652 free(aex, M_DEVBUF); 653 654 /* 655 * Get product info for channel count. 656 */ 657 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) == NULL) { 658 device_printf(sc->amr_dev, "can't obtain product data from controller\n"); 659 mtx_unlock(&sc->amr_io_lock); 660 return(1); 661 } 662 sc->amr_maxdrives = 40; 663 sc->amr_maxchan = ap->ap_nschan; 664 sc->amr_maxio = ap->ap_maxio; 665 sc->amr_type |= AMR_TYPE_40LD; 666 free(ap, M_DEVBUF); 667 668 } else { 669 670 /* failed, try the 8LD ENQUIRY commands */ 671 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) == NULL) { 672 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) == NULL) { 673 device_printf(sc->amr_dev, "can't obtain configuration data from controller\n"); 674 mtx_unlock(&sc->amr_io_lock); 675 return(1); 676 } 677 ae->ae_signature = 0; 678 } 679 680 /* 681 * Fetch current state of logical drives. 682 */ 683 for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) { 684 sc->amr_drive[ldrv].al_size = ae->ae_ldrv.al_size[ldrv]; 685 sc->amr_drive[ldrv].al_state = ae->ae_ldrv.al_state[ldrv]; 686 sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv]; 687 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size, 688 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties); 689 } 690 691 sc->amr_maxdrives = 8; 692 sc->amr_maxchan = ae->ae_adapter.aa_channels; 693 sc->amr_maxio = ae->ae_adapter.aa_maxio; 694 free(ae, M_DEVBUF); 695 } 696 697 /* 698 * Mark remaining drives as unused. 699 */ 700 for (; ldrv < AMR_MAXLD; ldrv++) 701 sc->amr_drive[ldrv].al_size = 0xffffffff; 702 703 /* 704 * Cap the maximum number of outstanding I/Os. AMI's Linux driver doesn't trust 705 * the controller's reported value, and lockups have been seen when we do. 706 */ 707 sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD); 708 709 mtx_unlock(&sc->amr_io_lock); 710 return(0); 711} 712 713/******************************************************************************** 714 * Run a generic enquiry-style command. 715 */ 716static void * 717amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual) 718{ 719 struct amr_command *ac; 720 void *result; 721 u_int8_t *mbox; 722 int error; 723 724 debug_called(1); 725 726 error = 1; 727 result = NULL; 728 729 /* get ourselves a command buffer */ 730 if ((ac = amr_alloccmd(sc)) == NULL) 731 goto out; 732 /* allocate the response structure */ 733 if ((result = malloc(bufsize, M_DEVBUF, M_ZERO|M_NOWAIT)) == NULL) 734 goto out; 735 /* set command flags */ 736 737 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAIN; 738 739 /* point the command at our data */ 740 ac->ac_data = result; 741 ac->ac_length = bufsize; 742 743 /* build the command proper */ 744 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */ 745 mbox[0] = cmd; 746 mbox[2] = cmdsub; 747 mbox[3] = cmdqual; 748 749 /* can't assume that interrupts are going to work here, so play it safe */ 750 if (sc->amr_poll_command(ac)) 751 goto out; 752 error = ac->ac_status; 753 754 out: 755 if (ac != NULL) 756 amr_releasecmd(ac); 757 if ((error != 0) && (result != NULL)) { 758 free(result, M_DEVBUF); 759 result = NULL; 760 } 761 return(result); 762} 763 764/******************************************************************************** 765 * Flush the controller's internal cache, return status. 766 */ 767int 768amr_flush(struct amr_softc *sc) 769{ 770 struct amr_command *ac; 771 int error; 772 773 /* get ourselves a command buffer */ 774 error = 1; 775 mtx_lock(&sc->amr_io_lock); 776 if ((ac = amr_alloccmd(sc)) == NULL) 777 goto out; 778 /* set command flags */ 779 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 780 781 /* build the command proper */ 782 ac->ac_mailbox.mb_command = AMR_CMD_FLUSH; 783 784 /* we have to poll, as the system may be going down or otherwise damaged */ 785 if (sc->amr_poll_command(ac)) 786 goto out; 787 error = ac->ac_status; 788 789 out: 790 if (ac != NULL) 791 amr_releasecmd(ac); 792 mtx_unlock(&sc->amr_io_lock); 793 return(error); 794} 795 796/******************************************************************************** 797 * Detect extented cdb >> greater than 10 byte cdb support 798 * returns '1' means this support exist 799 * returns '0' means this support doesn't exist 800 */ 801static int 802amr_support_ext_cdb(struct amr_softc *sc) 803{ 804 struct amr_command *ac; 805 u_int8_t *mbox; 806 int error; 807 808 /* get ourselves a command buffer */ 809 error = 0; 810 if ((ac = amr_alloccmd(sc)) == NULL) 811 goto out; 812 /* set command flags */ 813 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 814 815 /* build the command proper */ 816 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */ 817 mbox[0] = 0xA4; 818 mbox[2] = 0x16; 819 820 821 /* we have to poll, as the system may be going down or otherwise damaged */ 822 if (sc->amr_poll_command(ac)) 823 goto out; 824 if( ac->ac_status == AMR_STATUS_SUCCESS ) { 825 error = 1; 826 } 827 828out: 829 if (ac != NULL) 830 amr_releasecmd(ac); 831 return(error); 832} 833 834/******************************************************************************** 835 * Try to find I/O work for the controller from one or more of the work queues. 836 * 837 * We make the assumption that if the controller is not ready to take a command 838 * at some given time, it will generate an interrupt at some later time when 839 * it is. 840 */ 841void 842amr_startio(struct amr_softc *sc) 843{ 844 struct amr_command *ac; 845 846 /* spin until something prevents us from doing any work */ 847 for (;;) { 848 849 /* Don't bother to queue commands no bounce buffers are available. */ 850 if (sc->amr_state & AMR_STATE_QUEUE_FRZN) 851 break; 852 853 /* try to get a ready command */ 854 ac = amr_dequeue_ready(sc); 855 856 /* if that failed, build a command from a bio */ 857 if (ac == NULL) 858 (void)amr_bio_command(sc, &ac); 859 860 /* if that failed, build a command from a ccb */ 861 if (ac == NULL) 862 (void)amr_cam_command(sc, &ac); 863 864 /* if we don't have anything to do, give up */ 865 if (ac == NULL) 866 break; 867 868 /* try to give the command to the controller; if this fails save it for later and give up */ 869 if (amr_start(ac)) { 870 debug(2, "controller busy, command deferred"); 871 amr_requeue_ready(ac); /* XXX schedule retry very soon? */ 872 break; 873 } 874 } 875} 876 877/******************************************************************************** 878 * Handle completion of an I/O command. 879 */ 880static void 881amr_completeio(struct amr_command *ac) 882{ 883 struct amr_softc *sc = ac->ac_sc; 884 885 if (ac->ac_status != AMR_STATUS_SUCCESS) { /* could be more verbose here? */ 886 ac->ac_bio->bio_error = EIO; 887 ac->ac_bio->bio_flags |= BIO_ERROR; 888 889 device_printf(sc->amr_dev, "I/O error - 0x%x\n", ac->ac_status); 890/* amr_printcommand(ac);*/ 891 } 892 amrd_intr(ac->ac_bio); 893 amr_releasecmd(ac); 894} 895 896/******************************************************************************** 897 ******************************************************************************** 898 Command Processing 899 ******************************************************************************** 900 ********************************************************************************/ 901 902/******************************************************************************** 903 * Convert a bio off the top of the bio queue into a command. 904 */ 905static int 906amr_bio_command(struct amr_softc *sc, struct amr_command **acp) 907{ 908 struct amr_command *ac; 909 struct amrd_softc *amrd; 910 struct bio *bio; 911 int error; 912 int blkcount; 913 int driveno; 914 int cmd; 915 916 ac = NULL; 917 error = 0; 918 919 /* get a command */ 920 if ((ac = amr_alloccmd(sc)) == NULL) 921 return (ENOMEM); 922 923 /* get a bio to work on */ 924 if ((bio = amr_dequeue_bio(sc)) == NULL) { 925 amr_releasecmd(ac); 926 return (0); 927 } 928 929 /* connect the bio to the command */ 930 ac->ac_complete = amr_completeio; 931 ac->ac_bio = bio; 932 ac->ac_data = bio->bio_data; 933 ac->ac_length = bio->bio_bcount; 934 if (BIO_IS_READ(bio)) { 935 ac->ac_flags |= AMR_CMD_DATAIN; 936 cmd = AMR_CMD_LREAD; 937 } else { 938 ac->ac_flags |= AMR_CMD_DATAOUT; 939 cmd = AMR_CMD_LWRITE; 940 } 941 amrd = (struct amrd_softc *)bio->bio_disk->d_drv1; 942 driveno = amrd->amrd_drive - sc->amr_drive; 943 blkcount = (bio->bio_bcount + AMR_BLKSIZE - 1) / AMR_BLKSIZE; 944 945 ac->ac_mailbox.mb_command = cmd; 946 ac->ac_mailbox.mb_blkcount = blkcount; 947 ac->ac_mailbox.mb_lba = bio->bio_pblkno; 948 ac->ac_mailbox.mb_drive = driveno; 949 /* we fill in the s/g related data when the command is mapped */ 950 951 if ((bio->bio_pblkno + blkcount) > sc->amr_drive[driveno].al_size) 952 device_printf(sc->amr_dev, "I/O beyond end of unit (%lld,%d > %lu)\n", 953 (long long)bio->bio_pblkno, blkcount, 954 (u_long)sc->amr_drive[driveno].al_size); 955 956 *acp = ac; 957 return(error); 958} 959 960/******************************************************************************** 961 * Take a command, submit it to the controller and sleep until it completes 962 * or fails. Interrupts must be enabled, returns nonzero on error. 963 */ 964static int 965amr_wait_command(struct amr_command *ac) 966{ 967 int error, count; 968 969 debug_called(1); 970 971 ac->ac_complete = NULL; 972 ac->ac_flags |= AMR_CMD_SLEEP; 973 if ((error = amr_start(ac)) != 0) 974 return(error); 975 976 count = 0; 977 /* XXX better timeout? */ 978 while ((ac->ac_flags & AMR_CMD_BUSY) && (count < 30)) { 979 msleep(ac, &ac->ac_sc->amr_io_lock, PRIBIO | PCATCH, "amrwcmd", hz); 980 } 981 return(0); 982} 983 984/******************************************************************************** 985 * Take a command, submit it to the controller and busy-wait for it to return. 986 * Returns nonzero on error. Can be safely called with interrupts enabled. 987 */ 988static int 989amr_std_poll_command(struct amr_command *ac) 990{ 991 struct amr_softc *sc = ac->ac_sc; 992 int error, count; 993 994 debug_called(2); 995 996 ac->ac_complete = NULL; 997 if ((error = amr_start(ac)) != 0) 998 return(error); 999 1000 count = 0; 1001 do { 1002 /* 1003 * Poll for completion, although the interrupt handler may beat us to it. 1004 * Note that the timeout here is somewhat arbitrary. 1005 */ 1006 amr_done(sc); 1007 DELAY(1000); 1008 } while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000)); 1009 if (!(ac->ac_flags & AMR_CMD_BUSY)) { 1010 error = 0; 1011 } else { 1012 /* XXX the slot is now marked permanently busy */ 1013 error = EIO; 1014 device_printf(sc->amr_dev, "polled command timeout\n"); 1015 } 1016 return(error); 1017} 1018 1019static void 1020amr_setup_polled_dmamap(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1021{ 1022 struct amr_command *ac = arg; 1023 struct amr_softc *sc = ac->ac_sc; 1024 1025 amr_setup_dmamap(arg, segs, nsegs, err); 1026 bus_dmamap_sync(sc->amr_buffer_dmat,ac->ac_dmamap,BUS_DMASYNC_PREREAD); 1027 sc->amr_poll_command1(sc, ac); 1028} 1029 1030/******************************************************************************** 1031 * Take a command, submit it to the controller and busy-wait for it to return. 1032 * Returns nonzero on error. Can be safely called with interrupts enabled. 1033 */ 1034static int 1035amr_quartz_poll_command(struct amr_command *ac) 1036{ 1037 struct amr_softc *sc = ac->ac_sc; 1038 int s, error; 1039 1040 debug_called(2); 1041 1042 s = splbio(); 1043 error = 0; 1044 1045 /* now we have a slot, we can map the command (unmapped in amr_complete) */ 1046 if (ac->ac_data != 0) { 1047 if (bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_dmamap, ac->ac_data, 1048 ac->ac_length, amr_setup_polled_dmamap, ac, BUS_DMA_NOWAIT) != 0) { 1049 error = 1; 1050 } 1051 } else { 1052 error = amr_quartz_poll_command1(sc, ac); 1053 } 1054 1055 splx(s); 1056 return (error); 1057} 1058 1059static int 1060amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac) 1061{ 1062 int count, error; 1063 1064 if ((sc->amr_state & AMR_STATE_INTEN) == 0) { 1065 count=0; 1066 while (sc->amr_busyslots) { 1067 msleep(sc, &sc->amr_io_lock, PRIBIO | PCATCH, "amrpoll", hz); 1068 if(count++>10) { 1069 break; 1070 } 1071 } 1072 1073 if(sc->amr_busyslots) { 1074 device_printf(sc->amr_dev, "adapter is busy\n"); 1075 if (ac->ac_data != NULL) 1076 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_dmamap); 1077 ac->ac_status=0; 1078 return(1); 1079 } 1080 } 1081 1082 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE); 1083 1084 /* clear the poll/ack fields in the mailbox */ 1085 sc->amr_mailbox->mb_ident = 0xFE; 1086 sc->amr_mailbox->mb_nstatus = 0xFF; 1087 sc->amr_mailbox->mb_status = 0xFF; 1088 sc->amr_mailbox->mb_poll = 0; 1089 sc->amr_mailbox->mb_ack = 0; 1090 sc->amr_mailbox->mb_busy = 1; 1091 1092 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT); 1093 1094 while(sc->amr_mailbox->mb_nstatus == 0xFF); 1095 while(sc->amr_mailbox->mb_status == 0xFF); 1096 ac->ac_status=sc->amr_mailbox->mb_status; 1097 error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0; 1098 while(sc->amr_mailbox->mb_poll != 0x77); 1099 sc->amr_mailbox->mb_poll = 0; 1100 sc->amr_mailbox->mb_ack = 0x77; 1101 1102 /* acknowledge that we have the commands */ 1103 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK); 1104 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK); 1105 1106 /* unmap the command's data buffer */ 1107 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_POSTREAD); 1108 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_dmamap); 1109 1110 return(error); 1111} 1112 1113/******************************************************************************** 1114 * Get a free command slot for a command if it doesn't already have one. 1115 * 1116 * May be safely called multiple times for a given command. 1117 */ 1118static int 1119amr_getslot(struct amr_command *ac) 1120{ 1121 struct amr_softc *sc = ac->ac_sc; 1122 int slot; 1123 1124 debug_called(3); 1125 1126 slot = ac->ac_slot; 1127 if (sc->amr_busycmd[slot] != NULL) 1128 panic("amr: slot %d busy?\n", slot); 1129 1130 sc->amr_busycmd[slot] = ac; 1131 sc->amr_busyslots++; 1132 1133 return (0); 1134} 1135 1136/******************************************************************************** 1137 * Map/unmap (ac)'s data in the controller's addressable space as required. 1138 * 1139 * These functions may be safely called multiple times on a given command. 1140 */ 1141static void 1142amr_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 1143{ 1144 struct amr_command *ac = (struct amr_command *)arg; 1145 struct amr_softc *sc = ac->ac_sc; 1146 struct amr_sgentry *sg; 1147 int i; 1148 u_int8_t *sgc; 1149 1150 debug_called(3); 1151 1152 /* get base address of s/g table */ 1153 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 1154 1155 /* save data physical address */ 1156 ac->ac_dataphys = segs[0].ds_addr; 1157 1158 /* for AMR_CMD_CONFIG the s/g count goes elsewhere */ 1159 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG) { 1160 sgc = &(((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param); 1161 } else { 1162 sgc = &ac->ac_mailbox.mb_nsgelem; 1163 } 1164 1165 /* decide whether we need to populate the s/g table */ 1166 if (nsegments < 2) { 1167 *sgc = 0; 1168 ac->ac_mailbox.mb_nsgelem = 0; 1169 ac->ac_mailbox.mb_physaddr = ac->ac_dataphys; 1170 } else { 1171 ac->ac_mailbox.mb_nsgelem = nsegments; 1172 *sgc = nsegments; 1173 ac->ac_mailbox.mb_physaddr = sc->amr_sgbusaddr + 1174 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry)); 1175 for (i = 0; i < nsegments; i++, sg++) { 1176 sg->sg_addr = segs[i].ds_addr; 1177 sg->sg_count = segs[i].ds_len; 1178 } 1179 } 1180 1181} 1182 1183static void 1184amr_setup_ccbmap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 1185{ 1186 struct amr_command *ac = (struct amr_command *)arg; 1187 struct amr_softc *sc = ac->ac_sc; 1188 struct amr_sgentry *sg; 1189 struct amr_passthrough *ap = (struct amr_passthrough *)ac->ac_data; 1190 struct amr_ext_passthrough *aep = (struct amr_ext_passthrough *)ac->ac_data; 1191 int i; 1192 1193 /* get base address of s/g table */ 1194 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 1195 1196 /* decide whether we need to populate the s/g table */ 1197 if( ac->ac_mailbox.mb_command == AMR_CMD_EXTPASS ) { 1198 if (nsegments < 2) { 1199 aep->ap_no_sg_elements = 0; 1200 aep->ap_data_transfer_address = segs[0].ds_addr; 1201 } else { 1202 /* save s/g table information in passthrough */ 1203 aep->ap_no_sg_elements = nsegments; 1204 aep->ap_data_transfer_address = sc->amr_sgbusaddr + 1205 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry)); 1206 /* 1207 * populate s/g table (overwrites previous call which mapped the 1208 * passthrough) 1209 */ 1210 for (i = 0; i < nsegments; i++, sg++) { 1211 sg->sg_addr = segs[i].ds_addr; 1212 sg->sg_count = segs[i].ds_len; 1213 debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count); 1214 } 1215 } 1216 debug(3, "slot %d %d segments at 0x%x, passthrough at 0x%x\n", 1217 ac->ac_slot, aep->ap_no_sg_elements, aep->ap_data_transfer_address, 1218 ac->ac_dataphys); 1219 } else { 1220 if (nsegments < 2) { 1221 ap->ap_no_sg_elements = 0; 1222 ap->ap_data_transfer_address = segs[0].ds_addr; 1223 } else { 1224 /* save s/g table information in passthrough */ 1225 ap->ap_no_sg_elements = nsegments; 1226 ap->ap_data_transfer_address = sc->amr_sgbusaddr + 1227 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry)); 1228 /* 1229 * populate s/g table (overwrites previous call which mapped the 1230 * passthrough) 1231 */ 1232 for (i = 0; i < nsegments; i++, sg++) { 1233 sg->sg_addr = segs[i].ds_addr; 1234 sg->sg_count = segs[i].ds_len; 1235 debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count); 1236 } 1237 } 1238 debug(3, "slot %d %d segments at 0x%x, passthrough at 0x%x", 1239 ac->ac_slot, ap->ap_no_sg_elements, ap->ap_data_transfer_address, 1240 ac->ac_dataphys); 1241 } 1242 if (ac->ac_flags & AMR_CMD_CCB_DATAIN) 1243 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, 1244 BUS_DMASYNC_PREREAD); 1245 if (ac->ac_flags & AMR_CMD_CCB_DATAOUT) 1246 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, 1247 BUS_DMASYNC_PREWRITE); 1248 if ((ac->ac_flags & (AMR_CMD_CCB_DATAIN | AMR_CMD_CCB_DATAOUT)) == 0) 1249 panic("no direction for ccb?\n"); 1250 1251 if (ac->ac_flags & AMR_CMD_DATAIN) 1252 bus_dmamap_sync(sc->amr_buffer_dmat,ac->ac_dmamap,BUS_DMASYNC_PREREAD); 1253 if (ac->ac_flags & AMR_CMD_DATAOUT) 1254 bus_dmamap_sync(sc->amr_buffer_dmat,ac->ac_dmamap,BUS_DMASYNC_PREWRITE); 1255 1256 ac->ac_flags |= AMR_CMD_MAPPED; 1257 1258 amr_start1(sc, ac); 1259} 1260 1261static int 1262amr_mapcmd(struct amr_command *ac) 1263{ 1264 struct amr_softc *sc = ac->ac_sc; 1265 1266 debug_called(3); 1267 1268 /* if the command involves data at all, and hasn't been mapped */ 1269 if ((ac->ac_flags & AMR_CMD_MAPPED) == 0 && (ac->ac_data != NULL)) { 1270 if (ac->ac_ccb_data == NULL) { 1271 /* map the data buffers into bus space and build the s/g list */ 1272 if (bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_dmamap, ac->ac_data, 1273 ac->ac_length, amr_setup_data_dmamap, ac, 0) == EINPROGRESS) { 1274 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1275 } 1276 } else { 1277 if (bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_dmamap, ac->ac_data, 1278 ac->ac_length, amr_setup_dmamap, ac, BUS_DMA_NOWAIT) != 0){ 1279 return (ENOMEM); 1280 } 1281 if (bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, 1282 ac->ac_ccb_data, ac->ac_ccb_length, amr_setup_ccbmap, ac, 1283 0) == EINPROGRESS) { 1284 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1285 } 1286 } 1287 } else if ((ac->ac_flags & AMR_CMD_MAPPED) == 0) { 1288 amr_start1(sc, ac); 1289 } 1290 1291 return (0); 1292} 1293 1294static void 1295amr_unmapcmd(struct amr_command *ac) 1296{ 1297 struct amr_softc *sc = ac->ac_sc; 1298 1299 debug_called(3); 1300 1301 /* if the command involved data at all and was mapped */ 1302 if (ac->ac_flags & AMR_CMD_MAPPED) { 1303 1304 if (ac->ac_data != NULL) { 1305 if (ac->ac_flags & AMR_CMD_DATAIN) 1306 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, 1307 BUS_DMASYNC_POSTREAD); 1308 if (ac->ac_flags & AMR_CMD_DATAOUT) 1309 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, 1310 BUS_DMASYNC_POSTWRITE); 1311 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_dmamap); 1312 } 1313 1314 if (ac->ac_ccb_data != NULL) { 1315 if (ac->ac_flags & AMR_CMD_CCB_DATAIN) 1316 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, 1317 BUS_DMASYNC_POSTREAD); 1318 if (ac->ac_flags & AMR_CMD_CCB_DATAOUT) 1319 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, 1320 BUS_DMASYNC_POSTWRITE); 1321 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_ccb_dmamap); 1322 } 1323 ac->ac_flags &= ~AMR_CMD_MAPPED; 1324 } 1325} 1326 1327static void 1328amr_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1329{ 1330 struct amr_command *ac = arg; 1331 struct amr_softc *sc = ac->ac_sc; 1332 1333 amr_setup_dmamap(arg, segs, nsegs, err); 1334 1335 if (ac->ac_flags & AMR_CMD_DATAIN) 1336 bus_dmamap_sync(sc->amr_buffer_dmat,ac->ac_dmamap,BUS_DMASYNC_PREREAD); 1337 if (ac->ac_flags & AMR_CMD_DATAOUT) 1338 bus_dmamap_sync(sc->amr_buffer_dmat,ac->ac_dmamap,BUS_DMASYNC_PREWRITE); 1339 ac->ac_flags |= AMR_CMD_MAPPED; 1340 1341 amr_start1(sc, ac); 1342} 1343 1344/******************************************************************************** 1345 * Take a command and give it to the controller, returns 0 if successful, or 1346 * EBUSY if the command should be retried later. 1347 */ 1348static int 1349amr_start(struct amr_command *ac) 1350{ 1351 struct amr_softc *sc; 1352 int error = 0; 1353 1354 debug_called(3); 1355 1356 /* mark command as busy so that polling consumer can tell */ 1357 sc = ac->ac_sc; 1358 ac->ac_flags |= AMR_CMD_BUSY; 1359 1360 /* get a command slot (freed in amr_done) */ 1361 if (amr_getslot(ac)) { 1362 return(EBUSY); 1363 } 1364 1365 /* Now we have a slot, we can map the command (unmapped in amr_complete). */ 1366 if ((error = amr_mapcmd(ac)) == ENOMEM) { 1367 /* 1368 * Memroy resources are short, so free the slot and let this be tried 1369 * later. 1370 */ 1371 sc->amr_busycmd[ac->ac_slot] = NULL; 1372 sc->amr_busyslots--; 1373 } 1374 1375 return (error); 1376} 1377 1378 1379static int 1380amr_start1(struct amr_softc *sc, struct amr_command *ac) 1381{ 1382 int done, s, i; 1383 1384 /* mark the new mailbox we are going to copy in as busy */ 1385 ac->ac_mailbox.mb_busy = 1; 1386 1387 /* clear the poll/ack fields in the mailbox */ 1388 sc->amr_mailbox->mb_poll = 0; 1389 sc->amr_mailbox->mb_ack = 0; 1390 1391 /* 1392 * Save the slot number so that we can locate this command when complete. 1393 * Note that ident = 0 seems to be special, so we don't use it. 1394 */ 1395 ac->ac_mailbox.mb_ident = ac->ac_slot + 1; 1396 1397 /* 1398 * Spin waiting for the mailbox, give up after ~1 second. We expect the 1399 * controller to be able to handle our I/O. 1400 * 1401 * XXX perhaps we should wait for less time, and count on the deferred command 1402 * handling to deal with retries? 1403 */ 1404 debug(4, "wait for mailbox"); 1405 for (i = 10000, done = 0; (i > 0) && !done; i--) { 1406 s = splbio(); 1407 1408 /* is the mailbox free? */ 1409 if (sc->amr_mailbox->mb_busy == 0) { 1410 debug(4, "got mailbox"); 1411 sc->amr_mailbox64->mb64_segment = 0; 1412 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE); 1413 done = 1; 1414 1415 /* not free, spin waiting */ 1416 } else { 1417 debug(4, "busy flag %x\n", sc->amr_mailbox->mb_busy); 1418 /* this is somewhat ugly */ 1419 DELAY(100); 1420 } 1421 splx(s); /* drop spl to allow completion interrupts */ 1422 } 1423 1424 /* 1425 * Now give the command to the controller 1426 */ 1427 if (done) { 1428 if (sc->amr_submit_command(sc)) { 1429 /* the controller wasn't ready to take the command, forget that we tried to post it */ 1430 sc->amr_mailbox->mb_busy = 0; 1431 return(EBUSY); 1432 } 1433 debug(3, "posted command"); 1434 return(0); 1435 } 1436 1437 /* 1438 * The controller wouldn't take the command. Return the command as busy 1439 * so that it is retried later. 1440 */ 1441 return(EBUSY); 1442} 1443 1444/******************************************************************************** 1445 * Extract one or more completed commands from the controller (sc) 1446 * 1447 * Returns nonzero if any commands on the work queue were marked as completed. 1448 */ 1449 1450int 1451amr_done(struct amr_softc *sc) 1452{ 1453 struct amr_command *ac; 1454 struct amr_mailbox mbox; 1455 int i, idx, result; 1456 1457 debug_called(3); 1458 1459 /* See if there's anything for us to do */ 1460 result = 0; 1461 1462 /* loop collecting completed commands */ 1463 for (;;) { 1464 /* poll for a completed command's identifier and status */ 1465 if (sc->amr_get_work(sc, &mbox)) { 1466 result = 1; 1467 1468 /* iterate over completed commands in this result */ 1469 for (i = 0; i < mbox.mb_nstatus; i++) { 1470 /* get pointer to busy command */ 1471 idx = mbox.mb_completed[i] - 1; 1472 ac = sc->amr_busycmd[idx]; 1473 1474 /* really a busy command? */ 1475 if (ac != NULL) { 1476 1477 /* pull the command from the busy index */ 1478 sc->amr_busycmd[idx] = NULL; 1479 sc->amr_busyslots--; 1480 1481 /* save status for later use */ 1482 ac->ac_status = mbox.mb_status; 1483 amr_enqueue_completed(ac); 1484 debug(3, "completed command with status %x", mbox.mb_status); 1485 } else { 1486 device_printf(sc->amr_dev, "bad slot %d completed\n", idx); 1487 } 1488 } 1489 } else { 1490 break; /* no work */ 1491 } 1492 } 1493 1494 /* handle completion and timeouts */ 1495 amr_complete(sc, 0); 1496 1497 return(result); 1498} 1499 1500/******************************************************************************** 1501 * Do completion processing on done commands on (sc) 1502 */ 1503 1504static void 1505amr_complete(void *context, int pending) 1506{ 1507 struct amr_softc *sc = (struct amr_softc *)context; 1508 struct amr_command *ac; 1509 1510 debug_called(3); 1511 1512 /* pull completed commands off the queue */ 1513 for (;;) { 1514 ac = amr_dequeue_completed(sc); 1515 if (ac == NULL) 1516 break; 1517 1518 /* unmap the command's data buffer */ 1519 amr_unmapcmd(ac); 1520 1521 /* unbusy the command */ 1522 ac->ac_flags &= ~AMR_CMD_BUSY; 1523 1524 /* 1525 * Is there a completion handler? 1526 */ 1527 if (ac->ac_complete != NULL) { 1528 ac->ac_complete(ac); 1529 1530 /* 1531 * Is someone sleeping on this one? 1532 */ 1533 } else if (ac->ac_flags & AMR_CMD_SLEEP) { 1534 wakeup(ac); 1535 } 1536 1537 if(!sc->amr_busyslots) { 1538 wakeup(sc); 1539 } 1540 } 1541 1542 sc->amr_state &= ~AMR_STATE_QUEUE_FRZN; 1543 amr_startio(sc); 1544} 1545 1546/******************************************************************************** 1547 ******************************************************************************** 1548 Command Buffer Management 1549 ******************************************************************************** 1550 ********************************************************************************/ 1551 1552/******************************************************************************** 1553 * Get a new command buffer. 1554 * 1555 * This may return NULL in low-memory cases. 1556 * 1557 * If possible, we recycle a command buffer that's been used before. 1558 */ 1559struct amr_command * 1560amr_alloccmd(struct amr_softc *sc) 1561{ 1562 struct amr_command *ac; 1563 1564 debug_called(3); 1565 1566 ac = amr_dequeue_free(sc); 1567 if (ac == NULL) { 1568 amr_alloccmd_cluster(sc); 1569 ac = amr_dequeue_free(sc); 1570 } 1571 if (ac == NULL) { 1572 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1573 return(NULL); 1574 } 1575 1576 /* clear out significant fields */ 1577 ac->ac_status = 0; 1578 bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox)); 1579 ac->ac_flags = 0; 1580 ac->ac_bio = NULL; 1581 ac->ac_data = NULL; 1582 ac->ac_ccb_data = NULL; 1583 ac->ac_complete = NULL; 1584 return(ac); 1585} 1586 1587/******************************************************************************** 1588 * Release a command buffer for recycling. 1589 */ 1590void 1591amr_releasecmd(struct amr_command *ac) 1592{ 1593 debug_called(3); 1594 1595 amr_enqueue_free(ac); 1596} 1597 1598/******************************************************************************** 1599 * Allocate a new command cluster and initialise it. 1600 */ 1601static void 1602amr_alloccmd_cluster(struct amr_softc *sc) 1603{ 1604 struct amr_command_cluster *acc; 1605 struct amr_command *ac; 1606 int s, i, nextslot; 1607 1608 if (sc->amr_nextslot > sc->amr_maxio) 1609 return; 1610 acc = malloc(AMR_CMD_CLUSTERSIZE, M_DEVBUF, M_NOWAIT | M_ZERO); 1611 if (acc != NULL) { 1612 s = splbio(); 1613 nextslot = sc->amr_nextslot; 1614 TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link); 1615 splx(s); 1616 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) { 1617 ac = &acc->acc_command[i]; 1618 ac->ac_sc = sc; 1619 ac->ac_slot = nextslot; 1620 if (!bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap) && 1621 !bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_ccb_dmamap)) 1622 amr_releasecmd(ac); 1623 if (++nextslot > sc->amr_maxio) 1624 break; 1625 } 1626 sc->amr_nextslot = nextslot; 1627 } 1628} 1629 1630/******************************************************************************** 1631 * Free a command cluster 1632 */ 1633static void 1634amr_freecmd_cluster(struct amr_command_cluster *acc) 1635{ 1636 struct amr_softc *sc = acc->acc_command[0].ac_sc; 1637 int i; 1638 1639 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) 1640 bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap); 1641 free(acc, M_DEVBUF); 1642} 1643 1644/******************************************************************************** 1645 ******************************************************************************** 1646 Interface-specific Shims 1647 ******************************************************************************** 1648 ********************************************************************************/ 1649 1650/******************************************************************************** 1651 * Tell the controller that the mailbox contains a valid command 1652 */ 1653static int 1654amr_quartz_submit_command(struct amr_softc *sc) 1655{ 1656 debug_called(3); 1657 1658 if (AMR_QGET_IDB(sc) & AMR_QIDB_SUBMIT) 1659 return(EBUSY); 1660 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT); 1661 return(0); 1662} 1663 1664static int 1665amr_std_submit_command(struct amr_softc *sc) 1666{ 1667 debug_called(3); 1668 1669 if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG) 1670 return(EBUSY); 1671 AMR_SPOST_COMMAND(sc); 1672 return(0); 1673} 1674 1675/******************************************************************************** 1676 * Claim any work that the controller has completed; acknowledge completion, 1677 * save details of the completion in (mbsave) 1678 */ 1679static int 1680amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave) 1681{ 1682 int s, worked; 1683 u_int32_t outd; 1684 u_int8_t nstatus; 1685 1686 debug_called(3); 1687 1688 worked = 0; 1689 s = splbio(); 1690 1691 /* work waiting for us? */ 1692 if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) { 1693 1694 /* acknowledge interrupt */ 1695 AMR_QPUT_ODB(sc, AMR_QODB_READY); 1696 1697 while ((nstatus = sc->amr_mailbox->mb_nstatus) == 0xff) 1698 ; 1699 sc->amr_mailbox->mb_nstatus = 0xff; 1700 1701 /* save mailbox, which contains a list of completed commands */ 1702 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave)); 1703 mbsave->mb_nstatus = nstatus; 1704 1705 /* acknowledge that we have the commands */ 1706 AMR_QPUT_IDB(sc, AMR_QIDB_ACK); 1707 1708#ifndef AMR_QUARTZ_GOFASTER 1709 /* 1710 * This waits for the controller to notice that we've taken the 1711 * command from it. It's very inefficient, and we shouldn't do it, 1712 * but if we remove this code, we stop completing commands under 1713 * load. 1714 * 1715 * Peter J says we shouldn't do this. The documentation says we 1716 * should. Who is right? 1717 */ 1718 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK) 1719 ; /* XXX aiee! what if it dies? */ 1720#endif 1721 1722 worked = 1; /* got some work */ 1723 } 1724 1725 splx(s); 1726 return(worked); 1727} 1728 1729static int 1730amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave) 1731{ 1732 int s, worked; 1733 u_int8_t istat; 1734 1735 debug_called(3); 1736 1737 worked = 0; 1738 s = splbio(); 1739 1740 /* check for valid interrupt status */ 1741 istat = AMR_SGET_ISTAT(sc); 1742 if ((istat & AMR_SINTR_VALID) != 0) { 1743 AMR_SPUT_ISTAT(sc, istat); /* ack interrupt status */ 1744 1745 /* save mailbox, which contains a list of completed commands */ 1746 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave)); 1747 1748 AMR_SACK_INTERRUPT(sc); /* acknowledge we have the mailbox */ 1749 worked = 1; 1750 } 1751 1752 splx(s); 1753 return(worked); 1754} 1755 1756/******************************************************************************** 1757 * Notify the controller of the mailbox location. 1758 */ 1759static void 1760amr_std_attach_mailbox(struct amr_softc *sc) 1761{ 1762 1763 /* program the mailbox physical address */ 1764 AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys & 0xff); 1765 AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >> 8) & 0xff); 1766 AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff); 1767 AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff); 1768 AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR); 1769 1770 /* clear any outstanding interrupt and enable interrupts proper */ 1771 AMR_SACK_INTERRUPT(sc); 1772 AMR_SENABLE_INTR(sc); 1773} 1774 1775#ifdef AMR_BOARD_INIT 1776/******************************************************************************** 1777 * Initialise the controller 1778 */ 1779static int 1780amr_quartz_init(struct amr_softc *sc) 1781{ 1782 int status, ostatus; 1783 1784 device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc)); 1785 1786 AMR_QRESET(sc); 1787 1788 ostatus = 0xff; 1789 while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) { 1790 if (status != ostatus) { 1791 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status)); 1792 ostatus = status; 1793 } 1794 switch (status) { 1795 case AMR_QINIT_NOMEM: 1796 return(ENOMEM); 1797 1798 case AMR_QINIT_SCAN: 1799 /* XXX we could print channel/target here */ 1800 break; 1801 } 1802 } 1803 return(0); 1804} 1805 1806static int 1807amr_std_init(struct amr_softc *sc) 1808{ 1809 int status, ostatus; 1810 1811 device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc)); 1812 1813 AMR_SRESET(sc); 1814 1815 ostatus = 0xff; 1816 while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) { 1817 if (status != ostatus) { 1818 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status)); 1819 ostatus = status; 1820 } 1821 switch (status) { 1822 case AMR_SINIT_NOMEM: 1823 return(ENOMEM); 1824 1825 case AMR_SINIT_INPROG: 1826 /* XXX we could print channel/target here? */ 1827 break; 1828 } 1829 } 1830 return(0); 1831} 1832#endif 1833 1834/******************************************************************************** 1835 ******************************************************************************** 1836 Debugging 1837 ******************************************************************************** 1838 ********************************************************************************/ 1839 1840/******************************************************************************** 1841 * Identify the controller and print some information about it. 1842 */ 1843static void 1844amr_describe_controller(struct amr_softc *sc) 1845{ 1846 struct amr_prodinfo *ap; 1847 struct amr_enquiry *ae; 1848 char *prod; 1849 1850 mtx_lock(&sc->amr_io_lock); 1851 /* 1852 * Try to get 40LD product info, which tells us what the card is labelled as. 1853 */ 1854 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) != NULL) { 1855 device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n", 1856 ap->ap_product, ap->ap_firmware, ap->ap_bios, 1857 ap->ap_memsize); 1858 1859 free(ap, M_DEVBUF); 1860 mtx_unlock(&sc->amr_io_lock); 1861 return; 1862 } 1863 1864 /* 1865 * Try 8LD extended ENQUIRY to get controller signature, and use lookup table. 1866 */ 1867 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) != NULL) { 1868 prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature); 1869 1870 } else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) != NULL) { 1871 1872 /* 1873 * Try to work it out based on the PCI signatures. 1874 */ 1875 switch (pci_get_device(sc->amr_dev)) { 1876 case 0x9010: 1877 prod = "Series 428"; 1878 break; 1879 case 0x9060: 1880 prod = "Series 434"; 1881 break; 1882 default: 1883 prod = "unknown controller"; 1884 break; 1885 } 1886 } else { 1887 prod = "unsupported controller"; 1888 } 1889 1890 /* 1891 * HP NetRaid controllers have a special encoding of the firmware and 1892 * BIOS versions. The AMI version seems to have it as strings whereas 1893 * the HP version does it with a leading uppercase character and two 1894 * binary numbers. 1895 */ 1896 1897 if(ae->ae_adapter.aa_firmware[2] >= 'A' && 1898 ae->ae_adapter.aa_firmware[2] <= 'Z' && 1899 ae->ae_adapter.aa_firmware[1] < ' ' && 1900 ae->ae_adapter.aa_firmware[0] < ' ' && 1901 ae->ae_adapter.aa_bios[2] >= 'A' && 1902 ae->ae_adapter.aa_bios[2] <= 'Z' && 1903 ae->ae_adapter.aa_bios[1] < ' ' && 1904 ae->ae_adapter.aa_bios[0] < ' ') { 1905 1906 /* this looks like we have an HP NetRaid version of the MegaRaid */ 1907 1908 if(ae->ae_signature == AMR_SIG_438) { 1909 /* the AMI 438 is a NetRaid 3si in HP-land */ 1910 prod = "HP NetRaid 3si"; 1911 } 1912 1913 device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n", 1914 prod, ae->ae_adapter.aa_firmware[2], 1915 ae->ae_adapter.aa_firmware[1], 1916 ae->ae_adapter.aa_firmware[0], 1917 ae->ae_adapter.aa_bios[2], 1918 ae->ae_adapter.aa_bios[1], 1919 ae->ae_adapter.aa_bios[0], 1920 ae->ae_adapter.aa_memorysize); 1921 } else { 1922 device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n", 1923 prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios, 1924 ae->ae_adapter.aa_memorysize); 1925 } 1926 free(ae, M_DEVBUF); 1927 mtx_unlock(&sc->amr_io_lock); 1928} 1929 1930int 1931amr_dump_blocks(struct amr_softc *sc, int unit, u_int32_t lba, void *data, int blks) 1932{ 1933 struct amr_command *ac; 1934 int error = EIO; 1935 1936 debug_called(1); 1937 1938 sc->amr_state |= AMR_STATE_INTEN; 1939 1940 /* get ourselves a command buffer */ 1941 if ((ac = amr_alloccmd(sc)) == NULL) 1942 goto out; 1943 /* set command flags */ 1944 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1945 1946 /* point the command at our data */ 1947 ac->ac_data = data; 1948 ac->ac_length = blks * AMR_BLKSIZE; 1949 1950 /* build the command proper */ 1951 ac->ac_mailbox.mb_command = AMR_CMD_LWRITE; 1952 ac->ac_mailbox.mb_blkcount = blks; 1953 ac->ac_mailbox.mb_lba = lba; 1954 ac->ac_mailbox.mb_drive = unit; 1955 1956 /* can't assume that interrupts are going to work here, so play it safe */ 1957 if (sc->amr_poll_command(ac)) 1958 goto out; 1959 error = ac->ac_status; 1960 1961 out: 1962 if (ac != NULL) 1963 amr_releasecmd(ac); 1964 1965 sc->amr_state &= ~AMR_STATE_INTEN; 1966 return (error); 1967} 1968 1969 1970 1971#ifdef AMR_DEBUG 1972/******************************************************************************** 1973 * Print the command (ac) in human-readable format 1974 */ 1975#if 0 1976static void 1977amr_printcommand(struct amr_command *ac) 1978{ 1979 struct amr_softc *sc = ac->ac_sc; 1980 struct amr_sgentry *sg; 1981 int i; 1982 1983 device_printf(sc->amr_dev, "cmd %x ident %d drive %d\n", 1984 ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive); 1985 device_printf(sc->amr_dev, "blkcount %d lba %d\n", 1986 ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba); 1987 device_printf(sc->amr_dev, "virtaddr %p length %lu\n", ac->ac_data, (unsigned long)ac->ac_length); 1988 device_printf(sc->amr_dev, "sg physaddr %08x nsg %d\n", 1989 ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem); 1990 device_printf(sc->amr_dev, "ccb %p bio %p\n", ac->ac_ccb_data, ac->ac_bio); 1991 1992 /* get base address of s/g table */ 1993 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 1994 for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++) 1995 device_printf(sc->amr_dev, " %x/%d\n", sg->sg_addr, sg->sg_count); 1996} 1997#endif 1998#endif
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