59
60/*
61 * Driver for the AMI MegaRaid family of controllers.
62 */
63
64#include <sys/param.h>
65#include <sys/systm.h>
66#include <sys/malloc.h>
67#include <sys/kernel.h>
68
69#include <dev/amr/amr_compat.h>
70#include <sys/bus.h>
71#include <sys/conf.h>
72#include <sys/stat.h>
73
74#include <machine/bus_memio.h>
75#include <machine/bus_pio.h>
76#include <machine/bus.h>
77#include <machine/resource.h>
78#include <sys/rman.h>
79
80#include <dev/pci/pcireg.h>
81#include <dev/pci/pcivar.h>
82
83#include <dev/amr/amrio.h>
84#include <dev/amr/amrreg.h>
85#include <dev/amr/amrvar.h>
86#define AMR_DEFINE_TABLES
87#include <dev/amr/amr_tables.h>
88
89static d_open_t amr_open;
90static d_close_t amr_close;
91static d_ioctl_t amr_ioctl;
92
93static struct cdevsw amr_cdevsw = {
94 .d_version = D_VERSION,
95 .d_flags = D_NEEDGIANT,
96 .d_open = amr_open,
97 .d_close = amr_close,
98 .d_ioctl = amr_ioctl,
99 .d_name = "amr",
100};
101
102/*
103 * Initialisation, bus interface.
104 */
105static void amr_startup(void *arg);
106
107/*
108 * Command wrappers
109 */
110static int amr_query_controller(struct amr_softc *sc);
111static void *amr_enquiry(struct amr_softc *sc, size_t bufsize,
112 u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual);
113static void amr_completeio(struct amr_command *ac);
114static int amr_support_ext_cdb(struct amr_softc *sc);
115
116/*
117 * Command buffer allocation.
118 */
119static void amr_alloccmd_cluster(struct amr_softc *sc);
120static void amr_freecmd_cluster(struct amr_command_cluster *acc);
121
122/*
123 * Command processing.
124 */
125static int amr_bio_command(struct amr_softc *sc, struct amr_command **acp);
126static int amr_wait_command(struct amr_command *ac);
127static int amr_getslot(struct amr_command *ac);
128static void amr_mapcmd(struct amr_command *ac);
129static void amr_unmapcmd(struct amr_command *ac);
130static int amr_start(struct amr_command *ac);
131static void amr_complete(void *context, int pending);
132
133/*
134 * Status monitoring
135 */
136static void amr_periodic(void *data);
137
138/*
139 * Interface-specific shims
140 */
141static int amr_quartz_submit_command(struct amr_softc *sc);
142static int amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
143static int amr_quartz_poll_command(struct amr_command *ac);
144
145static int amr_std_submit_command(struct amr_softc *sc);
146static int amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
147static int amr_std_poll_command(struct amr_command *ac);
148static void amr_std_attach_mailbox(struct amr_softc *sc);
149
150#ifdef AMR_BOARD_INIT
151static int amr_quartz_init(struct amr_softc *sc);
152static int amr_std_init(struct amr_softc *sc);
153#endif
154
155/*
156 * Debugging
157 */
158static void amr_describe_controller(struct amr_softc *sc);
159#ifdef AMR_DEBUG
160#if 0
161static void amr_printcommand(struct amr_command *ac);
162#endif
163#endif
164
165/********************************************************************************
166 ********************************************************************************
167 Inline Glue
168 ********************************************************************************
169 ********************************************************************************/
170
171/********************************************************************************
172 ********************************************************************************
173 Public Interfaces
174 ********************************************************************************
175 ********************************************************************************/
176
177/********************************************************************************
178 * Initialise the controller and softc.
179 */
180int
181amr_attach(struct amr_softc *sc)
182{
183
184 debug_called(1);
185
186 /*
187 * Initialise per-controller queues.
188 */
189 TAILQ_INIT(&sc->amr_completed);
190 TAILQ_INIT(&sc->amr_freecmds);
191 TAILQ_INIT(&sc->amr_cmd_clusters);
192 TAILQ_INIT(&sc->amr_ready);
193 bioq_init(&sc->amr_bioq);
194
195#if __FreeBSD_version >= 500005
196 /*
197 * Initialise command-completion task.
198 */
199 TASK_INIT(&sc->amr_task_complete, 0, amr_complete, sc);
200#endif
201
202 debug(2, "queue init done");
203
204 /*
205 * Configure for this controller type.
206 */
207 if (AMR_IS_QUARTZ(sc)) {
208 sc->amr_submit_command = amr_quartz_submit_command;
209 sc->amr_get_work = amr_quartz_get_work;
210 sc->amr_poll_command = amr_quartz_poll_command;
211 } else {
212 sc->amr_submit_command = amr_std_submit_command;
213 sc->amr_get_work = amr_std_get_work;
214 sc->amr_poll_command = amr_std_poll_command;
215 amr_std_attach_mailbox(sc);;
216 }
217
218#ifdef AMR_BOARD_INIT
219 if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc))))
220 return(ENXIO);
221#endif
222
223 /*
224 * Quiz controller for features and limits.
225 */
226 if (amr_query_controller(sc))
227 return(ENXIO);
228
229 debug(2, "controller query complete");
230
231 /*
232 * Attach our 'real' SCSI channels to CAM.
233 */
234 if (amr_cam_attach(sc))
235 return(ENXIO);
236 debug(2, "CAM attach done");
237
238 /*
239 * Create the control device.
240 */
241 sc->amr_dev_t = make_dev(&amr_cdevsw, device_get_unit(sc->amr_dev), UID_ROOT, GID_OPERATOR,
242 S_IRUSR | S_IWUSR, "amr%d", device_get_unit(sc->amr_dev));
243 sc->amr_dev_t->si_drv1 = sc;
244
245 /*
246 * Schedule ourselves to bring the controller up once interrupts are
247 * available.
248 */
249 bzero(&sc->amr_ich, sizeof(struct intr_config_hook));
250 sc->amr_ich.ich_func = amr_startup;
251 sc->amr_ich.ich_arg = sc;
252 if (config_intrhook_establish(&sc->amr_ich) != 0) {
253 device_printf(sc->amr_dev, "can't establish configuration hook\n");
254 return(ENOMEM);
255 }
256
257 /*
258 * Print a little information about the controller.
259 */
260 amr_describe_controller(sc);
261
262 debug(2, "attach complete");
263 return(0);
264}
265
266/********************************************************************************
267 * Locate disk resources and attach children to them.
268 */
269static void
270amr_startup(void *arg)
271{
272 struct amr_softc *sc = (struct amr_softc *)arg;
273 struct amr_logdrive *dr;
274 int i, error;
275
276 debug_called(1);
277
278 /* pull ourselves off the intrhook chain */
279 config_intrhook_disestablish(&sc->amr_ich);
280
281 /* get up-to-date drive information */
282 if (amr_query_controller(sc)) {
283 device_printf(sc->amr_dev, "can't scan controller for drives\n");
284 return;
285 }
286
287 /* iterate over available drives */
288 for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) {
289 /* are we already attached to this drive? */
290 if (dr->al_disk == 0) {
291 /* generate geometry information */
292 if (dr->al_size > 0x200000) { /* extended translation? */
293 dr->al_heads = 255;
294 dr->al_sectors = 63;
295 } else {
296 dr->al_heads = 64;
297 dr->al_sectors = 32;
298 }
299 dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors);
300
301 dr->al_disk = device_add_child(sc->amr_dev, NULL, -1);
302 if (dr->al_disk == 0)
303 device_printf(sc->amr_dev, "device_add_child failed\n");
304 device_set_ivars(dr->al_disk, dr);
305 }
306 }
307
308 if ((error = bus_generic_attach(sc->amr_dev)) != 0)
309 device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error);
310
311 /* mark controller back up */
312 sc->amr_state &= ~AMR_STATE_SHUTDOWN;
313
314 /* interrupts will be enabled before we do anything more */
315 sc->amr_state |= AMR_STATE_INTEN;
316
317 /*
318 * Start the timeout routine.
319 */
320/* sc->amr_timeout = timeout(amr_periodic, sc, hz);*/
321
322 return;
323}
324
325/*******************************************************************************
326 * Free resources associated with a controller instance
327 */
328void
329amr_free(struct amr_softc *sc)
330{
331 struct amr_command_cluster *acc;
332
333 /* detach from CAM */
334 amr_cam_detach(sc);
335
336 /* cancel status timeout */
337 untimeout(amr_periodic, sc, sc->amr_timeout);
338
339 /* throw away any command buffers */
340 while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) {
341 TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link);
342 amr_freecmd_cluster(acc);
343 }
344
345 /* destroy control device */
346 if( sc->amr_dev_t != (struct cdev *)NULL)
347 destroy_dev(sc->amr_dev_t);
348}
349
350/*******************************************************************************
351 * Receive a bio structure from a child device and queue it on a particular
352 * disk resource, then poke the disk resource to start as much work as it can.
353 */
354int
355amr_submit_bio(struct amr_softc *sc, struct bio *bio)
356{
357 debug_called(2);
358
359 amr_enqueue_bio(sc, bio);
360 amr_startio(sc);
361 return(0);
362}
363
364/********************************************************************************
365 * Accept an open operation on the control device.
366 */
367static int
368amr_open(struct cdev *dev, int flags, int fmt, d_thread_t *td)
369{
370 int unit = minor(dev);
371 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit);
372
373 debug_called(1);
374
375 sc->amr_state |= AMR_STATE_OPEN;
376 return(0);
377}
378
379/********************************************************************************
380 * Accept the last close on the control device.
381 */
382static int
383amr_close(struct cdev *dev, int flags, int fmt, d_thread_t *td)
384{
385 int unit = minor(dev);
386 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit);
387
388 debug_called(1);
389
390 sc->amr_state &= ~AMR_STATE_OPEN;
391 return (0);
392}
393
394/********************************************************************************
395 * Handle controller-specific control operations.
396 */
397static int
398amr_ioctl(struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag, d_thread_t *td)
399{
400 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1;
401 union {
402 void *_p;
403 struct amr_user_ioctl *au;
404#ifdef AMR_IO_COMMAND32
405 struct amr_user_ioctl32 *au32;
406#endif
407 int *result;
408 } arg;
409 struct amr_command *ac;
410 struct amr_mailbox_ioctl *mbi;
411 struct amr_passthrough *ap;
412 void *dp, *au_buffer;
413 unsigned long au_length;
414 unsigned char *au_cmd;
415 int *au_statusp, au_direction;
416 int error;
417
418 debug_called(1);
419
420 arg._p = (void *)addr;
421
422 switch(cmd) {
423
424 case AMR_IO_VERSION:
425 debug(1, "AMR_IO_VERSION");
426 *arg.result = AMR_IO_VERSION_NUMBER;
427 return(0);
428
429#ifdef AMR_IO_COMMAND32
430 /*
431 * Accept ioctl-s from 32-bit binaries on non-32-bit
432 * platforms, such as AMD. LSI's MEGAMGR utility is
433 * the only example known today... -mi
434 */
435 case AMR_IO_COMMAND32:
436 debug(1, "AMR_IO_COMMAND32 0x%x", arg.au32->au_cmd[0]);
437 au_cmd = arg.au32->au_cmd;
438 au_buffer = (void *)(u_int64_t)arg.au32->au_buffer;
439 au_length = arg.au32->au_length;
440 au_direction = arg.au32->au_direction;
441 au_statusp = &arg.au32->au_status;
442 break;
443#endif
444
445 case AMR_IO_COMMAND:
446 debug(1, "AMR_IO_COMMAND 0x%x", arg.au->au_cmd[0]);
447 au_cmd = arg.au->au_cmd;
448 au_buffer = (void *)arg.au->au_buffer;
449 au_length = arg.au->au_length;
450 au_direction = arg.au->au_direction;
451 au_statusp = &arg.au->au_status;
452 break;
453
454 default:
455 debug(1, "unknown ioctl 0x%lx", cmd);
456 return(ENOIOCTL);
457 }
458
459 error = 0;
460 dp = NULL;
461 ap = NULL;
462 ac = NULL;
463
464 /* handle inbound data buffer */
465 if (au_length != 0) {
466 if ((dp = malloc(au_length, M_DEVBUF, M_WAITOK)) == NULL)
467 return(ENOMEM);
468
469 if ((error = copyin(au_buffer, dp, au_length)) != 0)
470 goto out;
471 debug(2, "copyin %ld bytes from %p -> %p", au_length, au_buffer, dp);
472 }
473
474 if ((ac = amr_alloccmd(sc)) == NULL) {
475 error = ENOMEM;
476 goto out;
477 }
478
479 /* handle SCSI passthrough command */
480 if (au_cmd[0] == AMR_CMD_PASS) {
481 if ((ap = malloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) {
482 error = ENOMEM;
483 goto out;
484 }
485
486 /* copy cdb */
487 ap->ap_cdb_length = au_cmd[2];
488 bcopy(au_cmd + 3, ap->ap_cdb, ap->ap_cdb_length);
489
490 /* build passthrough */
491 ap->ap_timeout = au_cmd[ap->ap_cdb_length + 3] & 0x07;
492 ap->ap_ars = (au_cmd[ap->ap_cdb_length + 3] & 0x08) ? 1 : 0;
493 ap->ap_islogical = (au_cmd[ap->ap_cdb_length + 3] & 0x80) ? 1 : 0;
494 ap->ap_logical_drive_no = au_cmd[ap->ap_cdb_length + 4];
495 ap->ap_channel = au_cmd[ap->ap_cdb_length + 5];
496 ap->ap_scsi_id = au_cmd[ap->ap_cdb_length + 6];
497 ap->ap_request_sense_length = 14;
498 ap->ap_data_transfer_length = au_length;
499 /* XXX what about the request-sense area? does the caller want it? */
500
501 /* build command */
502 ac->ac_data = ap;
503 ac->ac_length = sizeof(*ap);
504 ac->ac_flags |= AMR_CMD_DATAOUT;
505 ac->ac_ccb_data = dp;
506 ac->ac_ccb_length = au_length;
507 if (au_direction & AMR_IO_READ)
508 ac->ac_flags |= AMR_CMD_CCB_DATAIN;
509 if (au_direction & AMR_IO_WRITE)
510 ac->ac_flags |= AMR_CMD_CCB_DATAOUT;
511
512 ac->ac_mailbox.mb_command = AMR_CMD_PASS;
513
514 } else {
515 /* direct command to controller */
516 mbi = (struct amr_mailbox_ioctl *)&ac->ac_mailbox;
517
518 /* copy pertinent mailbox items */
519 mbi->mb_command = au_cmd[0];
520 mbi->mb_channel = au_cmd[1];
521 mbi->mb_param = au_cmd[2];
522 mbi->mb_pad[0] = au_cmd[3];
523 mbi->mb_drive = au_cmd[4];
524
525 /* build the command */
526 ac->ac_data = dp;
527 ac->ac_length = au_length;
528 if (au_direction & AMR_IO_READ)
529 ac->ac_flags |= AMR_CMD_DATAIN;
530 if (au_direction & AMR_IO_WRITE)
531 ac->ac_flags |= AMR_CMD_DATAOUT;
532 }
533
534 /* run the command */
535 if ((error = amr_wait_command(ac)) != 0)
536 goto out;
537
538 /* copy out data and set status */
539 if (au_length != 0)
540 error = copyout(dp, au_buffer, au_length);
541 debug(2, "copyout %ld bytes from %p -> %p", au_length, dp, au_buffer);
542 if (dp != NULL)
543 debug(2, "%16d", (int)dp);
544 *au_statusp = ac->ac_status;
545
546out:
547 if (dp != NULL)
548 free(dp, M_DEVBUF);
549 if (ap != NULL)
550 free(ap, M_DEVBUF);
551 if (ac != NULL)
552 amr_releasecmd(ac);
553 return(error);
554}
555
556/********************************************************************************
557 ********************************************************************************
558 Status Monitoring
559 ********************************************************************************
560 ********************************************************************************/
561
562/********************************************************************************
563 * Perform a periodic check of the controller status
564 */
565static void
566amr_periodic(void *data)
567{
568 struct amr_softc *sc = (struct amr_softc *)data;
569
570 debug_called(2);
571
572 /* XXX perform periodic status checks here */
573
574 /* compensate for missed interrupts */
575 amr_done(sc);
576
577 /* reschedule */
578 sc->amr_timeout = timeout(amr_periodic, sc, hz);
579}
580
581/********************************************************************************
582 ********************************************************************************
583 Command Wrappers
584 ********************************************************************************
585 ********************************************************************************/
586
587/********************************************************************************
588 * Interrogate the controller for the operational parameters we require.
589 */
590static int
591amr_query_controller(struct amr_softc *sc)
592{
593 struct amr_enquiry3 *aex;
594 struct amr_prodinfo *ap;
595 struct amr_enquiry *ae;
596 int ldrv;
597
598 /*
599 * If we haven't found the real limit yet, let us have a couple of commands in
600 * order to be able to probe.
601 */
602 if (sc->amr_maxio == 0)
603 sc->amr_maxio = 2;
604
605 /*
606 * Greater than 10 byte cdb support
607 */
608 sc->support_ext_cdb = amr_support_ext_cdb(sc);
609
610 if(sc->support_ext_cdb) {
611 debug(2,"supports extended CDBs.");
612 }
613
614 /*
615 * Try to issue an ENQUIRY3 command
616 */
617 if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3,
618 AMR_CONFIG_ENQ3_SOLICITED_FULL)) != NULL) {
619
620 /*
621 * Fetch current state of logical drives.
622 */
623 for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) {
624 sc->amr_drive[ldrv].al_size = aex->ae_drivesize[ldrv];
625 sc->amr_drive[ldrv].al_state = aex->ae_drivestate[ldrv];
626 sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv];
627 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
628 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
629 }
630 free(aex, M_DEVBUF);
631
632 /*
633 * Get product info for channel count.
634 */
635 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) == NULL) {
636 device_printf(sc->amr_dev, "can't obtain product data from controller\n");
637 return(1);
638 }
639 sc->amr_maxdrives = 40;
640 sc->amr_maxchan = ap->ap_nschan;
641 sc->amr_maxio = ap->ap_maxio;
642 sc->amr_type |= AMR_TYPE_40LD;
643 free(ap, M_DEVBUF);
644
645 } else {
646
647 /* failed, try the 8LD ENQUIRY commands */
648 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) == NULL) {
649 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) == NULL) {
650 device_printf(sc->amr_dev, "can't obtain configuration data from controller\n");
651 return(1);
652 }
653 ae->ae_signature = 0;
654 }
655
656 /*
657 * Fetch current state of logical drives.
658 */
659 for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) {
660 sc->amr_drive[ldrv].al_size = ae->ae_ldrv.al_size[ldrv];
661 sc->amr_drive[ldrv].al_state = ae->ae_ldrv.al_state[ldrv];
662 sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv];
663 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
664 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
665 }
666
667 sc->amr_maxdrives = 8;
668 sc->amr_maxchan = ae->ae_adapter.aa_channels;
669 sc->amr_maxio = ae->ae_adapter.aa_maxio;
670 free(ae, M_DEVBUF);
671 }
672
673 /*
674 * Mark remaining drives as unused.
675 */
676 for (; ldrv < AMR_MAXLD; ldrv++)
677 sc->amr_drive[ldrv].al_size = 0xffffffff;
678
679 /*
680 * Cap the maximum number of outstanding I/Os. AMI's Linux driver doesn't trust
681 * the controller's reported value, and lockups have been seen when we do.
682 */
683 sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD);
684
685 return(0);
686}
687
688/********************************************************************************
689 * Run a generic enquiry-style command.
690 */
691static void *
692amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual)
693{
694 struct amr_command *ac;
695 void *result;
696 u_int8_t *mbox;
697 int error;
698
699 debug_called(1);
700
701 error = 1;
702 result = NULL;
703
704 /* get ourselves a command buffer */
705 if ((ac = amr_alloccmd(sc)) == NULL)
706 goto out;
707 /* allocate the response structure */
708 if ((result = malloc(bufsize, M_DEVBUF, M_NOWAIT)) == NULL)
709 goto out;
710 /* set command flags */
|
712
713 /* point the command at our data */
714 ac->ac_data = result;
715 ac->ac_length = bufsize;
716
717 /* build the command proper */
718 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */
719 mbox[0] = cmd;
720 mbox[2] = cmdsub;
721 mbox[3] = cmdqual;
722
723 /* can't assume that interrupts are going to work here, so play it safe */
724 if (sc->amr_poll_command(ac))
725 goto out;
726 error = ac->ac_status;
727
728 out:
729 if (ac != NULL)
730 amr_releasecmd(ac);
731 if ((error != 0) && (result != NULL)) {
732 free(result, M_DEVBUF);
733 result = NULL;
734 }
735 return(result);
736}
737
738/********************************************************************************
739 * Flush the controller's internal cache, return status.
740 */
741int
742amr_flush(struct amr_softc *sc)
743{
744 struct amr_command *ac;
745 int error;
746
747 /* get ourselves a command buffer */
748 error = 1;
749 if ((ac = amr_alloccmd(sc)) == NULL)
750 goto out;
751 /* set command flags */
752 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
753
754 /* build the command proper */
755 ac->ac_mailbox.mb_command = AMR_CMD_FLUSH;
756
757 /* we have to poll, as the system may be going down or otherwise damaged */
758 if (sc->amr_poll_command(ac))
759 goto out;
760 error = ac->ac_status;
761
762 out:
763 if (ac != NULL)
764 amr_releasecmd(ac);
765 return(error);
766}
767
768/********************************************************************************
769 * Detect extented cdb >> greater than 10 byte cdb support
770 * returns '1' means this support exist
771 * returns '0' means this support doesn't exist
772 */
773static int
774amr_support_ext_cdb(struct amr_softc *sc)
775{
776 struct amr_command *ac;
777 u_int8_t *mbox;
778 int error;
779
780 /* get ourselves a command buffer */
781 error = 0;
782 if ((ac = amr_alloccmd(sc)) == NULL)
783 goto out;
784 /* set command flags */
785 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
786
787 /* build the command proper */
788 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */
789 mbox[0] = 0xA4;
790 mbox[2] = 0x16;
791
792
793 /* we have to poll, as the system may be going down or otherwise damaged */
794 if (sc->amr_poll_command(ac))
795 goto out;
796 if( ac->ac_status == AMR_STATUS_SUCCESS ) {
797 error = 1;
798 }
799
800out:
801 if (ac != NULL)
802 amr_releasecmd(ac);
803 return(error);
804}
805
806/********************************************************************************
807 * Try to find I/O work for the controller from one or more of the work queues.
808 *
809 * We make the assumption that if the controller is not ready to take a command
810 * at some given time, it will generate an interrupt at some later time when
811 * it is.
812 */
813void
814amr_startio(struct amr_softc *sc)
815{
816 struct amr_command *ac;
817
818 /* spin until something prevents us from doing any work */
819 for (;;) {
820
821 /* try to get a ready command */
822 ac = amr_dequeue_ready(sc);
823
824 /* if that failed, build a command from a bio */
825 if (ac == NULL)
826 (void)amr_bio_command(sc, &ac);
827
828 /* if that failed, build a command from a ccb */
829 if (ac == NULL)
830 (void)amr_cam_command(sc, &ac);
831
832 /* if we don't have anything to do, give up */
833 if (ac == NULL)
834 break;
835
836 /* try to give the command to the controller; if this fails save it for later and give up */
837 if (amr_start(ac)) {
838 debug(2, "controller busy, command deferred");
839 amr_requeue_ready(ac); /* XXX schedule retry very soon? */
840 break;
841 }
842 }
843}
844
845/********************************************************************************
846 * Handle completion of an I/O command.
847 */
848static void
849amr_completeio(struct amr_command *ac)
850{
851 struct amr_softc *sc = ac->ac_sc;
852
853 if (ac->ac_status != AMR_STATUS_SUCCESS) { /* could be more verbose here? */
854 ac->ac_bio->bio_error = EIO;
855 ac->ac_bio->bio_flags |= BIO_ERROR;
856
857 device_printf(sc->amr_dev, "I/O error - 0x%x\n", ac->ac_status);
858/* amr_printcommand(ac);*/
859 }
860 amrd_intr(ac->ac_bio);
861 amr_releasecmd(ac);
862}
863
864/********************************************************************************
865 ********************************************************************************
866 Command Processing
867 ********************************************************************************
868 ********************************************************************************/
869
870/********************************************************************************
871 * Convert a bio off the top of the bio queue into a command.
872 */
873static int
874amr_bio_command(struct amr_softc *sc, struct amr_command **acp)
875{
876 struct amr_command *ac;
877 struct amrd_softc *amrd;
878 struct bio *bio;
879 int error;
880 int blkcount;
881 int driveno;
882 int cmd;
883
884 ac = NULL;
885 error = 0;
886
887 /* get a bio to work on */
888 if ((bio = amr_dequeue_bio(sc)) == NULL)
889 goto out;
890
891 /* get a command */
892 if ((ac = amr_alloccmd(sc)) == NULL) {
893 error = ENOMEM;
894 goto out;
895 }
896
897 /* connect the bio to the command */
898 ac->ac_complete = amr_completeio;
899 ac->ac_bio = bio;
900 ac->ac_data = bio->bio_data;
901 ac->ac_length = bio->bio_bcount;
902 if (BIO_IS_READ(bio)) {
903 ac->ac_flags |= AMR_CMD_DATAIN;
904 cmd = AMR_CMD_LREAD;
905 } else {
906 ac->ac_flags |= AMR_CMD_DATAOUT;
907 cmd = AMR_CMD_LWRITE;
908 }
909 amrd = (struct amrd_softc *)bio->bio_disk->d_drv1;
910 driveno = amrd->amrd_drive - sc->amr_drive;
911 blkcount = (bio->bio_bcount + AMR_BLKSIZE - 1) / AMR_BLKSIZE;
912
913 ac->ac_mailbox.mb_command = cmd;
914 ac->ac_mailbox.mb_blkcount = blkcount;
915 ac->ac_mailbox.mb_lba = bio->bio_pblkno;
916 ac->ac_mailbox.mb_drive = driveno;
917 /* we fill in the s/g related data when the command is mapped */
918
919 if ((bio->bio_pblkno + blkcount) > sc->amr_drive[driveno].al_size)
920 device_printf(sc->amr_dev, "I/O beyond end of unit (%lld,%d > %lu)\n",
921 (long long)bio->bio_pblkno, blkcount,
922 (u_long)sc->amr_drive[driveno].al_size);
923
924out:
925 if (error != 0) {
926 if (ac != NULL)
927 amr_releasecmd(ac);
928 if (bio != NULL) /* this breaks ordering... */
929 amr_enqueue_bio(sc, bio);
930 }
931 *acp = ac;
932 return(error);
933}
934
935/********************************************************************************
936 * Take a command, submit it to the controller and sleep until it completes
937 * or fails. Interrupts must be enabled, returns nonzero on error.
938 */
939static int
940amr_wait_command(struct amr_command *ac)
941{
942 int error, count;
943
944 debug_called(1);
945
946 ac->ac_complete = NULL;
947 ac->ac_flags |= AMR_CMD_SLEEP;
948 if ((error = amr_start(ac)) != 0)
949 return(error);
950
951 count = 0;
952 /* XXX better timeout? */
953 while ((ac->ac_flags & AMR_CMD_BUSY) && (count < 30)) {
954 tsleep(ac, PRIBIO | PCATCH, "amrwcmd", hz);
955 }
956 return(0);
957}
958
959/********************************************************************************
960 * Take a command, submit it to the controller and busy-wait for it to return.
961 * Returns nonzero on error. Can be safely called with interrupts enabled.
962 */
963static int
964amr_std_poll_command(struct amr_command *ac)
965{
966 struct amr_softc *sc = ac->ac_sc;
967 int error, count;
968
969 debug_called(2);
970
971 ac->ac_complete = NULL;
972 if ((error = amr_start(ac)) != 0)
973 return(error);
974
975 count = 0;
976 do {
977 /*
978 * Poll for completion, although the interrupt handler may beat us to it.
979 * Note that the timeout here is somewhat arbitrary.
980 */
981 amr_done(sc);
982 DELAY(1000);
983 } while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000));
984 if (!(ac->ac_flags & AMR_CMD_BUSY)) {
985 error = 0;
986 } else {
987 /* XXX the slot is now marked permanently busy */
988 error = EIO;
989 device_printf(sc->amr_dev, "polled command timeout\n");
990 }
991 return(error);
992}
993
994/********************************************************************************
995 * Take a command, submit it to the controller and busy-wait for it to return.
996 * Returns nonzero on error. Can be safely called with interrupts enabled.
997 */
998static int
999amr_quartz_poll_command(struct amr_command *ac)
1000{
1001 struct amr_softc *sc = ac->ac_sc;
1002 int s;
1003 int error,count;
1004
1005 debug_called(2);
1006
1007 /* now we have a slot, we can map the command (unmapped in amr_complete) */
1008 amr_mapcmd(ac);
1009
1010 s = splbio();
1011
1012 if ((sc->amr_state & AMR_STATE_CRASHDUMP) == 0) {
1013 count=0;
1014 while (sc->amr_busyslots) {
1015 tsleep(sc, PRIBIO | PCATCH, "amrpoll", hz);
1016 if(count++>10) {
1017 break;
1018 }
1019 }
1020
1021 if(sc->amr_busyslots) {
1022 device_printf(sc->amr_dev, "adapter is busy\n");
1023 splx(s);
1024 amr_unmapcmd(ac);
1025 ac->ac_status=0;
1026 return(1);
1027 }
1028 }
1029
1030 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE);
1031
1032 /* clear the poll/ack fields in the mailbox */
1033 sc->amr_mailbox->mb_ident = 0xFE;
1034 sc->amr_mailbox->mb_nstatus = 0xFF;
1035 sc->amr_mailbox->mb_status = 0xFF;
1036 sc->amr_mailbox->mb_poll = 0;
1037 sc->amr_mailbox->mb_ack = 0;
1038 sc->amr_mailbox->mb_busy = 1;
1039
1040 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
1041
1042 while(sc->amr_mailbox->mb_nstatus == 0xFF);
1043 while(sc->amr_mailbox->mb_status == 0xFF);
1044 ac->ac_status=sc->amr_mailbox->mb_status;
1045 error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0;
1046 while(sc->amr_mailbox->mb_poll != 0x77);
1047 sc->amr_mailbox->mb_poll = 0;
1048 sc->amr_mailbox->mb_ack = 0x77;
1049
1050 /* acknowledge that we have the commands */
1051 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK);
1052 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK);
1053
1054 splx(s);
1055
1056 /* unmap the command's data buffer */
1057 amr_unmapcmd(ac);
1058
1059 return(error);
1060}
1061
1062/********************************************************************************
1063 * Get a free command slot for a command if it doesn't already have one.
1064 *
1065 * May be safely called multiple times for a given command.
1066 */
1067static int
1068amr_getslot(struct amr_command *ac)
1069{
1070 struct amr_softc *sc = ac->ac_sc;
1071 int s, slot, limit, error;
1072
1073 debug_called(3);
1074
1075 /* if the command already has a slot, don't try to give it another one */
1076 if (ac->ac_slot != 0)
1077 return(0);
1078
1079 /* enforce slot usage limit */
1080 limit = (ac->ac_flags & AMR_CMD_PRIORITY) ? sc->amr_maxio : sc->amr_maxio - 4;
1081 if (sc->amr_busyslots > limit)
1082 return(EBUSY);
1083
1084 /*
1085 * Allocate a slot. XXX linear scan is slow
1086 */
1087 error = EBUSY;
1088 s = splbio();
1089 for (slot = 0; slot < sc->amr_maxio; slot++) {
1090 if (sc->amr_busycmd[slot] == NULL) {
1091 sc->amr_busycmd[slot] = ac;
1092 sc->amr_busyslots++;
1093 ac->ac_slot = slot;
1094 error = 0;
1095 break;
1096 }
1097 }
1098 splx(s);
1099
1100 return(error);
1101}
1102
1103/********************************************************************************
1104 * Map/unmap (ac)'s data in the controller's addressable space as required.
1105 *
1106 * These functions may be safely called multiple times on a given command.
1107 */
1108static void
1109amr_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1110{
1111 struct amr_command *ac = (struct amr_command *)arg;
1112 struct amr_softc *sc = ac->ac_sc;
1113 struct amr_sgentry *sg;
1114 int i;
1115 u_int8_t *sgc;
1116
1117 debug_called(3);
1118
1119 /* get base address of s/g table */
1120 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1121
1122 /* save data physical address */
1123 ac->ac_dataphys = segs[0].ds_addr;
1124
1125 /* for AMR_CMD_CONFIG the s/g count goes elsewhere */
1126 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG) {
1127 sgc = &(((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param);
1128 } else {
1129 sgc = &ac->ac_mailbox.mb_nsgelem;
1130 }
1131
1132 /* decide whether we need to populate the s/g table */
1133 if (nsegments < 2) {
1134 *sgc = 0;
1135 ac->ac_mailbox.mb_nsgelem = 0;
1136 ac->ac_mailbox.mb_physaddr = ac->ac_dataphys;
1137 } else {
1138 ac->ac_mailbox.mb_nsgelem = nsegments;
1139 *sgc = nsegments;
1140 ac->ac_mailbox.mb_physaddr = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1141 for (i = 0; i < nsegments; i++, sg++) {
1142 sg->sg_addr = segs[i].ds_addr;
1143 sg->sg_count = segs[i].ds_len;
1144 }
1145 }
1146}
1147
1148static void
1149amr_setup_ccbmap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1150{
1151 struct amr_command *ac = (struct amr_command *)arg;
1152 struct amr_softc *sc = ac->ac_sc;
1153 struct amr_sgentry *sg;
1154 struct amr_passthrough *ap = (struct amr_passthrough *)ac->ac_data;
1155 struct amr_ext_passthrough *aep = (struct amr_ext_passthrough *)ac->ac_data;
1156 int i;
1157
1158 /* get base address of s/g table */
1159 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1160
1161 /* decide whether we need to populate the s/g table */
1162 if( ac->ac_mailbox.mb_command == AMR_CMD_EXTPASS ) {
1163 if (nsegments < 2) {
1164 aep->ap_no_sg_elements = 0;
1165 aep->ap_data_transfer_address = segs[0].ds_addr;
1166 } else {
1167 /* save s/g table information in passthrough */
1168 aep->ap_no_sg_elements = nsegments;
1169 aep->ap_data_transfer_address = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1170 /* populate s/g table (overwrites previous call which mapped the passthrough) */
1171 for (i = 0; i < nsegments; i++, sg++) {
1172 sg->sg_addr = segs[i].ds_addr;
1173 sg->sg_count = segs[i].ds_len;
1174 debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count);
1175 }
1176 }
1177 debug(3, "slot %d %d segments at 0x%x, passthrough at 0x%x", ac->ac_slot,
1178 aep->ap_no_sg_elements, aep->ap_data_transfer_address, ac->ac_dataphys);
1179 } else {
1180 if (nsegments < 2) {
1181 ap->ap_no_sg_elements = 0;
1182 ap->ap_data_transfer_address = segs[0].ds_addr;
1183 } else {
1184 /* save s/g table information in passthrough */
1185 ap->ap_no_sg_elements = nsegments;
1186 ap->ap_data_transfer_address = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1187 /* populate s/g table (overwrites previous call which mapped the passthrough) */
1188 for (i = 0; i < nsegments; i++, sg++) {
1189 sg->sg_addr = segs[i].ds_addr;
1190 sg->sg_count = segs[i].ds_len;
1191 debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count);
1192 }
1193 }
1194 debug(3, "slot %d %d segments at 0x%x, passthrough at 0x%x", ac->ac_slot,
1195 ap->ap_no_sg_elements, ap->ap_data_transfer_address, ac->ac_dataphys);
1196 }
1197}
1198
1199static void
1200amr_mapcmd(struct amr_command *ac)
1201{
1202 struct amr_softc *sc = ac->ac_sc;
1203
1204 debug_called(3);
1205
1206 /* if the command involves data at all, and hasn't been mapped */
1207 if (!(ac->ac_flags & AMR_CMD_MAPPED)) {
1208
1209 if (ac->ac_data != NULL) {
1210 /* map the data buffers into bus space and build the s/g list */
1211 bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_dmamap, ac->ac_data, ac->ac_length,
1212 amr_setup_dmamap, ac, 0);
1213 if (ac->ac_flags & AMR_CMD_DATAIN)
1214 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_PREREAD);
1215 if (ac->ac_flags & AMR_CMD_DATAOUT)
1216 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_PREWRITE);
1217 }
1218
1219 if (ac->ac_ccb_data != NULL) {
1220 bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, ac->ac_ccb_data, ac->ac_ccb_length,
1221 amr_setup_ccbmap, ac, 0);
1222 if (ac->ac_flags & AMR_CMD_CCB_DATAIN)
1223 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_PREREAD);
1224 if (ac->ac_flags & AMR_CMD_CCB_DATAOUT)
1225 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_PREWRITE);
1226 }
1227 ac->ac_flags |= AMR_CMD_MAPPED;
1228 }
1229}
1230
1231static void
1232amr_unmapcmd(struct amr_command *ac)
1233{
1234 struct amr_softc *sc = ac->ac_sc;
1235
1236 debug_called(3);
1237
1238 /* if the command involved data at all and was mapped */
1239 if (ac->ac_flags & AMR_CMD_MAPPED) {
1240
1241 if (ac->ac_data != NULL) {
1242 if (ac->ac_flags & AMR_CMD_DATAIN)
1243 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_POSTREAD);
1244 if (ac->ac_flags & AMR_CMD_DATAOUT)
1245 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_POSTWRITE);
1246 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_dmamap);
1247 }
1248
1249 if (ac->ac_ccb_data != NULL) {
1250 if (ac->ac_flags & AMR_CMD_CCB_DATAIN)
1251 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_POSTREAD);
1252 if (ac->ac_flags & AMR_CMD_CCB_DATAOUT)
1253 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_POSTWRITE);
1254 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_ccb_dmamap);
1255 }
1256 ac->ac_flags &= ~AMR_CMD_MAPPED;
1257 }
1258}
1259
1260/********************************************************************************
1261 * Take a command and give it to the controller, returns 0 if successful, or
1262 * EBUSY if the command should be retried later.
1263 */
1264static int
1265amr_start(struct amr_command *ac)
1266{
1267 struct amr_softc *sc = ac->ac_sc;
1268 int done, s, i;
1269
1270 debug_called(3);
1271
1272 /* mark command as busy so that polling consumer can tell */
1273 ac->ac_flags |= AMR_CMD_BUSY;
1274
1275 /* get a command slot (freed in amr_done) */
1276 if (amr_getslot(ac))
1277 return(EBUSY);
1278
1279 /* now we have a slot, we can map the command (unmapped in amr_complete) */
1280 amr_mapcmd(ac);
1281
1282 /* mark the new mailbox we are going to copy in as busy */
1283 ac->ac_mailbox.mb_busy = 1;
1284
1285 /* clear the poll/ack fields in the mailbox */
1286 sc->amr_mailbox->mb_poll = 0;
1287 sc->amr_mailbox->mb_ack = 0;
1288
1289 /*
1290 * Save the slot number so that we can locate this command when complete.
1291 * Note that ident = 0 seems to be special, so we don't use it.
1292 */
1293 ac->ac_mailbox.mb_ident = ac->ac_slot + 1;
1294
1295 /*
1296 * Spin waiting for the mailbox, give up after ~1 second. We expect the
1297 * controller to be able to handle our I/O.
1298 *
1299 * XXX perhaps we should wait for less time, and count on the deferred command
1300 * handling to deal with retries?
1301 */
1302 debug(4, "wait for mailbox");
1303 for (i = 10000, done = 0; (i > 0) && !done; i--) {
1304 s = splbio();
1305
1306 /* is the mailbox free? */
1307 if (sc->amr_mailbox->mb_busy == 0) {
1308 debug(4, "got mailbox");
1309 sc->amr_mailbox64->mb64_segment = 0;
1310 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE);
1311 done = 1;
1312
1313 /* not free, spin waiting */
1314 } else {
1315 debug(4, "busy flag %x\n", sc->amr_mailbox->mb_busy);
1316 /* this is somewhat ugly */
1317 DELAY(100);
1318 }
1319 splx(s); /* drop spl to allow completion interrupts */
1320 }
1321
1322 /*
1323 * Now give the command to the controller
1324 */
1325 if (done) {
1326 if (sc->amr_submit_command(sc)) {
1327 /* the controller wasn't ready to take the command, forget that we tried to post it */
1328 sc->amr_mailbox->mb_busy = 0;
1329 return(EBUSY);
1330 }
1331 debug(3, "posted command");
1332 return(0);
1333 }
1334
1335 /*
1336 * The controller wouldn't take the command. Return the command as busy
1337 * so that it is retried later.
1338 */
1339 return(EBUSY);
1340}
1341
1342/********************************************************************************
1343 * Extract one or more completed commands from the controller (sc)
1344 *
1345 * Returns nonzero if any commands on the work queue were marked as completed.
1346 */
1347int
1348amr_done(struct amr_softc *sc)
1349{
1350 struct amr_command *ac;
1351 struct amr_mailbox mbox;
1352 int i, idx, result;
1353
1354 debug_called(3);
1355
1356 /* See if there's anything for us to do */
1357 result = 0;
1358
1359 /* loop collecting completed commands */
1360 for (;;) {
1361 /* poll for a completed command's identifier and status */
1362 if (sc->amr_get_work(sc, &mbox)) {
1363 result = 1;
1364
1365 /* iterate over completed commands in this result */
1366 for (i = 0; i < mbox.mb_nstatus; i++) {
1367 /* get pointer to busy command */
1368 idx = mbox.mb_completed[i] - 1;
1369 ac = sc->amr_busycmd[idx];
1370
1371 /* really a busy command? */
1372 if (ac != NULL) {
1373
1374 /* pull the command from the busy index */
1375 sc->amr_busycmd[idx] = NULL;
1376 sc->amr_busyslots--;
1377
1378 /* save status for later use */
1379 ac->ac_status = mbox.mb_status;
1380 amr_enqueue_completed(ac);
1381 debug(3, "completed command with status %x", mbox.mb_status);
1382 } else {
1383 device_printf(sc->amr_dev, "bad slot %d completed\n", idx);
1384 }
1385 }
1386 } else {
1387 break; /* no work */
1388 }
1389 }
1390
1391 /* if we've completed any commands, try posting some more */
1392 if (result)
1393 amr_startio(sc);
1394
1395 /* handle completion and timeouts */
1396#if __FreeBSD_version >= 500005
1397 if (sc->amr_state & AMR_STATE_INTEN)
1398 taskqueue_enqueue(taskqueue_swi_giant, &sc->amr_task_complete);
1399 else
1400#endif
1401 amr_complete(sc, 0);
1402
1403 return(result);
1404}
1405
1406/********************************************************************************
1407 * Do completion processing on done commands on (sc)
1408 */
1409static void
1410amr_complete(void *context, int pending)
1411{
1412 struct amr_softc *sc = (struct amr_softc *)context;
1413 struct amr_command *ac;
1414
1415 debug_called(3);
1416
1417 /* pull completed commands off the queue */
1418 for (;;) {
1419 ac = amr_dequeue_completed(sc);
1420 if (ac == NULL)
1421 break;
1422
1423 /* unmap the command's data buffer */
1424 amr_unmapcmd(ac);
1425
1426 /* unbusy the command */
1427 ac->ac_flags &= ~AMR_CMD_BUSY;
1428
1429 /*
1430 * Is there a completion handler?
1431 */
1432 if (ac->ac_complete != NULL) {
1433 ac->ac_complete(ac);
1434
1435 /*
1436 * Is someone sleeping on this one?
1437 */
1438 } else if (ac->ac_flags & AMR_CMD_SLEEP) {
1439 wakeup(ac);
1440 }
1441
1442 if(!sc->amr_busyslots) {
1443 wakeup(sc);
1444 }
1445 }
1446}
1447
1448/********************************************************************************
1449 ********************************************************************************
1450 Command Buffer Management
1451 ********************************************************************************
1452 ********************************************************************************/
1453
1454/********************************************************************************
1455 * Get a new command buffer.
1456 *
1457 * This may return NULL in low-memory cases.
1458 *
1459 * If possible, we recycle a command buffer that's been used before.
1460 */
1461struct amr_command *
1462amr_alloccmd(struct amr_softc *sc)
1463{
1464 struct amr_command *ac;
1465
1466 debug_called(3);
1467
1468 ac = amr_dequeue_free(sc);
1469 if (ac == NULL) {
1470 amr_alloccmd_cluster(sc);
1471 ac = amr_dequeue_free(sc);
1472 }
1473 if (ac == NULL)
1474 return(NULL);
1475
1476 /* clear out significant fields */
1477 ac->ac_slot = 0;
1478 ac->ac_status = 0;
1479 bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox));
1480 ac->ac_flags = 0;
1481 ac->ac_bio = NULL;
1482 ac->ac_data = NULL;
1483 ac->ac_ccb_data = NULL;
1484 ac->ac_complete = NULL;
1485 return(ac);
1486}
1487
1488/********************************************************************************
1489 * Release a command buffer for recycling.
1490 */
1491void
1492amr_releasecmd(struct amr_command *ac)
1493{
1494 debug_called(3);
1495
1496 amr_enqueue_free(ac);
1497}
1498
1499/********************************************************************************
1500 * Allocate a new command cluster and initialise it.
1501 */
1502static void
1503amr_alloccmd_cluster(struct amr_softc *sc)
1504{
1505 struct amr_command_cluster *acc;
1506 struct amr_command *ac;
1507 int s, i;
1508
1509 acc = malloc(AMR_CMD_CLUSTERSIZE, M_DEVBUF, M_NOWAIT);
1510 if (acc != NULL) {
1511 s = splbio();
1512 TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link);
1513 splx(s);
1514 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) {
1515 ac = &acc->acc_command[i];
1516 bzero(ac, sizeof(*ac));
1517 ac->ac_sc = sc;
1518 if (!bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap) &&
1519 !bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_ccb_dmamap))
1520 amr_releasecmd(ac);
1521 }
1522 }
1523}
1524
1525/********************************************************************************
1526 * Free a command cluster
1527 */
1528static void
1529amr_freecmd_cluster(struct amr_command_cluster *acc)
1530{
1531 struct amr_softc *sc = acc->acc_command[0].ac_sc;
1532 int i;
1533
1534 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++)
1535 bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap);
1536 free(acc, M_DEVBUF);
1537}
1538
1539/********************************************************************************
1540 ********************************************************************************
1541 Interface-specific Shims
1542 ********************************************************************************
1543 ********************************************************************************/
1544
1545/********************************************************************************
1546 * Tell the controller that the mailbox contains a valid command
1547 */
1548static int
1549amr_quartz_submit_command(struct amr_softc *sc)
1550{
1551 debug_called(3);
1552
1553 if (AMR_QGET_IDB(sc) & AMR_QIDB_SUBMIT)
1554 return(EBUSY);
1555 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
1556 return(0);
1557}
1558
1559static int
1560amr_std_submit_command(struct amr_softc *sc)
1561{
1562 debug_called(3);
1563
1564 if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG)
1565 return(EBUSY);
1566 AMR_SPOST_COMMAND(sc);
1567 return(0);
1568}
1569
1570/********************************************************************************
1571 * Claim any work that the controller has completed; acknowledge completion,
1572 * save details of the completion in (mbsave)
1573 */
1574static int
1575amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
1576{
1577 int s, worked;
1578 u_int32_t outd;
1579
1580 debug_called(3);
1581
1582 worked = 0;
1583 s = splbio();
1584
1585 /* work waiting for us? */
1586 if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) {
1587
1588 /* save mailbox, which contains a list of completed commands */
1589 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave));
1590
1591 /* acknowledge interrupt */
1592 AMR_QPUT_ODB(sc, AMR_QODB_READY);
1593
1594 /* acknowledge that we have the commands */
1595 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK);
1596
1597#ifndef AMR_QUARTZ_GOFASTER
1598 /*
1599 * This waits for the controller to notice that we've taken the
1600 * command from it. It's very inefficient, and we shouldn't do it,
1601 * but if we remove this code, we stop completing commands under
1602 * load.
1603 *
1604 * Peter J says we shouldn't do this. The documentation says we
1605 * should. Who is right?
1606 */
1607 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK)
1608 ; /* XXX aiee! what if it dies? */
1609#endif
1610
1611 worked = 1; /* got some work */
1612 }
1613
1614 splx(s);
1615 return(worked);
1616}
1617
1618static int
1619amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
1620{
1621 int s, worked;
1622 u_int8_t istat;
1623
1624 debug_called(3);
1625
1626 worked = 0;
1627 s = splbio();
1628
1629 /* check for valid interrupt status */
1630 istat = AMR_SGET_ISTAT(sc);
1631 if ((istat & AMR_SINTR_VALID) != 0) {
1632 AMR_SPUT_ISTAT(sc, istat); /* ack interrupt status */
1633
1634 /* save mailbox, which contains a list of completed commands */
1635 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave));
1636
1637 AMR_SACK_INTERRUPT(sc); /* acknowledge we have the mailbox */
1638 worked = 1;
1639 }
1640
1641 splx(s);
1642 return(worked);
1643}
1644
1645/********************************************************************************
1646 * Notify the controller of the mailbox location.
1647 */
1648static void
1649amr_std_attach_mailbox(struct amr_softc *sc)
1650{
1651
1652 /* program the mailbox physical address */
1653 AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys & 0xff);
1654 AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >> 8) & 0xff);
1655 AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff);
1656 AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff);
1657 AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR);
1658
1659 /* clear any outstanding interrupt and enable interrupts proper */
1660 AMR_SACK_INTERRUPT(sc);
1661 AMR_SENABLE_INTR(sc);
1662}
1663
1664#ifdef AMR_BOARD_INIT
1665/********************************************************************************
1666 * Initialise the controller
1667 */
1668static int
1669amr_quartz_init(struct amr_softc *sc)
1670{
1671 int status, ostatus;
1672
1673 device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc));
1674
1675 AMR_QRESET(sc);
1676
1677 ostatus = 0xff;
1678 while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) {
1679 if (status != ostatus) {
1680 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status));
1681 ostatus = status;
1682 }
1683 switch (status) {
1684 case AMR_QINIT_NOMEM:
1685 return(ENOMEM);
1686
1687 case AMR_QINIT_SCAN:
1688 /* XXX we could print channel/target here */
1689 break;
1690 }
1691 }
1692 return(0);
1693}
1694
1695static int
1696amr_std_init(struct amr_softc *sc)
1697{
1698 int status, ostatus;
1699
1700 device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc));
1701
1702 AMR_SRESET(sc);
1703
1704 ostatus = 0xff;
1705 while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) {
1706 if (status != ostatus) {
1707 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status));
1708 ostatus = status;
1709 }
1710 switch (status) {
1711 case AMR_SINIT_NOMEM:
1712 return(ENOMEM);
1713
1714 case AMR_SINIT_INPROG:
1715 /* XXX we could print channel/target here? */
1716 break;
1717 }
1718 }
1719 return(0);
1720}
1721#endif
1722
1723/********************************************************************************
1724 ********************************************************************************
1725 Debugging
1726 ********************************************************************************
1727 ********************************************************************************/
1728
1729/********************************************************************************
1730 * Identify the controller and print some information about it.
1731 */
1732static void
1733amr_describe_controller(struct amr_softc *sc)
1734{
1735 struct amr_prodinfo *ap;
1736 struct amr_enquiry *ae;
1737 char *prod;
1738
1739 /*
1740 * Try to get 40LD product info, which tells us what the card is labelled as.
1741 */
1742 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) != NULL) {
1743 device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n",
1744 ap->ap_product, ap->ap_firmware, ap->ap_bios,
1745 ap->ap_memsize);
1746
1747 free(ap, M_DEVBUF);
1748 return;
1749 }
1750
1751 /*
1752 * Try 8LD extended ENQUIRY to get controller signature, and use lookup table.
1753 */
1754 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) != NULL) {
1755 prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature);
1756
1757 } else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) != NULL) {
1758
1759 /*
1760 * Try to work it out based on the PCI signatures.
1761 */
1762 switch (pci_get_device(sc->amr_dev)) {
1763 case 0x9010:
1764 prod = "Series 428";
1765 break;
1766 case 0x9060:
1767 prod = "Series 434";
1768 break;
1769 default:
1770 prod = "unknown controller";
1771 break;
1772 }
1773 } else {
1774 prod = "unsupported controller";
1775 }
1776
1777 /*
1778 * HP NetRaid controllers have a special encoding of the firmware and
1779 * BIOS versions. The AMI version seems to have it as strings whereas
1780 * the HP version does it with a leading uppercase character and two
1781 * binary numbers.
1782 */
1783
1784 if(ae->ae_adapter.aa_firmware[2] >= 'A' &&
1785 ae->ae_adapter.aa_firmware[2] <= 'Z' &&
1786 ae->ae_adapter.aa_firmware[1] < ' ' &&
1787 ae->ae_adapter.aa_firmware[0] < ' ' &&
1788 ae->ae_adapter.aa_bios[2] >= 'A' &&
1789 ae->ae_adapter.aa_bios[2] <= 'Z' &&
1790 ae->ae_adapter.aa_bios[1] < ' ' &&
1791 ae->ae_adapter.aa_bios[0] < ' ') {
1792
1793 /* this looks like we have an HP NetRaid version of the MegaRaid */
1794
1795 if(ae->ae_signature == AMR_SIG_438) {
1796 /* the AMI 438 is a NetRaid 3si in HP-land */
1797 prod = "HP NetRaid 3si";
1798 }
1799
1800 device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n",
1801 prod, ae->ae_adapter.aa_firmware[2],
1802 ae->ae_adapter.aa_firmware[1],
1803 ae->ae_adapter.aa_firmware[0],
1804 ae->ae_adapter.aa_bios[2],
1805 ae->ae_adapter.aa_bios[1],
1806 ae->ae_adapter.aa_bios[0],
1807 ae->ae_adapter.aa_memorysize);
1808 } else {
1809 device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n",
1810 prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios,
1811 ae->ae_adapter.aa_memorysize);
1812 }
1813 free(ae, M_DEVBUF);
1814}
1815
1816int
1817amr_dump_blocks(struct amr_softc *sc, int unit, u_int32_t lba, void *data, int blks)
1818{
1819 struct amr_command *ac;
1820 int error = EIO;
1821
1822 debug_called(1);
1823
1824 sc->amr_state |= AMR_STATE_CRASHDUMP;
1825
1826 /* get ourselves a command buffer */
1827 if ((ac = amr_alloccmd(sc)) == NULL)
1828 goto out;
1829 /* set command flags */
1830 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
1831
1832 /* point the command at our data */
1833 ac->ac_data = data;
1834 ac->ac_length = blks * AMR_BLKSIZE;
1835
1836 /* build the command proper */
1837 ac->ac_mailbox.mb_command = AMR_CMD_LWRITE;
1838 ac->ac_mailbox.mb_blkcount = blks;
1839 ac->ac_mailbox.mb_lba = lba;
1840 ac->ac_mailbox.mb_drive = unit;
1841
1842 /* can't assume that interrupts are going to work here, so play it safe */
1843 if (sc->amr_poll_command(ac))
1844 goto out;
1845 error = ac->ac_status;
1846
1847 out:
1848 if (ac != NULL)
1849 amr_releasecmd(ac);
1850
1851 sc->amr_state &= ~AMR_STATE_CRASHDUMP;
1852 return (error);
1853}
1854
1855
1856
1857#ifdef AMR_DEBUG
1858/********************************************************************************
1859 * Print the command (ac) in human-readable format
1860 */
1861#if 0
1862static void
1863amr_printcommand(struct amr_command *ac)
1864{
1865 struct amr_softc *sc = ac->ac_sc;
1866 struct amr_sgentry *sg;
1867 int i;
1868
1869 device_printf(sc->amr_dev, "cmd %x ident %d drive %d\n",
1870 ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive);
1871 device_printf(sc->amr_dev, "blkcount %d lba %d\n",
1872 ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba);
1873 device_printf(sc->amr_dev, "virtaddr %p length %lu\n", ac->ac_data, (unsigned long)ac->ac_length);
1874 device_printf(sc->amr_dev, "sg physaddr %08x nsg %d\n",
1875 ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem);
1876 device_printf(sc->amr_dev, "ccb %p bio %p\n", ac->ac_ccb_data, ac->ac_bio);
1877
1878 /* get base address of s/g table */
1879 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1880 for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++)
1881 device_printf(sc->amr_dev, " %x/%d\n", sg->sg_addr, sg->sg_count);
1882}
1883#endif
1884#endif
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