1/*
2 * Generic register and struct definitions for the Adaptech 154x/164x
3 * SCSI host adapters. Product specific probe and attach routines can
4 * be found in:
5 * aha 1540/1542B/1542C/1542CF/1542CP aha_isa.c
6 *
7 * Copyright (c) 1998 M. Warner Losh.
8 * All Rights Reserved.
9 *
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions, and the following disclaimer,
16 * without modification, immediately at the beginning of the file.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * Derived from bt.c written by:
33 *
34 * Copyright (c) 1998 Justin T. Gibbs.
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions, and the following disclaimer,
42 * without modification, immediately at the beginning of the file.
43 * 2. The name of the author may not be used to endorse or promote products
44 * derived from this software without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
50 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 * SUCH DAMAGE.
57 *
|
58 * $Id: aha.c,v 1.25 1999/05/14 23:10:25 imp Exp $
|
| 58 * $Id: aha.c,v 1.26 1999/05/25 20:15:19 gibbs Exp $ |
59 */
60
61#include "pnp.h"
62
63#include <sys/param.h>
64#include <sys/systm.h>
65#include <sys/malloc.h>
66#include <sys/buf.h>
67#include <sys/kernel.h>
68#include <sys/sysctl.h>
69
70#include <machine/bus_pio.h>
71#include <machine/bus.h>
72#include <machine/clock.h>
73
74#include <cam/cam.h>
75#include <cam/cam_ccb.h>
76#include <cam/cam_sim.h>
77#include <cam/cam_xpt_sim.h>
78#include <cam/cam_debug.h>
79
80#include <cam/scsi/scsi_message.h>
81
82#include <vm/vm.h>
83#include <vm/pmap.h>
84
85#if NPNP > 0
86#include <i386/isa/isa_device.h>
87#include <i386/isa/pnp.h> /* XXX pnp isn't x86 only */
88#endif
89
90#include <dev/aha/ahareg.h>
91
92struct aha_softc *aha_softcs[NAHATOT];
93
94#define MIN(a, b) ((a) < (b) ? (a) : (b))
95#define PRVERB(x) if (bootverbose) printf x
96
97/* Macro to determine that a rev is potentially a new valid one
98 * so that the driver doesn't keep breaking on new revs as it
99 * did for the CF and CP.
100 */
101#define PROBABLY_NEW_BOARD(REV) (REV > 0x43 && REV < 0x56)
102
103#ifndef MAX
104#define MAX(a, b) ((a) > (b) ? (a) : (b))
105#endif
106
107/* MailBox Management functions */
108static __inline void ahanextinbox(struct aha_softc *aha);
109static __inline void ahanextoutbox(struct aha_softc *aha);
110
111static __inline void
112ahanextinbox(struct aha_softc *aha)
113{
114 if (aha->cur_inbox == aha->last_inbox)
115 aha->cur_inbox = aha->in_boxes;
116 else
117 aha->cur_inbox++;
118}
119
120static __inline void
121ahanextoutbox(struct aha_softc *aha)
122{
123 if (aha->cur_outbox == aha->last_outbox)
124 aha->cur_outbox = aha->out_boxes;
125 else
126 aha->cur_outbox++;
127}
128
129#define ahautoa24(u,s3) \
130 (s3)[0] = ((u) >> 16) & 0xff; \
131 (s3)[1] = ((u) >> 8) & 0xff; \
132 (s3)[2] = (u) & 0xff;
133
134#define aha_a24tou(s3) \
135 (((s3)[0] << 16) | ((s3)[1] << 8) | (s3)[2])
136
137/* CCB Mangement functions */
138static __inline u_int32_t ahaccbvtop(struct aha_softc *aha,
139 struct aha_ccb *accb);
140static __inline struct aha_ccb* ahaccbptov(struct aha_softc *aha,
141 u_int32_t ccb_addr);
142
143static __inline u_int32_t
144ahaccbvtop(struct aha_softc *aha, struct aha_ccb *accb)
145{
146 return (aha->aha_ccb_physbase
147 + (u_int32_t)((caddr_t)accb - (caddr_t)aha->aha_ccb_array));
148}
149static __inline struct aha_ccb *
150ahaccbptov(struct aha_softc *aha, u_int32_t ccb_addr)
151{
152 return (aha->aha_ccb_array +
153 + ((struct aha_ccb*)ccb_addr-(struct aha_ccb*)aha->aha_ccb_physbase));
154}
155
156static struct aha_ccb* ahagetccb(struct aha_softc *aha);
157static __inline void ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb);
158static void ahaallocccbs(struct aha_softc *aha);
159static bus_dmamap_callback_t ahaexecuteccb;
160static void ahadone(struct aha_softc *aha, struct aha_ccb *accb,
161 aha_mbi_comp_code_t comp_code);
162
163/* Host adapter command functions */
164static int ahareset(struct aha_softc* aha, int hard_reset);
165
166/* Initialization functions */
167static int ahainitmboxes(struct aha_softc *aha);
168static bus_dmamap_callback_t ahamapmboxes;
169static bus_dmamap_callback_t ahamapccbs;
170static bus_dmamap_callback_t ahamapsgs;
171
172/* Transfer Negotiation Functions */
173static void ahafetchtransinfo(struct aha_softc *aha,
174 struct ccb_trans_settings *cts);
175
176/* CAM SIM entry points */
177#define ccb_accb_ptr spriv_ptr0
178#define ccb_aha_ptr spriv_ptr1
179static void ahaaction(struct cam_sim *sim, union ccb *ccb);
180static void ahapoll(struct cam_sim *sim);
181
182/* Our timeout handler */
183static timeout_t ahatimeout;
184
185u_long aha_unit = 0;
186
187/*
188 * Do our own re-probe protection until a configuration
189 * manager can do it for us. This ensures that we don't
190 * reprobe a card already found by the EISA or PCI probes.
191 */
192static struct aha_isa_port aha_isa_ports[] =
193{
194 { 0x130, 0, 4 },
195 { 0x134, 0, 5 },
196 { 0x230, 0, 2 },
197 { 0x234, 0, 3 },
198 { 0x330, 0, 0 },
199 { 0x334, 0, 1 }
200};
201
202/*
203 * I/O ports listed in the order enumerated by the
204 * card for certain op codes.
205 */
206static u_int16_t aha_board_ports[] =
207{
208 0x330,
209 0x334,
210 0x230,
211 0x234,
212 0x130,
213 0x134
214};
215
216/* Exported functions */
217struct aha_softc *
218aha_alloc(int unit, bus_space_tag_t tag, bus_space_handle_t bsh)
219{
220 struct aha_softc *aha;
221
222 if (unit != AHA_TEMP_UNIT) {
223 if (unit >= NAHATOT) {
224 printf("aha: unit number (%d) too high\n", unit);
225 return NULL;
226 }
227
228 /*
229 * Allocate a storage area for us
230 */
231 if (aha_softcs[unit]) {
232 printf("aha%d: memory already allocated\n", unit);
233 return NULL;
234 }
235 }
236
237 aha = malloc(sizeof(struct aha_softc), M_DEVBUF, M_NOWAIT);
238 if (!aha) {
239 printf("aha%d: cannot malloc!\n", unit);
240 return NULL;
241 }
242 bzero(aha, sizeof(struct aha_softc));
243 SLIST_INIT(&aha->free_aha_ccbs);
244 LIST_INIT(&aha->pending_ccbs);
245 SLIST_INIT(&aha->sg_maps);
246 aha->unit = unit;
247 aha->tag = tag;
248 aha->bsh = bsh;
249 aha->ccb_sg_opcode = INITIATOR_SG_CCB_WRESID;
250 aha->ccb_ccb_opcode = INITIATOR_CCB_WRESID;
251
252 if (aha->unit != AHA_TEMP_UNIT) {
253 aha_softcs[unit] = aha;
254 }
255 return (aha);
256}
257
258void
259aha_free(struct aha_softc *aha)
260{
261 switch (aha->init_level) {
262 default:
263 case 8:
264 {
265 struct sg_map_node *sg_map;
266
267 while ((sg_map = SLIST_FIRST(&aha->sg_maps))!= NULL) {
268 SLIST_REMOVE_HEAD(&aha->sg_maps, links);
269 bus_dmamap_unload(aha->sg_dmat,
270 sg_map->sg_dmamap);
271 bus_dmamem_free(aha->sg_dmat, sg_map->sg_vaddr,
272 sg_map->sg_dmamap);
273 free(sg_map, M_DEVBUF);
274 }
275 bus_dma_tag_destroy(aha->sg_dmat);
276 }
277 case 7:
278 bus_dmamap_unload(aha->ccb_dmat, aha->ccb_dmamap);
279 case 6:
280 bus_dmamap_destroy(aha->ccb_dmat, aha->ccb_dmamap);
281 bus_dmamem_free(aha->ccb_dmat, aha->aha_ccb_array,
282 aha->ccb_dmamap);
283 case 5:
284 bus_dma_tag_destroy(aha->ccb_dmat);
285 case 4:
286 bus_dmamap_unload(aha->mailbox_dmat, aha->mailbox_dmamap);
287 case 3:
288 bus_dmamem_free(aha->mailbox_dmat, aha->in_boxes,
289 aha->mailbox_dmamap);
290 bus_dmamap_destroy(aha->mailbox_dmat, aha->mailbox_dmamap);
291 case 2:
292 bus_dma_tag_destroy(aha->buffer_dmat);
293 case 1:
294 bus_dma_tag_destroy(aha->mailbox_dmat);
295 case 0:
296 }
297 if (aha->unit != AHA_TEMP_UNIT) {
298 aha_softcs[aha->unit] = NULL;
299 }
300 free(aha, M_DEVBUF);
301}
302
303/*
304 * Probe the adapter and verify that the card is an Adaptec.
305 */
306int
307aha_probe(struct aha_softc* aha)
308{
309 u_int status;
310 u_int intstat;
311 int error;
312 board_id_data_t board_id;
313
314 /*
315 * See if the three I/O ports look reasonable.
316 * Touch the minimal number of registers in the
317 * failure case.
318 */
319 status = aha_inb(aha, STATUS_REG);
320 if ((status == 0)
321 || (status & (DIAG_ACTIVE|CMD_REG_BUSY|
322 STATUS_REG_RSVD)) != 0) {
323 PRVERB(("%s: status reg test failed %x\n", aha_name(aha),
324 status));
325 return (ENXIO);
326 }
327
328 intstat = aha_inb(aha, INTSTAT_REG);
329 if ((intstat & INTSTAT_REG_RSVD) != 0) {
330 PRVERB(("%s: Failed Intstat Reg Test\n", aha_name(aha)));
331 return (ENXIO);
332 }
333
334 /*
335 * Looking good so far. Final test is to reset the
336 * adapter and fetch the board ID and ensure we aren't
337 * looking at a BusLogic.
338 */
339 if ((error = ahareset(aha, /*hard_reset*/TRUE)) != 0) {
340 if (bootverbose)
341 printf("%s: Failed Reset\n", aha_name(aha));
342 return (ENXIO);
343 }
344
345 /*
346 * Get the board ID. We use this to see if we're dealing with
347 * a buslogic card or a aha card (or clone).
348 */
349 error = aha_cmd(aha, AOP_INQUIRE_BOARD_ID, NULL, /*parmlen*/0,
350 (u_int8_t*)&board_id, sizeof(board_id),
351 DEFAULT_CMD_TIMEOUT);
352 if (error != 0) {
353 PRVERB(("%s: INQUIRE failed %x\n", aha_name(aha), error));
354 return (ENXIO);
355 }
356 aha->fw_major = board_id.firmware_rev_major;
357 aha->fw_minor = board_id.firmware_rev_minor;
358 aha->boardid = board_id.board_type;
359
360 /*
361 * The Buslogic cards have an id of either 0x41 or 0x42. So
362 * if those come up in the probe, we test the geometry register
363 * of the board. Adaptec boards that are this old will not have
364 * this register, and return 0xff, while buslogic cards will return
365 * something different.
366 *
367 * It appears that for reasons unknow, for the for the
368 * aha-1542B cards, we need to wait a little bit before trying
369 * to read the geometry register. I picked 10ms since we have
370 * reports that a for loop to 1000 did the trick, and this
371 * errs on the side of conservatism. Besides, no one will
372 * notice a 10mS delay here, even the 1542B card users :-)
373 *
374 * Some compatible cards return 0 here. Some cards also
375 * seem to return 0x7f.
376 *
377 * XXX I'm not sure how this will impact other cloned cards
378 *
379 * This really should be replaced with the esetup command, since
380 * that appears to be more reliable. This becomes more and more
381 * true over time as we discover more cards that don't read the
382 * geometry register consistantly.
383 */
384 if (aha->boardid <= 0x42) {
385 /* Wait 10ms before reading */
386 DELAY(10000);
387 status = aha_inb(aha, GEOMETRY_REG);
388 if (status != 0xff && status != 0x00 && status != 0x7f) {
389 PRVERB(("%s: Geometry Register test failed 0x%x\n",
390 aha_name(aha), status));
391 return (ENXIO);
392 }
393 }
394
395 return (0);
396}
397
398/*
399 * Pull the boards setup information and record it in our softc.
400 */
401int
402aha_fetch_adapter_info(struct aha_softc *aha)
403{
404 setup_data_t setup_info;
405 config_data_t config_data;
406 u_int8_t length_param;
407 int error;
408 struct aha_extbios extbios;
409
410 switch (aha->boardid) {
411 case BOARD_1540_16HEAD_BIOS:
412 snprintf(aha->model, sizeof(aha->model), "1540 16 head BIOS");
413 break;
414 case BOARD_1540_64HEAD_BIOS:
415 snprintf(aha->model, sizeof(aha->model), "1540 64 head BIOS");
416 break;
417 case BOARD_1542:
418 snprintf(aha->model, sizeof(aha->model), "1540/1542 64 head BIOS");
419 break;
420 case BOARD_1640:
421 snprintf(aha->model, sizeof(aha->model), "1640");
422 break;
423 case BOARD_1740:
424 snprintf(aha->model, sizeof(aha->model), "1740A/1742A/1744");
425 break;
426 case BOARD_1542C:
427 snprintf(aha->model, sizeof(aha->model), "1542C");
428 break;
429 case BOARD_1542CF:
430 snprintf(aha->model, sizeof(aha->model), "1542CF");
431 break;
432 case BOARD_1542CP:
433 snprintf(aha->model, sizeof(aha->model), "1542CP");
434 break;
435 default:
436 snprintf(aha->model, sizeof(aha->model), "Unknown");
437 break;
438 }
439 /*
440 * If we are a new type of 1542 board (anything newer than a 1542C)
441 * then disable the extended bios so that the
442 * mailbox interface is unlocked.
443 * This is also true for the 1542B Version 3.20. First Adaptec
444 * board that supports >1Gb drives.
445 * No need to check the extended bios flags as some of the
446 * extensions that cause us problems are not flagged in that byte.
447 */
448 if (PROBABLY_NEW_BOARD(aha->boardid) ||
449 (aha->boardid == 0x41
450 && aha->fw_major == 0x31 &&
451 aha->fw_minor >= 0x34)) {
452 error = aha_cmd(aha, AOP_RETURN_EXT_BIOS_INFO, NULL,
453 /*paramlen*/0, (u_char *)&extbios, sizeof(extbios),
454 DEFAULT_CMD_TIMEOUT);
455 error = aha_cmd(aha, AOP_MBOX_IF_ENABLE, (u_int8_t *)&extbios,
456 /*paramlen*/2, NULL, 0, DEFAULT_CMD_TIMEOUT);
457 }
458 if (aha->boardid < 0x41)
459 printf("%s: Warning: aha-1542A won't likely work.\n",
460 aha_name(aha));
461
462 aha->max_sg = 17; /* Need >= 17 to do 64k I/O */
463 aha->diff_bus = 0;
464 aha->extended_lun = 0;
465 aha->extended_trans = 0;
466 aha->max_ccbs = 16;
467 /* Determine Sync/Wide/Disc settings */
468 length_param = sizeof(setup_info);
469 error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, &length_param,
470 /*paramlen*/1, (u_int8_t*)&setup_info,
471 sizeof(setup_info), DEFAULT_CMD_TIMEOUT);
472 if (error != 0) {
473 printf("%s: aha_fetch_adapter_info - Failed "
474 "Get Setup Info\n", aha_name(aha));
475 return (error);
476 }
477 if (setup_info.initiate_sync != 0) {
478 aha->sync_permitted = ALL_TARGETS;
479 }
480 aha->disc_permitted = ALL_TARGETS;
481
482 /* We need as many mailboxes as we can have ccbs */
483 aha->num_boxes = aha->max_ccbs;
484
485 /* Determine our SCSI ID */
486
487 error = aha_cmd(aha, AOP_INQUIRE_CONFIG, NULL, /*parmlen*/0,
488 (u_int8_t*)&config_data, sizeof(config_data),
489 DEFAULT_CMD_TIMEOUT);
490 if (error != 0) {
491 printf("%s: aha_fetch_adapter_info - Failed Get Config\n",
492 aha_name(aha));
493 return (error);
494 }
495 aha->scsi_id = config_data.scsi_id;
496 return (0);
497}
498
499/*
500 * Start the board, ready for normal operation
501 */
502int
503aha_init(struct aha_softc* aha)
504{
505 /* Announce the Adapter */
506 printf("%s: AHA-%s FW Rev. %c.%c (ID=%x) ", aha_name(aha),
507 aha->model, aha->fw_major, aha->fw_minor, aha->boardid);
508
509 if (aha->diff_bus != 0)
510 printf("Diff ");
511
512 printf("SCSI Host Adapter, SCSI ID %d, %d CCBs\n", aha->scsi_id,
513 aha->max_ccbs);
514
515 /*
516 * Create our DMA tags. These tags define the kinds of device
517 * accessable memory allocations and memory mappings we will
518 * need to perform during normal operation.
519 *
520 * Unless we need to further restrict the allocation, we rely
521 * on the restrictions of the parent dmat, hence the common
522 * use of MAXADDR and MAXSIZE.
523 */
524
525 /* DMA tag for mapping buffers into device visible space. */
|
526 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/0, /*boundary*/0,
|
| 526 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0, |
527 /*lowaddr*/BUS_SPACE_MAXADDR,
528 /*highaddr*/BUS_SPACE_MAXADDR,
529 /*filter*/NULL, /*filterarg*/NULL,
530 /*maxsize*/MAXBSIZE, /*nsegments*/AHA_NSEG,
531 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
532 /*flags*/BUS_DMA_ALLOCNOW,
533 &aha->buffer_dmat) != 0) {
534 goto error_exit;
535 }
536
537 aha->init_level++;
538 /* DMA tag for our mailboxes */
|
539 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/0, /*boundary*/0,
|
| 539 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0, |
540 /*lowaddr*/BUS_SPACE_MAXADDR,
541 /*highaddr*/BUS_SPACE_MAXADDR,
542 /*filter*/NULL, /*filterarg*/NULL,
543 aha->num_boxes * (sizeof(aha_mbox_in_t)
544 + sizeof(aha_mbox_out_t)),
545 /*nsegments*/1,
546 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
547 /*flags*/0, &aha->mailbox_dmat) != 0) {
548 goto error_exit;
549 }
550
551 aha->init_level++;
552
553 /* Allocation for our mailboxes */
554 if (bus_dmamem_alloc(aha->mailbox_dmat, (void **)&aha->out_boxes,
555 BUS_DMA_NOWAIT, &aha->mailbox_dmamap) != 0) {
556 goto error_exit;
557 }
558
559 aha->init_level++;
560
561 /* And permanently map them */
562 bus_dmamap_load(aha->mailbox_dmat, aha->mailbox_dmamap,
563 aha->out_boxes,
564 aha->num_boxes * (sizeof(aha_mbox_in_t)
565 + sizeof(aha_mbox_out_t)),
566 ahamapmboxes, aha, /*flags*/0);
567
568 aha->init_level++;
569
570 aha->in_boxes = (aha_mbox_in_t *)&aha->out_boxes[aha->num_boxes];
571
572 ahainitmboxes(aha);
573
574 /* DMA tag for our ccb structures */
|
575 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/0, /*boundary*/0,
|
| 575 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0, |
576 /*lowaddr*/BUS_SPACE_MAXADDR,
577 /*highaddr*/BUS_SPACE_MAXADDR,
578 /*filter*/NULL, /*filterarg*/NULL,
579 aha->max_ccbs * sizeof(struct aha_ccb),
580 /*nsegments*/1,
581 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
582 /*flags*/0, &aha->ccb_dmat) != 0) {
583 goto error_exit;
584 }
585
586 aha->init_level++;
587
588 /* Allocation for our ccbs */
589 if (bus_dmamem_alloc(aha->ccb_dmat, (void **)&aha->aha_ccb_array,
590 BUS_DMA_NOWAIT, &aha->ccb_dmamap) != 0) {
591 goto error_exit;
592 }
593
594 aha->init_level++;
595
596 /* And permanently map them */
597 bus_dmamap_load(aha->ccb_dmat, aha->ccb_dmamap,
598 aha->aha_ccb_array,
599 aha->max_ccbs * sizeof(struct aha_ccb),
600 ahamapccbs, aha, /*flags*/0);
601
602 aha->init_level++;
603
604 /* DMA tag for our S/G structures. We allocate in page sized chunks */
|
605 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/0, /*boundary*/0,
|
| 605 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0, |
606 /*lowaddr*/BUS_SPACE_MAXADDR,
607 /*highaddr*/BUS_SPACE_MAXADDR,
608 /*filter*/NULL, /*filterarg*/NULL,
609 PAGE_SIZE, /*nsegments*/1,
610 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
611 /*flags*/0, &aha->sg_dmat) != 0) {
612 goto error_exit;
613 }
614
615 aha->init_level++;
616
617 /* Perform initial CCB allocation */
618 bzero(aha->aha_ccb_array, aha->max_ccbs * sizeof(struct aha_ccb));
619 ahaallocccbs(aha);
620
621 if (aha->num_ccbs == 0) {
622 printf("%s: aha_init - Unable to allocate initial ccbs\n",
623 aha_name(aha));
624 goto error_exit;
625 }
626
627 /*
628 * Note that we are going and return (to probe)
629 */
630 return 0;
631
632error_exit:
633
634 return (ENXIO);
635}
636
637int
638aha_attach(struct aha_softc *aha)
639{
640 int tagged_dev_openings;
641 struct cam_devq *devq;
642
643 /*
644 * We don't do tagged queueing, since the aha cards don't
645 * support it.
646 */
647 tagged_dev_openings = 0;
648
649 /*
650 * Create the device queue for our SIM.
651 */
652 devq = cam_simq_alloc(aha->max_ccbs - 1);
653 if (devq == NULL)
654 return (ENOMEM);
655
656 /*
657 * Construct our SIM entry
658 */
659 aha->sim = cam_sim_alloc(ahaaction, ahapoll, "aha", aha, aha->unit,
660 2, tagged_dev_openings, devq);
661 if (aha->sim == NULL) {
662 cam_simq_free(devq);
663 return (ENOMEM);
664 }
665
666 if (xpt_bus_register(aha->sim, 0) != CAM_SUCCESS) {
667 cam_sim_free(aha->sim, /*free_devq*/TRUE);
668 return (ENXIO);
669 }
670
671 if (xpt_create_path(&aha->path, /*periph*/NULL,
672 cam_sim_path(aha->sim), CAM_TARGET_WILDCARD,
673 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
674 xpt_bus_deregister(cam_sim_path(aha->sim));
675 cam_sim_free(aha->sim, /*free_devq*/TRUE);
676 return (ENXIO);
677 }
678
679 return (0);
680}
681
682char *
683aha_name(struct aha_softc *aha)
684{
685 static char name[10];
686
687 snprintf(name, sizeof(name), "aha%d", aha->unit);
688 return (name);
689}
690
691int
692aha_check_probed_iop(u_int ioport)
693{
694 u_int i;
695
696 for (i=0; i < AHA_NUM_ISAPORTS; i++) {
697 if (aha_isa_ports[i].addr == ioport) {
698 if (aha_isa_ports[i].probed != 0)
699 return (1);
700 else {
701 return (0);
702 }
703 }
704 }
705 return (1);
706}
707
708void
709aha_mark_probed_bio(isa_compat_io_t port)
710{
711 if (port < BIO_DISABLED)
712 aha_mark_probed_iop(aha_board_ports[port]);
713}
714
715void
716aha_mark_probed_iop(u_int ioport)
717{
718 u_int i;
719
720 for (i = 0; i < AHA_NUM_ISAPORTS; i++) {
721 if (ioport == aha_isa_ports[i].addr) {
722 aha_isa_ports[i].probed = 1;
723 break;
724 }
725 }
726}
727
728void
729aha_find_probe_range(int ioport, int *port_index, int *max_port_index)
730{
731 if (ioport > 0) {
732 int i;
733
734 for (i = 0;i < AHA_NUM_ISAPORTS; i++)
735 if (ioport <= aha_isa_ports[i].addr)
736 break;
737 if ((i >= AHA_NUM_ISAPORTS)
738 || (ioport != aha_isa_ports[i].addr)) {
739 printf("\n"
740"aha_isa_probe: Invalid baseport of 0x%x specified.\n"
741"aha_isa_probe: Nearest valid baseport is 0x%x.\n"
742"aha_isa_probe: Failing probe.\n",
743 ioport,
744 (i < AHA_NUM_ISAPORTS)
745 ? aha_isa_ports[i].addr
746 : aha_isa_ports[AHA_NUM_ISAPORTS - 1].addr);
747 *port_index = *max_port_index = -1;
748 return;
749 }
750 *port_index = *max_port_index = aha_isa_ports[i].bio;
751 } else {
752 *port_index = 0;
753 *max_port_index = AHA_NUM_ISAPORTS - 1;
754 }
755}
756
757int
758aha_iop_from_bio(isa_compat_io_t bio_index)
759{
760 if (bio_index >= 0 && bio_index < AHA_NUM_ISAPORTS)
761 return (aha_board_ports[bio_index]);
762 return (-1);
763}
764
765static void
766ahaallocccbs(struct aha_softc *aha)
767{
768 struct aha_ccb *next_ccb;
769 struct sg_map_node *sg_map;
770 bus_addr_t physaddr;
771 aha_sg_t *segs;
772 int newcount;
773 int i;
774
775 next_ccb = &aha->aha_ccb_array[aha->num_ccbs];
776
777 sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT);
778
779 if (sg_map == NULL)
780 return;
781
782 /* Allocate S/G space for the next batch of CCBS */
783 if (bus_dmamem_alloc(aha->sg_dmat, (void **)&sg_map->sg_vaddr,
784 BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
785 free(sg_map, M_DEVBUF);
786 return;
787 }
788
789 SLIST_INSERT_HEAD(&aha->sg_maps, sg_map, links);
790
791 bus_dmamap_load(aha->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr,
792 PAGE_SIZE, ahamapsgs, aha, /*flags*/0);
793
794 segs = sg_map->sg_vaddr;
795 physaddr = sg_map->sg_physaddr;
796
797 newcount = (PAGE_SIZE / (AHA_NSEG * sizeof(aha_sg_t)));
798 for (i = 0; aha->num_ccbs < aha->max_ccbs && i < newcount; i++) {
799 int error;
800
801 next_ccb->sg_list = segs;
802 next_ccb->sg_list_phys = physaddr;
803 next_ccb->flags = ACCB_FREE;
804 error = bus_dmamap_create(aha->buffer_dmat, /*flags*/0,
805 &next_ccb->dmamap);
806 if (error != 0)
807 break;
808 SLIST_INSERT_HEAD(&aha->free_aha_ccbs, next_ccb, links);
809 segs += AHA_NSEG;
810 physaddr += (AHA_NSEG * sizeof(aha_sg_t));
811 next_ccb++;
812 aha->num_ccbs++;
813 }
814
815 /* Reserve a CCB for error recovery */
816 if (aha->recovery_accb == NULL) {
817 aha->recovery_accb = SLIST_FIRST(&aha->free_aha_ccbs);
818 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
819 }
820}
821
822static __inline void
823ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb)
824{
825 int s;
826
827 s = splcam();
828 if ((accb->flags & ACCB_ACTIVE) != 0)
829 LIST_REMOVE(&accb->ccb->ccb_h, sim_links.le);
830 if (aha->resource_shortage != 0
831 && (accb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
832 accb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
833 aha->resource_shortage = FALSE;
834 }
835 accb->flags = ACCB_FREE;
836 SLIST_INSERT_HEAD(&aha->free_aha_ccbs, accb, links);
837 aha->active_ccbs--;
838 splx(s);
839}
840
841static struct aha_ccb*
842ahagetccb(struct aha_softc *aha)
843{
844 struct aha_ccb* accb;
845 int s;
846
847 s = splcam();
848 if ((accb = SLIST_FIRST(&aha->free_aha_ccbs)) != NULL) {
849 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
850 aha->active_ccbs++;
851 } else if (aha->num_ccbs < aha->max_ccbs) {
852 ahaallocccbs(aha);
853 accb = SLIST_FIRST(&aha->free_aha_ccbs);
854 if (accb == NULL)
855 printf("%s: Can't malloc ACCB\n", aha_name(aha));
856 else {
857 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
858 aha->active_ccbs++;
859 }
860 }
861 splx(s);
862
863 return (accb);
864}
865
866static void
867ahaaction(struct cam_sim *sim, union ccb *ccb)
868{
869 struct aha_softc *aha;
870
871 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahaaction\n"));
872
873 aha = (struct aha_softc *)cam_sim_softc(sim);
874
875 switch (ccb->ccb_h.func_code) {
876 /* Common cases first */
877 case XPT_SCSI_IO: /* Execute the requested I/O operation */
878 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
879 {
880 struct aha_ccb *accb;
881 struct aha_hccb *hccb;
882
883 /*
884 * get a accb to use.
885 */
886 if ((accb = ahagetccb(aha)) == NULL) {
887 int s;
888
889 s = splcam();
890 aha->resource_shortage = TRUE;
891 splx(s);
892 xpt_freeze_simq(aha->sim, /*count*/1);
893 ccb->ccb_h.status = CAM_REQUEUE_REQ;
894 xpt_done(ccb);
895 return;
896 }
897
898 hccb = &accb->hccb;
899
900 /*
901 * So we can find the ACCB when an abort is requested
902 */
903 accb->ccb = ccb;
904 ccb->ccb_h.ccb_accb_ptr = accb;
905 ccb->ccb_h.ccb_aha_ptr = aha;
906
907 /*
908 * Put all the arguments for the xfer in the accb
909 */
910 hccb->target = ccb->ccb_h.target_id;
911 hccb->lun = ccb->ccb_h.target_lun;
912 hccb->ahastat = 0;
913 hccb->sdstat = 0;
914
915 if (ccb->ccb_h.func_code == XPT_SCSI_IO) {
916 struct ccb_scsiio *csio;
917 struct ccb_hdr *ccbh;
918
919 csio = &ccb->csio;
920 ccbh = &csio->ccb_h;
921 hccb->opcode = aha->ccb_ccb_opcode;
922 hccb->datain = (ccb->ccb_h.flags & CAM_DIR_IN) != 0;
923 hccb->dataout = (ccb->ccb_h.flags & CAM_DIR_OUT) != 0;
924 hccb->cmd_len = csio->cdb_len;
925 if (hccb->cmd_len > sizeof(hccb->scsi_cdb)) {
926 ccb->ccb_h.status = CAM_REQ_INVALID;
927 ahafreeccb(aha, accb);
928 xpt_done(ccb);
929 return;
930 }
931 hccb->sense_len = csio->sense_len;
932 if ((ccbh->flags & CAM_CDB_POINTER) != 0) {
933 if ((ccbh->flags & CAM_CDB_PHYS) == 0) {
934 bcopy(csio->cdb_io.cdb_ptr,
935 hccb->scsi_cdb, hccb->cmd_len);
936 } else {
937 /* I guess I could map it in... */
938 ccbh->status = CAM_REQ_INVALID;
939 ahafreeccb(aha, accb);
940 xpt_done(ccb);
941 return;
942 }
943 } else {
944 bcopy(csio->cdb_io.cdb_bytes,
945 hccb->scsi_cdb, hccb->cmd_len);
946 }
947 /*
948 * If we have any data to send with this command,
949 * map it into bus space.
950 */
951 /* Only use S/G if there is a transfer */
952 if ((ccbh->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
953 if ((ccbh->flags & CAM_SCATTER_VALID) == 0) {
954 /*
955 * We've been given a pointer
956 * to a single buffer.
957 */
958 if ((ccbh->flags & CAM_DATA_PHYS)==0) {
959 int s;
960 int error;
961
962 s = splsoftvm();
963 error = bus_dmamap_load(
964 aha->buffer_dmat,
965 accb->dmamap,
966 csio->data_ptr,
967 csio->dxfer_len,
968 ahaexecuteccb,
969 accb,
970 /*flags*/0);
971 if (error == EINPROGRESS) {
972 /*
973 * So as to maintain
974 * ordering, freeze the
975 * controller queue
976 * until our mapping is
977 * returned.
978 */
979 xpt_freeze_simq(aha->sim,
980 1);
981 csio->ccb_h.status |=
982 CAM_RELEASE_SIMQ;
983 }
984 splx(s);
985 } else {
986 struct bus_dma_segment seg;
987
988 /* Pointer to physical buffer */
989 seg.ds_addr =
990 (bus_addr_t)csio->data_ptr;
991 seg.ds_len = csio->dxfer_len;
992 ahaexecuteccb(accb, &seg, 1, 0);
993 }
994 } else {
995 struct bus_dma_segment *segs;
996
997 if ((ccbh->flags & CAM_DATA_PHYS) != 0)
998 panic("ahaaction - Physical "
999 "segment pointers "
1000 "unsupported");
1001
1002 if ((ccbh->flags&CAM_SG_LIST_PHYS)==0)
1003 panic("ahaaction - Virtual "
1004 "segment addresses "
1005 "unsupported");
1006
1007 /* Just use the segments provided */
1008 segs = (struct bus_dma_segment *)
1009 csio->data_ptr;
1010 ahaexecuteccb(accb, segs,
1011 csio->sglist_cnt, 0);
1012 }
1013 } else {
1014 ahaexecuteccb(accb, NULL, 0, 0);
1015 }
1016 } else {
1017 hccb->opcode = INITIATOR_BUS_DEV_RESET;
1018 /* No data transfer */
1019 hccb->datain = TRUE;
1020 hccb->dataout = TRUE;
1021 hccb->cmd_len = 0;
1022 hccb->sense_len = 0;
1023 ahaexecuteccb(accb, NULL, 0, 0);
1024 }
1025 break;
1026 }
1027 case XPT_EN_LUN: /* Enable LUN as a target */
1028 case XPT_TARGET_IO: /* Execute target I/O request */
1029 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
1030 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
1031 case XPT_ABORT: /* Abort the specified CCB */
1032 /* XXX Implement */
1033 ccb->ccb_h.status = CAM_REQ_INVALID;
1034 xpt_done(ccb);
1035 break;
1036 case XPT_SET_TRAN_SETTINGS:
1037 {
1038 /* XXX Implement */
1039 ccb->ccb_h.status = CAM_PROVIDE_FAIL;
1040 xpt_done(ccb);
1041 break;
1042 }
1043 case XPT_GET_TRAN_SETTINGS:
1044 /* Get default/user set transfer settings for the target */
1045 {
1046 struct ccb_trans_settings *cts;
1047 u_int target_mask;
1048
1049 cts = &ccb->cts;
1050 target_mask = 0x01 << ccb->ccb_h.target_id;
1051 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
1052 cts->flags = 0;
1053 if ((aha->disc_permitted & target_mask) != 0)
1054 cts->flags |= CCB_TRANS_DISC_ENB;
1055 cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1056 if ((aha->sync_permitted & target_mask) != 0) {
1057 if (aha->boardid >= BOARD_1542CF)
1058 cts->sync_period = 25;
1059 else
1060 cts->sync_period = 50;
1061 } else
1062 cts->sync_period = 0;
1063
1064 if (cts->sync_period != 0)
1065 cts->sync_offset = 15;
1066
1067 cts->valid = CCB_TRANS_SYNC_RATE_VALID
1068 | CCB_TRANS_SYNC_OFFSET_VALID
1069 | CCB_TRANS_BUS_WIDTH_VALID
1070 | CCB_TRANS_DISC_VALID
1071 | CCB_TRANS_TQ_VALID;
1072 } else {
1073 ahafetchtransinfo(aha, cts);
1074 }
1075
1076 ccb->ccb_h.status = CAM_REQ_CMP;
1077 xpt_done(ccb);
1078 break;
1079 }
1080 case XPT_CALC_GEOMETRY:
1081 {
1082 struct ccb_calc_geometry *ccg;
1083 u_int32_t size_mb;
1084 u_int32_t secs_per_cylinder;
1085
1086 ccg = &ccb->ccg;
1087 size_mb = ccg->volume_size
1088 / ((1024L * 1024L) / ccg->block_size);
1089
1090 if (size_mb >= 1024 && (aha->extended_trans != 0)) {
1091 if (size_mb >= 2048) {
1092 ccg->heads = 255;
1093 ccg->secs_per_track = 63;
1094 } else {
1095 ccg->heads = 128;
1096 ccg->secs_per_track = 32;
1097 }
1098 } else {
1099 ccg->heads = 64;
1100 ccg->secs_per_track = 32;
1101 }
1102 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
1103 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
1104 ccb->ccb_h.status = CAM_REQ_CMP;
1105 xpt_done(ccb);
1106 break;
1107 }
1108 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
1109 {
1110 ahareset(aha, /*hardreset*/TRUE);
1111 ccb->ccb_h.status = CAM_REQ_CMP;
1112 xpt_done(ccb);
1113 break;
1114 }
1115 case XPT_TERM_IO: /* Terminate the I/O process */
1116 /* XXX Implement */
1117 ccb->ccb_h.status = CAM_REQ_INVALID;
1118 xpt_done(ccb);
1119 break;
1120 case XPT_PATH_INQ: /* Path routing inquiry */
1121 {
1122 struct ccb_pathinq *cpi = &ccb->cpi;
1123
1124 cpi->version_num = 1; /* XXX??? */
1125 cpi->hba_inquiry = PI_SDTR_ABLE;
1126 cpi->target_sprt = 0;
1127 cpi->hba_misc = 0;
1128 cpi->hba_eng_cnt = 0;
1129 cpi->max_target = 7;
1130 cpi->max_lun = 7;
1131 cpi->initiator_id = aha->scsi_id;
1132 cpi->bus_id = cam_sim_bus(sim);
1133 cpi->base_transfer_speed = 3300;
1134 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1135 strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
1136 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1137 cpi->unit_number = cam_sim_unit(sim);
1138 cpi->ccb_h.status = CAM_REQ_CMP;
1139 xpt_done(ccb);
1140 break;
1141 }
1142 default:
1143 ccb->ccb_h.status = CAM_REQ_INVALID;
1144 xpt_done(ccb);
1145 break;
1146 }
1147}
1148
1149static void
1150ahaexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1151{
1152 struct aha_ccb *accb;
1153 union ccb *ccb;
1154 struct aha_softc *aha;
1155 int s;
1156 u_int32_t paddr;
1157
1158 accb = (struct aha_ccb *)arg;
1159 ccb = accb->ccb;
1160 aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
1161
1162 if (error != 0) {
1163 if (error != EFBIG)
1164 printf("%s: Unexepected error 0x%x returned from "
1165 "bus_dmamap_load\n", aha_name(aha), error);
1166 if (ccb->ccb_h.status == CAM_REQ_INPROG) {
1167 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1168 ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN;
1169 }
1170 ahafreeccb(aha, accb);
1171 xpt_done(ccb);
1172 return;
1173 }
1174
1175 if (nseg != 0) {
1176 aha_sg_t *sg;
1177 bus_dma_segment_t *end_seg;
1178 bus_dmasync_op_t op;
1179
1180 end_seg = dm_segs + nseg;
1181
1182 /* Copy the segments into our SG list */
1183 sg = accb->sg_list;
1184 while (dm_segs < end_seg) {
1185 ahautoa24(dm_segs->ds_len, sg->len);
1186 ahautoa24(dm_segs->ds_addr, sg->addr);
1187 sg++;
1188 dm_segs++;
1189 }
1190
1191 if (nseg > 1) {
1192 accb->hccb.opcode = aha->ccb_sg_opcode;
1193 ahautoa24((sizeof(aha_sg_t) * nseg),
1194 accb->hccb.data_len);
1195 ahautoa24(accb->sg_list_phys, accb->hccb.data_addr);
1196 } else {
1197 bcopy(accb->sg_list->len, accb->hccb.data_len, 3);
1198 bcopy(accb->sg_list->addr, accb->hccb.data_addr, 3);
1199 }
1200
1201 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1202 op = BUS_DMASYNC_PREREAD;
1203 else
1204 op = BUS_DMASYNC_PREWRITE;
1205
1206 bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1207
1208 } else {
1209 accb->hccb.opcode = INITIATOR_CCB;
1210 ahautoa24(0, accb->hccb.data_len);
1211 ahautoa24(0, accb->hccb.data_addr);
1212 }
1213
1214 s = splcam();
1215
1216 /*
1217 * Last time we need to check if this CCB needs to
1218 * be aborted.
1219 */
1220 if (ccb->ccb_h.status != CAM_REQ_INPROG) {
1221 if (nseg != 0)
1222 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1223 ahafreeccb(aha, accb);
1224 xpt_done(ccb);
1225 splx(s);
1226 return;
1227 }
1228
1229 accb->flags = ACCB_ACTIVE;
1230 ccb->ccb_h.status |= CAM_SIM_QUEUED;
1231 LIST_INSERT_HEAD(&aha->pending_ccbs, &ccb->ccb_h, sim_links.le);
1232
1233 ccb->ccb_h.timeout_ch =
1234 timeout(ahatimeout, (caddr_t)accb,
1235 (ccb->ccb_h.timeout * hz) / 1000);
1236
1237 /* Tell the adapter about this command */
1238 if (aha->cur_outbox->action_code != AMBO_FREE) {
1239 /*
1240 * We should never encounter a busy mailbox.
1241 * If we do, warn the user, and treat it as
1242 * a resource shortage. If the controller is
1243 * hung, one of the pending transactions will
1244 * timeout causing us to start recovery operations.
1245 */
1246 printf("%s: Encountered busy mailbox with %d out of %d "
1247 "commands active!!!", aha_name(aha), aha->active_ccbs,
1248 aha->max_ccbs);
1249 untimeout(ahatimeout, accb, ccb->ccb_h.timeout_ch);
1250 if (nseg != 0)
1251 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1252 ahafreeccb(aha, accb);
1253 aha->resource_shortage = TRUE;
1254 xpt_freeze_simq(aha->sim, /*count*/1);
1255 ccb->ccb_h.status = CAM_REQUEUE_REQ;
1256 xpt_done(ccb);
1257 return;
1258 }
1259 paddr = ahaccbvtop(aha, accb);
1260 ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1261 aha->cur_outbox->action_code = AMBO_START;
1262 aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1263
1264 ahanextoutbox(aha);
1265 splx(s);
1266}
1267
1268void
1269aha_intr(void *arg)
1270{
1271 struct aha_softc *aha;
1272 u_int intstat;
1273
1274 aha = (struct aha_softc *)arg;
1275 while (((intstat = aha_inb(aha, INTSTAT_REG)) & INTR_PENDING) != 0) {
1276 if ((intstat & CMD_COMPLETE) != 0) {
1277 aha->latched_status = aha_inb(aha, STATUS_REG);
1278 aha->command_cmp = TRUE;
1279 }
1280
1281 aha_outb(aha, CONTROL_REG, RESET_INTR);
1282
1283 if ((intstat & IMB_LOADED) != 0) {
1284 while (aha->cur_inbox->comp_code != AMBI_FREE) {
1285 u_int32_t paddr;
1286 paddr = aha_a24tou(aha->cur_inbox->ccb_addr);
1287 ahadone(aha,
1288 ahaccbptov(aha, paddr),
1289 aha->cur_inbox->comp_code);
1290 aha->cur_inbox->comp_code = AMBI_FREE;
1291 ahanextinbox(aha);
1292 }
1293 }
1294
1295 if ((intstat & SCSI_BUS_RESET) != 0) {
1296 ahareset(aha, /*hardreset*/FALSE);
1297 }
1298 }
1299}
1300
1301static void
1302ahadone(struct aha_softc *aha, struct aha_ccb *accb, aha_mbi_comp_code_t comp_code)
1303{
1304 union ccb *ccb;
1305 struct ccb_scsiio *csio;
1306
1307 ccb = accb->ccb;
1308 csio = &accb->ccb->csio;
1309
1310 if ((accb->flags & ACCB_ACTIVE) == 0) {
1311 printf("%s: ahadone - Attempt to free non-active ACCB %p\n",
1312 aha_name(aha), (void *)accb);
1313 return;
1314 }
1315
1316 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1317 bus_dmasync_op_t op;
1318
1319 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1320 op = BUS_DMASYNC_POSTREAD;
1321 else
1322 op = BUS_DMASYNC_POSTWRITE;
1323 bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1324 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1325 }
1326
1327 if (accb == aha->recovery_accb) {
1328 /*
1329 * The recovery ACCB does not have a CCB associated
1330 * with it, so short circuit the normal error handling.
1331 * We now traverse our list of pending CCBs and process
1332 * any that were terminated by the recovery CCBs action.
1333 * We also reinstate timeouts for all remaining, pending,
1334 * CCBs.
1335 */
1336 struct cam_path *path;
1337 struct ccb_hdr *ccb_h;
1338 cam_status error;
1339
1340 /* Notify all clients that a BDR occured */
1341 error = xpt_create_path(&path, /*periph*/NULL,
1342 cam_sim_path(aha->sim),
1343 accb->hccb.target,
1344 CAM_LUN_WILDCARD);
1345
1346 if (error == CAM_REQ_CMP)
1347 xpt_async(AC_SENT_BDR, path, NULL);
1348
1349 ccb_h = LIST_FIRST(&aha->pending_ccbs);
1350 while (ccb_h != NULL) {
1351 struct aha_ccb *pending_accb;
1352
1353 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1354 if (pending_accb->hccb.target == accb->hccb.target) {
1355 pending_accb->hccb.ahastat = AHASTAT_HA_BDR;
1356 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1357 ahadone(aha, pending_accb, AMBI_ERROR);
1358 } else {
1359 ccb_h->timeout_ch =
1360 timeout(ahatimeout, (caddr_t)pending_accb,
1361 (ccb_h->timeout * hz) / 1000);
1362 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1363 }
1364 }
1365 printf("%s: No longer in timeout\n", aha_name(aha));
1366 return;
1367 }
1368
1369 untimeout(ahatimeout, accb, ccb->ccb_h.timeout_ch);
1370
1371 switch (comp_code) {
1372 case AMBI_FREE:
1373 printf("%s: ahadone - CCB completed with free status!\n",
1374 aha_name(aha));
1375 break;
1376 case AMBI_NOT_FOUND:
1377 printf("%s: ahadone - CCB Abort failed to find CCB\n",
1378 aha_name(aha));
1379 break;
1380 case AMBI_ABORT:
1381 case AMBI_ERROR:
1382 /* An error occured */
1383 if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1384 csio->resid = 0;
1385 else
1386 csio->resid = aha_a24tou(accb->hccb.data_len);
1387 switch(accb->hccb.ahastat) {
1388 case AHASTAT_DATARUN_ERROR:
1389 {
1390 if (csio->resid <= 0) {
1391 csio->ccb_h.status = CAM_DATA_RUN_ERR;
1392 break;
1393 }
1394 /* FALLTHROUGH */
1395 }
1396 case AHASTAT_NOERROR:
1397 csio->scsi_status = accb->hccb.sdstat;
1398 csio->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1399 switch(csio->scsi_status) {
1400 case SCSI_STATUS_CHECK_COND:
1401 case SCSI_STATUS_CMD_TERMINATED:
1402 csio->ccb_h.status |= CAM_AUTOSNS_VALID;
1403 /*
1404 * The aha writes the sense data at different
1405 * offsets based on the scsi cmd len
1406 */
1407 bcopy((caddr_t) &accb->hccb.scsi_cdb +
1408 accb->hccb.cmd_len,
1409 (caddr_t) &csio->sense_data,
1410 accb->hccb.sense_len);
1411 break;
1412 default:
1413 break;
1414 case SCSI_STATUS_OK:
1415 csio->ccb_h.status = CAM_REQ_CMP;
1416 break;
1417 }
1418 break;
1419 case AHASTAT_SELTIMEOUT:
1420 csio->ccb_h.status = CAM_SEL_TIMEOUT;
1421 break;
1422 case AHASTAT_UNEXPECTED_BUSFREE:
1423 csio->ccb_h.status = CAM_UNEXP_BUSFREE;
1424 break;
1425 case AHASTAT_INVALID_PHASE:
1426 csio->ccb_h.status = CAM_SEQUENCE_FAIL;
1427 break;
1428 case AHASTAT_INVALID_ACTION_CODE:
1429 panic("%s: Inavlid Action code", aha_name(aha));
1430 break;
1431 case AHASTAT_INVALID_OPCODE:
1432 if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1433 panic("%s: Invalid CCB Opcode %x hccb = %p",
1434 aha_name(aha), accb->hccb.opcode,
1435 &accb->hccb);
1436 printf("%s: AHA-1540A detected, compensating\n",
1437 aha_name(aha));
1438 aha->ccb_sg_opcode = INITIATOR_SG_CCB;
1439 aha->ccb_ccb_opcode = INITIATOR_CCB;
1440 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1441 csio->ccb_h.status = CAM_REQUEUE_REQ;
1442 break;
1443 case AHASTAT_LINKED_CCB_LUN_MISMATCH:
1444 /* We don't even support linked commands... */
1445 panic("%s: Linked CCB Lun Mismatch", aha_name(aha));
1446 break;
1447 case AHASTAT_INVALID_CCB_OR_SG_PARAM:
1448 panic("%s: Invalid CCB or SG list", aha_name(aha));
1449 break;
1450 case AHASTAT_HA_SCSI_BUS_RESET:
1451 if ((csio->ccb_h.status & CAM_STATUS_MASK)
1452 != CAM_CMD_TIMEOUT)
1453 csio->ccb_h.status = CAM_SCSI_BUS_RESET;
1454 break;
1455 case AHASTAT_HA_BDR:
1456 if ((accb->flags & ACCB_DEVICE_RESET) == 0)
1457 csio->ccb_h.status = CAM_BDR_SENT;
1458 else
1459 csio->ccb_h.status = CAM_CMD_TIMEOUT;
1460 break;
1461 }
1462 if (csio->ccb_h.status != CAM_REQ_CMP) {
1463 xpt_freeze_devq(csio->ccb_h.path, /*count*/1);
1464 csio->ccb_h.status |= CAM_DEV_QFRZN;
1465 }
1466 if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1467 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1468 ahafreeccb(aha, accb);
1469 xpt_done(ccb);
1470 break;
1471 case AMBI_OK:
1472 /* All completed without incident */
1473 /* XXX DO WE NEED TO COPY SENSE BYTES HERE???? XXX */
1474 /* I don't think so since it works???? */
1475 ccb->ccb_h.status |= CAM_REQ_CMP;
1476 if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1477 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1478 ahafreeccb(aha, accb);
1479 xpt_done(ccb);
1480 break;
1481 }
1482}
1483
1484static int
1485ahareset(struct aha_softc* aha, int hard_reset)
1486{
1487 struct ccb_hdr *ccb_h;
1488 u_int status;
1489 u_int timeout;
1490 u_int8_t reset_type;
1491
1492 if (hard_reset != 0)
1493 reset_type = HARD_RESET;
1494 else
1495 reset_type = SOFT_RESET;
1496 aha_outb(aha, CONTROL_REG, reset_type);
1497
1498 /* Wait 5sec. for Diagnostic start */
1499 timeout = 5 * 10000;
1500 while (--timeout) {
1501 status = aha_inb(aha, STATUS_REG);
1502 if ((status & DIAG_ACTIVE) != 0)
1503 break;
1504 DELAY(100);
1505 }
1506 if (timeout == 0) {
1507 PRVERB(("%s: ahareset - Diagnostic Active failed to "
1508 "assert. status = 0x%x\n", aha_name(aha),
1509 status));
1510 return (ETIMEDOUT);
1511 }
1512
1513 /* Wait 10sec. for Diagnostic end */
1514 timeout = 10 * 10000;
1515 while (--timeout) {
1516 status = aha_inb(aha, STATUS_REG);
1517 if ((status & DIAG_ACTIVE) == 0)
1518 break;
1519 DELAY(100);
1520 }
1521 if (timeout == 0) {
1522 panic("%s: ahareset - Diagnostic Active failed to drop. "
1523 "status = 0x%x\n", aha_name(aha), status);
1524 return (ETIMEDOUT);
1525 }
1526
1527 /* Wait for the host adapter to become ready or report a failure */
1528 timeout = 10000;
1529 while (--timeout) {
1530 status = aha_inb(aha, STATUS_REG);
1531 if ((status & (DIAG_FAIL|HA_READY|DATAIN_REG_READY)) != 0)
1532 break;
1533 DELAY(100);
1534 }
1535 if (timeout == 0) {
1536 printf("%s: ahareset - Host adapter failed to come ready. "
1537 "status = 0x%x\n", aha_name(aha), status);
1538 return (ETIMEDOUT);
1539 }
1540
1541 /* If the diagnostics failed, tell the user */
1542 if ((status & DIAG_FAIL) != 0
1543 || (status & HA_READY) == 0) {
1544 printf("%s: ahareset - Adapter failed diagnostics\n",
1545 aha_name(aha));
1546
1547 if ((status & DATAIN_REG_READY) != 0)
1548 printf("%s: ahareset - Host Adapter Error "
1549 "code = 0x%x\n", aha_name(aha),
1550 aha_inb(aha, DATAIN_REG));
1551 return (ENXIO);
1552 }
1553
1554 /* If we've allocated mailboxes, initialize them */
1555 if (aha->init_level > 4)
1556 ahainitmboxes(aha);
1557
1558 /* If we've attached to the XPT, tell it about the event */
1559 if (aha->path != NULL)
1560 xpt_async(AC_BUS_RESET, aha->path, NULL);
1561
1562 /*
1563 * Perform completion processing for all outstanding CCBs.
1564 */
1565 while ((ccb_h = LIST_FIRST(&aha->pending_ccbs)) != NULL) {
1566 struct aha_ccb *pending_accb;
1567
1568 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1569 pending_accb->hccb.ahastat = AHASTAT_HA_SCSI_BUS_RESET;
1570 ahadone(aha, pending_accb, AMBI_ERROR);
1571 }
1572
1573 return (0);
1574}
1575
1576/*
1577 * Send a command to the adapter.
1578 */
1579int
1580aha_cmd(struct aha_softc *aha, aha_op_t opcode, u_int8_t *params,
1581 u_int param_len, u_int8_t *reply_data, u_int reply_len,
1582 u_int cmd_timeout)
1583{
1584 u_int timeout;
1585 u_int status;
1586 u_int saved_status;
1587 u_int intstat;
1588 u_int reply_buf_size;
1589 int s;
1590 int cmd_complete;
1591 int error;
1592
1593 /* No data returned to start */
1594 reply_buf_size = reply_len;
1595 reply_len = 0;
1596 intstat = 0;
1597 cmd_complete = 0;
1598 saved_status = 0;
1599 error = 0;
1600
1601 /*
1602 * All commands except for the "start mailbox" and the "enable
1603 * outgoing mailbox read interrupt" commands cannot be issued
1604 * while there are pending transactions. Freeze our SIMQ
1605 * and wait for all completions to occur if necessary.
1606 */
1607 timeout = 100000;
1608 s = splcam();
1609 while (LIST_FIRST(&aha->pending_ccbs) != NULL && --timeout) {
1610 /* Fire the interrupt handler in case interrupts are blocked */
1611 aha_intr(aha);
1612 splx(s);
1613 DELAY(100);
1614 s = splcam();
1615 }
1616 splx(s);
1617
1618 if (timeout == 0) {
1619 printf("%s: aha_cmd: Timeout waiting for adapter idle\n",
1620 aha_name(aha));
1621 return (ETIMEDOUT);
1622 }
1623 aha->command_cmp = 0;
1624 /*
1625 * Wait up to 10 sec. for the adapter to become
1626 * ready to accept commands.
1627 */
1628 timeout = 100000;
1629 while (--timeout) {
1630
1631 status = aha_inb(aha, STATUS_REG);
1632 if ((status & HA_READY) != 0
1633 && (status & CMD_REG_BUSY) == 0)
1634 break;
1635 /*
1636 * Throw away any pending data which may be
1637 * left over from earlier commands that we
1638 * timedout on.
1639 */
1640 if ((status & DATAIN_REG_READY) != 0)
1641 (void)aha_inb(aha, DATAIN_REG);
1642 DELAY(100);
1643 }
1644 if (timeout == 0) {
1645 printf("%s: aha_cmd: Timeout waiting for adapter ready, "
1646 "status = 0x%x\n", aha_name(aha), status);
1647 return (ETIMEDOUT);
1648 }
1649
1650 /*
1651 * Send the opcode followed by any necessary parameter bytes.
1652 */
1653 aha_outb(aha, COMMAND_REG, opcode);
1654
1655 /*
1656 * Wait for up to 1sec to get the parameter list sent
1657 */
1658 timeout = 10000;
1659 while (param_len && --timeout) {
1660 DELAY(100);
1661 s = splcam();
1662 status = aha_inb(aha, STATUS_REG);
1663 intstat = aha_inb(aha, INTSTAT_REG);
1664 splx(s);
1665
1666 if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1667 == (INTR_PENDING|CMD_COMPLETE)) {
1668 saved_status = status;
1669 cmd_complete = 1;
1670 break;
1671 }
1672
1673 if (aha->command_cmp != 0) {
1674 saved_status = aha->latched_status;
1675 cmd_complete = 1;
1676 break;
1677 }
1678 if ((status & DATAIN_REG_READY) != 0)
1679 break;
1680 if ((status & CMD_REG_BUSY) == 0) {
1681 aha_outb(aha, COMMAND_REG, *params++);
1682 param_len--;
1683 timeout = 10000;
1684 }
1685 }
1686 if (timeout == 0) {
1687 printf("%s: aha_cmd: Timeout sending parameters, "
1688 "status = 0x%x\n", aha_name(aha), status);
1689 error = ETIMEDOUT;
1690 }
1691
1692 /*
1693 * For all other commands, we wait for any output data
1694 * and the final comand completion interrupt.
1695 */
1696 while (cmd_complete == 0 && --cmd_timeout) {
1697
1698 s = splcam();
1699 status = aha_inb(aha, STATUS_REG);
1700 intstat = aha_inb(aha, INTSTAT_REG);
1701 splx(s);
1702
1703 if (aha->command_cmp != 0) {
1704 cmd_complete = 1;
1705 saved_status = aha->latched_status;
1706 } else if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1707 == (INTR_PENDING|CMD_COMPLETE)) {
1708 /*
1709 * Our poll (in case interrupts are blocked)
1710 * saw the CMD_COMPLETE interrupt.
1711 */
1712 cmd_complete = 1;
1713 saved_status = status;
1714 } else if ((status & DATAIN_REG_READY) != 0) {
1715 u_int8_t data;
1716
1717 data = aha_inb(aha, DATAIN_REG);
1718 if (reply_len < reply_buf_size) {
1719 *reply_data++ = data;
1720 } else {
1721 printf("%s: aha_cmd - Discarded reply data "
1722 "byte for opcode 0x%x\n", aha_name(aha),
1723 opcode);
1724 }
1725 /*
1726 * Reset timeout to ensure at least a second
1727 * between response bytes.
1728 */
1729 cmd_timeout = MAX(cmd_timeout, 10000);
1730 reply_len++;
1731 }
1732 DELAY(100);
1733 }
1734 if (cmd_timeout == 0) {
1735 printf("%s: aha_cmd: Timeout waiting for reply data and "
1736 "command complete.\n%s: status = 0x%x, intstat = 0x%x, "
1737 "reply_len = %d\n", aha_name(aha), aha_name(aha), status,
1738 intstat, reply_len);
1739 return (ETIMEDOUT);
1740 }
1741
1742 /*
1743 * Clear any pending interrupts. Block interrupts so our
1744 * interrupt handler is not re-entered.
1745 */
1746 s = splcam();
1747 aha_intr(aha);
1748 splx(s);
1749
1750 if (error != 0)
1751 return (error);
1752
1753 /*
1754 * If the command was rejected by the controller, tell the caller.
1755 */
1756 if ((saved_status & CMD_INVALID) != 0) {
1757 PRVERB(("%s: Invalid Command 0x%x\n", aha_name(aha), opcode));
1758 /*
1759 * Some early adapters may not recover properly from
1760 * an invalid command. If it appears that the controller
1761 * has wedged (i.e. status was not cleared by our interrupt
1762 * reset above), perform a soft reset.
1763 */
1764 DELAY(1000);
1765 status = aha_inb(aha, STATUS_REG);
1766 if ((status & (CMD_INVALID|STATUS_REG_RSVD|DATAIN_REG_READY|
1767 CMD_REG_BUSY|DIAG_FAIL|DIAG_ACTIVE)) != 0
1768 || (status & (HA_READY|INIT_REQUIRED))
1769 != (HA_READY|INIT_REQUIRED)) {
1770 ahareset(aha, /*hard_reset*/FALSE);
1771 }
1772 return (EINVAL);
1773 }
1774
1775 if (param_len > 0) {
1776 /* The controller did not accept the full argument list */
1777 return (E2BIG);
1778 }
1779
1780 if (reply_len != reply_buf_size) {
1781 /* Too much or too little data received */
1782 return (EMSGSIZE);
1783 }
1784
1785 /* We were successful */
1786 return (0);
1787}
1788
1789static int
1790ahainitmboxes(struct aha_softc *aha)
1791{
1792 int error;
1793 init_24b_mbox_params_t init_mbox;
1794
1795 bzero(aha->in_boxes, sizeof(aha_mbox_in_t) * aha->num_boxes);
1796 bzero(aha->out_boxes, sizeof(aha_mbox_out_t) * aha->num_boxes);
1797 aha->cur_inbox = aha->in_boxes;
1798 aha->last_inbox = aha->in_boxes + aha->num_boxes - 1;
1799 aha->cur_outbox = aha->out_boxes;
1800 aha->last_outbox = aha->out_boxes + aha->num_boxes - 1;
1801
1802 /* Tell the adapter about them */
1803 init_mbox.num_mboxes = aha->num_boxes;
1804 ahautoa24(aha->mailbox_physbase, init_mbox.base_addr);
1805 error = aha_cmd(aha, AOP_INITIALIZE_MBOX, (u_int8_t *)&init_mbox,
1806 /*parmlen*/sizeof(init_mbox), /*reply_buf*/NULL,
1807 /*reply_len*/0, DEFAULT_CMD_TIMEOUT);
1808
1809 if (error != 0)
1810 printf("ahainitmboxes: Initialization command failed\n");
1811 return (error);
1812}
1813
1814/*
1815 * Update the XPT's idea of the negotiated transfer
1816 * parameters for a particular target.
1817 */
1818static void
1819ahafetchtransinfo(struct aha_softc *aha, struct ccb_trans_settings* cts)
1820{
1821 setup_data_t setup_info;
1822 u_int target;
1823 u_int targ_offset;
1824 u_int sync_period;
1825 int error;
1826 u_int8_t param;
1827 targ_syncinfo_t sync_info;
1828
1829 target = cts->ccb_h.target_id;
1830 targ_offset = (target & 0x7);
1831
1832 /*
1833 * Inquire Setup Information. This command retreives
1834 * the sync info for older models.
1835 */
1836 param = sizeof(setup_info);
1837 error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, ¶m, /*paramlen*/1,
1838 (u_int8_t*)&setup_info, sizeof(setup_info),
1839 DEFAULT_CMD_TIMEOUT);
1840
1841 if (error != 0) {
1842 printf("%s: ahafetchtransinfo - Inquire Setup Info Failed %d\n",
1843 aha_name(aha), error);
1844 return;
1845 }
1846
1847 sync_info = setup_info.syncinfo[targ_offset];
1848
1849 if (sync_info.sync == 0)
1850 cts->sync_offset = 0;
1851 else
1852 cts->sync_offset = sync_info.offset;
1853
1854 cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1855
1856 if (aha->boardid >= BOARD_1542CF)
1857 sync_period = 1000;
1858 else
1859 sync_period = 2000;
1860 sync_period += 500 * sync_info.period;
1861
1862 /* Convert ns value to standard SCSI sync rate */
1863 if (cts->sync_offset != 0)
1864 cts->sync_period = scsi_calc_syncparam(sync_period);
1865 else
1866 cts->sync_period = 0;
1867
1868 cts->valid = CCB_TRANS_SYNC_RATE_VALID
1869 | CCB_TRANS_SYNC_OFFSET_VALID
1870 | CCB_TRANS_BUS_WIDTH_VALID;
1871 xpt_async(AC_TRANSFER_NEG, cts->ccb_h.path, cts);
1872}
1873
1874static void
1875ahamapmboxes(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1876{
1877 struct aha_softc* aha;
1878
1879 aha = (struct aha_softc*)arg;
1880 aha->mailbox_physbase = segs->ds_addr;
1881}
1882
1883static void
1884ahamapccbs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1885{
1886 struct aha_softc* aha;
1887
1888 aha = (struct aha_softc*)arg;
1889 aha->aha_ccb_physbase = segs->ds_addr;
1890}
1891
1892static void
1893ahamapsgs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1894{
1895
1896 struct aha_softc* aha;
1897
1898 aha = (struct aha_softc*)arg;
1899 SLIST_FIRST(&aha->sg_maps)->sg_physaddr = segs->ds_addr;
1900}
1901
1902static void
1903ahapoll(struct cam_sim *sim)
1904{
1905 aha_intr(cam_sim_softc(sim));
1906}
1907
1908static void
1909ahatimeout(void *arg)
1910{
1911 struct aha_ccb *accb;
1912 union ccb *ccb;
1913 struct aha_softc *aha;
1914 int s;
1915 u_int32_t paddr;
1916
1917 accb = (struct aha_ccb *)arg;
1918 ccb = accb->ccb;
1919 aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
1920 xpt_print_path(ccb->ccb_h.path);
1921 printf("CCB %p - timed out\n", (void *)accb);
1922
1923 s = splcam();
1924
1925 if ((accb->flags & ACCB_ACTIVE) == 0) {
1926 xpt_print_path(ccb->ccb_h.path);
1927 printf("CCB %p - timed out CCB already completed\n",
1928 (void *)accb);
1929 splx(s);
1930 return;
1931 }
1932
1933 /*
1934 * In order to simplify the recovery process, we ask the XPT
1935 * layer to halt the queue of new transactions and we traverse
1936 * the list of pending CCBs and remove their timeouts. This
1937 * means that the driver attempts to clear only one error
1938 * condition at a time. In general, timeouts that occur
1939 * close together are related anyway, so there is no benefit
1940 * in attempting to handle errors in parrallel. Timeouts will
1941 * be reinstated when the recovery process ends.
1942 */
1943 if ((accb->flags & ACCB_DEVICE_RESET) == 0) {
1944 struct ccb_hdr *ccb_h;
1945
1946 if ((accb->flags & ACCB_RELEASE_SIMQ) == 0) {
1947 xpt_freeze_simq(aha->sim, /*count*/1);
1948 accb->flags |= ACCB_RELEASE_SIMQ;
1949 }
1950
1951 ccb_h = LIST_FIRST(&aha->pending_ccbs);
1952 while (ccb_h != NULL) {
1953 struct aha_ccb *pending_accb;
1954
1955 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1956 untimeout(ahatimeout, pending_accb, ccb_h->timeout_ch);
1957 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1958 }
1959 }
1960
1961 if ((accb->flags & ACCB_DEVICE_RESET) != 0
1962 || aha->cur_outbox->action_code != AMBO_FREE) {
1963 /*
1964 * Try a full host adapter/SCSI bus reset.
1965 * We do this only if we have already attempted
1966 * to clear the condition with a BDR, or we cannot
1967 * attempt a BDR for lack of mailbox resources.
1968 */
1969 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
1970 ahareset(aha, /*hardreset*/TRUE);
1971 printf("%s: No longer in timeout\n", aha_name(aha));
1972 } else {
1973 /*
1974 * Send a Bus Device Reset message:
1975 * The target that is holding up the bus may not
1976 * be the same as the one that triggered this timeout
1977 * (different commands have different timeout lengths),
1978 * but we have no way of determining this from our
1979 * timeout handler. Our strategy here is to queue a
1980 * BDR message to the target of the timed out command.
1981 * If this fails, we'll get another timeout 2 seconds
1982 * later which will attempt a bus reset.
1983 */
1984 accb->flags |= ACCB_DEVICE_RESET;
1985 ccb->ccb_h.timeout_ch = timeout(ahatimeout, (caddr_t)accb, 2 * hz);
1986 aha->recovery_accb->hccb.opcode = INITIATOR_BUS_DEV_RESET;
1987
1988 /* No Data Transfer */
1989 aha->recovery_accb->hccb.datain = TRUE;
1990 aha->recovery_accb->hccb.dataout = TRUE;
1991 aha->recovery_accb->hccb.ahastat = 0;
1992 aha->recovery_accb->hccb.sdstat = 0;
1993 aha->recovery_accb->hccb.target = ccb->ccb_h.target_id;
1994
1995 /* Tell the adapter about this command */
1996 paddr = ahaccbvtop(aha, aha->recovery_accb);
1997 ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1998 aha->cur_outbox->action_code = AMBO_START;
1999 aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
2000 ahanextoutbox(aha);
2001 }
2002
2003 splx(s);
2004}
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