45#include <sys/mutex.h>
46#include <sys/proc.h>
47
48#include <dev/pci/pcivar.h>
49#include <dev/pci/pcireg.h>
50#include <pci/agppriv.h>
51#include <pci/agpreg.h>
52
53#include <vm/vm.h>
54#include <vm/vm_object.h>
55#include <vm/vm_page.h>
56#include <vm/vm_pageout.h>
57#include <vm/pmap.h>
58
59#include <machine/bus.h>
60#include <machine/resource.h>
61#include <sys/rman.h>
62
63MALLOC_DECLARE(M_AGP);
64
65#define READ1(off) bus_space_read_1(sc->bst, sc->bsh, off)
66#define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off)
67#define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v)
68
69#define CHIP_I810 0 /* i810/i815 */
70#define CHIP_I830 1 /* 830M/845G */
71#define CHIP_I855 2 /* 852GM/855GM/865G */
72
73struct agp_i810_softc {
74 struct agp_softc agp;
75 u_int32_t initial_aperture; /* aperture size at startup */
76 struct agp_gatt *gatt;
77 int chiptype; /* i810-like or i830 */
78 u_int32_t dcache_size; /* i810 only */
79 u_int32_t stolen; /* number of i830/845 gtt entries for stolen memory */
80 device_t bdev; /* bridge device */
81 struct resource *regs; /* memory mapped GC registers */
82 bus_space_tag_t bst; /* bus_space tag */
83 bus_space_handle_t bsh; /* bus_space handle */
84};
85
86static const char*
87agp_i810_match(device_t dev)
88{
89 if (pci_get_class(dev) != PCIC_DISPLAY
90 || pci_get_subclass(dev) != PCIS_DISPLAY_VGA)
91 return NULL;
92
93 switch (pci_get_devid(dev)) {
94 case 0x71218086:
95 return ("Intel 82810 (i810 GMCH) SVGA controller");
96
97 case 0x71238086:
98 return ("Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller");
99
100 case 0x71258086:
101 return ("Intel 82810E (i810E GMCH) SVGA controller");
102
103 case 0x11328086:
104 return ("Intel 82815 (i815 GMCH) SVGA controller");
105
106 case 0x35778086:
107 return ("Intel 82830M (830M GMCH) SVGA controller");
108
109 case 0x25628086:
110 return ("Intel 82845G (845G GMCH) SVGA controller");
111
112 case 0x35828086:
113 switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
114 case AGP_I855_GME:
115 return ("Intel 82855GME (855GME GMCH) SVGA controller");
116
117 case AGP_I855_GM:
118 return ("Intel 82855GM (855GM GMCH) SVGA controller");
119
120 case AGP_I852_GME:
121 return ("Intel 82852GME (852GME GMCH) SVGA controller");
122
123 case AGP_I852_GM:
124 return ("Intel 82852GM (852GM GMCH) SVGA controller");
125
126 default:
127 return ("Intel 8285xM (85xGM GMCH) SVGA controller");
128 }
129
130 case 0x25728086:
131 return ("Intel 82865G (865G GMCH) SVGA controller");
132 };
133
134 return NULL;
135}
136
137/*
138 * Find bridge device.
139 */
140static device_t
141agp_i810_find_bridge(device_t dev)
142{
143 device_t *children, child;
144 int nchildren, i;
145 u_int32_t devid;
146
147 /*
148 * Calculate bridge device's ID.
149 */
150 devid = pci_get_devid(dev);
151 switch (devid) {
152 case 0x71218086:
153 case 0x71238086:
154 case 0x71258086:
155 devid -= 0x10000;
156 break;
157
158 case 0x11328086:
159 case 0x35778086:
160 case 0x25628086:
161 case 0x35828086:
162 case 0x25728086:
163 devid -= 0x20000;
164 break;
165 };
166 if (device_get_children(device_get_parent(dev), &children, &nchildren))
167 return 0;
168
169 for (i = 0; i < nchildren; i++) {
170 child = children[i];
171
172 if (pci_get_devid(child) == devid) {
173 free(children, M_TEMP);
174 return child;
175 }
176 }
177 free(children, M_TEMP);
178 return 0;
179}
180
181static int
182agp_i810_probe(device_t dev)
183{
184 const char *desc;
185
186 if (resource_disabled("agp", device_get_unit(dev)))
187 return (ENXIO);
188 desc = agp_i810_match(dev);
189 if (desc) {
190 device_t bdev;
191 u_int8_t smram;
192 unsigned int gcc1;
193 int devid = pci_get_devid(dev);
194
195 bdev = agp_i810_find_bridge(dev);
196 if (!bdev) {
197 if (bootverbose)
198 printf("I810: can't find bridge device\n");
199 return ENXIO;
200 }
201
202 /*
203 * checking whether internal graphics device has been activated.
204 */
205 switch (devid) {
206 /* i810 */
207 case 0x71218086:
208 case 0x71238086:
209 case 0x71258086:
210 case 0x11328086:
211 smram = pci_read_config(bdev, AGP_I810_SMRAM, 1);
212 if ((smram & AGP_I810_SMRAM_GMS)
213 == AGP_I810_SMRAM_GMS_DISABLED) {
214 if (bootverbose)
215 printf("I810: disabled, not probing\n");
216 return ENXIO;
217 }
218 break;
219
220 /* i830 */
221 case 0x35778086:
222 case 0x35828086:
223 case 0x25628086:
224 case 0x25728086:
225 gcc1 = pci_read_config(bdev, AGP_I830_GCC1, 1);
226 if ((gcc1 & AGP_I830_GCC1_DEV2) == AGP_I830_GCC1_DEV2_DISABLED) {
227 if (bootverbose)
228 printf("I830: disabled, not probing\n");
229 return ENXIO;
230 }
231 break;
232
233 default:
234 return ENXIO;
235 }
236
237 device_verbose(dev);
238 device_set_desc(dev, desc);
239 return 0;
240 }
241
242 return ENXIO;
243}
244
245static int
246agp_i810_attach(device_t dev)
247{
248 struct agp_i810_softc *sc = device_get_softc(dev);
249 struct agp_gatt *gatt;
250 int error, rid;
251
252 sc->bdev = agp_i810_find_bridge(dev);
253 if (!sc->bdev)
254 return ENOENT;
255
256 error = agp_generic_attach(dev);
257 if (error)
258 return error;
259
260 switch (pci_get_devid(dev)) {
261 case 0x71218086:
262 case 0x71238086:
263 case 0x71258086:
264 case 0x11328086:
265 sc->chiptype = CHIP_I810;
266 break;
267 case 0x35778086:
268 case 0x25628086:
269 sc->chiptype = CHIP_I830;
270 break;
271 case 0x35828086:
272 case 0x25728086:
273 sc->chiptype = CHIP_I855;
274 break;
275 };
276
277 /* Same for i810 and i830 */
278 rid = AGP_I810_MMADR;
279 sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
280 RF_ACTIVE);
281 if (!sc->regs) {
282 agp_generic_detach(dev);
283 return ENOMEM;
284 }
285 sc->bst = rman_get_bustag(sc->regs);
286 sc->bsh = rman_get_bushandle(sc->regs);
287
288 sc->initial_aperture = AGP_GET_APERTURE(dev);
289
290 gatt = malloc( sizeof(struct agp_gatt), M_AGP, M_NOWAIT);
291 if (!gatt) {
292 agp_generic_detach(dev);
293 return ENOMEM;
294 }
295 sc->gatt = gatt;
296
297 gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
298
299 if ( sc->chiptype == CHIP_I810 ) {
300 /* Some i810s have on-chip memory called dcache */
301 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
302 sc->dcache_size = 4 * 1024 * 1024;
303 else
304 sc->dcache_size = 0;
305
306 /* According to the specs the gatt on the i810 must be 64k */
307 gatt->ag_virtual = contigmalloc( 64 * 1024, M_AGP, 0,
308 0, ~0, PAGE_SIZE, 0);
309 if (!gatt->ag_virtual) {
310 if (bootverbose)
311 device_printf(dev, "contiguous allocation failed\n");
312 free(gatt, M_AGP);
313 agp_generic_detach(dev);
314 return ENOMEM;
315 }
316 bzero(gatt->ag_virtual, gatt->ag_entries * sizeof(u_int32_t));
317
318 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
319 agp_flush_cache();
320 /* Install the GATT. */
321 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1);
322 } else if ( sc->chiptype == CHIP_I830 ) {
323 /* The i830 automatically initializes the 128k gatt on boot. */
324 unsigned int gcc1, pgtblctl;
325
326 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
327 switch (gcc1 & AGP_I830_GCC1_GMS) {
328 case AGP_I830_GCC1_GMS_STOLEN_512:
329 sc->stolen = (512 - 132) * 1024 / 4096;
330 break;
331 case AGP_I830_GCC1_GMS_STOLEN_1024:
332 sc->stolen = (1024 - 132) * 1024 / 4096;
333 break;
334 case AGP_I830_GCC1_GMS_STOLEN_8192:
335 sc->stolen = (8192 - 132) * 1024 / 4096;
336 break;
337 default:
338 sc->stolen = 0;
339 device_printf(dev, "unknown memory configuration, disabling\n");
340 agp_generic_detach(dev);
341 return EINVAL;
342 }
343 if (sc->stolen > 0)
344 device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4);
345 device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024);
346
347 /* GATT address is already in there, make sure it's enabled */
348 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
349 pgtblctl |= 1;
350 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
351
352 gatt->ag_physical = pgtblctl & ~1;
353 } else { /* CHIP_I855 */
354 /* The i855 automatically initializes the 128k gatt on boot. */
355 unsigned int gcc1, pgtblctl;
356
357 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
358 switch (gcc1 & AGP_I855_GCC1_GMS) {
359 case AGP_I855_GCC1_GMS_STOLEN_1M:
360 sc->stolen = (1024 - 132) * 1024 / 4096;
361 break;
362 case AGP_I855_GCC1_GMS_STOLEN_4M:
363 sc->stolen = (4096 - 132) * 1024 / 4096;
364 break;
365 case AGP_I855_GCC1_GMS_STOLEN_8M:
366 sc->stolen = (8192 - 132) * 1024 / 4096;
367 break;
368 case AGP_I855_GCC1_GMS_STOLEN_16M:
369 sc->stolen = (16384 - 132) * 1024 / 4096;
370 break;
371 case AGP_I855_GCC1_GMS_STOLEN_32M:
372 sc->stolen = (32768 - 132) * 1024 / 4096;
373 break;
374 default:
375 sc->stolen = 0;
376 device_printf(dev, "unknown memory configuration, disabling\n");
377 agp_generic_detach(dev);
378 return EINVAL;
379 }
380 if (sc->stolen > 0)
381 device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4);
382 device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024);
383
384 /* GATT address is already in there, make sure it's enabled */
385 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
386 pgtblctl |= 1;
387 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
388
389 gatt->ag_physical = pgtblctl & ~1;
390 }
391
392 /* Add a device for the drm to attach to */
393 if (!device_add_child( dev, "drmsub", -1 ))
394 printf("out of memory...\n");
395
396 return bus_generic_attach(dev);
397}
398
399static int
400agp_i810_detach(device_t dev)
401{
402 struct agp_i810_softc *sc = device_get_softc(dev);
403 int error;
404 device_t child;
405
406 error = agp_generic_detach(dev);
407 if (error)
408 return error;
409
410 /* Clear the GATT base. */
411 if ( sc->chiptype == CHIP_I810 ) {
412 WRITE4(AGP_I810_PGTBL_CTL, 0);
413 } else {
414 unsigned int pgtblctl;
415 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
416 pgtblctl &= ~1;
417 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
418 }
419
420 /* Put the aperture back the way it started. */
421 AGP_SET_APERTURE(dev, sc->initial_aperture);
422
423 if ( sc->chiptype == CHIP_I810 ) {
424 contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
425 }
426 free(sc->gatt, M_AGP);
427
428 bus_release_resource(dev, SYS_RES_MEMORY,
429 AGP_I810_MMADR, sc->regs);
430
431 child = device_find_child( dev, "drmsub", 0 );
432 if (child)
433 device_delete_child( dev, child );
434
435 return 0;
436}
437
438static u_int32_t
439agp_i810_get_aperture(device_t dev)
440{
441 struct agp_i810_softc *sc = device_get_softc(dev);
442
443 if ( sc->chiptype == CHIP_I810 ) {
444 u_int16_t miscc;
445 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
446 if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32)
447 return 32 * 1024 * 1024;
448 else
449 return 64 * 1024 * 1024;
450 } else if ( sc->chiptype == CHIP_I830 ) {
451 unsigned int gcc1;
452
453 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
454 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
455 return 64 * 1024 * 1024;
456 else
457 return 128 * 1024 * 1024;
458 } else { /* CHIP_I855 */
459 return 128 * 1024 * 1024;
460 }
461}
462
463static int
464agp_i810_set_aperture(device_t dev, u_int32_t aperture)
465{
466 struct agp_i810_softc *sc = device_get_softc(dev);
467 u_int16_t miscc;
468
469 if ( sc->chiptype == CHIP_I810 ) {
470 /*
471 * Double check for sanity.
472 */
473 if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
474 device_printf(dev, "bad aperture size %d\n", aperture);
475 return EINVAL;
476 }
477
478 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
479 miscc &= ~AGP_I810_MISCC_WINSIZE;
480 if (aperture == 32 * 1024 * 1024)
481 miscc |= AGP_I810_MISCC_WINSIZE_32;
482 else
483 miscc |= AGP_I810_MISCC_WINSIZE_64;
484
485 pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
486 } else if ( sc->chiptype == CHIP_I830 ) {
487 unsigned int gcc1;
488
489 if (aperture != 64 * 1024 * 1024 && aperture != 128 * 1024 * 1024) {
490 device_printf(dev, "bad aperture size %d\n", aperture);
491 return EINVAL;
492 }
493 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
494 gcc1 &= ~AGP_I830_GCC1_GMASIZE;
495 if (aperture == 64 * 1024 * 1024)
496 gcc1 |= AGP_I830_GCC1_GMASIZE_64;
497 else
498 gcc1 |= AGP_I830_GCC1_GMASIZE_128;
499
500 pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
501 } else { /* CHIP_I855 */
502 if (aperture != 128 * 1024 * 1024) {
503 device_printf(dev, "bad aperture size %d\n", aperture);
504 return EINVAL;
505 }
506 }
507
508 return 0;
509}
510
511static int
512agp_i810_bind_page(device_t dev, int offset, vm_offset_t physical)
513{
514 struct agp_i810_softc *sc = device_get_softc(dev);
515
516 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
517 device_printf(dev, "failed: offset is 0x%08x, shift is %d, entries is %d\n", offset, AGP_PAGE_SHIFT, sc->gatt->ag_entries);
518 return EINVAL;
519 }
520
521 if ( sc->chiptype != CHIP_I810 ) {
522 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
523 device_printf(dev, "trying to bind into stolen memory");
524 return EINVAL;
525 }
526 }
527
528 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, physical | 1);
529 return 0;
530}
531
532static int
533agp_i810_unbind_page(device_t dev, int offset)
534{
535 struct agp_i810_softc *sc = device_get_softc(dev);
536
537 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
538 return EINVAL;
539
540 if ( sc->chiptype != CHIP_I810 ) {
541 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
542 device_printf(dev, "trying to unbind from stolen memory");
543 return EINVAL;
544 }
545 }
546
547 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, 0);
548 return 0;
549}
550
551/*
552 * Writing via memory mapped registers already flushes all TLBs.
553 */
554static void
555agp_i810_flush_tlb(device_t dev)
556{
557}
558
559static int
560agp_i810_enable(device_t dev, u_int32_t mode)
561{
562
563 return 0;
564}
565
566static struct agp_memory *
567agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
568{
569 struct agp_i810_softc *sc = device_get_softc(dev);
570 struct agp_memory *mem;
571
572 if ((size & (AGP_PAGE_SIZE - 1)) != 0)
573 return 0;
574
575 if (sc->agp.as_allocated + size > sc->agp.as_maxmem)
576 return 0;
577
578 if (type == 1) {
579 /*
580 * Mapping local DRAM into GATT.
581 */
582 if ( sc->chiptype != CHIP_I810 )
583 return 0;
584 if (size != sc->dcache_size)
585 return 0;
586 } else if (type == 2) {
587 /*
588 * Bogus mapping of a single page for the hardware cursor.
589 */
590 if (size != AGP_PAGE_SIZE)
591 return 0;
592 }
593
594 mem = malloc(sizeof *mem, M_AGP, M_WAITOK);
595 mem->am_id = sc->agp.as_nextid++;
596 mem->am_size = size;
597 mem->am_type = type;
598 if (type != 1)
599 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
600 atop(round_page(size)));
601 else
602 mem->am_obj = 0;
603
604 if (type == 2) {
605 /*
606 * Allocate and wire down the page now so that we can
607 * get its physical address.
608 */
609 vm_page_t m;
610
611 VM_OBJECT_LOCK(mem->am_obj);
612 m = vm_page_grab(mem->am_obj, 0,
613 VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY);
614 VM_OBJECT_UNLOCK(mem->am_obj);
615 vm_page_lock_queues();
616 mem->am_physical = VM_PAGE_TO_PHYS(m);
617 vm_page_wakeup(m);
618 vm_page_unlock_queues();
619 } else {
620 mem->am_physical = 0;
621 }
622
623 mem->am_offset = 0;
624 mem->am_is_bound = 0;
625 TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
626 sc->agp.as_allocated += size;
627
628 return mem;
629}
630
631static int
632agp_i810_free_memory(device_t dev, struct agp_memory *mem)
633{
634 struct agp_i810_softc *sc = device_get_softc(dev);
635
636 if (mem->am_is_bound)
637 return EBUSY;
638
639 if (mem->am_type == 2) {
640 /*
641 * Unwire the page which we wired in alloc_memory.
642 */
643 vm_page_t m;
644
645 VM_OBJECT_LOCK(mem->am_obj);
646 m = vm_page_lookup(mem->am_obj, 0);
647 VM_OBJECT_UNLOCK(mem->am_obj);
648 vm_page_lock_queues();
649 vm_page_unwire(m, 0);
650 vm_page_unlock_queues();
651 }
652
653 sc->agp.as_allocated -= mem->am_size;
654 TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
655 if (mem->am_obj)
656 vm_object_deallocate(mem->am_obj);
657 free(mem, M_AGP);
658 return 0;
659}
660
661static int
662agp_i810_bind_memory(device_t dev, struct agp_memory *mem,
663 vm_offset_t offset)
664{
665 struct agp_i810_softc *sc = device_get_softc(dev);
666 vm_offset_t i;
667
668 if (mem->am_type != 1)
669 return agp_generic_bind_memory(dev, mem, offset);
670
671 if ( sc->chiptype != CHIP_I810 )
672 return EINVAL;
673
674 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
675 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4,
676 i | 3);
677 }
678
679 return 0;
680}
681
682static int
683agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
684{
685 struct agp_i810_softc *sc = device_get_softc(dev);
686 vm_offset_t i;
687
688 if (mem->am_type != 1)
689 return agp_generic_unbind_memory(dev, mem);
690
691 if ( sc->chiptype != CHIP_I810 )
692 return EINVAL;
693
694 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
695 WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0);
696
697 return 0;
698}
699
700static int
701agp_i810_print_child(device_t dev, device_t child)
702{
703 int retval = 0;
704
705 retval += bus_print_child_header(dev, child);
706 retval += printf(": (child of agp_i810.c)");
707 retval += bus_print_child_footer(dev, child);
708
709 return retval;
710}
711
712static device_method_t agp_i810_methods[] = {
713 /* Device interface */
714 DEVMETHOD(device_probe, agp_i810_probe),
715 DEVMETHOD(device_attach, agp_i810_attach),
716 DEVMETHOD(device_detach, agp_i810_detach),
717 DEVMETHOD(device_shutdown, bus_generic_shutdown),
718 DEVMETHOD(device_suspend, bus_generic_suspend),
719 DEVMETHOD(device_resume, bus_generic_resume),
720
721 /* AGP interface */
722 DEVMETHOD(agp_get_aperture, agp_i810_get_aperture),
723 DEVMETHOD(agp_set_aperture, agp_i810_set_aperture),
724 DEVMETHOD(agp_bind_page, agp_i810_bind_page),
725 DEVMETHOD(agp_unbind_page, agp_i810_unbind_page),
726 DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb),
727 DEVMETHOD(agp_enable, agp_i810_enable),
728 DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory),
729 DEVMETHOD(agp_free_memory, agp_i810_free_memory),
730 DEVMETHOD(agp_bind_memory, agp_i810_bind_memory),
731 DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory),
732
733 /* bus methods */
734 DEVMETHOD(bus_print_child, agp_i810_print_child),
735 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
736 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
737 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
738 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
739 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
740 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
741 { 0, 0 }
742};
743
744static driver_t agp_i810_driver = {
745 "agp",
746 agp_i810_methods,
747 sizeof(struct agp_i810_softc),
748};
749
750static devclass_t agp_devclass;
751
752DRIVER_MODULE(agp_i810, pci, agp_i810_driver, agp_devclass, 0, 0);
753MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
754MODULE_DEPEND(agp_i810, pci, 1, 1, 1);
| 44#include <sys/mutex.h>
45#include <sys/proc.h>
46
47#include <dev/pci/pcivar.h>
48#include <dev/pci/pcireg.h>
49#include <pci/agppriv.h>
50#include <pci/agpreg.h>
51
52#include <vm/vm.h>
53#include <vm/vm_object.h>
54#include <vm/vm_page.h>
55#include <vm/vm_pageout.h>
56#include <vm/pmap.h>
57
58#include <machine/bus.h>
59#include <machine/resource.h>
60#include <sys/rman.h>
61
62MALLOC_DECLARE(M_AGP);
63
64#define READ1(off) bus_space_read_1(sc->bst, sc->bsh, off)
65#define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off)
66#define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v)
67
68#define CHIP_I810 0 /* i810/i815 */
69#define CHIP_I830 1 /* 830M/845G */
70#define CHIP_I855 2 /* 852GM/855GM/865G */
71
72struct agp_i810_softc {
73 struct agp_softc agp;
74 u_int32_t initial_aperture; /* aperture size at startup */
75 struct agp_gatt *gatt;
76 int chiptype; /* i810-like or i830 */
77 u_int32_t dcache_size; /* i810 only */
78 u_int32_t stolen; /* number of i830/845 gtt entries for stolen memory */
79 device_t bdev; /* bridge device */
80 struct resource *regs; /* memory mapped GC registers */
81 bus_space_tag_t bst; /* bus_space tag */
82 bus_space_handle_t bsh; /* bus_space handle */
83};
84
85static const char*
86agp_i810_match(device_t dev)
87{
88 if (pci_get_class(dev) != PCIC_DISPLAY
89 || pci_get_subclass(dev) != PCIS_DISPLAY_VGA)
90 return NULL;
91
92 switch (pci_get_devid(dev)) {
93 case 0x71218086:
94 return ("Intel 82810 (i810 GMCH) SVGA controller");
95
96 case 0x71238086:
97 return ("Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller");
98
99 case 0x71258086:
100 return ("Intel 82810E (i810E GMCH) SVGA controller");
101
102 case 0x11328086:
103 return ("Intel 82815 (i815 GMCH) SVGA controller");
104
105 case 0x35778086:
106 return ("Intel 82830M (830M GMCH) SVGA controller");
107
108 case 0x25628086:
109 return ("Intel 82845G (845G GMCH) SVGA controller");
110
111 case 0x35828086:
112 switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
113 case AGP_I855_GME:
114 return ("Intel 82855GME (855GME GMCH) SVGA controller");
115
116 case AGP_I855_GM:
117 return ("Intel 82855GM (855GM GMCH) SVGA controller");
118
119 case AGP_I852_GME:
120 return ("Intel 82852GME (852GME GMCH) SVGA controller");
121
122 case AGP_I852_GM:
123 return ("Intel 82852GM (852GM GMCH) SVGA controller");
124
125 default:
126 return ("Intel 8285xM (85xGM GMCH) SVGA controller");
127 }
128
129 case 0x25728086:
130 return ("Intel 82865G (865G GMCH) SVGA controller");
131 };
132
133 return NULL;
134}
135
136/*
137 * Find bridge device.
138 */
139static device_t
140agp_i810_find_bridge(device_t dev)
141{
142 device_t *children, child;
143 int nchildren, i;
144 u_int32_t devid;
145
146 /*
147 * Calculate bridge device's ID.
148 */
149 devid = pci_get_devid(dev);
150 switch (devid) {
151 case 0x71218086:
152 case 0x71238086:
153 case 0x71258086:
154 devid -= 0x10000;
155 break;
156
157 case 0x11328086:
158 case 0x35778086:
159 case 0x25628086:
160 case 0x35828086:
161 case 0x25728086:
162 devid -= 0x20000;
163 break;
164 };
165 if (device_get_children(device_get_parent(dev), &children, &nchildren))
166 return 0;
167
168 for (i = 0; i < nchildren; i++) {
169 child = children[i];
170
171 if (pci_get_devid(child) == devid) {
172 free(children, M_TEMP);
173 return child;
174 }
175 }
176 free(children, M_TEMP);
177 return 0;
178}
179
180static int
181agp_i810_probe(device_t dev)
182{
183 const char *desc;
184
185 if (resource_disabled("agp", device_get_unit(dev)))
186 return (ENXIO);
187 desc = agp_i810_match(dev);
188 if (desc) {
189 device_t bdev;
190 u_int8_t smram;
191 unsigned int gcc1;
192 int devid = pci_get_devid(dev);
193
194 bdev = agp_i810_find_bridge(dev);
195 if (!bdev) {
196 if (bootverbose)
197 printf("I810: can't find bridge device\n");
198 return ENXIO;
199 }
200
201 /*
202 * checking whether internal graphics device has been activated.
203 */
204 switch (devid) {
205 /* i810 */
206 case 0x71218086:
207 case 0x71238086:
208 case 0x71258086:
209 case 0x11328086:
210 smram = pci_read_config(bdev, AGP_I810_SMRAM, 1);
211 if ((smram & AGP_I810_SMRAM_GMS)
212 == AGP_I810_SMRAM_GMS_DISABLED) {
213 if (bootverbose)
214 printf("I810: disabled, not probing\n");
215 return ENXIO;
216 }
217 break;
218
219 /* i830 */
220 case 0x35778086:
221 case 0x35828086:
222 case 0x25628086:
223 case 0x25728086:
224 gcc1 = pci_read_config(bdev, AGP_I830_GCC1, 1);
225 if ((gcc1 & AGP_I830_GCC1_DEV2) == AGP_I830_GCC1_DEV2_DISABLED) {
226 if (bootverbose)
227 printf("I830: disabled, not probing\n");
228 return ENXIO;
229 }
230 break;
231
232 default:
233 return ENXIO;
234 }
235
236 device_verbose(dev);
237 device_set_desc(dev, desc);
238 return 0;
239 }
240
241 return ENXIO;
242}
243
244static int
245agp_i810_attach(device_t dev)
246{
247 struct agp_i810_softc *sc = device_get_softc(dev);
248 struct agp_gatt *gatt;
249 int error, rid;
250
251 sc->bdev = agp_i810_find_bridge(dev);
252 if (!sc->bdev)
253 return ENOENT;
254
255 error = agp_generic_attach(dev);
256 if (error)
257 return error;
258
259 switch (pci_get_devid(dev)) {
260 case 0x71218086:
261 case 0x71238086:
262 case 0x71258086:
263 case 0x11328086:
264 sc->chiptype = CHIP_I810;
265 break;
266 case 0x35778086:
267 case 0x25628086:
268 sc->chiptype = CHIP_I830;
269 break;
270 case 0x35828086:
271 case 0x25728086:
272 sc->chiptype = CHIP_I855;
273 break;
274 };
275
276 /* Same for i810 and i830 */
277 rid = AGP_I810_MMADR;
278 sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
279 RF_ACTIVE);
280 if (!sc->regs) {
281 agp_generic_detach(dev);
282 return ENOMEM;
283 }
284 sc->bst = rman_get_bustag(sc->regs);
285 sc->bsh = rman_get_bushandle(sc->regs);
286
287 sc->initial_aperture = AGP_GET_APERTURE(dev);
288
289 gatt = malloc( sizeof(struct agp_gatt), M_AGP, M_NOWAIT);
290 if (!gatt) {
291 agp_generic_detach(dev);
292 return ENOMEM;
293 }
294 sc->gatt = gatt;
295
296 gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
297
298 if ( sc->chiptype == CHIP_I810 ) {
299 /* Some i810s have on-chip memory called dcache */
300 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
301 sc->dcache_size = 4 * 1024 * 1024;
302 else
303 sc->dcache_size = 0;
304
305 /* According to the specs the gatt on the i810 must be 64k */
306 gatt->ag_virtual = contigmalloc( 64 * 1024, M_AGP, 0,
307 0, ~0, PAGE_SIZE, 0);
308 if (!gatt->ag_virtual) {
309 if (bootverbose)
310 device_printf(dev, "contiguous allocation failed\n");
311 free(gatt, M_AGP);
312 agp_generic_detach(dev);
313 return ENOMEM;
314 }
315 bzero(gatt->ag_virtual, gatt->ag_entries * sizeof(u_int32_t));
316
317 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
318 agp_flush_cache();
319 /* Install the GATT. */
320 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1);
321 } else if ( sc->chiptype == CHIP_I830 ) {
322 /* The i830 automatically initializes the 128k gatt on boot. */
323 unsigned int gcc1, pgtblctl;
324
325 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
326 switch (gcc1 & AGP_I830_GCC1_GMS) {
327 case AGP_I830_GCC1_GMS_STOLEN_512:
328 sc->stolen = (512 - 132) * 1024 / 4096;
329 break;
330 case AGP_I830_GCC1_GMS_STOLEN_1024:
331 sc->stolen = (1024 - 132) * 1024 / 4096;
332 break;
333 case AGP_I830_GCC1_GMS_STOLEN_8192:
334 sc->stolen = (8192 - 132) * 1024 / 4096;
335 break;
336 default:
337 sc->stolen = 0;
338 device_printf(dev, "unknown memory configuration, disabling\n");
339 agp_generic_detach(dev);
340 return EINVAL;
341 }
342 if (sc->stolen > 0)
343 device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4);
344 device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024);
345
346 /* GATT address is already in there, make sure it's enabled */
347 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
348 pgtblctl |= 1;
349 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
350
351 gatt->ag_physical = pgtblctl & ~1;
352 } else { /* CHIP_I855 */
353 /* The i855 automatically initializes the 128k gatt on boot. */
354 unsigned int gcc1, pgtblctl;
355
356 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
357 switch (gcc1 & AGP_I855_GCC1_GMS) {
358 case AGP_I855_GCC1_GMS_STOLEN_1M:
359 sc->stolen = (1024 - 132) * 1024 / 4096;
360 break;
361 case AGP_I855_GCC1_GMS_STOLEN_4M:
362 sc->stolen = (4096 - 132) * 1024 / 4096;
363 break;
364 case AGP_I855_GCC1_GMS_STOLEN_8M:
365 sc->stolen = (8192 - 132) * 1024 / 4096;
366 break;
367 case AGP_I855_GCC1_GMS_STOLEN_16M:
368 sc->stolen = (16384 - 132) * 1024 / 4096;
369 break;
370 case AGP_I855_GCC1_GMS_STOLEN_32M:
371 sc->stolen = (32768 - 132) * 1024 / 4096;
372 break;
373 default:
374 sc->stolen = 0;
375 device_printf(dev, "unknown memory configuration, disabling\n");
376 agp_generic_detach(dev);
377 return EINVAL;
378 }
379 if (sc->stolen > 0)
380 device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4);
381 device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024);
382
383 /* GATT address is already in there, make sure it's enabled */
384 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
385 pgtblctl |= 1;
386 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
387
388 gatt->ag_physical = pgtblctl & ~1;
389 }
390
391 /* Add a device for the drm to attach to */
392 if (!device_add_child( dev, "drmsub", -1 ))
393 printf("out of memory...\n");
394
395 return bus_generic_attach(dev);
396}
397
398static int
399agp_i810_detach(device_t dev)
400{
401 struct agp_i810_softc *sc = device_get_softc(dev);
402 int error;
403 device_t child;
404
405 error = agp_generic_detach(dev);
406 if (error)
407 return error;
408
409 /* Clear the GATT base. */
410 if ( sc->chiptype == CHIP_I810 ) {
411 WRITE4(AGP_I810_PGTBL_CTL, 0);
412 } else {
413 unsigned int pgtblctl;
414 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
415 pgtblctl &= ~1;
416 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
417 }
418
419 /* Put the aperture back the way it started. */
420 AGP_SET_APERTURE(dev, sc->initial_aperture);
421
422 if ( sc->chiptype == CHIP_I810 ) {
423 contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
424 }
425 free(sc->gatt, M_AGP);
426
427 bus_release_resource(dev, SYS_RES_MEMORY,
428 AGP_I810_MMADR, sc->regs);
429
430 child = device_find_child( dev, "drmsub", 0 );
431 if (child)
432 device_delete_child( dev, child );
433
434 return 0;
435}
436
437static u_int32_t
438agp_i810_get_aperture(device_t dev)
439{
440 struct agp_i810_softc *sc = device_get_softc(dev);
441
442 if ( sc->chiptype == CHIP_I810 ) {
443 u_int16_t miscc;
444 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
445 if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32)
446 return 32 * 1024 * 1024;
447 else
448 return 64 * 1024 * 1024;
449 } else if ( sc->chiptype == CHIP_I830 ) {
450 unsigned int gcc1;
451
452 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
453 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
454 return 64 * 1024 * 1024;
455 else
456 return 128 * 1024 * 1024;
457 } else { /* CHIP_I855 */
458 return 128 * 1024 * 1024;
459 }
460}
461
462static int
463agp_i810_set_aperture(device_t dev, u_int32_t aperture)
464{
465 struct agp_i810_softc *sc = device_get_softc(dev);
466 u_int16_t miscc;
467
468 if ( sc->chiptype == CHIP_I810 ) {
469 /*
470 * Double check for sanity.
471 */
472 if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
473 device_printf(dev, "bad aperture size %d\n", aperture);
474 return EINVAL;
475 }
476
477 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
478 miscc &= ~AGP_I810_MISCC_WINSIZE;
479 if (aperture == 32 * 1024 * 1024)
480 miscc |= AGP_I810_MISCC_WINSIZE_32;
481 else
482 miscc |= AGP_I810_MISCC_WINSIZE_64;
483
484 pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
485 } else if ( sc->chiptype == CHIP_I830 ) {
486 unsigned int gcc1;
487
488 if (aperture != 64 * 1024 * 1024 && aperture != 128 * 1024 * 1024) {
489 device_printf(dev, "bad aperture size %d\n", aperture);
490 return EINVAL;
491 }
492 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
493 gcc1 &= ~AGP_I830_GCC1_GMASIZE;
494 if (aperture == 64 * 1024 * 1024)
495 gcc1 |= AGP_I830_GCC1_GMASIZE_64;
496 else
497 gcc1 |= AGP_I830_GCC1_GMASIZE_128;
498
499 pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
500 } else { /* CHIP_I855 */
501 if (aperture != 128 * 1024 * 1024) {
502 device_printf(dev, "bad aperture size %d\n", aperture);
503 return EINVAL;
504 }
505 }
506
507 return 0;
508}
509
510static int
511agp_i810_bind_page(device_t dev, int offset, vm_offset_t physical)
512{
513 struct agp_i810_softc *sc = device_get_softc(dev);
514
515 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
516 device_printf(dev, "failed: offset is 0x%08x, shift is %d, entries is %d\n", offset, AGP_PAGE_SHIFT, sc->gatt->ag_entries);
517 return EINVAL;
518 }
519
520 if ( sc->chiptype != CHIP_I810 ) {
521 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
522 device_printf(dev, "trying to bind into stolen memory");
523 return EINVAL;
524 }
525 }
526
527 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, physical | 1);
528 return 0;
529}
530
531static int
532agp_i810_unbind_page(device_t dev, int offset)
533{
534 struct agp_i810_softc *sc = device_get_softc(dev);
535
536 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
537 return EINVAL;
538
539 if ( sc->chiptype != CHIP_I810 ) {
540 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
541 device_printf(dev, "trying to unbind from stolen memory");
542 return EINVAL;
543 }
544 }
545
546 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, 0);
547 return 0;
548}
549
550/*
551 * Writing via memory mapped registers already flushes all TLBs.
552 */
553static void
554agp_i810_flush_tlb(device_t dev)
555{
556}
557
558static int
559agp_i810_enable(device_t dev, u_int32_t mode)
560{
561
562 return 0;
563}
564
565static struct agp_memory *
566agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
567{
568 struct agp_i810_softc *sc = device_get_softc(dev);
569 struct agp_memory *mem;
570
571 if ((size & (AGP_PAGE_SIZE - 1)) != 0)
572 return 0;
573
574 if (sc->agp.as_allocated + size > sc->agp.as_maxmem)
575 return 0;
576
577 if (type == 1) {
578 /*
579 * Mapping local DRAM into GATT.
580 */
581 if ( sc->chiptype != CHIP_I810 )
582 return 0;
583 if (size != sc->dcache_size)
584 return 0;
585 } else if (type == 2) {
586 /*
587 * Bogus mapping of a single page for the hardware cursor.
588 */
589 if (size != AGP_PAGE_SIZE)
590 return 0;
591 }
592
593 mem = malloc(sizeof *mem, M_AGP, M_WAITOK);
594 mem->am_id = sc->agp.as_nextid++;
595 mem->am_size = size;
596 mem->am_type = type;
597 if (type != 1)
598 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
599 atop(round_page(size)));
600 else
601 mem->am_obj = 0;
602
603 if (type == 2) {
604 /*
605 * Allocate and wire down the page now so that we can
606 * get its physical address.
607 */
608 vm_page_t m;
609
610 VM_OBJECT_LOCK(mem->am_obj);
611 m = vm_page_grab(mem->am_obj, 0,
612 VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY);
613 VM_OBJECT_UNLOCK(mem->am_obj);
614 vm_page_lock_queues();
615 mem->am_physical = VM_PAGE_TO_PHYS(m);
616 vm_page_wakeup(m);
617 vm_page_unlock_queues();
618 } else {
619 mem->am_physical = 0;
620 }
621
622 mem->am_offset = 0;
623 mem->am_is_bound = 0;
624 TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
625 sc->agp.as_allocated += size;
626
627 return mem;
628}
629
630static int
631agp_i810_free_memory(device_t dev, struct agp_memory *mem)
632{
633 struct agp_i810_softc *sc = device_get_softc(dev);
634
635 if (mem->am_is_bound)
636 return EBUSY;
637
638 if (mem->am_type == 2) {
639 /*
640 * Unwire the page which we wired in alloc_memory.
641 */
642 vm_page_t m;
643
644 VM_OBJECT_LOCK(mem->am_obj);
645 m = vm_page_lookup(mem->am_obj, 0);
646 VM_OBJECT_UNLOCK(mem->am_obj);
647 vm_page_lock_queues();
648 vm_page_unwire(m, 0);
649 vm_page_unlock_queues();
650 }
651
652 sc->agp.as_allocated -= mem->am_size;
653 TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
654 if (mem->am_obj)
655 vm_object_deallocate(mem->am_obj);
656 free(mem, M_AGP);
657 return 0;
658}
659
660static int
661agp_i810_bind_memory(device_t dev, struct agp_memory *mem,
662 vm_offset_t offset)
663{
664 struct agp_i810_softc *sc = device_get_softc(dev);
665 vm_offset_t i;
666
667 if (mem->am_type != 1)
668 return agp_generic_bind_memory(dev, mem, offset);
669
670 if ( sc->chiptype != CHIP_I810 )
671 return EINVAL;
672
673 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
674 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4,
675 i | 3);
676 }
677
678 return 0;
679}
680
681static int
682agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
683{
684 struct agp_i810_softc *sc = device_get_softc(dev);
685 vm_offset_t i;
686
687 if (mem->am_type != 1)
688 return agp_generic_unbind_memory(dev, mem);
689
690 if ( sc->chiptype != CHIP_I810 )
691 return EINVAL;
692
693 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
694 WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0);
695
696 return 0;
697}
698
699static int
700agp_i810_print_child(device_t dev, device_t child)
701{
702 int retval = 0;
703
704 retval += bus_print_child_header(dev, child);
705 retval += printf(": (child of agp_i810.c)");
706 retval += bus_print_child_footer(dev, child);
707
708 return retval;
709}
710
711static device_method_t agp_i810_methods[] = {
712 /* Device interface */
713 DEVMETHOD(device_probe, agp_i810_probe),
714 DEVMETHOD(device_attach, agp_i810_attach),
715 DEVMETHOD(device_detach, agp_i810_detach),
716 DEVMETHOD(device_shutdown, bus_generic_shutdown),
717 DEVMETHOD(device_suspend, bus_generic_suspend),
718 DEVMETHOD(device_resume, bus_generic_resume),
719
720 /* AGP interface */
721 DEVMETHOD(agp_get_aperture, agp_i810_get_aperture),
722 DEVMETHOD(agp_set_aperture, agp_i810_set_aperture),
723 DEVMETHOD(agp_bind_page, agp_i810_bind_page),
724 DEVMETHOD(agp_unbind_page, agp_i810_unbind_page),
725 DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb),
726 DEVMETHOD(agp_enable, agp_i810_enable),
727 DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory),
728 DEVMETHOD(agp_free_memory, agp_i810_free_memory),
729 DEVMETHOD(agp_bind_memory, agp_i810_bind_memory),
730 DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory),
731
732 /* bus methods */
733 DEVMETHOD(bus_print_child, agp_i810_print_child),
734 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
735 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
736 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
737 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
738 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
739 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
740 { 0, 0 }
741};
742
743static driver_t agp_i810_driver = {
744 "agp",
745 agp_i810_methods,
746 sizeof(struct agp_i810_softc),
747};
748
749static devclass_t agp_devclass;
750
751DRIVER_MODULE(agp_i810, pci, agp_i810_driver, agp_devclass, 0, 0);
752MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
753MODULE_DEPEND(agp_i810, pci, 1, 1, 1);
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