1/*-
2 * Copyright (c) 2000 Michael Smith
3 * Copyright (c) 2000 BSDi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
| 1/*-
2 * Copyright (c) 2000 Michael Smith
3 * Copyright (c) 2000 BSDi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
|
28 */
29#include "opt_acpi.h"
30#include <sys/param.h>
31#include <sys/bus.h>
32#include <sys/malloc.h>
33#include <sys/kernel.h>
34
35#include "acpi.h"
36
37#include <dev/acpica/acpivar.h>
38
39#include <machine/pci_cfgreg.h>
40#include <dev/pci/pcivar.h>
41#include <dev/pci/pcib_private.h>
42#include "pcib_if.h"
43
44#include <dev/acpica/acpi_pcibvar.h>
45
46/*
47 * Hooks for the ACPI CA debugging infrastructure
48 */
49#define _COMPONENT ACPI_BUS
50ACPI_MODULE_NAME("PCI_ACPI")
51
52struct acpi_hpcib_softc {
53 device_t ap_dev;
54 ACPI_HANDLE ap_handle;
55
56 int ap_segment; /* analagous to Alpha 'hose' */
57 int ap_bus; /* bios-assigned bus number */
58
59 ACPI_BUFFER ap_prt; /* interrupt routing table */
60};
61
62
63static int acpi_pcib_acpi_probe(device_t bus);
64static int acpi_pcib_acpi_attach(device_t bus);
65static int acpi_pcib_acpi_resume(device_t bus);
66static int acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);
67static int acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);
68static u_int32_t acpi_pcib_read_config(device_t dev, int bus, int slot, int func, int reg, int bytes);
69static void acpi_pcib_write_config(device_t dev, int bus, int slot, int func, int reg,
70 u_int32_t data, int bytes);
71static int acpi_pcib_acpi_route_interrupt(device_t pcib,
72 device_t dev, int pin);
| 28 */
29#include "opt_acpi.h"
30#include <sys/param.h>
31#include <sys/bus.h>
32#include <sys/malloc.h>
33#include <sys/kernel.h>
34
35#include "acpi.h"
36
37#include <dev/acpica/acpivar.h>
38
39#include <machine/pci_cfgreg.h>
40#include <dev/pci/pcivar.h>
41#include <dev/pci/pcib_private.h>
42#include "pcib_if.h"
43
44#include <dev/acpica/acpi_pcibvar.h>
45
46/*
47 * Hooks for the ACPI CA debugging infrastructure
48 */
49#define _COMPONENT ACPI_BUS
50ACPI_MODULE_NAME("PCI_ACPI")
51
52struct acpi_hpcib_softc {
53 device_t ap_dev;
54 ACPI_HANDLE ap_handle;
55
56 int ap_segment; /* analagous to Alpha 'hose' */
57 int ap_bus; /* bios-assigned bus number */
58
59 ACPI_BUFFER ap_prt; /* interrupt routing table */
60};
61
62
63static int acpi_pcib_acpi_probe(device_t bus);
64static int acpi_pcib_acpi_attach(device_t bus);
65static int acpi_pcib_acpi_resume(device_t bus);
66static int acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);
67static int acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);
68static u_int32_t acpi_pcib_read_config(device_t dev, int bus, int slot, int func, int reg, int bytes);
69static void acpi_pcib_write_config(device_t dev, int bus, int slot, int func, int reg,
70 u_int32_t data, int bytes);
71static int acpi_pcib_acpi_route_interrupt(device_t pcib,
72 device_t dev, int pin);
|
87 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
88 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
89 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
90 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
91 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
92
93 /* pcib interface */
94 DEVMETHOD(pcib_maxslots, pcib_maxslots),
95 DEVMETHOD(pcib_read_config, acpi_pcib_read_config),
96 DEVMETHOD(pcib_write_config, acpi_pcib_write_config),
97 DEVMETHOD(pcib_route_interrupt, acpi_pcib_acpi_route_interrupt),
98
99 {0, 0}
100};
101
102static driver_t acpi_pcib_acpi_driver = {
103 "pcib",
104 acpi_pcib_acpi_methods,
105 sizeof(struct acpi_hpcib_softc),
106};
107
108DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, pcib_devclass, 0, 0);
109
110static int
111acpi_pcib_acpi_probe(device_t dev)
112{
113
114 if ((acpi_get_type(dev) == ACPI_TYPE_DEVICE) &&
115 !acpi_disabled("pci") &&
116 acpi_MatchHid(dev, "PNP0A03")) {
117
118 if (!pci_cfgregopen())
119 return(ENXIO);
120
121 /*
122 * Set device description
123 */
124 device_set_desc(dev, "ACPI Host-PCI bridge");
125 return(0);
126 }
127 return(ENXIO);
128}
129
130static int
131acpi_pcib_acpi_attach(device_t dev)
132{
133 struct acpi_hpcib_softc *sc;
134 ACPI_STATUS status;
135 u_int addr, slot, func, busok;
136 uint8_t busno;
137
138 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
139
140 sc = device_get_softc(dev);
141 sc->ap_dev = dev;
142 sc->ap_handle = acpi_get_handle(dev);
143
144 /*
145 * Get our base bus number by evaluating _BBN.
146 * If this doesn't work, we assume we're bus number 0.
147 *
148 * XXX note that it may also not exist in the case where we are
149 * meant to use a private configuration space mechanism for this bus,
150 * so we should dig out our resources and check to see if we have
151 * anything like that. How do we do this?
152 * XXX If we have the requisite information, and if we don't think the
153 * default PCI configuration space handlers can deal with this bus,
154 * we should attach our own handler.
155 * XXX invoke _REG on this for the PCI config space address space?
156 * XXX It seems many BIOS's with multiple Host-PCI bridges do not set
157 * _BBN correctly. They set _BBN to zero for all bridges. Thus,
158 * if _BBN is zero and pcib0 already exists, we try to read our
159 * bus number from the configuration registers at address _ADR.
160 */
161 status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus);
162 if (ACPI_FAILURE(status)) {
163 if (status != AE_NOT_FOUND) {
164 device_printf(dev, "could not evaluate _BBN - %s\n",
165 AcpiFormatException(status));
166 return_VALUE(ENXIO);
167 } else {
168 /* if it's not found, assume 0 */
169 sc->ap_bus = 0;
170 }
171 }
172
173 /*
174 * If the bus is zero and pcib0 already exists, read the bus number
175 * via PCI config space.
176 */
177 busok = 1;
178 if (sc->ap_bus == 0 && devclass_get_device(pcib_devclass, 0) != dev) {
179 busok = 0;
180 status = acpi_GetInteger(sc->ap_handle, "_ADR", &addr);
181 if (ACPI_FAILURE(status)) {
182 if (status != AE_NOT_FOUND) {
183 device_printf(dev, "could not evaluate _ADR - %s\n",
184 AcpiFormatException(status));
185 return_VALUE(ENXIO);
186 } else
187 device_printf(dev, "could not determine config space address\n");
188 } else {
189 /* XXX: We assume bus 0. */
190 slot = addr >> 16;
191 func = addr & 0xffff;
192 if (bootverbose)
193 device_printf(dev, "reading config registers from 0:%d:%d\n",
194 slot, func);
195 if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0)
196 device_printf(dev, "could not read bus number from config space\n");
197 else {
198 sc->ap_bus = busno;
199 busok = 1;
200 }
201 }
202 }
203
204 /*
205 * If nothing else worked, hope that ACPI at least lays out the
206 * host-PCI bridges in order and that as a result our unit number
207 * is actually our bus number. There are several reasons this
208 * might not be true.
209 */
210 if (busok == 0) {
211 sc->ap_bus = device_get_unit(dev);
212 device_printf(dev, "trying bus number %d\n", sc->ap_bus);
213 }
214
215 /*
216 * Get our segment number by evaluating _SEG
217 * It's OK for this to not exist.
218 */
219 if (ACPI_FAILURE(status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment))) {
220 if (status != AE_NOT_FOUND) {
221 device_printf(dev, "could not evaluate _SEG - %s\n", AcpiFormatException(status));
222 return_VALUE(ENXIO);
223 }
224 /* if it's not found, assume 0 */
225 sc->ap_segment = 0;
226 }
227
228 return (acpi_pcib_attach(dev, &sc->ap_prt, sc->ap_bus));
229}
230
231static int
232acpi_pcib_acpi_resume(device_t dev)
233{
234 struct acpi_hpcib_softc *sc = device_get_softc(dev);
235
236 return (acpi_pcib_resume(dev, &sc->ap_prt, sc->ap_bus));
237}
238
239/*
240 * Support for standard PCI bridge ivars.
241 */
242static int
243acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
244{
245 struct acpi_hpcib_softc *sc = device_get_softc(dev);
246
247 switch (which) {
248 case PCIB_IVAR_BUS:
249 *result = sc->ap_bus;
250 return(0);
251 case ACPI_IVAR_HANDLE:
252 *result = (uintptr_t)sc->ap_handle;
253 return(0);
254 }
255 return(ENOENT);
256}
257
258static int
259acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
260{
261 struct acpi_hpcib_softc *sc = device_get_softc(dev);
262
263 switch (which) {
264 case PCIB_IVAR_BUS:
265 sc->ap_bus = value;
266 return(0);
267 }
268 return(ENOENT);
269}
270
271static u_int32_t
272acpi_pcib_read_config(device_t dev, int bus, int slot, int func, int reg, int bytes)
273{
274 return(pci_cfgregread(bus, slot, func, reg, bytes));
275}
276
277static void
278acpi_pcib_write_config(device_t dev, int bus, int slot, int func, int reg, u_int32_t data, int bytes)
279{
280 pci_cfgregwrite(bus, slot, func, reg, data, bytes);
281}
282
283static int
284acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin)
285{
286 struct acpi_hpcib_softc *sc;
287
288 /* find the bridge softc */
289 sc = device_get_softc(pcib);
290 return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
291}
| 91 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
92 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
93 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
94 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
95 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
96
97 /* pcib interface */
98 DEVMETHOD(pcib_maxslots, pcib_maxslots),
99 DEVMETHOD(pcib_read_config, acpi_pcib_read_config),
100 DEVMETHOD(pcib_write_config, acpi_pcib_write_config),
101 DEVMETHOD(pcib_route_interrupt, acpi_pcib_acpi_route_interrupt),
102
103 {0, 0}
104};
105
106static driver_t acpi_pcib_acpi_driver = {
107 "pcib",
108 acpi_pcib_acpi_methods,
109 sizeof(struct acpi_hpcib_softc),
110};
111
112DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, pcib_devclass, 0, 0);
113
114static int
115acpi_pcib_acpi_probe(device_t dev)
116{
117
118 if ((acpi_get_type(dev) == ACPI_TYPE_DEVICE) &&
119 !acpi_disabled("pci") &&
120 acpi_MatchHid(dev, "PNP0A03")) {
121
122 if (!pci_cfgregopen())
123 return(ENXIO);
124
125 /*
126 * Set device description
127 */
128 device_set_desc(dev, "ACPI Host-PCI bridge");
129 return(0);
130 }
131 return(ENXIO);
132}
133
134static int
135acpi_pcib_acpi_attach(device_t dev)
136{
137 struct acpi_hpcib_softc *sc;
138 ACPI_STATUS status;
139 u_int addr, slot, func, busok;
140 uint8_t busno;
141
142 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
143
144 sc = device_get_softc(dev);
145 sc->ap_dev = dev;
146 sc->ap_handle = acpi_get_handle(dev);
147
148 /*
149 * Get our base bus number by evaluating _BBN.
150 * If this doesn't work, we assume we're bus number 0.
151 *
152 * XXX note that it may also not exist in the case where we are
153 * meant to use a private configuration space mechanism for this bus,
154 * so we should dig out our resources and check to see if we have
155 * anything like that. How do we do this?
156 * XXX If we have the requisite information, and if we don't think the
157 * default PCI configuration space handlers can deal with this bus,
158 * we should attach our own handler.
159 * XXX invoke _REG on this for the PCI config space address space?
160 * XXX It seems many BIOS's with multiple Host-PCI bridges do not set
161 * _BBN correctly. They set _BBN to zero for all bridges. Thus,
162 * if _BBN is zero and pcib0 already exists, we try to read our
163 * bus number from the configuration registers at address _ADR.
164 */
165 status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus);
166 if (ACPI_FAILURE(status)) {
167 if (status != AE_NOT_FOUND) {
168 device_printf(dev, "could not evaluate _BBN - %s\n",
169 AcpiFormatException(status));
170 return_VALUE(ENXIO);
171 } else {
172 /* if it's not found, assume 0 */
173 sc->ap_bus = 0;
174 }
175 }
176
177 /*
178 * If the bus is zero and pcib0 already exists, read the bus number
179 * via PCI config space.
180 */
181 busok = 1;
182 if (sc->ap_bus == 0 && devclass_get_device(pcib_devclass, 0) != dev) {
183 busok = 0;
184 status = acpi_GetInteger(sc->ap_handle, "_ADR", &addr);
185 if (ACPI_FAILURE(status)) {
186 if (status != AE_NOT_FOUND) {
187 device_printf(dev, "could not evaluate _ADR - %s\n",
188 AcpiFormatException(status));
189 return_VALUE(ENXIO);
190 } else
191 device_printf(dev, "could not determine config space address\n");
192 } else {
193 /* XXX: We assume bus 0. */
194 slot = addr >> 16;
195 func = addr & 0xffff;
196 if (bootverbose)
197 device_printf(dev, "reading config registers from 0:%d:%d\n",
198 slot, func);
199 if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0)
200 device_printf(dev, "could not read bus number from config space\n");
201 else {
202 sc->ap_bus = busno;
203 busok = 1;
204 }
205 }
206 }
207
208 /*
209 * If nothing else worked, hope that ACPI at least lays out the
210 * host-PCI bridges in order and that as a result our unit number
211 * is actually our bus number. There are several reasons this
212 * might not be true.
213 */
214 if (busok == 0) {
215 sc->ap_bus = device_get_unit(dev);
216 device_printf(dev, "trying bus number %d\n", sc->ap_bus);
217 }
218
219 /*
220 * Get our segment number by evaluating _SEG
221 * It's OK for this to not exist.
222 */
223 if (ACPI_FAILURE(status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment))) {
224 if (status != AE_NOT_FOUND) {
225 device_printf(dev, "could not evaluate _SEG - %s\n", AcpiFormatException(status));
226 return_VALUE(ENXIO);
227 }
228 /* if it's not found, assume 0 */
229 sc->ap_segment = 0;
230 }
231
232 return (acpi_pcib_attach(dev, &sc->ap_prt, sc->ap_bus));
233}
234
235static int
236acpi_pcib_acpi_resume(device_t dev)
237{
238 struct acpi_hpcib_softc *sc = device_get_softc(dev);
239
240 return (acpi_pcib_resume(dev, &sc->ap_prt, sc->ap_bus));
241}
242
243/*
244 * Support for standard PCI bridge ivars.
245 */
246static int
247acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
248{
249 struct acpi_hpcib_softc *sc = device_get_softc(dev);
250
251 switch (which) {
252 case PCIB_IVAR_BUS:
253 *result = sc->ap_bus;
254 return(0);
255 case ACPI_IVAR_HANDLE:
256 *result = (uintptr_t)sc->ap_handle;
257 return(0);
258 }
259 return(ENOENT);
260}
261
262static int
263acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
264{
265 struct acpi_hpcib_softc *sc = device_get_softc(dev);
266
267 switch (which) {
268 case PCIB_IVAR_BUS:
269 sc->ap_bus = value;
270 return(0);
271 }
272 return(ENOENT);
273}
274
275static u_int32_t
276acpi_pcib_read_config(device_t dev, int bus, int slot, int func, int reg, int bytes)
277{
278 return(pci_cfgregread(bus, slot, func, reg, bytes));
279}
280
281static void
282acpi_pcib_write_config(device_t dev, int bus, int slot, int func, int reg, u_int32_t data, int bytes)
283{
284 pci_cfgregwrite(bus, slot, func, reg, data, bytes);
285}
286
287static int
288acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin)
289{
290 struct acpi_hpcib_softc *sc;
291
292 /* find the bridge softc */
293 sc = device_get_softc(pcib);
294 return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
295}
|