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vybrid.dtsi (261639) vybrid.dtsi (261982)
1/*-
2 * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/boot/fdt/dts/vybrid.dtsi 261639 2014-02-08 19:47:59Z br $
26 * $FreeBSD: head/sys/boot/fdt/dts/vybrid.dtsi 261982 2014-02-16 16:49:54Z br $
27 */
28
29/ {
30 model = "Freescale Vybrid Family";
31 compatible = "freescale,vybrid", "fsl,mvf";
32 #address-cells = <1>;
33 #size-cells = <1>;
34
35 interrupt-parent = <&GIC>;
36
37 aliases {
38 soc = &SOC;
39 serial0 = &serial0;
40 serial1 = &serial1;
41 sai0 = &sai0;
42 sai1 = &sai1;
43 sai2 = &sai2;
44 sai3 = &sai3;
45 esai = &esai;
46 adc0 = &adc0;
47 adc1 = &adc1;
48 edma0 = &edma0;
49 edma1 = &edma1;
50 src = &SRC;
51 };
52
53 SOC: vybrid {
54 #address-cells = <1>;
55 #size-cells = <1>;
56 compatible = "simple-bus";
57 ranges;
58 bus-frequency = <0>;
59
60 SRC: src@4006E000 {
61 compatible = "fsl,mvf600-src";
62 reg = <0x4006E000 0x100>;
63 };
64
65 mscm@40001000 {
66 compatible = "fsl,mvf600-mscm";
67 reg = <0x40001000 0x1000>;
68 };
69
70 GIC: interrupt-controller@01c81000 {
71 compatible = "arm,gic";
72 reg = <0x40003000 0x1000>, /* Distributor Registers */
73 <0x40002100 0x100>; /* CPU Interface Registers */
74 interrupt-controller;
75 #interrupt-cells = <1>;
76 };
77
78 anadig@40050000 {
79 compatible = "fsl,mvf600-anadig";
80 reg = <0x40050000 0x300>;
81 };
82
83 ccm@4006b000 {
84 compatible = "fsl,mvf600-ccm";
85 reg = <0x4006b000 0x1000>;
86 clock_names = "pll4";
87 };
88
89 mp_tmr@40002100 {
90 compatible = "arm,mpcore-timers";
91 clock-frequency = <133000000>;
92 #address-cells = <1>;
93 #size-cells = <0>;
94 reg = < 0x40002200 0x100 >, /* Global Timer Registers */
95 < 0x40002600 0x100 >; /* Private Timer Registers */
96 interrupts = < 27 29 >;
97 interrupt-parent = < &GIC >;
98 };
99
100 dmamux@40024000 {
101 compatible = "fsl,mvf600-dmamux";
102 reg = <0x40024000 0x100>,
103 <0x40025000 0x100>,
104 <0x400A1000 0x100>,
105 <0x400A2000 0x100>;
106 };
107
108 edma0: edma@40018000 {
109 compatible = "fsl,mvf600-edma";
110 reg = <0x40018000 0x1000>,
111 <0x40019000 0x1000>; /* TCD */
112 interrupts = < 40 41 >;
113 interrupt-parent = <&GIC>;
114 device-id = < 0 >;
115 status = "disabled";
116 };
117
118 edma1: edma@40098000 {
119 compatible = "fsl,mvf600-edma";
120 reg = <0x40098000 0x1000>,
121 <0x40099000 0x1000>; /* TCD */
122 interrupts = < 42 43 >;
123 interrupt-parent = <&GIC>;
124 device-id = < 1 >;
125 status = "disabled";
126 };
127
128 pit@40037000 {
129 compatible = "fsl,mvf600-pit";
130 reg = <0x40037000 0x1000>;
131 interrupts = < 71 >;
132 interrupt-parent = <&GIC>;
133 clock-frequency = < 24000000 >;
134 };
135
136 lptmr@40040000 {
137 compatible = "fsl,mvf600-lptmr";
138 reg = <0x40040000 0x1000>;
139 interrupts = < 72 >;
140 interrupt-parent = <&GIC>;
141 clock-frequency = < 24000000 >;
142 };
143
144 iomuxc@40048000 {
145 compatible = "fsl,mvf600-iomuxc";
146 reg = <0x40048000 0x1000>;
147 };
148
149 gpio@400FF000 {
150 compatible = "fsl,mvf600-gpio";
151 reg = <0x400FF000 0x200>;
152 #gpio-cells = <3>;
153 gpio-controller;
154 interrupts = < 139 140 141 142 143 >;
155 interrupt-parent = <&GIC>;
156 };
157
158 nand@400E0000 {
159 #address-cells = <1>;
160 #size-cells = <1>;
161 compatible = "fsl,mvf600-nand";
162 reg = <0x400E0000 0x10000>;
163 interrupts = < 115 >;
164 interrupt-parent = <&GIC>;
165 clock_names = "nand";
166 status = "disabled";
167
168 partition@40000 {
169 reg = <0x40000 0x200000>; /* 2MB */
170 label = "u-boot";
171 read-only;
172 };
173
174 partition@240000 {
175 reg = <0x240000 0x200000>; /* 2MB */
176 label = "test";
177 };
178
179 partition@440000 {
180 reg = <0x440000 0xa00000>; /* 10MB */
181 label = "kernel";
182 };
183
184 partition@e40000 {
185 reg = <0xe40000 0x1e000000>; /* 480MB */
186 label = "root";
187 };
188 };
189
190 sdhci0: sdhci@400B1000 {
191 compatible = "fsl,mvf600-sdhci";
192 reg = <0x400B1000 0x1000>;
193 interrupts = < 59 >;
194 interrupt-parent = <&GIC>;
195 clock-frequency = <50000000>;
196 status = "disabled";
197 clock_names = "esdhc0";
198 };
199
200 sdhci1: sdhci@400B2000 {
201 compatible = "fsl,mvf600-sdhci";
202 reg = <0x400B2000 0x1000>;
203 interrupts = < 60 >;
204 interrupt-parent = <&GIC>;
205 clock-frequency = <50000000>;
206 status = "disabled";
207 clock_names = "esdhc1";
208 iomux_config = < 14 0x5 15 0x5
209 16 0x5 17 0x5
210 18 0x5 19 0x5 >;
211 };
212
213 serial0: serial@40027000 {
214 compatible = "fsl,mvf600-uart";
215 reg = <0x40027000 0x1000>;
216 interrupts = <93>;
217 interrupt-parent = <&GIC>;
218 current-speed = <115200>;
219 clock-frequency = < 24000000 >;
220 status = "disabled";
221 };
222
223 serial1: serial@40028000 {
224 compatible = "fsl,mvf600-uart";
225 reg = <0x40028000 0x1000>;
226 interrupts = <94>;
227 interrupt-parent = <&GIC>;
228 current-speed = <115200>;
229 clock-frequency = < 24000000 >;
230 status = "disabled";
231 };
232
233 usb@40034000 {
234 compatible = "fsl,mvf600-usb-ehci", "usb-ehci";
235 reg = < 0x40034000 0x1000 >, /* ehci */
236 < 0x40035000 0x1000 >, /* usbc */
237 < 0x40050800 0x100 >; /* phy */
238 interrupts = < 107 >;
239 interrupt-parent = <&GIC>;
240 };
241
242 usb@400b4000 {
243 compatible = "fsl,mvf600-usb-ehci", "usb-ehci";
244 reg = < 0x400b4000 0x1000 >, /* ehci */
245 < 0x400b5000 0x1000 >, /* usbc */
246 < 0x40050C00 0x100 >; /* phy */
247 interrupts = < 108 >;
248 interrupt-parent = <&GIC>;
249 };
250
251 fec0: ethernet@400D0000 {
252 compatible = "fsl,mvf600-fec";
253 reg = <0x400D0000 0x1000>;
254 interrupts = < 110 >;
255 interrupt-parent = <&GIC>;
256 phy-mode = "rmii";
257 phy-disable-preamble;
258 status = "disabled";
259 clock_names = "enet";
260 iomux_config = < 45 0x1 46 0x1
261 47 0x1 48 0x1
262 49 0x1 50 0x1
263 51 0x1 52 0x1
264 53 0x1 >;
265 };
266
267 fec1: ethernet@400D1000 {
268 compatible = "fsl,mvf600-fec";
269 reg = <0x400D1000 0x1000>;
270 interrupts = < 111 >;
271 interrupt-parent = <&GIC>;
272 phy-mode = "rmii";
273 phy-disable-preamble;
274 status = "disabled";
275 clock_names = "enet";
276 iomux_config = < 54 0x1 55 0x1
277 56 0x1 57 0x1
278 58 0x1 59 0x1
279 60 0x1 61 0x1
280 62 0x1 >;
281 };
282
283 sai0: sai@4002F000 {
284 compatible = "fsl,mvf600-sai";
285 reg = <0x4002F000 0x1000>;
286 interrupts = < 116 >;
287 interrupt-parent = <&GIC>;
288 status = "disabled";
289 };
290
291 sai1: sai@40030000 {
292 compatible = "fsl,mvf600-sai";
293 reg = <0x40030000 0x1000>;
294 interrupts = < 117 >;
295 interrupt-parent = <&GIC>;
296 status = "disabled";
297 };
298
299 sai2: sai@40031000 {
300 compatible = "fsl,mvf600-sai";
301 reg = <0x40031000 0x1000>;
302 interrupts = < 118 >;
303 interrupt-parent = <&GIC>;
304 status = "disabled";
305 };
306
307 sai3: sai@40032000 {
308 compatible = "fsl,mvf600-sai";
309 reg = <0x40032000 0x1000>;
310 interrupts = < 119 >;
311 interrupt-parent = <&GIC>;
312 status = "disabled";
313 edma-controller = <&edma1>;
27 */
28
29/ {
30 model = "Freescale Vybrid Family";
31 compatible = "freescale,vybrid", "fsl,mvf";
32 #address-cells = <1>;
33 #size-cells = <1>;
34
35 interrupt-parent = <&GIC>;
36
37 aliases {
38 soc = &SOC;
39 serial0 = &serial0;
40 serial1 = &serial1;
41 sai0 = &sai0;
42 sai1 = &sai1;
43 sai2 = &sai2;
44 sai3 = &sai3;
45 esai = &esai;
46 adc0 = &adc0;
47 adc1 = &adc1;
48 edma0 = &edma0;
49 edma1 = &edma1;
50 src = &SRC;
51 };
52
53 SOC: vybrid {
54 #address-cells = <1>;
55 #size-cells = <1>;
56 compatible = "simple-bus";
57 ranges;
58 bus-frequency = <0>;
59
60 SRC: src@4006E000 {
61 compatible = "fsl,mvf600-src";
62 reg = <0x4006E000 0x100>;
63 };
64
65 mscm@40001000 {
66 compatible = "fsl,mvf600-mscm";
67 reg = <0x40001000 0x1000>;
68 };
69
70 GIC: interrupt-controller@01c81000 {
71 compatible = "arm,gic";
72 reg = <0x40003000 0x1000>, /* Distributor Registers */
73 <0x40002100 0x100>; /* CPU Interface Registers */
74 interrupt-controller;
75 #interrupt-cells = <1>;
76 };
77
78 anadig@40050000 {
79 compatible = "fsl,mvf600-anadig";
80 reg = <0x40050000 0x300>;
81 };
82
83 ccm@4006b000 {
84 compatible = "fsl,mvf600-ccm";
85 reg = <0x4006b000 0x1000>;
86 clock_names = "pll4";
87 };
88
89 mp_tmr@40002100 {
90 compatible = "arm,mpcore-timers";
91 clock-frequency = <133000000>;
92 #address-cells = <1>;
93 #size-cells = <0>;
94 reg = < 0x40002200 0x100 >, /* Global Timer Registers */
95 < 0x40002600 0x100 >; /* Private Timer Registers */
96 interrupts = < 27 29 >;
97 interrupt-parent = < &GIC >;
98 };
99
100 dmamux@40024000 {
101 compatible = "fsl,mvf600-dmamux";
102 reg = <0x40024000 0x100>,
103 <0x40025000 0x100>,
104 <0x400A1000 0x100>,
105 <0x400A2000 0x100>;
106 };
107
108 edma0: edma@40018000 {
109 compatible = "fsl,mvf600-edma";
110 reg = <0x40018000 0x1000>,
111 <0x40019000 0x1000>; /* TCD */
112 interrupts = < 40 41 >;
113 interrupt-parent = <&GIC>;
114 device-id = < 0 >;
115 status = "disabled";
116 };
117
118 edma1: edma@40098000 {
119 compatible = "fsl,mvf600-edma";
120 reg = <0x40098000 0x1000>,
121 <0x40099000 0x1000>; /* TCD */
122 interrupts = < 42 43 >;
123 interrupt-parent = <&GIC>;
124 device-id = < 1 >;
125 status = "disabled";
126 };
127
128 pit@40037000 {
129 compatible = "fsl,mvf600-pit";
130 reg = <0x40037000 0x1000>;
131 interrupts = < 71 >;
132 interrupt-parent = <&GIC>;
133 clock-frequency = < 24000000 >;
134 };
135
136 lptmr@40040000 {
137 compatible = "fsl,mvf600-lptmr";
138 reg = <0x40040000 0x1000>;
139 interrupts = < 72 >;
140 interrupt-parent = <&GIC>;
141 clock-frequency = < 24000000 >;
142 };
143
144 iomuxc@40048000 {
145 compatible = "fsl,mvf600-iomuxc";
146 reg = <0x40048000 0x1000>;
147 };
148
149 gpio@400FF000 {
150 compatible = "fsl,mvf600-gpio";
151 reg = <0x400FF000 0x200>;
152 #gpio-cells = <3>;
153 gpio-controller;
154 interrupts = < 139 140 141 142 143 >;
155 interrupt-parent = <&GIC>;
156 };
157
158 nand@400E0000 {
159 #address-cells = <1>;
160 #size-cells = <1>;
161 compatible = "fsl,mvf600-nand";
162 reg = <0x400E0000 0x10000>;
163 interrupts = < 115 >;
164 interrupt-parent = <&GIC>;
165 clock_names = "nand";
166 status = "disabled";
167
168 partition@40000 {
169 reg = <0x40000 0x200000>; /* 2MB */
170 label = "u-boot";
171 read-only;
172 };
173
174 partition@240000 {
175 reg = <0x240000 0x200000>; /* 2MB */
176 label = "test";
177 };
178
179 partition@440000 {
180 reg = <0x440000 0xa00000>; /* 10MB */
181 label = "kernel";
182 };
183
184 partition@e40000 {
185 reg = <0xe40000 0x1e000000>; /* 480MB */
186 label = "root";
187 };
188 };
189
190 sdhci0: sdhci@400B1000 {
191 compatible = "fsl,mvf600-sdhci";
192 reg = <0x400B1000 0x1000>;
193 interrupts = < 59 >;
194 interrupt-parent = <&GIC>;
195 clock-frequency = <50000000>;
196 status = "disabled";
197 clock_names = "esdhc0";
198 };
199
200 sdhci1: sdhci@400B2000 {
201 compatible = "fsl,mvf600-sdhci";
202 reg = <0x400B2000 0x1000>;
203 interrupts = < 60 >;
204 interrupt-parent = <&GIC>;
205 clock-frequency = <50000000>;
206 status = "disabled";
207 clock_names = "esdhc1";
208 iomux_config = < 14 0x5 15 0x5
209 16 0x5 17 0x5
210 18 0x5 19 0x5 >;
211 };
212
213 serial0: serial@40027000 {
214 compatible = "fsl,mvf600-uart";
215 reg = <0x40027000 0x1000>;
216 interrupts = <93>;
217 interrupt-parent = <&GIC>;
218 current-speed = <115200>;
219 clock-frequency = < 24000000 >;
220 status = "disabled";
221 };
222
223 serial1: serial@40028000 {
224 compatible = "fsl,mvf600-uart";
225 reg = <0x40028000 0x1000>;
226 interrupts = <94>;
227 interrupt-parent = <&GIC>;
228 current-speed = <115200>;
229 clock-frequency = < 24000000 >;
230 status = "disabled";
231 };
232
233 usb@40034000 {
234 compatible = "fsl,mvf600-usb-ehci", "usb-ehci";
235 reg = < 0x40034000 0x1000 >, /* ehci */
236 < 0x40035000 0x1000 >, /* usbc */
237 < 0x40050800 0x100 >; /* phy */
238 interrupts = < 107 >;
239 interrupt-parent = <&GIC>;
240 };
241
242 usb@400b4000 {
243 compatible = "fsl,mvf600-usb-ehci", "usb-ehci";
244 reg = < 0x400b4000 0x1000 >, /* ehci */
245 < 0x400b5000 0x1000 >, /* usbc */
246 < 0x40050C00 0x100 >; /* phy */
247 interrupts = < 108 >;
248 interrupt-parent = <&GIC>;
249 };
250
251 fec0: ethernet@400D0000 {
252 compatible = "fsl,mvf600-fec";
253 reg = <0x400D0000 0x1000>;
254 interrupts = < 110 >;
255 interrupt-parent = <&GIC>;
256 phy-mode = "rmii";
257 phy-disable-preamble;
258 status = "disabled";
259 clock_names = "enet";
260 iomux_config = < 45 0x1 46 0x1
261 47 0x1 48 0x1
262 49 0x1 50 0x1
263 51 0x1 52 0x1
264 53 0x1 >;
265 };
266
267 fec1: ethernet@400D1000 {
268 compatible = "fsl,mvf600-fec";
269 reg = <0x400D1000 0x1000>;
270 interrupts = < 111 >;
271 interrupt-parent = <&GIC>;
272 phy-mode = "rmii";
273 phy-disable-preamble;
274 status = "disabled";
275 clock_names = "enet";
276 iomux_config = < 54 0x1 55 0x1
277 56 0x1 57 0x1
278 58 0x1 59 0x1
279 60 0x1 61 0x1
280 62 0x1 >;
281 };
282
283 sai0: sai@4002F000 {
284 compatible = "fsl,mvf600-sai";
285 reg = <0x4002F000 0x1000>;
286 interrupts = < 116 >;
287 interrupt-parent = <&GIC>;
288 status = "disabled";
289 };
290
291 sai1: sai@40030000 {
292 compatible = "fsl,mvf600-sai";
293 reg = <0x40030000 0x1000>;
294 interrupts = < 117 >;
295 interrupt-parent = <&GIC>;
296 status = "disabled";
297 };
298
299 sai2: sai@40031000 {
300 compatible = "fsl,mvf600-sai";
301 reg = <0x40031000 0x1000>;
302 interrupts = < 118 >;
303 interrupt-parent = <&GIC>;
304 status = "disabled";
305 };
306
307 sai3: sai@40032000 {
308 compatible = "fsl,mvf600-sai";
309 reg = <0x40032000 0x1000>;
310 interrupts = < 119 >;
311 interrupt-parent = <&GIC>;
312 status = "disabled";
313 edma-controller = <&edma1>;
314 edma-src-receive = < 8 >;
315 edma-src-transmit = < 9 >;
316 edma-mux-group = < 1 >;
314 clock_names = "sai3", "cko1";
315 iomux_config = < 16 0x2
316 19 0x2
317 21 0x2
318 40 0x4 >; /* CKO1 */
319 };
320
321 esai: esai@40062000 {
322 compatible = "fsl,mvf600-esai";
323 reg = <0x40062000 0x1000>;
324 interrupts = < 120 >;
325 interrupt-parent = <&GIC>;
326 status = "disabled";
327 clock_names = "esai";
328 iomux_config = < 45 0x4 46 0x4
329 47 0x4 48 0x4
330 49 0x4 50 0x4
331 51 0x4 52 0x4
332 78 0x3 40 0x4>;
333 };
334
335 spi0: spi@4002C000 {
336 compatible = "fsl,mvf600-spi";
337 reg = <0x4002C000 0x1000>;
338 interrupts = < 99 >;
339 interrupt-parent = <&GIC>;
340 status = "disabled";
341 iomux_config = < 40 0x1 41 0x1
342 42 0x1 43 0x1
343 44 0x1 >;
344 };
345
346 spi1: spi@4002D000 {
347 compatible = "fsl,mvf600-spi";
348 reg = <0x4002D000 0x1000>;
349 interrupts = < 100 >;
350 interrupt-parent = <&GIC>;
351 status = "disabled";
352 };
353
354 spi2: spi@400AC000 {
355 compatible = "fsl,mvf600-spi";
356 reg = <0x400AC000 0x1000>;
357 interrupts = < 101 >;
358 interrupt-parent = <&GIC>;
359 status = "disabled";
360 };
361
362 spi3: spi@400AD000 {
363 compatible = "fsl,mvf600-spi";
364 reg = <0x400AD000 0x1000>;
365 interrupts = < 102 >;
366 interrupt-parent = <&GIC>;
367 status = "disabled";
368 };
369
370 adc0: adc@4003B000 {
371 compatible = "fsl,mvf600-adc";
372 reg = <0x4003B000 0x1000>;
373 interrupts = < 85 >;
374 interrupt-parent = <&GIC>;
375 status = "disabled";
376 };
377
378 adc1: adc@400BB000 {
379 compatible = "fsl,mvf600-adc";
380 reg = <0x400BB000 0x1000>;
381 interrupts = < 86 >;
382 interrupt-parent = <&GIC>;
383 status = "disabled";
384 };
385
386 tcon0: tcon@4003D000 {
387 compatible = "fsl,mvf600-tcon";
388 reg = <0x4003D000 0x1000>;
389 status = "disabled";
390 };
391
392 dcu0: dcu4@40058000 {
393 compatible = "fsl,mvf600-dcu4";
394 reg = <0x40058000 0x7000>;
395 interrupts = < 62 >;
396 interrupt-parent = <&GIC>;
397 status = "disabled";
398 clock_names = "dcu0";
399 iomux_config = < 105 0x1 106 0x1
400 107 0x1 108 0x1
401 109 0x1 110 0x1
402 111 0x1 112 0x1
403 113 0x1 114 0x1
404 115 0x1 116 0x1
405 117 0x1 118 0x1
406 119 0x1 120 0x1
407 121 0x1 122 0x1
408 123 0x1 124 0x1
409 125 0x1 126 0x1
410 127 0x1 128 0x1
411 129 0x1 130 0x1
412 131 0x1 132 0x1
413 133 0x1 >;
414 };
415 };
416};
317 clock_names = "sai3", "cko1";
318 iomux_config = < 16 0x2
319 19 0x2
320 21 0x2
321 40 0x4 >; /* CKO1 */
322 };
323
324 esai: esai@40062000 {
325 compatible = "fsl,mvf600-esai";
326 reg = <0x40062000 0x1000>;
327 interrupts = < 120 >;
328 interrupt-parent = <&GIC>;
329 status = "disabled";
330 clock_names = "esai";
331 iomux_config = < 45 0x4 46 0x4
332 47 0x4 48 0x4
333 49 0x4 50 0x4
334 51 0x4 52 0x4
335 78 0x3 40 0x4>;
336 };
337
338 spi0: spi@4002C000 {
339 compatible = "fsl,mvf600-spi";
340 reg = <0x4002C000 0x1000>;
341 interrupts = < 99 >;
342 interrupt-parent = <&GIC>;
343 status = "disabled";
344 iomux_config = < 40 0x1 41 0x1
345 42 0x1 43 0x1
346 44 0x1 >;
347 };
348
349 spi1: spi@4002D000 {
350 compatible = "fsl,mvf600-spi";
351 reg = <0x4002D000 0x1000>;
352 interrupts = < 100 >;
353 interrupt-parent = <&GIC>;
354 status = "disabled";
355 };
356
357 spi2: spi@400AC000 {
358 compatible = "fsl,mvf600-spi";
359 reg = <0x400AC000 0x1000>;
360 interrupts = < 101 >;
361 interrupt-parent = <&GIC>;
362 status = "disabled";
363 };
364
365 spi3: spi@400AD000 {
366 compatible = "fsl,mvf600-spi";
367 reg = <0x400AD000 0x1000>;
368 interrupts = < 102 >;
369 interrupt-parent = <&GIC>;
370 status = "disabled";
371 };
372
373 adc0: adc@4003B000 {
374 compatible = "fsl,mvf600-adc";
375 reg = <0x4003B000 0x1000>;
376 interrupts = < 85 >;
377 interrupt-parent = <&GIC>;
378 status = "disabled";
379 };
380
381 adc1: adc@400BB000 {
382 compatible = "fsl,mvf600-adc";
383 reg = <0x400BB000 0x1000>;
384 interrupts = < 86 >;
385 interrupt-parent = <&GIC>;
386 status = "disabled";
387 };
388
389 tcon0: tcon@4003D000 {
390 compatible = "fsl,mvf600-tcon";
391 reg = <0x4003D000 0x1000>;
392 status = "disabled";
393 };
394
395 dcu0: dcu4@40058000 {
396 compatible = "fsl,mvf600-dcu4";
397 reg = <0x40058000 0x7000>;
398 interrupts = < 62 >;
399 interrupt-parent = <&GIC>;
400 status = "disabled";
401 clock_names = "dcu0";
402 iomux_config = < 105 0x1 106 0x1
403 107 0x1 108 0x1
404 109 0x1 110 0x1
405 111 0x1 112 0x1
406 113 0x1 114 0x1
407 115 0x1 116 0x1
408 117 0x1 118 0x1
409 119 0x1 120 0x1
410 121 0x1 122 0x1
411 123 0x1 124 0x1
412 125 0x1 126 0x1
413 127 0x1 128 0x1
414 129 0x1 130 0x1
415 131 0x1 132 0x1
416 133 0x1 >;
417 };
418 };
419};