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socfpga.dtsi (272712) socfpga.dtsi (276533)
1/*-
2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
7 * ("CTSRD"), as part of the DARPA CRASH research programme.
8 *

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22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
1/*-
2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
7 * ("CTSRD"), as part of the DARPA CRASH research programme.
8 *

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22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD: head/sys/boot/fdt/dts/arm/socfpga.dtsi 272712 2014-10-07 17:39:30Z br $
30 * $FreeBSD: head/sys/boot/fdt/dts/arm/socfpga.dtsi 276533 2015-01-02 13:15:36Z br $
31 */
32
33/ {
34 compatible = "altr,socfpga";
35 #address-cells = <1>;
36 #size-cells = <1>;
37
38 interrupt-parent = <&GIC>;

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71 interrupt-parent = < &GIC >;
72 };
73
74 sysmgr: sysmgr@ffd08000 {
75 compatible = "altr,sys-mgr";
76 reg = <0xffd08000 0x1000>;
77 };
78
31 */
32
33/ {
34 compatible = "altr,socfpga";
35 #address-cells = <1>;
36 #size-cells = <1>;
37
38 interrupt-parent = <&GIC>;

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71 interrupt-parent = < &GIC >;
72 };
73
74 sysmgr: sysmgr@ffd08000 {
75 compatible = "altr,sys-mgr";
76 reg = <0xffd08000 0x1000>;
77 };
78
79 clkmgr: clkmgr@ffd04000 {
80 compatible = "altr,clk-mgr";
81 reg = <0xffd04000 0x1000>;
82 };
83
79 rstmgr: rstmgr@ffd05000 {
80 compatible = "altr,rst-mgr";
81 reg = <0xffd05000 0x1000>;
82 };
83
84 l3regs: l3regs@ff800000 {
85 compatible = "altr,l3regs";
86 reg = <0xff800000 0x1000>;
87 };
88
89 fpgamgr: fpgamgr@ff706000 {
90 compatible = "altr,fpga-mgr";
91 reg = <0xff706000 0x1000>, /* FPGAMGRREGS */
92 <0xffb90000 0x1000>; /* FPGAMGRDATA */
93 interrupts = < 207 >;
94 interrupt-parent = <&GIC>;
95 };
96
84 rstmgr: rstmgr@ffd05000 {
85 compatible = "altr,rst-mgr";
86 reg = <0xffd05000 0x1000>;
87 };
88
89 l3regs: l3regs@ff800000 {
90 compatible = "altr,l3regs";
91 reg = <0xff800000 0x1000>;
92 };
93
94 fpgamgr: fpgamgr@ff706000 {
95 compatible = "altr,fpga-mgr";
96 reg = <0xff706000 0x1000>, /* FPGAMGRREGS */
97 <0xffb90000 0x1000>; /* FPGAMGRDATA */
98 interrupts = < 207 >;
99 interrupt-parent = <&GIC>;
100 };
101
102 gpio0: gpio@ff708000 {
103 compatible = "snps,dw-apb-gpio";
104 reg = <0xff708000 0x1000>;
105 porta: gpio-controller@0 {
106 compatible = "snps,dw-apb-gpio-port";
107 gpio-controller;
108 snps,nr-gpios = <29>;
109 };
110 };
111
112 gpio1: gpio@ff709000 {
113 compatible = "snps,dw-apb-gpio";
114 reg = <0xff709000 0x1000>;
115 portb: gpio-controller@0 {
116 compatible = "snps,dw-apb-gpio-port";
117 gpio-controller;
118 snps,nr-gpios = <29>;
119 };
120 };
121
122 gpio2: gpio@ff70a000 {
123 compatible = "snps,dw-apb-gpio";
124 reg = <0xff70a000 0x1000>;
125 portc: gpio-controller@0 {
126 compatible = "snps,dw-apb-gpio-port";
127 gpio-controller;
128 snps,nr-gpios = <27>;
129 };
130 };
131
97 serial0: serial@ffc02000 {
98 compatible = "ns16550";
99 reg = <0xffc02000 0x1000>;
100 reg-shift = <2>;
101 interrupts = <194>;
102 interrupt-parent = <&GIC>;
103 current-speed = <115200>;
104 clock-frequency = < 100000000 >;

--- 61 unchanged lines hidden --- 		132 serial0: serial@ffc02000 {
133 compatible = "ns16550";
134 reg = <0xffc02000 0x1000>;
135 reg-shift = <2>;
136 interrupts = <194>;
137 interrupt-parent = <&GIC>;
138 current-speed = <115200>;
139 clock-frequency = < 100000000 >;

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