| socfpga.dtsi (272120) | socfpga.dtsi (272712) |
|---|---|
| 1/*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * --- 13 unchanged lines hidden (view full) --- 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * | 1/*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * --- 13 unchanged lines hidden (view full) --- 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * |
| 30 * $FreeBSD: head/sys/boot/fdt/dts/arm/socfpga.dtsi 272120 2014-09-25 18:03:14Z br $ | 30 * $FreeBSD: head/sys/boot/fdt/dts/arm/socfpga.dtsi 272712 2014-10-07 17:39:30Z br $ |
| 31 */ 32 33/ { 34 compatible = "altr,socfpga"; 35 #address-cells = <1>; 36 #size-cells = <1>; 37 38 interrupt-parent = <&GIC>; --- 108 unchanged lines hidden (view full) --- 147 compatible = "altr,socfpga-stmmac", 148 "snps,dwmac-3.70a", "snps,dwmac"; 149 reg = <0xff702000 0x2000>; 150 interrupts = <152>; 151 interrupt-parent = <&GIC>; 152 phy-mode = "rgmii"; 153 status = "disabled"; 154 }; | 31 */ 32 33/ { 34 compatible = "altr,socfpga"; 35 #address-cells = <1>; 36 #size-cells = <1>; 37 38 interrupt-parent = <&GIC>; --- 108 unchanged lines hidden (view full) --- 147 compatible = "altr,socfpga-stmmac", 148 "snps,dwmac-3.70a", "snps,dwmac"; 149 reg = <0xff702000 0x2000>; 150 interrupts = <152>; 151 interrupt-parent = <&GIC>; 152 phy-mode = "rgmii"; 153 status = "disabled"; 154 }; |
| 155 156 mmc: dwmmc@ff704000 { 157 compatible = "altr,socfpga-dw-mshc"; 158 reg = <0xff704000 0x1000>; 159 interrupts = <171>; 160 interrupt-parent = <&GIC>; 161 fifo-depth = <0x400>; 162 status = "disabled"; 163 }; |
|
| 155 }; 156}; | 164 }; 165}; |