socfpga.dtsi (271431) | socfpga.dtsi (272120) |
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1/*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * --- 13 unchanged lines hidden (view full) --- 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * | 1/*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * --- 13 unchanged lines hidden (view full) --- 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * |
30 * $FreeBSD: head/sys/boot/fdt/dts/arm/socfpga.dtsi 271431 2014-09-11 18:12:28Z br $ | 30 * $FreeBSD: head/sys/boot/fdt/dts/arm/socfpga.dtsi 272120 2014-09-25 18:03:14Z br $ |
31 */ 32 33/ { 34 compatible = "altr,socfpga"; 35 #address-cells = <1>; 36 #size-cells = <1>; 37 38 interrupt-parent = <&GIC>; --- 27 unchanged lines hidden (view full) --- 66 #address-cells = <1>; 67 #size-cells = <0>; 68 reg = < 0xfffec200 0x100 >, /* Global Timer */ 69 < 0xfffec600 0x100 >; /* Private Timer */ 70 interrupts = < 27 29 >; 71 interrupt-parent = < &GIC >; 72 }; 73 | 31 */ 32 33/ { 34 compatible = "altr,socfpga"; 35 #address-cells = <1>; 36 #size-cells = <1>; 37 38 interrupt-parent = <&GIC>; --- 27 unchanged lines hidden (view full) --- 66 #address-cells = <1>; 67 #size-cells = <0>; 68 reg = < 0xfffec200 0x100 >, /* Global Timer */ 69 < 0xfffec600 0x100 >; /* Private Timer */ 70 interrupts = < 27 29 >; 71 interrupt-parent = < &GIC >; 72 }; 73 |
74 sysmgr: sysmgr@ffd08000 { 75 compatible = "altr,sys-mgr"; 76 reg = <0xffd08000 0x1000>; 77 }; 78 |
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74 rstmgr: rstmgr@ffd05000 { 75 compatible = "altr,rst-mgr"; 76 reg = <0xffd05000 0x1000>; 77 }; 78 79 l3regs: l3regs@ff800000 { 80 compatible = "altr,l3regs"; 81 reg = <0xff800000 0x1000>; --- 40 unchanged lines hidden (view full) --- 122 usb1: usb@ffb40000 { 123 compatible = "synopsys,designware-hs-otg2"; 124 reg = <0xffb40000 0xffff>; 125 interrupts = <160>; 126 interrupt-parent = <&GIC>; 127 dr_mode = "host"; 128 status = "disabled"; 129 }; | 79 rstmgr: rstmgr@ffd05000 { 80 compatible = "altr,rst-mgr"; 81 reg = <0xffd05000 0x1000>; 82 }; 83 84 l3regs: l3regs@ff800000 { 85 compatible = "altr,l3regs"; 86 reg = <0xff800000 0x1000>; --- 40 unchanged lines hidden (view full) --- 127 usb1: usb@ffb40000 { 128 compatible = "synopsys,designware-hs-otg2"; 129 reg = <0xffb40000 0xffff>; 130 interrupts = <160>; 131 interrupt-parent = <&GIC>; 132 dr_mode = "host"; 133 status = "disabled"; 134 }; |
135 136 gmac0: ethernet@ff700000 { 137 compatible = "altr,socfpga-stmmac", 138 "snps,dwmac-3.70a", "snps,dwmac"; 139 reg = <0xff700000 0x2000>; 140 interrupts = <147>; 141 interrupt-parent = <&GIC>; 142 phy-mode = "rgmii"; 143 status = "disabled"; 144 }; 145 146 gmac1: ethernet@ff702000 { 147 compatible = "altr,socfpga-stmmac", 148 "snps,dwmac-3.70a", "snps,dwmac"; 149 reg = <0xff702000 0x2000>; 150 interrupts = <152>; 151 interrupt-parent = <&GIC>; 152 phy-mode = "rgmii"; 153 status = "disabled"; 154 }; |
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130 }; 131}; | 155 }; 156}; |