rk3188.dtsi (262614) | rk3188.dtsi (262725) |
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1/*- 2 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@gmail.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@gmail.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
26 * $FreeBSD: head/sys/boot/fdt/dts/arm/rk3188.dtsi 262614 2014-02-28 18:29:09Z imp $ | 26 * $FreeBSD: head/sys/boot/fdt/dts/arm/rk3188.dtsi 262725 2014-03-04 03:19:26Z imp $ |
27 */ 28 29/ { 30 compatible = "rockchip,rk3188"; 31 #address-cells = <1>; 32 #size-cells = <1>; 33 34 aliases { --- 37 unchanged lines hidden (view full) --- 72 reg = <0x1013c200 0x100>, /* Global Timer Regs */ 73 <0x1013c600 0x20>; /* Private Timer Regs */ 74 interrupts = < 27 29 >; 75 interrupt-parent = <&GIC>; 76 }; 77 78 timer@20038000 { 79 compatible = "rockchip,rk30xx-timer"; | 27 */ 28 29/ { 30 compatible = "rockchip,rk3188"; 31 #address-cells = <1>; 32 #size-cells = <1>; 33 34 aliases { --- 37 unchanged lines hidden (view full) --- 72 reg = <0x1013c200 0x100>, /* Global Timer Regs */ 73 <0x1013c600 0x20>; /* Private Timer Regs */ 74 interrupts = < 27 29 >; 75 interrupt-parent = <&GIC>; 76 }; 77 78 timer@20038000 { 79 compatible = "rockchip,rk30xx-timer"; |
80 compatible = "rockchip,rk3188-dw-apb-timer-osc"; | |
81 reg = <0x20038000 0x20>; 82 interrupts = <76>; 83 clock-frequency = <24000000>; 84 status = "disabled"; 85 }; 86 87 timer@20038020 { 88 compatible = "rockchip,rk30xx-timer"; --- 165 unchanged lines hidden --- | 80 reg = <0x20038000 0x20>; 81 interrupts = <76>; 82 clock-frequency = <24000000>; 83 status = "disabled"; 84 }; 85 86 timer@20038020 { 87 compatible = "rockchip,rk30xx-timer"; --- 165 unchanged lines hidden --- |