| at91rm9200_lowlevel.c (157924) | at91rm9200_lowlevel.c (163533) |
|---|---|
| 1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 10 unchanged lines hidden (view full) --- 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * This software is derived from software provide by Kwikbyte who specifically 25 * disclaimed copyright on the code. 26 * | 1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 10 unchanged lines hidden (view full) --- 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * This software is derived from software provide by Kwikbyte who specifically 25 * disclaimed copyright on the code. 26 * |
| 27 * $FreeBSD: head/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c 157924 2006-04-21 07:29:14Z imp $ | 27 * $FreeBSD: head/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c 163533 2006-10-20 09:12:05Z imp $ |
| 28 */ 29 30#include "at91rm9200.h" 31#include "at91rm9200_lowlevel.h" 32 | 28 */ 29 30#include "at91rm9200.h" 31#include "at91rm9200_lowlevel.h" 32 |
| 33extern int __bss_start__[]; 34extern int __bss_end__[]; 35 |
|
| 33#define BAUD 115200 34#define AT91C_US_ASYNC_MODE (AT91C_US_USMODE_NORMAL | AT91C_US_NBSTOP_1_BIT | \ 35 AT91C_US_PAR_NONE | AT91C_US_CHRL_8_BITS | AT91C_US_CLKS_CLOCK) 36 37/* 38 * void DefaultSystemInit(void) 39 * Load the system with sane values based on how the system is configured. 40 * at91rm9200_lowlevel.h is expected to define the necessary parameters. 41 */ 42void 43_init(void) 44{ | 36#define BAUD 115200 37#define AT91C_US_ASYNC_MODE (AT91C_US_USMODE_NORMAL | AT91C_US_NBSTOP_1_BIT | \ 38 AT91C_US_PAR_NONE | AT91C_US_CHRL_8_BITS | AT91C_US_CLKS_CLOCK) 39 40/* 41 * void DefaultSystemInit(void) 42 * Load the system with sane values based on how the system is configured. 43 * at91rm9200_lowlevel.h is expected to define the necessary parameters. 44 */ 45void 46_init(void) 47{ |
| 48 int *i; 49 |
|
| 45 AT91PS_USART pUSART = (AT91PS_USART)AT91C_BASE_DBGU; 46 AT91PS_PDC pPDC = (AT91PS_PDC)&(pUSART->US_RPR); 47 48 register unsigned value; 49 volatile sdram_size_t *p = (sdram_size_t *)SDRAM_BASE; 50 | 50 AT91PS_USART pUSART = (AT91PS_USART)AT91C_BASE_DBGU; 51 AT91PS_PDC pPDC = (AT91PS_PDC)&(pUSART->US_RPR); 52 53 register unsigned value; 54 volatile sdram_size_t *p = (sdram_size_t *)SDRAM_BASE; 55 |
| 56#if 0 |
|
| 51#ifdef BOOT_TSC 52 // For the TSC board, we turn ON the one LED we have while 53 // early in boot. 54 AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC10; 55 AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC10; 56 AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC10; 57#endif | 57#ifdef BOOT_TSC 58 // For the TSC board, we turn ON the one LED we have while 59 // early in boot. 60 AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC10; 61 AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC10; 62 AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC10; 63#endif |
| 64#endif |
|
| 58 59 // configure clocks 60 // assume: 61 // main osc = 10Mhz 62 // PLLB configured for 96MHz (48MHz after div) 63 // CSS = PLLB 64 // set PLLA = 180MHz 65 // assume main osc = 10Mhz --- 124 unchanged lines hidden (view full) --- 190 pPDC->PDC_RCR = 0; 191 192 pPDC->PDC_PTCR = AT91C_PDC_RXTEN; 193 pPDC->PDC_PTCR = AT91C_PDC_TXTEN; 194 195 pUSART->US_MR = AT91C_US_ASYNC_MODE; 196 pUSART->US_CR = AT91C_US_TXEN; 197 pUSART->US_CR = AT91C_US_RXEN; | 65 66 // configure clocks 67 // assume: 68 // main osc = 10Mhz 69 // PLLB configured for 96MHz (48MHz after div) 70 // CSS = PLLB 71 // set PLLA = 180MHz 72 // assume main osc = 10Mhz --- 124 unchanged lines hidden (view full) --- 197 pPDC->PDC_RCR = 0; 198 199 pPDC->PDC_PTCR = AT91C_PDC_RXTEN; 200 pPDC->PDC_PTCR = AT91C_PDC_TXTEN; 201 202 pUSART->US_MR = AT91C_US_ASYNC_MODE; 203 pUSART->US_CR = AT91C_US_TXEN; 204 pUSART->US_CR = AT91C_US_RXEN; |
| 205 206 /* Zero BSS now that we have memory setup */ 207 i = (int *)__bss_start__; 208 while (i < (int *)__bss_end__) 209 *i++ = 0; |
|
| 198} | 210} |