| ixp425_qmgr.c (166996) | ixp425_qmgr.c (172568) |
|---|---|
| 1/*- 2 * Copyright (c) 2006 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 43 unchanged lines hidden (view full) --- 52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 57 * SUCH DAMAGE. 58*/ 59#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2006 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 43 unchanged lines hidden (view full) --- 52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 57 * SUCH DAMAGE. 58*/ 59#include <sys/cdefs.h> |
| 60__FBSDID("$FreeBSD: head/sys/arm/xscale/ixp425/ixp425_qmgr.c 166996 2007-02-25 22:17:54Z cognet $"); | 60__FBSDID("$FreeBSD: head/sys/arm/xscale/ixp425/ixp425_qmgr.c 172568 2007-10-12 06:03:46Z kevlo $"); |
| 61 62/* 63 * Intel XScale Queue Manager support. 64 * 65 * Each IXP4XXX device has a hardware block that implements a priority 66 * queue manager that is shared between the XScale cpu and the backend 67 * devices (such as the NPE). Queues are accessed by reading/writing 68 * special memory locations. The queue contents are mapped into a shared --- 267 unchanged lines hidden (view full) --- 336 337 /* Write the config register; NB must be AFTER qinfo setup */ 338 aqm_qcfg(sc, qId, ne, nf); 339 /* 340 * Account for space just allocated to queue. 341 */ 342 sc->aqmFreeSramAddress += (qi->qSizeInWords * sizeof(uint32_t)); 343 | 61 62/* 63 * Intel XScale Queue Manager support. 64 * 65 * Each IXP4XXX device has a hardware block that implements a priority 66 * queue manager that is shared between the XScale cpu and the backend 67 * devices (such as the NPE). Queues are accessed by reading/writing 68 * special memory locations. The queue contents are mapped into a shared --- 267 unchanged lines hidden (view full) --- 336 337 /* Write the config register; NB must be AFTER qinfo setup */ 338 aqm_qcfg(sc, qId, ne, nf); 339 /* 340 * Account for space just allocated to queue. 341 */ 342 sc->aqmFreeSramAddress += (qi->qSizeInWords * sizeof(uint32_t)); 343 |
| 344 /* Set the interupt source if this queue is in the range 0-31 */ | 344 /* Set the interrupt source if this queue is in the range 0-31 */ |
| 345 if (qId < IX_QMGR_MIN_QUEUPP_QID) 346 aqm_srcsel_write(sc, qId, srcSel); 347 348 if (cb != NULL) /* Enable the interrupt */ 349 aqm_int_enable(sc, qId); 350 351 sc->rebuildTable = TRUE; 352 --- 246 unchanged lines hidden (view full) --- 599void 600ixpqmgr_notify_enable(int qId, int srcSel) 601{ 602 struct ixpqmgr_softc *sc = ixpqmgr_sc; 603#if 0 604 /* Calculate the checkMask and checkValue for this q */ 605 aqm_calc_statuscheck(sc, qId, srcSel); 606#endif | 345 if (qId < IX_QMGR_MIN_QUEUPP_QID) 346 aqm_srcsel_write(sc, qId, srcSel); 347 348 if (cb != NULL) /* Enable the interrupt */ 349 aqm_int_enable(sc, qId); 350 351 sc->rebuildTable = TRUE; 352 --- 246 unchanged lines hidden (view full) --- 599void 600ixpqmgr_notify_enable(int qId, int srcSel) 601{ 602 struct ixpqmgr_softc *sc = ixpqmgr_sc; 603#if 0 604 /* Calculate the checkMask and checkValue for this q */ 605 aqm_calc_statuscheck(sc, qId, srcSel); 606#endif |
| 607 /* Set the interupt source if this queue is in the range 0-31 */ | 607 /* Set the interrupt source if this queue is in the range 0-31 */ |
| 608 if (qId < IX_QMGR_MIN_QUEUPP_QID) 609 aqm_srcsel_write(sc, qId, srcSel); 610 611 /* Enable the interrupt */ 612 aqm_int_enable(sc, qId); 613} 614 615void --- 462 unchanged lines hidden --- | 608 if (qId < IX_QMGR_MIN_QUEUPP_QID) 609 aqm_srcsel_write(sc, qId, srcSel); 610 611 /* Enable the interrupt */ 612 aqm_int_enable(sc, qId); 613} 614 615void --- 462 unchanged lines hidden --- |