| zy7_gpio.c (277882) | zy7_gpio.c (277996) |
|---|---|
| 1/*- 2 * Copyright (c) 2013 Thomas Skibo 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2013 Thomas Skibo 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/arm/xilinx/zy7_gpio.c 277882 2015-01-29 18:08:50Z loos $ | 26 * $FreeBSD: head/sys/arm/xilinx/zy7_gpio.c 277996 2015-01-31 19:32:14Z loos $ |
| 27 */ 28 29/* 30 * A GPIO driver for Xilinx Zynq-7000. 31 * 32 * The GPIO peripheral on Zynq allows controlling 114 general purpose I/Os. 33 * 34 * Pins 53-0 are sent to the MIO. Any MIO pins not used by a PS peripheral are --- 4 unchanged lines hidden (view full) --- 39 * gpio framework doesn't seem to have hooks for this. 40 * 41 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual. 42 * (v1.4) November 16, 2012. Xilinx doc UG585. GPIO is covered in 43 * chater 14. Register definitions are in appendix B.19. 44 */ 45 46#include <sys/cdefs.h> | 27 */ 28 29/* 30 * A GPIO driver for Xilinx Zynq-7000. 31 * 32 * The GPIO peripheral on Zynq allows controlling 114 general purpose I/Os. 33 * 34 * Pins 53-0 are sent to the MIO. Any MIO pins not used by a PS peripheral are --- 4 unchanged lines hidden (view full) --- 39 * gpio framework doesn't seem to have hooks for this. 40 * 41 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual. 42 * (v1.4) November 16, 2012. Xilinx doc UG585. GPIO is covered in 43 * chater 14. Register definitions are in appendix B.19. 44 */ 45 46#include <sys/cdefs.h> |
| 47__FBSDID("$FreeBSD: head/sys/arm/xilinx/zy7_gpio.c 277882 2015-01-29 18:08:50Z loos $"); | 47__FBSDID("$FreeBSD: head/sys/arm/xilinx/zy7_gpio.c 277996 2015-01-31 19:32:14Z loos $"); |
| 48 49#include <sys/param.h> 50#include <sys/systm.h> 51#include <sys/conf.h> 52#include <sys/bus.h> 53#include <sys/kernel.h> 54#include <sys/module.h> 55#include <sys/lock.h> 56#include <sys/mutex.h> 57#include <sys/resource.h> 58#include <sys/rman.h> 59#include <sys/gpio.h> 60 61#include <machine/bus.h> 62#include <machine/resource.h> 63#include <machine/stdarg.h> 64 65#include <dev/fdt/fdt_common.h> | 48 49#include <sys/param.h> 50#include <sys/systm.h> 51#include <sys/conf.h> 52#include <sys/bus.h> 53#include <sys/kernel.h> 54#include <sys/module.h> 55#include <sys/lock.h> 56#include <sys/mutex.h> 57#include <sys/resource.h> 58#include <sys/rman.h> 59#include <sys/gpio.h> 60 61#include <machine/bus.h> 62#include <machine/resource.h> 63#include <machine/stdarg.h> 64 65#include <dev/fdt/fdt_common.h> |
| 66#include <dev/gpio/gpiobusvar.h> |
|
| 66#include <dev/ofw/ofw_bus.h> 67#include <dev/ofw/ofw_bus_subr.h> 68 69#include "gpio_if.h" 70 71#define NUMBANKS 4 72#define MAXPIN (32*NUMBANKS) 73 --- 9 unchanged lines hidden (view full) --- 83#define ZGPIO_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) 84#define ZGPIO_LOCK_INIT(sc) \ 85 mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->dev), \ 86 "gpio", MTX_DEF) 87#define ZGPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 88 89struct zy7_gpio_softc { 90 device_t dev; | 67#include <dev/ofw/ofw_bus.h> 68#include <dev/ofw/ofw_bus_subr.h> 69 70#include "gpio_if.h" 71 72#define NUMBANKS 4 73#define MAXPIN (32*NUMBANKS) 74 --- 9 unchanged lines hidden (view full) --- 84#define ZGPIO_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) 85#define ZGPIO_LOCK_INIT(sc) \ 86 mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->dev), \ 87 "gpio", MTX_DEF) 88#define ZGPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 89 90struct zy7_gpio_softc { 91 device_t dev; |
| 92 device_t busdev; |
|
| 91 struct mtx sc_mtx; 92 struct resource *mem_res; /* Memory resource */ 93}; 94 95#define WR4(sc, off, val) bus_write_4((sc)->mem_res, (off), (val)) 96#define RD4(sc, off) bus_read_4((sc)->mem_res, (off)) 97 98 --- 9 unchanged lines hidden (view full) --- 108#define ZY7_GPIO_INT_MASK(b) (0x020c+0x40*(b)) /* int mask */ 109#define ZY7_GPIO_INT_EN(b) (0x0210+0x40*(b)) /* int enable */ 110#define ZY7_GPIO_INT_DIS(b) (0x0214+0x40*(b)) /* int disable */ 111#define ZY7_GPIO_INT_STAT(b) (0x0218+0x40*(b)) /* int status */ 112#define ZY7_GPIO_INT_TYPE(b) (0x021c+0x40*(b)) /* int type */ 113#define ZY7_GPIO_INT_POLARITY(b) (0x0220+0x40*(b)) /* int polarity */ 114#define ZY7_GPIO_INT_ANY(b) (0x0224+0x40*(b)) /* any edge */ 115 | 93 struct mtx sc_mtx; 94 struct resource *mem_res; /* Memory resource */ 95}; 96 97#define WR4(sc, off, val) bus_write_4((sc)->mem_res, (off), (val)) 98#define RD4(sc, off) bus_read_4((sc)->mem_res, (off)) 99 100 --- 9 unchanged lines hidden (view full) --- 110#define ZY7_GPIO_INT_MASK(b) (0x020c+0x40*(b)) /* int mask */ 111#define ZY7_GPIO_INT_EN(b) (0x0210+0x40*(b)) /* int enable */ 112#define ZY7_GPIO_INT_DIS(b) (0x0214+0x40*(b)) /* int disable */ 113#define ZY7_GPIO_INT_STAT(b) (0x0218+0x40*(b)) /* int status */ 114#define ZY7_GPIO_INT_TYPE(b) (0x021c+0x40*(b)) /* int type */ 115#define ZY7_GPIO_INT_POLARITY(b) (0x0220+0x40*(b)) /* int polarity */ 116#define ZY7_GPIO_INT_ANY(b) (0x0224+0x40*(b)) /* any edge */ 117 |
| 118static device_t 119zy7_gpio_get_bus(device_t dev) 120{ 121 struct zy7_gpio_softc *sc; |
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| 116 | 122 |
| 123 sc = device_get_softc(dev); 124 125 return (sc->busdev); 126} 127 |
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| 117static int 118zy7_gpio_pin_max(device_t dev, int *maxpin) 119{ 120 121 *maxpin = MAXPIN; 122 return (0); 123} 124 --- 199 unchanged lines hidden (view full) --- 324 device_printf(dev, "Can't allocate memory for device"); 325 zy7_gpio_detach(dev); 326 return (ENOMEM); 327 } 328 329 /* Completely reset. */ 330 zy7_gpio_hw_reset(sc); 331 | 128static int 129zy7_gpio_pin_max(device_t dev, int *maxpin) 130{ 131 132 *maxpin = MAXPIN; 133 return (0); 134} 135 --- 199 unchanged lines hidden (view full) --- 335 device_printf(dev, "Can't allocate memory for device"); 336 zy7_gpio_detach(dev); 337 return (ENOMEM); 338 } 339 340 /* Completely reset. */ 341 zy7_gpio_hw_reset(sc); 342 |
| 332 device_add_child(dev, "gpioc", -1); 333 device_add_child(dev, "gpiobus", -1); | 343 sc->busdev = gpiobus_attach_bus(dev); 344 if (sc->busdev == NULL) { 345 zy7_gpio_detach(dev); 346 return (ENOMEM); 347 } |
| 334 | 348 |
| 335 return (bus_generic_attach(dev)); | 349 return (0); |
| 336} 337 338static int 339zy7_gpio_detach(device_t dev) 340{ 341 struct zy7_gpio_softc *sc = device_get_softc(dev); 342 | 350} 351 352static int 353zy7_gpio_detach(device_t dev) 354{ 355 struct zy7_gpio_softc *sc = device_get_softc(dev); 356 |
| 343 bus_generic_detach(dev); | 357 gpiobus_detach_bus(dev); |
| 344 345 if (sc->mem_res != NULL) { 346 /* Release memory resource. */ 347 bus_release_resource(dev, SYS_RES_MEMORY, 348 rman_get_rid(sc->mem_res), sc->mem_res); 349 } 350 351 ZGPIO_LOCK_DESTROY(sc); 352 353 return (0); 354} 355 356static device_method_t zy7_gpio_methods[] = { 357 /* device_if */ 358 DEVMETHOD(device_probe, zy7_gpio_probe), 359 DEVMETHOD(device_attach, zy7_gpio_attach), 360 DEVMETHOD(device_detach, zy7_gpio_detach), 361 362 /* GPIO protocol */ | 358 359 if (sc->mem_res != NULL) { 360 /* Release memory resource. */ 361 bus_release_resource(dev, SYS_RES_MEMORY, 362 rman_get_rid(sc->mem_res), sc->mem_res); 363 } 364 365 ZGPIO_LOCK_DESTROY(sc); 366 367 return (0); 368} 369 370static device_method_t zy7_gpio_methods[] = { 371 /* device_if */ 372 DEVMETHOD(device_probe, zy7_gpio_probe), 373 DEVMETHOD(device_attach, zy7_gpio_attach), 374 DEVMETHOD(device_detach, zy7_gpio_detach), 375 376 /* GPIO protocol */ |
| 377 DEVMETHOD(gpio_get_bus, zy7_gpio_get_bus), |
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| 363 DEVMETHOD(gpio_pin_max, zy7_gpio_pin_max), 364 DEVMETHOD(gpio_pin_getname, zy7_gpio_pin_getname), 365 DEVMETHOD(gpio_pin_getflags, zy7_gpio_pin_getflags), 366 DEVMETHOD(gpio_pin_getcaps, zy7_gpio_pin_getcaps), 367 DEVMETHOD(gpio_pin_setflags, zy7_gpio_pin_setflags), 368 DEVMETHOD(gpio_pin_get, zy7_gpio_pin_get), 369 DEVMETHOD(gpio_pin_set, zy7_gpio_pin_set), 370 DEVMETHOD(gpio_pin_toggle, zy7_gpio_pin_toggle), --- 13 unchanged lines hidden --- | 378 DEVMETHOD(gpio_pin_max, zy7_gpio_pin_max), 379 DEVMETHOD(gpio_pin_getname, zy7_gpio_pin_getname), 380 DEVMETHOD(gpio_pin_getflags, zy7_gpio_pin_getflags), 381 DEVMETHOD(gpio_pin_getcaps, zy7_gpio_pin_getcaps), 382 DEVMETHOD(gpio_pin_setflags, zy7_gpio_pin_setflags), 383 DEVMETHOD(gpio_pin_get, zy7_gpio_pin_get), 384 DEVMETHOD(gpio_pin_set, zy7_gpio_pin_set), 385 DEVMETHOD(gpio_pin_toggle, zy7_gpio_pin_toggle), --- 13 unchanged lines hidden --- |