| ti_gpio.h (297541) | ti_gpio.h (298068) |
|---|---|
| 1/*- 2 * Copyright (c) 2011 3 * Ben Gray <ben.r.gray@gmail.com>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/*- 2 * Copyright (c) 2011 3 * Ben Gray <ben.r.gray@gmail.com>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/arm/ti/ti_gpio.h 297541 2016-04-04 09:29:30Z skra $ | 27 * $FreeBSD: head/sys/arm/ti/ti_gpio.h 298068 2016-04-15 16:05:41Z andrew $ |
| 28 */ 29 30#ifndef TI_GPIO_H 31#define TI_GPIO_H 32 33/* The maximum number of banks for any SoC */ 34#define MAX_GPIO_BANKS 6 35 36/* 37 * Maximum GPIOS possible, max of *_MAX_GPIO_BANKS * *_INTR_PER_BANK. 38 * These are defined in ti_gpio.c 39 */ 40#define MAX_GPIO_INTRS 8 41 | 28 */ 29 30#ifndef TI_GPIO_H 31#define TI_GPIO_H 32 33/* The maximum number of banks for any SoC */ 34#define MAX_GPIO_BANKS 6 35 36/* 37 * Maximum GPIOS possible, max of *_MAX_GPIO_BANKS * *_INTR_PER_BANK. 38 * These are defined in ti_gpio.c 39 */ 40#define MAX_GPIO_INTRS 8 41 |
| 42#ifndef ARM_INTRNG | 42#ifndef INTRNG |
| 43struct ti_gpio_mask_arg { 44 void *softc; 45 int pin; 46}; 47#else 48struct ti_gpio_irqsrc { 49 struct intr_irqsrc tgi_isrc; 50 u_int tgi_irq; --- 5 unchanged lines hidden (view full) --- 56/** 57 * Structure that stores the driver context. 58 * 59 * This structure is allocated during driver attach. 60 */ 61struct ti_gpio_softc { 62 device_t sc_dev; 63 device_t sc_busdev; | 43struct ti_gpio_mask_arg { 44 void *softc; 45 int pin; 46}; 47#else 48struct ti_gpio_irqsrc { 49 struct intr_irqsrc tgi_isrc; 50 u_int tgi_irq; --- 5 unchanged lines hidden (view full) --- 56/** 57 * Structure that stores the driver context. 58 * 59 * This structure is allocated during driver attach. 60 */ 61struct ti_gpio_softc { 62 device_t sc_dev; 63 device_t sc_busdev; |
| 64#ifndef ARM_INTRNG | 64#ifndef INTRNG |
| 65 /* Interrupt trigger type and level. */ 66 enum intr_trigger *sc_irq_trigger; 67 enum intr_polarity *sc_irq_polarity; 68#endif 69 int sc_bank; 70 int sc_maxpin; 71 struct mtx sc_mtx; 72 73 int sc_mem_rid; 74 struct resource *sc_mem_res; 75 int sc_irq_rid; 76 struct resource *sc_irq_res; | 65 /* Interrupt trigger type and level. */ 66 enum intr_trigger *sc_irq_trigger; 67 enum intr_polarity *sc_irq_polarity; 68#endif 69 int sc_bank; 70 int sc_maxpin; 71 struct mtx sc_mtx; 72 73 int sc_mem_rid; 74 struct resource *sc_mem_res; 75 int sc_irq_rid; 76 struct resource *sc_irq_res; |
| 77#ifndef ARM_INTRNG | 77#ifndef INTRNG |
| 78 /* Interrupt events. */ 79 struct intr_event **sc_events; 80 struct ti_gpio_mask_arg *sc_mask_args; 81#else 82 struct ti_gpio_irqsrc *sc_isrcs; 83#endif 84 /* The handle for the register IRQ handlers. */ 85 void *sc_irq_hdl; 86}; 87 88#endif /* TI_GPIO_H */ | 78 /* Interrupt events. */ 79 struct intr_event **sc_events; 80 struct ti_gpio_mask_arg *sc_mask_args; 81#else 82 struct ti_gpio_irqsrc *sc_isrcs; 83#endif 84 /* The handle for the register IRQ handlers. */ 85 void *sc_irq_hdl; 86}; 87 88#endif /* TI_GPIO_H */ |