| timer.c (247463) | timer.c (251371) |
|---|---|
| 1/*- 2 * Copyright (c) 2006 Benno Rice. 3 * Copyright (C) 2007-2008 MARVELL INTERNATIONAL LTD. 4 * All rights reserved. 5 * 6 * Adapted to Marvell SoC by Semihalf. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 15 unchanged lines hidden (view full) --- 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * from: FreeBSD: //depot/projects/arm/src/sys/arm/xscale/pxa2x0/pxa2x0_timer.c, rev 1 29 */ 30 31#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2006 Benno Rice. 3 * Copyright (C) 2007-2008 MARVELL INTERNATIONAL LTD. 4 * All rights reserved. 5 * 6 * Adapted to Marvell SoC by Semihalf. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 15 unchanged lines hidden (view full) --- 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * from: FreeBSD: //depot/projects/arm/src/sys/arm/xscale/pxa2x0/pxa2x0_timer.c, rev 1 29 */ 30 31#include <sys/cdefs.h> |
| 32__FBSDID("$FreeBSD: head/sys/arm/mv/timer.c 247463 2013-02-28 13:46:03Z mav $"); | 32__FBSDID("$FreeBSD: head/sys/arm/mv/timer.c 251371 2013-06-04 09:33:03Z gber $"); |
| 33 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/bus.h> 37#include <sys/kernel.h> 38#include <sys/module.h> 39#include <sys/malloc.h> 40#include <sys/rman.h> --- 10 unchanged lines hidden (view full) --- 51 52#include <dev/ofw/ofw_bus.h> 53#include <dev/ofw/ofw_bus_subr.h> 54 55#define INITIAL_TIMECOUNTER (0xffffffff) 56#define MAX_WATCHDOG_TICKS (0xffffffff) 57 58#if defined(SOC_MV_ARMADAXP) | 33 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/bus.h> 37#include <sys/kernel.h> 38#include <sys/module.h> 39#include <sys/malloc.h> 40#include <sys/rman.h> --- 10 unchanged lines hidden (view full) --- 51 52#include <dev/ofw/ofw_bus.h> 53#include <dev/ofw/ofw_bus_subr.h> 54 55#define INITIAL_TIMECOUNTER (0xffffffff) 56#define MAX_WATCHDOG_TICKS (0xffffffff) 57 58#if defined(SOC_MV_ARMADAXP) |
| 59#define MV_CLOCK_SRC get_l2clk() | 59#define MV_CLOCK_SRC 25000000 /* Timers' 25MHz mode */ |
| 60#else 61#define MV_CLOCK_SRC get_tclk() 62#endif 63 64struct mv_timer_softc { 65 struct resource * timer_res[2]; 66 bus_space_tag_t timer_bst; 67 bus_space_handle_t timer_bsh; --- 250 unchanged lines hidden (view full) --- 318 319 val = read_cpu_ctrl(RSTOUTn_MASK); 320 val |= WD_RST_OUT_EN; 321 write_cpu_ctrl(RSTOUTn_MASK, val); 322#endif 323 324 val = mv_get_timer_control(); 325 val |= CPU_TIMER_WD_EN | CPU_TIMER_WD_AUTO; | 60#else 61#define MV_CLOCK_SRC get_tclk() 62#endif 63 64struct mv_timer_softc { 65 struct resource * timer_res[2]; 66 bus_space_tag_t timer_bst; 67 bus_space_handle_t timer_bsh; --- 250 unchanged lines hidden (view full) --- 318 319 val = read_cpu_ctrl(RSTOUTn_MASK); 320 val |= WD_RST_OUT_EN; 321 write_cpu_ctrl(RSTOUTn_MASK, val); 322#endif 323 324 val = mv_get_timer_control(); 325 val |= CPU_TIMER_WD_EN | CPU_TIMER_WD_AUTO; |
| 326#if defined(SOC_MV_ARMADAXP) 327 val |= CPU_TIMER_WD_25MHZ_EN; 328#endif |
|
| 326 mv_set_timer_control(val); 327} 328 329static void 330mv_watchdog_disable(void) 331{ 332 uint32_t val, irq_cause; 333#if !defined(SOC_MV_ARMADAXP) --- 101 unchanged lines hidden (view full) --- 435{ 436 uint32_t val; 437 438 mv_set_timer_rel(1, INITIAL_TIMECOUNTER); 439 mv_set_timer(1, INITIAL_TIMECOUNTER); 440 val = mv_get_timer_control(); 441 val &= ~(CPU_TIMER0_EN | CPU_TIMER0_AUTO); 442 val |= CPU_TIMER1_EN | CPU_TIMER1_AUTO; | 329 mv_set_timer_control(val); 330} 331 332static void 333mv_watchdog_disable(void) 334{ 335 uint32_t val, irq_cause; 336#if !defined(SOC_MV_ARMADAXP) --- 101 unchanged lines hidden (view full) --- 438{ 439 uint32_t val; 440 441 mv_set_timer_rel(1, INITIAL_TIMECOUNTER); 442 mv_set_timer(1, INITIAL_TIMECOUNTER); 443 val = mv_get_timer_control(); 444 val &= ~(CPU_TIMER0_EN | CPU_TIMER0_AUTO); 445 val |= CPU_TIMER1_EN | CPU_TIMER1_AUTO; |
| 446#if defined(SOC_MV_ARMADAXP) 447 /* Enable 25MHz mode */ 448 val |= CPU_TIMER0_25MHZ_EN | CPU_TIMER1_25MHZ_EN; 449#endif |
|
| 443 mv_set_timer_control(val); 444 timers_initialized = 1; 445} | 450 mv_set_timer_control(val); 451 timers_initialized = 1; 452} |