1/*-
2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
3 * All rights reserved.
4 *
5 * Developed by Semihalf.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32#include <sys/cdefs.h>
33__FBSDID("$FreeBSD: head/sys/arm/mv/orion/db88f5xxx.c 185089 2008-11-19 11:30:44Z raj $");
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/bus.h>
38#include <sys/kernel.h>
39
40#include <vm/vm.h>
41#include <vm/pmap.h>
42
43#include <machine/pte.h>
44#include <machine/pmap.h>
45#include <machine/vmparam.h>
46
47#include <arm/mv/mvreg.h>
48#include <arm/mv/mvvar.h>
49
50/*

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141
142 /*
143 * XXX This isn't the right place to setup GPIO, but it makes sure
144 * that PCI works on 5XXX targets where U-Boot doesn't set up the GPIO
145 * correctly to handle PCI IRQs (e.g., on 5182). This code will go
146 * away once we set up GPIO in a generic way in a proper place (TBD).
147 */
148 if (irq >= 0)
149 mv_gpio_configure(IRQ2GPIO(irq), MV_GPIO_POLARITY |
150 MV_GPIO_LEVEL, ~0u);
151
152 return (irq);
153}
154
155int
156platform_pmap_init(void)
157{
158
159 pmap_bootstrap_lastaddr = MV_BASE - ARM_NOCACHE_KVA_SIZE;
160 pmap_devmap_bootstrap_table = &pmap_devmap[0];
161
162 return (0);
163}
164
165static void
166platform_identify(void *dummy)
167{
168
169 soc_identify();
170
171 /*
172 * XXX Board identification e.g. read out from FPGA or similar should
173 * go here
174 */
175}
176SYSINIT(platform_identify, SI_SUB_CPU, SI_ORDER_SECOND, platform_identify, NULL);
177
178/*
179 * TODO routine setting GPIO/MPP pins
180 */