| mvreg.h (294436) | mvreg.h (294439) |
|---|---|
| 1/*- 2 * Copyright (C) 2007-2011 MARVELL INTERNATIONAL LTD. 3 * All rights reserved. 4 * 5 * Developed by Semihalf. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 14 unchanged lines hidden (view full) --- 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * | 1/*- 2 * Copyright (C) 2007-2011 MARVELL INTERNATIONAL LTD. 3 * All rights reserved. 4 * 5 * Developed by Semihalf. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 14 unchanged lines hidden (view full) --- 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * |
| 31 * $FreeBSD: head/sys/arm/mv/mvreg.h 294436 2016-01-20 14:23:57Z zbb $ | 31 * $FreeBSD: head/sys/arm/mv/mvreg.h 294439 2016-01-20 14:45:54Z zbb $ |
| 32 */ 33 34#ifndef _MVREG_H_ 35#define _MVREG_H_ 36 37#include <arm/mv/mvwin.h> 38 39#if defined(SOC_MV_DISCOVERY) --- 420 unchanged lines hidden (view full) --- 460#endif 461 462/* 463 * SCU 464 */ 465#if defined(SOC_MV_ARMADA38X) 466#define MV_SCU_BASE (MV_BASE + 0xc000) 467#define MV_SCU_REGS_LEN 0x100 | 32 */ 33 34#ifndef _MVREG_H_ 35#define _MVREG_H_ 36 37#include <arm/mv/mvwin.h> 38 39#if defined(SOC_MV_DISCOVERY) --- 420 unchanged lines hidden (view full) --- 460#endif 461 462/* 463 * SCU 464 */ 465#if defined(SOC_MV_ARMADA38X) 466#define MV_SCU_BASE (MV_BASE + 0xc000) 467#define MV_SCU_REGS_LEN 0x100 |
| 468#define MV_SCU_REG_CTRL 0 | 468#define MV_SCU_REG_CTRL 0x00 469#define MV_SCU_REG_CONFIG 0x04 |
| 469#define MV_SCU_ENABLE 1 470#endif 471 | 470#define MV_SCU_ENABLE 1 471#endif 472 |
| 473/* 474 * PMSU 475 */ 476#if defined(SOC_MV_ARMADA38X) 477#define MV_PMSU_BASE (MV_BASE + 0x22000) 478#define MV_PMSU_REGS_LEN 0x1000 479#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) (((cpu) * 0x100) + 0x124) 480#endif 481 482/* 483 * CPU RESET 484 */ 485#if defined(SOC_MV_ARMADA38X) 486#define MV_CPU_RESET_BASE (MV_BASE + 0x20800) 487#define MV_CPU_RESET_REGS_LEN 0x8 488#define CPU_RESET_OFFSET(cpu) ((cpu) * 0x8) 489#define CPU_RESET_ASSERT 0x1 490#endif 491 |
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| 472#endif /* _MVREG_H_ */ | 492#endif /* _MVREG_H_ */ |