| mv_pci.c (275802) | mv_pci.c (294430) |
|---|---|
| 1/*- 2 * Copyright (c) 2008 MARVELL INTERNATIONAL LTD. 3 * Copyright (c) 2010 The FreeBSD Foundation | 1/*- 2 * Copyright (c) 2008 MARVELL INTERNATIONAL LTD. 3 * Copyright (c) 2010 The FreeBSD Foundation |
| 4 * Copyright (c) 2010-2012 Semihalf | 4 * Copyright (c) 2010-2015 Semihalf |
| 5 * All rights reserved. 6 * 7 * Developed by Semihalf. 8 * 9 * Portions of this software were developed by Semihalf 10 * under sponsorship from the FreeBSD Foundation. 11 * 12 * Redistribution and use in source and binary forms, with or without --- 21 unchanged lines hidden (view full) --- 34 * SUCH DAMAGE. 35 */ 36 37/* 38 * Marvell integrated PCI/PCI-Express controller driver. 39 */ 40 41#include <sys/cdefs.h> | 5 * All rights reserved. 6 * 7 * Developed by Semihalf. 8 * 9 * Portions of this software were developed by Semihalf 10 * under sponsorship from the FreeBSD Foundation. 11 * 12 * Redistribution and use in source and binary forms, with or without --- 21 unchanged lines hidden (view full) --- 34 * SUCH DAMAGE. 35 */ 36 37/* 38 * Marvell integrated PCI/PCI-Express controller driver. 39 */ 40 41#include <sys/cdefs.h> |
| 42__FBSDID("$FreeBSD: head/sys/arm/mv/mv_pci.c 275802 2014-12-15 12:15:18Z br $"); | 42__FBSDID("$FreeBSD: head/sys/arm/mv/mv_pci.c 294430 2016-01-20 14:05:21Z zbb $"); |
| 43 44#include <sys/param.h> 45#include <sys/systm.h> 46#include <sys/kernel.h> 47#include <sys/lock.h> 48#include <sys/malloc.h> 49#include <sys/module.h> 50#include <sys/mutex.h> --- 960 unchanged lines hidden (view full) --- 1011static int 1012mv_pcib_maxslots(device_t dev) 1013{ 1014 struct mv_pcib_softc *sc = device_get_softc(dev); 1015 1016 return ((sc->sc_type != MV_TYPE_PCI) ? 1 : PCI_SLOTMAX); 1017} 1018 | 43 44#include <sys/param.h> 45#include <sys/systm.h> 46#include <sys/kernel.h> 47#include <sys/lock.h> 48#include <sys/malloc.h> 49#include <sys/module.h> 50#include <sys/mutex.h> --- 960 unchanged lines hidden (view full) --- 1011static int 1012mv_pcib_maxslots(device_t dev) 1013{ 1014 struct mv_pcib_softc *sc = device_get_softc(dev); 1015 1016 return ((sc->sc_type != MV_TYPE_PCI) ? 1 : PCI_SLOTMAX); 1017} 1018 |
| 1019static int 1020mv_pcib_root_slot(device_t dev, u_int bus, u_int slot, u_int func) 1021{ 1022#if defined(SOC_MV_ARMADA38X) 1023 struct mv_pcib_softc *sc = device_get_softc(dev); 1024 uint32_t vendor, device; 1025 1026 vendor = mv_pcib_hw_cfgread(sc, bus, slot, func, PCIR_VENDOR, 1027 PCIR_VENDOR_LENGTH); 1028 device = mv_pcib_hw_cfgread(sc, bus, slot, func, PCIR_DEVICE, 1029 PCIR_DEVICE_LENGTH) & MV_DEV_FAMILY_MASK; 1030 1031 return (vendor == PCI_VENDORID_MRVL && device == MV_DEV_ARMADA38X); 1032#else 1033 /* On platforms other than Armada38x, root link is always at slot 0 */ 1034 return (slot == 0); 1035#endif 1036} 1037 |
|
| 1019static uint32_t 1020mv_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func, 1021 u_int reg, int bytes) 1022{ 1023 struct mv_pcib_softc *sc = device_get_softc(dev); 1024 1025 /* Return ~0 if link is inactive or trying to read from Root */ 1026 if ((bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_STATUS) & | 1038static uint32_t 1039mv_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func, 1040 u_int reg, int bytes) 1041{ 1042 struct mv_pcib_softc *sc = device_get_softc(dev); 1043 1044 /* Return ~0 if link is inactive or trying to read from Root */ 1045 if ((bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_STATUS) & |
| 1027 PCIE_STATUS_LINK_DOWN) || (slot == 0)) | 1046 PCIE_STATUS_LINK_DOWN) || mv_pcib_root_slot(dev, bus, slot, func)) |
| 1028 return (~0U); 1029 1030 return (mv_pcib_hw_cfgread(sc, bus, slot, func, reg, bytes)); 1031} 1032 1033static void 1034mv_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func, 1035 u_int reg, uint32_t val, int bytes) 1036{ 1037 struct mv_pcib_softc *sc = device_get_softc(dev); 1038 1039 /* Return if link is inactive or trying to write to Root */ 1040 if ((bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_STATUS) & | 1047 return (~0U); 1048 1049 return (mv_pcib_hw_cfgread(sc, bus, slot, func, reg, bytes)); 1050} 1051 1052static void 1053mv_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func, 1054 u_int reg, uint32_t val, int bytes) 1055{ 1056 struct mv_pcib_softc *sc = device_get_softc(dev); 1057 1058 /* Return if link is inactive or trying to write to Root */ 1059 if ((bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_STATUS) & |
| 1041 PCIE_STATUS_LINK_DOWN) || (slot == 0)) | 1060 PCIE_STATUS_LINK_DOWN) || mv_pcib_root_slot(dev, bus, slot, func)) |
| 1042 return; 1043 1044 mv_pcib_hw_cfgwrite(sc, bus, slot, func, reg, val, bytes); 1045} 1046 1047static int 1048mv_pcib_route_interrupt(device_t bus, device_t dev, int pin) 1049{ --- 148 unchanged lines hidden --- | 1061 return; 1062 1063 mv_pcib_hw_cfgwrite(sc, bus, slot, func, reg, val, bytes); 1064} 1065 1066static int 1067mv_pcib_route_interrupt(device_t bus, device_t dev, int pin) 1068{ --- 148 unchanged lines hidden --- |