42c42
< __FBSDID("$FreeBSD: head/sys/arm/lpc/lpc_machdep.c 257669 2013-11-05 02:57:34Z ian $");
---
> __FBSDID("$FreeBSD: head/sys/arm/lpc/lpc_machdep.c 260326 2014-01-05 18:40:06Z ian $");
60d59
< #include <dev/ic/ns16550.h>
66c65
< return (fdt_immr_va);
---
> return (arm_devmap_lastaddr());
72,74d70
<
< if (fdt_immr_addr(LPC_DEV_BASE) != 0)
< while (1);
92,96d87
< #define FDT_DEVMAP_MAX (1 + 2 + 1 + 1)
< static struct arm_devmap_entry fdt_devmap[FDT_DEVMAP_MAX] = {
< { 0, 0, 0, 0, 0, }
< };
<
98c89,91
< * Construct pmap_devmap[] with DT-derived config data.
---
> * Add a single static device mapping.
> * The values used were taken from the ranges property of the SoC node in the
> * dts file when this code was converted to arm_devmap_add_entry().
104,113c97
< /*
< * IMMR range.
< */
< fdt_devmap[0].pd_va = fdt_immr_va;
< fdt_devmap[0].pd_pa = fdt_immr_pa;
< fdt_devmap[0].pd_size = fdt_immr_size;
< fdt_devmap[0].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
< fdt_devmap[0].pd_cache = PTE_NOCACHE;
<
< arm_devmap_register_table(&fdt_devmap[0]);
---
> arm_devmap_add_entry(LPC_DEV_PHYS_BASE, LPC_DEV_SIZE);
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> bus_space_tag_t bst;
> bus_space_handle_t bsh;
>
> bst = fdtbus_bs_tag;
>
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< bus_space_write_4(fdtbus_bs_tag,
< LPC_CLKPWR_BASE, LPC_CLKPWR_TIMCLK_CTRL,
---
> bus_space_map(bst, LPC_CLKPWR_PHYS_BASE, LPC_CLKPWR_SIZE, 0, &bsh);
> bus_space_write_4(bst, bsh, LPC_CLKPWR_TIMCLK_CTRL,
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> bus_space_unmap(bst, bsh, LPC_CLKPWR_SIZE);
140,141c130,133
< bus_space_write_4(fdtbus_bs_tag, LPC_WDTIM_BASE, LPC_WDTIM_PULSE, 13000);
< bus_space_write_4(fdtbus_bs_tag, LPC_WDTIM_BASE, LPC_WDTIM_MCTRL, 0x70);
---
> bus_space_map(bst, LPC_WDTIM_PHYS_BASE, LPC_WDTIM_SIZE, 0, &bsh);
> bus_space_write_4(bst, bsh, LPC_WDTIM_PULSE, 13000);
> bus_space_write_4(bst, bsh, LPC_WDTIM_MCTRL, 0x70);
> bus_space_unmap(bst, bsh, LPC_WDTIM_SIZE);
143c135,136
< for (;;);
---
> for (;;)
> continue;
< __FBSDID("$FreeBSD: head/sys/arm/lpc/lpc_machdep.c 257669 2013-11-05 02:57:34Z ian $");
---
> __FBSDID("$FreeBSD: head/sys/arm/lpc/lpc_machdep.c 260326 2014-01-05 18:40:06Z ian $");
60d59
< #include <dev/ic/ns16550.h>
66c65
< return (fdt_immr_va);
---
> return (arm_devmap_lastaddr());
72,74d70
<
< if (fdt_immr_addr(LPC_DEV_BASE) != 0)
< while (1);
92,96d87
< #define FDT_DEVMAP_MAX (1 + 2 + 1 + 1)
< static struct arm_devmap_entry fdt_devmap[FDT_DEVMAP_MAX] = {
< { 0, 0, 0, 0, 0, }
< };
<
98c89,91
< * Construct pmap_devmap[] with DT-derived config data.
---
> * Add a single static device mapping.
> * The values used were taken from the ranges property of the SoC node in the
> * dts file when this code was converted to arm_devmap_add_entry().
104,113c97
< /*
< * IMMR range.
< */
< fdt_devmap[0].pd_va = fdt_immr_va;
< fdt_devmap[0].pd_pa = fdt_immr_pa;
< fdt_devmap[0].pd_size = fdt_immr_size;
< fdt_devmap[0].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
< fdt_devmap[0].pd_cache = PTE_NOCACHE;
<
< arm_devmap_register_table(&fdt_devmap[0]);
---
> arm_devmap_add_entry(LPC_DEV_PHYS_BASE, LPC_DEV_SIZE);
133a118,122
> bus_space_tag_t bst;
> bus_space_handle_t bsh;
>
> bst = fdtbus_bs_tag;
>
135,136c124,125
< bus_space_write_4(fdtbus_bs_tag,
< LPC_CLKPWR_BASE, LPC_CLKPWR_TIMCLK_CTRL,
---
> bus_space_map(bst, LPC_CLKPWR_PHYS_BASE, LPC_CLKPWR_SIZE, 0, &bsh);
> bus_space_write_4(bst, bsh, LPC_CLKPWR_TIMCLK_CTRL,
137a127
> bus_space_unmap(bst, bsh, LPC_CLKPWR_SIZE);
140,141c130,133
< bus_space_write_4(fdtbus_bs_tag, LPC_WDTIM_BASE, LPC_WDTIM_PULSE, 13000);
< bus_space_write_4(fdtbus_bs_tag, LPC_WDTIM_BASE, LPC_WDTIM_MCTRL, 0x70);
---
> bus_space_map(bst, LPC_WDTIM_PHYS_BASE, LPC_WDTIM_SIZE, 0, &bsh);
> bus_space_write_4(bst, bsh, LPC_WDTIM_PULSE, 13000);
> bus_space_write_4(bst, bsh, LPC_WDTIM_MCTRL, 0x70);
> bus_space_unmap(bst, bsh, LPC_WDTIM_SIZE);
143c135,136
< for (;;);
---
> for (;;)
> continue;