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pl310.h (239268) pl310.h (244914)
1/*-
2 * Copyright (c) 2012 Olivier Houchard. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.

--- 10 unchanged lines hidden (view full) ---

19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25
26/*
1/*-
2 * Copyright (c) 2012 Olivier Houchard. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.

--- 10 unchanged lines hidden (view full) ---

19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25
26/*
27 * $FreeBSD: head/sys/arm/include/pl310.h 239268 2012-08-15 03:03:03Z gonzo $
27 * $FreeBSD: head/sys/arm/include/pl310.h 244914 2012-12-31 21:19:44Z gonzo $
28 */
29
30#ifndef PL310_H_
31#define PL310_H_
28 */
29
30#ifndef PL310_H_
31#define PL310_H_
32
33/**
34 * PL310 - L2 Cache Controller register offsets.
35 *
36 */
37#define PL310_CACHE_ID 0x000
38#define CACHE_ID_RELEASE_SHIFT 0
39#define CACHE_ID_RELEASE_MASK 0x3f
40#define CACHE_ID_PARTNUM_SHIFT 6
41#define CACHE_ID_PARTNUM_MASK 0xf
42#define PL310_CACHE_TYPE 0x004
43#define PL310_CTRL 0x100
44#define CTRL_ENABLED 0x01
45#define CTRL_DISABLED 0x00
46#define PL310_AUX_CTRL 0x104
47#define AUX_CTRL_MASK 0xc0000fff
48#define AUX_CTRL_ASSOCIATIVITY_SHIFT 16
49#define AUX_CTRL_WAY_SIZE_SHIFT 17
50#define AUX_CTRL_WAY_SIZE_MASK (0x7 << 17)
51#define AUX_CTRL_SHARE_OVERRIDE (1 << 22)
52#define AUX_CTRL_NS_LOCKDOWN (1 << 26)
53#define AUX_CTRL_NS_INT_CTRL (1 << 27)
54#define AUX_CTRL_DATA_PREFETCH (1 << 28)
55#define AUX_CTRL_INSTR_PREFETCH (1 << 29)
56#define AUX_CTRL_EARLY_BRESP (1 << 30)
57#define PL310_EVENT_COUNTER_CTRL 0x200
58#define EVENT_COUNTER_CTRL_ENABLED (1 << 0)
59#define EVENT_COUNTER_CTRL_C0_RESET (1 << 1)
60#define EVENT_COUNTER_CTRL_C1_RESET (1 << 2)
61#define PL310_EVENT_COUNTER1_CONF 0x204
62#define PL310_EVENT_COUNTER0_CONF 0x208
63#define EVENT_COUNTER_CONF_NOINTR 0
64#define EVENT_COUNTER_CONF_INCR 1
65#define EVENT_COUNTER_CONF_OVFW 2
66#define EVENT_COUNTER_CONF_NOEV (0 << 2)
67#define EVENT_COUNTER_CONF_CO (1 << 2)
68#define EVENT_COUNTER_CONF_DRHIT (2 << 2)
69#define EVENT_COUNTER_CONF_DRREQ (3 << 2)
70#define EVENT_COUNTER_CONF_DWHIT (4 << 2)
71#define EVENT_COUNTER_CONF_DWREQ (5 << 2)
72#define EVENT_COUNTER_CONF_DWTREQ (6 << 2)
73#define EVENT_COUNTER_CONF_DIRHIT (7 << 2)
74#define EVENT_COUNTER_CONF_DIRREQ (8 << 2)
75#define EVENT_COUNTER_CONF_WA (9 << 2)
76#define PL310_EVENT_COUNTER1_VAL 0x20C
77#define PL310_EVENT_COUNTER0_VAL 0x210
78#define PL310_INTR_MASK 0x214
79#define PL310_MASKED_INTR_STAT 0x218
80#define PL310_RAW_INTR_STAT 0x21C
81#define PL310_INTR_CLEAR 0x220
82#define INTR_MASK_ALL ((1 << 9) - 1)
83#define INTR_MASK_ECNTR (1 << 0)
84#define INTR_MASK_PARRT (1 << 1)
85#define INTR_MASK_PARRD (1 << 2)
86#define INTR_MASK_ERRWT (1 << 3)
87#define INTR_MASK_ERRWD (1 << 4)
88#define INTR_MASK_ERRRT (1 << 5)
89#define INTR_MASK_ERRRD (1 << 6)
90#define INTR_MASK_SLVERR (1 << 7)
91#define INTR_MASK_DECERR (1 << 8)
92#define PL310_CACHE_SYNC 0x730
93#define PL310_INV_LINE_PA 0x770
94#define PL310_INV_WAY 0x77C
95#define PL310_CLEAN_LINE_PA 0x7B0
96#define PL310_CLEAN_LINE_IDX 0x7B8
97#define PL310_CLEAN_WAY 0x7BC
98#define PL310_CLEAN_INV_LINE_PA 0x7F0
99#define PL310_CLEAN_INV_LINE_IDX 0x7F8
100#define PL310_CLEAN_INV_WAY 0x7FC
101#define PL310_LOCKDOWN_D_WAY(x) (0x900 + ((x) * 8))
102#define PL310_LOCKDOWN_I_WAY(x) (0x904 + ((x) * 8))
103#define PL310_LOCKDOWN_LINE_ENABLE 0x950
104#define PL310_UNLOCK_ALL_LINES_WAY 0x954
105#define PL310_ADDR_FILTER_STAR 0xC00
106#define PL310_ADDR_FILTER_END 0xC04
107#define PL310_DEBUG_CTRL 0xF40
108#define PL310_PREFETCH_CTRL 0xF60
109#define PREFETCH_CTRL_OFFSET_MASK (0x1f)
110#define PREFETCH_CTRL_NOTSAMEID (1 << 21)
111#define PREFETCH_CTRL_INCR_DL (1 << 23)
112#define PREFETCH_CTRL_PREFETCH_DROP (1 << 24)
113#define PREFETCH_CTRL_DL_ON_WRAP (1 << 27)
114#define PREFETCH_CTRL_DATA_PREFETCH (1 << 28)
115#define PREFETCH_CTRL_INSTR_PREFETCH (1 << 29)
116#define PREFETCH_CTRL_DL (1 << 30)
117#define PL310_POWER_CTRL 0xF60
118
32struct pl310_softc {
119struct pl310_softc {
120 device_t sc_dev;
33 struct resource *sc_mem_res;
121 struct resource *sc_mem_res;
122 struct resource *sc_irq_res;
123 void* sc_irq_h;
124 int sc_enabled;
125 struct mtx sc_mtx;
34};
35
126};
127
36void platform_init_pl310(struct pl310_softc *sc);
128/**
129 * pl310_read4 - read a 32-bit value from the PL310 registers
130 * pl310_write4 - write a 32-bit value from the PL310 registers
131 * @off: byte offset within the register set to read from
132 * @val: the value to write into the register
133 *
134 *
135 * LOCKING:
136 * None
137 *
138 * RETURNS:
139 * nothing in case of write function, if read function returns the value read.
140 */
141static __inline uint32_t
142pl310_read4(struct pl310_softc *sc, bus_size_t off)
143{
37
144
145 return bus_read_4(sc->sc_mem_res, off);
146}
147
148static __inline void
149pl310_write4(struct pl310_softc *sc, bus_size_t off, uint32_t val)
150{
151
152 bus_write_4(sc->sc_mem_res, off, val);
153}
154
155void platform_pl310_init(struct pl310_softc *);
156void platform_pl310_write_ctrl(struct pl310_softc *, uint32_t);
157void platform_pl310_write_debug(struct pl310_softc *, uint32_t);
158
38#endif /* PL310_H_ */
159#endif /* PL310_H_ */