| armreg.h (204121) | armreg.h (234005) |
|---|---|
| 1/* $NetBSD: armreg.h,v 1.37 2007/01/06 00:50:54 christos Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 2001 Ben Harris 5 * Copyright (c) 1994-1996 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * --- 21 unchanged lines hidden (view full) --- 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * | 1/* $NetBSD: armreg.h,v 1.37 2007/01/06 00:50:54 christos Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 2001 Ben Harris 5 * Copyright (c) 1994-1996 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * --- 21 unchanged lines hidden (view full) --- 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * |
| 38 * $FreeBSD: head/sys/arm/include/armreg.h 204121 2010-02-20 14:52:07Z kevlo $ | 38 * $FreeBSD: head/sys/arm/include/armreg.h 234005 2012-04-07 23:48:51Z stas $ |
| 39 */ 40 41#ifndef MACHINE_ARMREG_H 42#define MACHINE_ARMREG_H 43 44#define INSN_SIZE 4 45#define INSN_COND_MASK 0xf0000000 /* Condition mask */ 46#define PSR_MODE 0x0000001f /* mode mask */ --- 265 unchanged lines hidden (view full) --- 312#define FAULT_PERM_P 0x0f /* Permission -- Page */ 313 314#define FAULT_IMPRECISE 0x400 /* Imprecise exception (XSCALE) */ 315 316/* 317 * Address of the vector page, low and high versions. 318 */ 319#define ARM_VECTORS_LOW 0x00000000U | 39 */ 40 41#ifndef MACHINE_ARMREG_H 42#define MACHINE_ARMREG_H 43 44#define INSN_SIZE 4 45#define INSN_COND_MASK 0xf0000000 /* Condition mask */ 46#define PSR_MODE 0x0000001f /* mode mask */ --- 265 unchanged lines hidden (view full) --- 312#define FAULT_PERM_P 0x0f /* Permission -- Page */ 313 314#define FAULT_IMPRECISE 0x400 /* Imprecise exception (XSCALE) */ 315 316/* 317 * Address of the vector page, low and high versions. 318 */ 319#define ARM_VECTORS_LOW 0x00000000U |
| 320#define ARM_VECTORS_HIGH 0xffff0000U | 320#define ARM_VECTORS_HIGH 0xffff0000 |
| 321 322/* 323 * ARM Instructions 324 * 325 * 3 3 2 2 2 326 * 1 0 9 8 7 0 327 * +-------+-------------------------------------------------------+ 328 * | cond | instruction dependant | 329 * |c c c c| | 330 * +-------+-------------------------------------------------------+ 331 */ 332 333#define INSN_SIZE 4 /* Always 4 bytes */ 334#define INSN_COND_MASK 0xf0000000 /* Condition mask */ 335#define INSN_COND_AL 0xe0000000 /* Always condition */ 336 337#define THUMB_INSN_SIZE 2 /* Some are 4 bytes. */ 338 339#endif /* !MACHINE_ARMREG_H */ | 321 322/* 323 * ARM Instructions 324 * 325 * 3 3 2 2 2 326 * 1 0 9 8 7 0 327 * +-------+-------------------------------------------------------+ 328 * | cond | instruction dependant | 329 * |c c c c| | 330 * +-------+-------------------------------------------------------+ 331 */ 332 333#define INSN_SIZE 4 /* Always 4 bytes */ 334#define INSN_COND_MASK 0xf0000000 /* Condition mask */ 335#define INSN_COND_AL 0xe0000000 /* Always condition */ 336 337#define THUMB_INSN_SIZE 2 /* Some are 4 bytes. */ 338 339#endif /* !MACHINE_ARMREG_H */ |