| bcm2835_intr.c (297580) | bcm2835_intr.c (298068) |
|---|---|
| 1/*- 2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3 * All rights reserved. 4 * 5 * Based on OMAP3 INTC code by Ben Gray 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 14 unchanged lines hidden (view full) --- 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 30#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3 * All rights reserved. 4 * 5 * Based on OMAP3 INTC code by Ben Gray 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 14 unchanged lines hidden (view full) --- 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 30#include <sys/cdefs.h> |
| 31__FBSDID("$FreeBSD: head/sys/arm/broadcom/bcm2835/bcm2835_intr.c 297580 2016-04-05 13:37:03Z skra $"); | 31__FBSDID("$FreeBSD: head/sys/arm/broadcom/bcm2835/bcm2835_intr.c 298068 2016-04-15 16:05:41Z andrew $"); |
| 32 33#include "opt_platform.h" 34 35#include <sys/param.h> 36#include <sys/systm.h> 37#include <sys/bus.h> 38#include <sys/kernel.h> 39#include <sys/ktr.h> --- 7 unchanged lines hidden (view full) --- 47#include <dev/ofw/openfirm.h> 48#include <dev/ofw/ofw_bus.h> 49#include <dev/ofw/ofw_bus_subr.h> 50 51#ifdef SOC_BCM2836 52#include <arm/broadcom/bcm2835/bcm2836.h> 53#endif 54 | 32 33#include "opt_platform.h" 34 35#include <sys/param.h> 36#include <sys/systm.h> 37#include <sys/bus.h> 38#include <sys/kernel.h> 39#include <sys/ktr.h> --- 7 unchanged lines hidden (view full) --- 47#include <dev/ofw/openfirm.h> 48#include <dev/ofw/ofw_bus.h> 49#include <dev/ofw/ofw_bus_subr.h> 50 51#ifdef SOC_BCM2836 52#include <arm/broadcom/bcm2835/bcm2836.h> 53#endif 54 |
| 55#ifdef ARM_INTRNG | 55#ifdef INTRNG |
| 56#include "pic_if.h" 57#endif 58 59#define INTC_PENDING_BASIC 0x00 60#define INTC_PENDING_BANK1 0x04 61#define INTC_PENDING_BANK2 0x08 62#define INTC_FIQ_CONTROL 0x0C 63#define INTC_ENABLE_BANK1 0x10 --- 36 unchanged lines hidden (view full) --- 100 (1 << 18) | (1 << 19))) 101#define INTC_PENDING_BANK2_MASK (~((1 << 21) | (1 << 22) | (1 << 23) | \ 102 (1 << 24) | (1 << 25) | (1 << 30))) 103 104#define BANK1_START 8 105#define BANK1_END (BANK1_START + 32 - 1) 106#define BANK2_START (BANK1_START + 32) 107#define BANK2_END (BANK2_START + 32 - 1) | 56#include "pic_if.h" 57#endif 58 59#define INTC_PENDING_BASIC 0x00 60#define INTC_PENDING_BANK1 0x04 61#define INTC_PENDING_BANK2 0x08 62#define INTC_FIQ_CONTROL 0x0C 63#define INTC_ENABLE_BANK1 0x10 --- 36 unchanged lines hidden (view full) --- 100 (1 << 18) | (1 << 19))) 101#define INTC_PENDING_BANK2_MASK (~((1 << 21) | (1 << 22) | (1 << 23) | \ 102 (1 << 24) | (1 << 25) | (1 << 30))) 103 104#define BANK1_START 8 105#define BANK1_END (BANK1_START + 32 - 1) 106#define BANK2_START (BANK1_START + 32) 107#define BANK2_END (BANK2_START + 32 - 1) |
| 108#ifndef ARM_INTRNG | 108#ifndef INTRNG |
| 109#define BANK3_START (BANK2_START + 32) 110#define BANK3_END (BANK3_START + 32 - 1) 111#endif 112 113#define IS_IRQ_BASIC(n) (((n) >= 0) && ((n) < BANK1_START)) 114#define IS_IRQ_BANK1(n) (((n) >= BANK1_START) && ((n) <= BANK1_END)) 115#define IS_IRQ_BANK2(n) (((n) >= BANK2_START) && ((n) <= BANK2_END)) | 109#define BANK3_START (BANK2_START + 32) 110#define BANK3_END (BANK3_START + 32 - 1) 111#endif 112 113#define IS_IRQ_BASIC(n) (((n) >= 0) && ((n) < BANK1_START)) 114#define IS_IRQ_BANK1(n) (((n) >= BANK1_START) && ((n) <= BANK1_END)) 115#define IS_IRQ_BANK2(n) (((n) >= BANK2_START) && ((n) <= BANK2_END)) |
| 116#ifndef ARM_INTRNG | 116#ifndef INTRNG |
| 117#define ID_IRQ_BCM2836(n) (((n) >= BANK3_START) && ((n) <= BANK3_END)) 118#endif 119#define IRQ_BANK1(n) ((n) - BANK1_START) 120#define IRQ_BANK2(n) ((n) - BANK2_START) 121 122#ifdef DEBUG 123#define dprintf(fmt, args...) printf(fmt, ##args) 124#else 125#define dprintf(fmt, args...) 126#endif 127 | 117#define ID_IRQ_BCM2836(n) (((n) >= BANK3_START) && ((n) <= BANK3_END)) 118#endif 119#define IRQ_BANK1(n) ((n) - BANK1_START) 120#define IRQ_BANK2(n) ((n) - BANK2_START) 121 122#ifdef DEBUG 123#define dprintf(fmt, args...) printf(fmt, ##args) 124#else 125#define dprintf(fmt, args...) 126#endif 127 |
| 128#ifdef ARM_INTRNG | 128#ifdef INTRNG |
| 129#define BCM_INTC_NIRQS 72 /* 8 + 32 + 32 */ 130 131struct bcm_intc_irqsrc { 132 struct intr_irqsrc bii_isrc; 133 u_int bii_irq; 134 uint16_t bii_disable_reg; 135 uint16_t bii_enable_reg; 136 uint32_t bii_mask; 137}; 138#endif 139 140struct bcm_intc_softc { 141 device_t sc_dev; 142 struct resource * intc_res; 143 bus_space_tag_t intc_bst; 144 bus_space_handle_t intc_bsh; | 129#define BCM_INTC_NIRQS 72 /* 8 + 32 + 32 */ 130 131struct bcm_intc_irqsrc { 132 struct intr_irqsrc bii_isrc; 133 u_int bii_irq; 134 uint16_t bii_disable_reg; 135 uint16_t bii_enable_reg; 136 uint32_t bii_mask; 137}; 138#endif 139 140struct bcm_intc_softc { 141 device_t sc_dev; 142 struct resource * intc_res; 143 bus_space_tag_t intc_bst; 144 bus_space_handle_t intc_bsh; |
| 145#ifdef ARM_INTRNG | 145#ifdef INTRNG |
| 146 struct resource * intc_irq_res; 147 void * intc_irq_hdl; 148 struct bcm_intc_irqsrc intc_isrcs[BCM_INTC_NIRQS]; 149#endif 150}; 151 152static struct bcm_intc_softc *bcm_intc_sc = NULL; 153 154#define intc_read_4(_sc, reg) \ 155 bus_space_read_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg)) 156#define intc_write_4(_sc, reg, val) \ 157 bus_space_write_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg), (val)) 158 | 146 struct resource * intc_irq_res; 147 void * intc_irq_hdl; 148 struct bcm_intc_irqsrc intc_isrcs[BCM_INTC_NIRQS]; 149#endif 150}; 151 152static struct bcm_intc_softc *bcm_intc_sc = NULL; 153 154#define intc_read_4(_sc, reg) \ 155 bus_space_read_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg)) 156#define intc_write_4(_sc, reg, val) \ 157 bus_space_write_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg), (val)) 158 |
| 159#ifdef ARM_INTRNG | 159#ifdef INTRNG |
| 160static inline void 161bcm_intc_isrc_mask(struct bcm_intc_softc *sc, struct bcm_intc_irqsrc *bii) 162{ 163 164 intc_write_4(sc, bii->bii_disable_reg, bii->bii_mask); 165} 166 167static inline void --- 187 unchanged lines hidden (view full) --- 355 return (BUS_PROBE_DEFAULT); 356} 357 358static int 359bcm_intc_attach(device_t dev) 360{ 361 struct bcm_intc_softc *sc = device_get_softc(dev); 362 int rid = 0; | 160static inline void 161bcm_intc_isrc_mask(struct bcm_intc_softc *sc, struct bcm_intc_irqsrc *bii) 162{ 163 164 intc_write_4(sc, bii->bii_disable_reg, bii->bii_mask); 165} 166 167static inline void --- 187 unchanged lines hidden (view full) --- 355 return (BUS_PROBE_DEFAULT); 356} 357 358static int 359bcm_intc_attach(device_t dev) 360{ 361 struct bcm_intc_softc *sc = device_get_softc(dev); 362 int rid = 0; |
| 363#ifdef ARM_INTRNG | 363#ifdef INTRNG |
| 364 intptr_t xref; 365#endif 366 sc->sc_dev = dev; 367 368 if (bcm_intc_sc) 369 return (ENXIO); 370 371 sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 372 if (sc->intc_res == NULL) { 373 device_printf(dev, "could not allocate memory resource\n"); 374 return (ENXIO); 375 } 376 | 364 intptr_t xref; 365#endif 366 sc->sc_dev = dev; 367 368 if (bcm_intc_sc) 369 return (ENXIO); 370 371 sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 372 if (sc->intc_res == NULL) { 373 device_printf(dev, "could not allocate memory resource\n"); 374 return (ENXIO); 375 } 376 |
| 377#ifdef ARM_INTRNG | 377#ifdef INTRNG |
| 378 xref = OF_xref_from_node(ofw_bus_get_node(dev)); 379 if (bcm_intc_pic_register(sc, xref) != 0) { 380 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->intc_res); 381 device_printf(dev, "could not register PIC\n"); 382 return (ENXIO); 383 } 384 385 rid = 0; --- 21 unchanged lines hidden (view full) --- 407 408 return (0); 409} 410 411static device_method_t bcm_intc_methods[] = { 412 DEVMETHOD(device_probe, bcm_intc_probe), 413 DEVMETHOD(device_attach, bcm_intc_attach), 414 | 378 xref = OF_xref_from_node(ofw_bus_get_node(dev)); 379 if (bcm_intc_pic_register(sc, xref) != 0) { 380 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->intc_res); 381 device_printf(dev, "could not register PIC\n"); 382 return (ENXIO); 383 } 384 385 rid = 0; --- 21 unchanged lines hidden (view full) --- 407 408 return (0); 409} 410 411static device_method_t bcm_intc_methods[] = { 412 DEVMETHOD(device_probe, bcm_intc_probe), 413 DEVMETHOD(device_attach, bcm_intc_attach), 414 |
| 415#ifdef ARM_INTRNG | 415#ifdef INTRNG |
| 416 DEVMETHOD(pic_disable_intr, bcm_intc_disable_intr), 417 DEVMETHOD(pic_enable_intr, bcm_intc_enable_intr), 418 DEVMETHOD(pic_map_intr, bcm_intc_map_intr), 419 DEVMETHOD(pic_post_filter, bcm_intc_post_filter), 420 DEVMETHOD(pic_post_ithread, bcm_intc_post_ithread), 421 DEVMETHOD(pic_pre_ithread, bcm_intc_pre_ithread), 422#endif 423 --- 5 unchanged lines hidden (view full) --- 429 bcm_intc_methods, 430 sizeof(struct bcm_intc_softc), 431}; 432 433static devclass_t bcm_intc_devclass; 434 435DRIVER_MODULE(intc, simplebus, bcm_intc_driver, bcm_intc_devclass, 0, 0); 436 | 416 DEVMETHOD(pic_disable_intr, bcm_intc_disable_intr), 417 DEVMETHOD(pic_enable_intr, bcm_intc_enable_intr), 418 DEVMETHOD(pic_map_intr, bcm_intc_map_intr), 419 DEVMETHOD(pic_post_filter, bcm_intc_post_filter), 420 DEVMETHOD(pic_post_ithread, bcm_intc_post_ithread), 421 DEVMETHOD(pic_pre_ithread, bcm_intc_pre_ithread), 422#endif 423 --- 5 unchanged lines hidden (view full) --- 429 bcm_intc_methods, 430 sizeof(struct bcm_intc_softc), 431}; 432 433static devclass_t bcm_intc_devclass; 434 435DRIVER_MODULE(intc, simplebus, bcm_intc_driver, bcm_intc_devclass, 0, 0); 436 |
| 437#ifndef ARM_INTRNG | 437#ifndef INTRNG |
| 438int 439arm_get_next_irq(int last_irq) 440{ 441 struct bcm_intc_softc *sc = bcm_intc_sc; 442 uint32_t pending; 443 int32_t irq = last_irq + 1; 444#ifdef SOC_BCM2836 445 int ret; --- 92 unchanged lines hidden --- | 438int 439arm_get_next_irq(int last_irq) 440{ 441 struct bcm_intc_softc *sc = bcm_intc_sc; 442 uint32_t pending; 443 int32_t irq = last_irq + 1; 444#ifdef SOC_BCM2836 445 int ret; --- 92 unchanged lines hidden --- |