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board_hl200.c (160282) board_hl200.c (160363)
1/*-
2 * Copyright (c) 1994-1998 Mark Brinicombe.
3 * Copyright (c) 1994 Brini.
4 * All rights reserved.
5 *
6 * This code is derived from software written for Brini by Mark Brinicombe
7 *
8 * Redistribution and use in source and binary forms, with or without

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40 *
41 * This file needs a lot of work.
42 *
43 * Created : 17/09/94
44 */
45
46#include "opt_msgbuf.h"
47#include "opt_ddb.h"
1/*-
2 * Copyright (c) 1994-1998 Mark Brinicombe.
3 * Copyright (c) 1994 Brini.
4 * All rights reserved.
5 *
6 * This code is derived from software written for Brini by Mark Brinicombe
7 *
8 * Redistribution and use in source and binary forms, with or without

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40 *
41 * This file needs a lot of work.
42 *
43 * Created : 17/09/94
44 */
45
46#include "opt_msgbuf.h"
47#include "opt_ddb.h"
48#include "opt_at91.h"
48
49#include <sys/cdefs.h>
49
50#include <sys/cdefs.h>
50__FBSDID("$FreeBSD: head/sys/arm/at91/kb920x_machdep.c 160282 2006-07-12 00:48:50Z cognet $");
51__FBSDID("$FreeBSD: head/sys/arm/at91/kb920x_machdep.c 160363 2006-07-14 22:22:57Z imp $");
51
52#define _ARM32_BUS_DMA_PRIVATE
53#include <sys/param.h>
54#include <sys/systm.h>
55#include <sys/sysproto.h>
56#include <sys/signalvar.h>
57#include <sys/imgact.h>
58#include <sys/kernel.h>

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88#include <machine/undefined.h>
89#include <machine/machdep.h>
90#include <machine/metadata.h>
91#include <machine/armreg.h>
92#include <machine/bus.h>
93#include <sys/reboot.h>
94
95#include <arm/at91/at91rm92reg.h>
52
53#define _ARM32_BUS_DMA_PRIVATE
54#include <sys/param.h>
55#include <sys/systm.h>
56#include <sys/sysproto.h>
57#include <sys/signalvar.h>
58#include <sys/imgact.h>
59#include <sys/kernel.h>

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89#include <machine/undefined.h>
90#include <machine/machdep.h>
91#include <machine/metadata.h>
92#include <machine/armreg.h>
93#include <machine/bus.h>
94#include <sys/reboot.h>
95
96#include <arm/at91/at91rm92reg.h>
97#include <arm/at91/at91_piovar.h>
98#include <arm/at91/at91_pio_rm9200.h>
96
97#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
98#define KERNEL_PT_KERN 1
99#define KERNEL_PT_KERN_NUM 22
100#define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM /* L2 table for mapping after kernel */
101#define KERNEL_PT_AFKERNEL_NUM 5
102
103/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */

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180
181#define SDRAM_START 0xa0000000
182
183#ifdef DDB
184extern vm_offset_t ksym_start, ksym_end;
185#endif
186
187static long
99
100#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
101#define KERNEL_PT_KERN 1
102#define KERNEL_PT_KERN_NUM 22
103#define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM /* L2 table for mapping after kernel */
104#define KERNEL_PT_AFKERNEL_NUM 5
105
106/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */

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183
184#define SDRAM_START 0xa0000000
185
186#ifdef DDB
187extern vm_offset_t ksym_start, ksym_end;
188#endif
189
190static long
188board_init(void)
191ramsize(void)
189{
190 uint32_t *SDRAMC = (uint32_t *)(AT91RM92_BASE + AT91RM92_SDRAMC_BASE);
191 uint32_t cr, mr;
192{
193 uint32_t *SDRAMC = (uint32_t *)(AT91RM92_BASE + AT91RM92_SDRAMC_BASE);
194 uint32_t cr, mr;
192 int banks, rows, cols, bw; /* log2 size */
195 int banks, rows, cols, bw;
193
194 cr = SDRAMC[AT91RM92_SDRAMC_CR / 4];
195 mr = SDRAMC[AT91RM92_SDRAMC_MR / 4];
196 bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2;
197 banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1;
198 rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11;
199 cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8;
200 return (1 << (cols + rows + banks + bw));
201}
202
196
197 cr = SDRAMC[AT91RM92_SDRAMC_CR / 4];
198 mr = SDRAMC[AT91RM92_SDRAMC_MR / 4];
199 bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2;
200 banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1;
201 rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11;
202 cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8;
203 return (1 << (cols + rows + banks + bw));
204}
205
206static long
207board_init(void)
208{
209 /*
210 * Since the USART supprots RS-485 multidrop mode, it allows the
211 * TX pins to float. However, for RS-232 operations, we don't want
212 * these pins to float. Instead, they should be pulled up to avoid
213 * mismatches. Linux does something similar when it configures the
214 * TX lines. This implies that we also allow the RX lines to float
215 * rather than be in the state they are left in by the boot loader.
216 * Since they are input pins, I think that this is the right thing
217 * to do.
218 */
219
220 /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */
221 at91_pio_use_periph_a(AT91RM92_PIOA_BASE,
222 AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0);
223 at91_pio_use_periph_a(AT91RM92_PIOA_BASE,
224 AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1);
225 /* PIOA's B periph: Turn USART 3's TX/RX pins */
226 at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0);
227 at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1);
228#if AT91_TSC
229 /* We're using TC0's A1 and A2 input */
230 at91_pio_use_periph_b(AT91RM92_PIOA_BASE,
231 AT91C_PA19_TIOA1 | AT91C_PA21_TIOA2, 0);
232#endif
233 /* PIOB's A periph: Turn USART 1's TX/RX pins */
234 at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0);
235 at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1);
236
237 /* Pin assignment */
238#if AT91_TSC
239 /* Assert PA24 low -- talk to rubidium */
240 at91_pio_use_gpio(AT91RM92_PIOA_BASE, AT91C_PIO_PA24);
241 at91_pio_gpio_output(AT91RM92_PIOA_BASE, AT91C_PIO_PA24, 0);
242 at91_pio_gpio_clear(AT91RM92_PIOA_BASE, AT91C_PIO_PA24);
243#endif
244
245 return (ramsize());
246}
247
203void *
204initarm(void *arg, void *arg2)
205{
206 struct pv_addr kernel_l1pt;
207 int loop;
208 u_int l1pagetable;
209 vm_offset_t freemempos;
210 vm_offset_t afterkern;

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249initarm(void *arg, void *arg2)
250{
251 struct pv_addr kernel_l1pt;
252 int loop;
253 u_int l1pagetable;
254 vm_offset_t freemempos;
255 vm_offset_t afterkern;

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